From 27b61326017bca1b04b5bf09a663aa13a8557d04 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 21 Nov 2019 07:50:37 -0600 Subject: [PATCH] Run files changed in last PR through tools/nxstyle, fix several coding standard violations. --- arch/arm/src/stm32f7/stm32_qspi.c | 100 ++++++++++-------- .../stm32f7/stm32f746g-disco/include/board.h | 11 +- .../stm32f746g-disco/src/stm32_bringup.c | 3 +- .../stm32f7/stm32f746g-disco/src/stm32_n25q.c | 49 ++++----- 4 files changed, 85 insertions(+), 78 deletions(-) diff --git a/arch/arm/src/stm32f7/stm32_qspi.c b/arch/arm/src/stm32f7/stm32_qspi.c index d673f61e84c..54e27a34ef9 100644 --- a/arch/arm/src/stm32f7/stm32_qspi.c +++ b/arch/arm/src/stm32f7/stm32_qspi.c @@ -76,7 +76,7 @@ * Pre-processor Definitions ****************************************************************************/ - /* QSPI memory synchronization */ +/* QSPI memory synchronization */ #define MEMORY_SYNC() do { ARM_DSB(); ARM_ISB(); } while (0) @@ -211,10 +211,10 @@ struct stm32f7_qspidev_s #endif #ifdef CONFIG_STM32F7_QSPI_REGDEBUG - bool wrlast; /* Last was a write */ - uint32_t addresslast; /* Last address */ - uint32_t valuelast; /* Last value */ - int ntimes; /* Number of times */ + bool wrlast; /* Last was a write */ + uint32_t addresslast; /* Last address */ + uint32_t valuelast; /* Last value */ + int ntimes; /* Number of times */ #endif }; @@ -578,7 +578,8 @@ static void qspi_dumpgpioconfig(const char *msg) uint32_t regval; spiinfo("%s:\n", msg); - /* port B */ + /* Port B */ + regval = getreg32(STM32_GPIOB_MODER); spiinfo("B_MODER:%08x\n", regval); @@ -597,7 +598,8 @@ static void qspi_dumpgpioconfig(const char *msg) regval = getreg32(STM32_GPIOB_AFRH); spiinfo("B_AFRH:%08x\n", regval); - /* port D */ + /* Port D */ + regval = getreg32(STM32_GPIOD_MODER); spiinfo("D_MODER:%08x\n", regval); @@ -616,7 +618,8 @@ static void qspi_dumpgpioconfig(const char *msg) regval = getreg32(STM32_GPIOD_AFRH); spiinfo("D_AFRH:%08x\n", regval); - /* port E */ + /* Port E */ + regval = getreg32(STM32_GPIOE_MODER); spiinfo("E_MODER:%08x\n", regval); @@ -1178,56 +1181,58 @@ static int qspi0_interrupt(int irq, void *context, FAR void *arg) /* Is it 'Transfer Complete'? */ if ((status & QSPI_SR_TCF) && (cr & QSPI_CR_TCIE)) - { - /* Acknowledge interrupt */ + { + /* Acknowledge interrupt */ - qspi_putreg(&g_qspi0dev, QSPI_FCR_CTCF, STM32_QUADSPI_FCR_OFFSET); + qspi_putreg(&g_qspi0dev, QSPI_FCR_CTCF, STM32_QUADSPI_FCR_OFFSET); - /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */ + /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer + * complete Interrupts + */ - regval = qspi_getreg(&g_qspi0dev, STM32_QUADSPI_CR_OFFSET); - regval &= ~(QSPI_CR_TEIE | QSPI_CR_TCIE | QSPI_CR_FTIE); - qspi_putreg(&g_qspi0dev, regval, STM32_QUADSPI_CR_OFFSET); + regval = qspi_getreg(&g_qspi0dev, STM32_QUADSPI_CR_OFFSET); + regval &= ~(QSPI_CR_TEIE | QSPI_CR_TCIE | QSPI_CR_FTIE); + qspi_putreg(&g_qspi0dev, regval, STM32_QUADSPI_CR_OFFSET); - /* Do the last bit of read if needed */ + /* Do the last bit of read if needed */ - if (g_qspi0dev.xctn->function == CCR_FMODE_INDRD) - { - volatile uint32_t *datareg = - (volatile uint32_t *)(g_qspi0dev.base + STM32_QUADSPI_DR_OFFSET); + if (g_qspi0dev.xctn->function == CCR_FMODE_INDRD) + { + volatile uint32_t *datareg = + (volatile uint32_t *)(g_qspi0dev.base + STM32_QUADSPI_DR_OFFSET); - /* Read any remaining data */ + /* Read any remaining data */ - while (((regval = qspi_getreg(&g_qspi0dev, STM32_QUADSPI_SR_OFFSET)) & - QSPI_SR_FLEVEL_MASK) != 0) - { - if (g_qspi0dev.xctn->idxnow < g_qspi0dev.xctn->datasize) - { - ((uint8_t *)g_qspi0dev.xctn->buffer)[g_qspi0dev.xctn->idxnow] = - *(volatile uint8_t *)datareg; - ++g_qspi0dev.xctn->idxnow; - } - else - { - /* No room at the inn */ + while (((regval = qspi_getreg(&g_qspi0dev, STM32_QUADSPI_SR_OFFSET)) & + QSPI_SR_FLEVEL_MASK) != 0) + { + if (g_qspi0dev.xctn->idxnow < g_qspi0dev.xctn->datasize) + { + ((uint8_t *)g_qspi0dev.xctn->buffer)[g_qspi0dev.xctn->idxnow] = + *(volatile uint8_t *)datareg; + ++g_qspi0dev.xctn->idxnow; + } + else + { + /* No room at the inn */ - break; - } - } - } + break; + } + } + } - /* Use 'abort' to ditch any stray fifo contents and clear BUSY flag */ + /* Use 'abort' to ditch any stray fifo contents and clear BUSY flag */ - qspi_abort(&g_qspi0dev); + qspi_abort(&g_qspi0dev); - /* Set success status */ + /* Set success status */ - g_qspi0dev.xctn->disposition = OK; + g_qspi0dev.xctn->disposition = OK; - /* Signal complete */ + /* Signal complete */ - nxsem_post(&g_qspi0dev.op_sem); - } + nxsem_post(&g_qspi0dev.op_sem); + } /* Is it 'Status Match'? */ @@ -2009,9 +2014,9 @@ static int qspi_command(struct qspi_dev_s *dev, ret = qspi_setupxctnfromcmd(&xctn, cmdinfo); if (OK != ret) - { - return ret; - } + { + return ret; + } /* Prepare for transaction */ @@ -2113,6 +2118,7 @@ static int qspi_command(struct qspi_dev_s *dev, /* because command transfers are so small, we're not going to use * DMA for them, only interrupts or polling */ + #else /* Polling mode */ diff --git a/boards/arm/stm32f7/stm32f746g-disco/include/board.h b/boards/arm/stm32f7/stm32f746g-disco/include/board.h index b731777854b..60f018d7555 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/include/board.h +++ b/boards/arm/stm32f7/stm32f746g-disco/include/board.h @@ -170,8 +170,6 @@ #define STM32_RCC_DCKCFGR1_DFSDM1SRC 0 #define STM32_RCC_DCKCFGR1_ADFSDM1SRC 0 - - /* Configure factors for PLLI2S clock */ #define STM32_RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN(192) @@ -413,12 +411,19 @@ #define BOARD_LTDC_PLLSAIR 5 /* Pixel Clock Polarity */ + #define BOARD_LTDC_GCR_PCPOL 0 /* !LTDC_GCR_PCPOL */ + /* Data Enable Polarity */ + #define BOARD_LTDC_GCR_DEPOL 0 /* !LTDC_GCR_DEPOL */ + /* Vertical Sync Polarity */ + #define BOARD_LTDC_GCR_VSPOL 0 /* !LTDC_GCR_VSPOL */ -/* Horicontal Sync Polarity */ + +/* Horizontal Sync Polarity */ + #define BOARD_LTDC_GCR_HSPOL 0 /* !LTDC_GCR_HSPOL */ /* GPIO pinset */ diff --git a/boards/arm/stm32f7/stm32f746g-disco/src/stm32_bringup.c b/boards/arm/stm32f7/stm32f746g-disco/src/stm32_bringup.c index 877358e6406..f299eacdd84 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/src/stm32_bringup.c +++ b/boards/arm/stm32f7/stm32f746g-disco/src/stm32_bringup.c @@ -95,7 +95,6 @@ int stm32_bringup(void) "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", ret, errno); return ret; - } #endif @@ -142,7 +141,7 @@ int stm32_bringup(void) #ifdef CONFIG_MTD_N25QXXX ret = stm32_n25qxxx_setup(); if (ret < 0) - { + { syslog(LOG_ERR, "ERROR: stm32_n25qxxx_setup failed: %d\n", ret); } #endif diff --git a/boards/arm/stm32f7/stm32f746g-disco/src/stm32_n25q.c b/boards/arm/stm32f7/stm32f746g-disco/src/stm32_n25q.c index ddccdaf40a3..3467565be73 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/src/stm32_n25q.c +++ b/boards/arm/stm32f7/stm32f746g-disco/src/stm32_n25q.c @@ -69,7 +69,6 @@ #include "stm32_qspi.h" - #define HAVE_N25QXXX_NXFFS /**************************************************************************** @@ -81,7 +80,7 @@ * * Description: * This function is called by board-bringup logic to configure the - * flash device. + * flash device. * * Returned Value: * Zero is returned on success. Otherwise, a negated errno value is @@ -91,46 +90,44 @@ int stm32_n25qxxx_setup(void) { + FAR struct qspi_dev_s *qspi_dev ; + FAR struct mtd_dev_s *mtd_dev; + int ret = -1; - int ret = -1; - - FAR struct qspi_dev_s *qspi_dev = stm32f7_qspi_initialize(0); - - if (!qspi_dev) + qspi_dev = stm32f7_qspi_initialize(0); + if (!qspi_dev) { - _err("ERROR: Failed to initialize W25 minor %d: %d\n", - 0, ret); - ; - return -1; + _err("ERROR: Failed to initialize W25 minor %d: %d\n", + 0, ret); + return -1; } - FAR struct mtd_dev_s *mtd_dev = n25qxxx_initialize(qspi_dev, true); - - if (!mtd_dev) + mtd_dev = n25qxxx_initialize(qspi_dev, true); + if (!mtd_dev) { - _err("ERROR: n25qxxx_initialize() failed!\n"); - return -1; + _err("ERROR: n25qxxx_initialize() failed!\n"); + return -1; } #ifdef HAVE_N25QXXX_NXFFS - /* Initialize to provide NXFFS on the N25QXXX MTD interface */ + /* Initialize to provide NXFFS on the N25QXXX MTD interface */ - ret = nxffs_initialize(mtd_dev); - if (ret < 0) + ret = nxffs_initialize(mtd_dev); + if (ret < 0) { - _err("ERROR: NXFFS initialization failed: %d\n", ret); - return ret; + _err("ERROR: NXFFS initialization failed: %d\n", ret); + return ret; } - ret = mount(NULL, "/mnt/nxffs", "nxffs", 0, NULL); - if (ret < 0) + ret = mount(NULL, "/mnt/nxffs", "nxffs", 0, NULL); + if (ret < 0) { - _err("ERROR: Failed to mount the NXFFS volume: %d\n", errno); - return ret; + _err("ERROR: Failed to mount the NXFFS volume: %d\n", errno); + return ret; } #endif - return 0; + return 0; }