mirror of
https://github.com/apache/nuttx.git
synced 2026-05-28 11:56:10 +08:00
Squashed commit of the following:
BCM2708: Add enough infrastructrue (more stubs) to get a clean compilation of the Pi Zero configuration (with many undefined things at link time).
BCM2708: Add basic interrupt handling logic
BCM2708: Add interrupt register definitions.
BCM2708: Add irq.h header file
BCM2708/Pi zero: bcm_boot.c and bcm_memorymap.h now compile. Added pizero linker script.
BCM2708/Pi Zero: Add Make.defs needed to build.
arch/arm/include/bcm2708, arch/arm/src/bcm2708, configs/pizero: Add some basic build and configuration logic.
configs/pizero: Add some basic structure of the Rasperry Pi Zero port.
Created directory configs/pizero. Nothing there now but a README.txt file.
Add initial boot.c and memorymap.c files
Author: Alan Carvalho de Assis <acassis@gmail.com>
Add AUX/UART/SPI registers definition
Author: Alan Carvalho de Assis <acassis@gmail.com>
Pizero GPIO registers
* Initial commit to add GPIO definitions
* Add remaining GPIO registers definition
Alan Carvalho de Assis <acassis@gmail.com>
BCM2708 memory map: Add VBASE defintions; fix VCSDRAM address per Alan; move all virtual address to the bottom of the file to avoid confusion -- top is all physical address; bottom is all veritural address.
Add initial memory map to BCM2708/BCM2835
Alan Carvalho de Assis <acassis@gmail.com>
This commit is contained in:
Gregory Nutt
@@ -222,6 +222,8 @@ nuttx/
|
|||||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pic32mx7mmb/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pic32mx7mmb/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||||
| |- pic32mz-starterkit/
|
| |- pic32mz-starterkit/
|
||||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pic32mz-starterkit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pic32mz-starterkit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||||
|
| |- pizero/
|
||||||
|
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pizero/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||||
| |- qemu-i486/
|
| |- qemu-i486/
|
||||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/qemu-i486/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/qemu-i486/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||||
| |- sabre-6quad/
|
| |- sabre-6quad/
|
||||||
|
|||||||
@@ -1764,6 +1764,8 @@ nuttx/
|
|||||||
| | `- README.txt
|
| | `- README.txt
|
||||||
| |- pic32mz-starterkit/
|
| |- pic32mz-starterkit/
|
||||||
| | `- README.txt
|
| | `- README.txt
|
||||||
|
| |- pizero/
|
||||||
|
| | `- README.txt
|
||||||
| |- qemu-i486/
|
| |- qemu-i486/
|
||||||
| | `- README.txt
|
| | `- README.txt
|
||||||
| |- sabre-6quad/
|
| |- sabre-6quad/
|
||||||
|
|||||||
+12
-1
@@ -23,6 +23,13 @@ config ARCH_CHIP_A1X
|
|||||||
---help---
|
---help---
|
||||||
Allwinner A1X family: A10, A10S (A12), A13 (ARM Cortex-A8)
|
Allwinner A1X family: A10, A10S (A12), A13 (ARM Cortex-A8)
|
||||||
|
|
||||||
|
config ARCH_CHIP_BCM2708
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|
bool "Broadcom BCM2708"
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||||||
|
select ARCH_ARM1176JZ
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||||||
|
select ARCH_HAVE_LOWVECTORS
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|
select ARCH_HAVE_MMU
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||||||
|
select ARCH_USE_MMU
|
||||||
|
|
||||||
config ARCH_CHIP_C5471
|
config ARCH_CHIP_C5471
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bool "TMS320 C5471"
|
bool "TMS320 C5471"
|
||||||
select ARCH_ARM7TDMI
|
select ARCH_ARM7TDMI
|
||||||
@@ -496,6 +503,7 @@ config ARCH_FAMILY
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|||||||
config ARCH_CHIP
|
config ARCH_CHIP
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string
|
string
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||||||
default "a1x" if ARCH_CHIP_A1X
|
default "a1x" if ARCH_CHIP_A1X
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||||||
|
default "bcm2708" if ARCH_CHIP_BCM2708
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||||||
default "c5471" if ARCH_CHIP_C5471
|
default "c5471" if ARCH_CHIP_C5471
|
||||||
default "dm320" if ARCH_CHIP_DM320
|
default "dm320" if ARCH_CHIP_DM320
|
||||||
default "efm32" if ARCH_CHIP_EFM32
|
default "efm32" if ARCH_CHIP_EFM32
|
||||||
@@ -698,12 +706,15 @@ endif
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|||||||
if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEX74 || ARCH_CORTEXR7F
|
if ARCH_CORTEXR4 || ARCH_CORTEXR4F || ARCH_CORTEXR5 || ARCH_CORTEXR5F || ARCH_CORTEX74 || ARCH_CORTEXR7F
|
||||||
source arch/arm/src/armv7-r/Kconfig
|
source arch/arm/src/armv7-r/Kconfig
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||||||
endif
|
endif
|
||||||
if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
|
if ARCH_ARM7TDMI || ARCH_ARM920T || ARCH_ARM926EJS || ARCH_ARM1136J || ARCH_ARM1156T2 || ARCH_ARM1176JZ
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||||||
source arch/arm/src/arm/Kconfig
|
source arch/arm/src/arm/Kconfig
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||||||
endif
|
endif
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||||||
if ARCH_CHIP_A1X
|
if ARCH_CHIP_A1X
|
||||||
source arch/arm/src/a1x/Kconfig
|
source arch/arm/src/a1x/Kconfig
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||||||
endif
|
endif
|
||||||
|
if ARCH_CHIP_BCM2708
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||||||
|
source arch/arm/src/bcm2708/Kconfig
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||||||
|
endif
|
||||||
if ARCH_CHIP_C5471
|
if ARCH_CHIP_C5471
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||||||
source arch/arm/src/c5471/Kconfig
|
source arch/arm/src/c5471/Kconfig
|
||||||
endif
|
endif
|
||||||
|
|||||||
@@ -0,0 +1,67 @@
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|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/include/bcm2708/chip.h
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||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_INCLUDE_BCM2708_CHIP_H
|
||||||
|
#define __ARCH_ARM_INCLUDE_BCM2708_CHIP_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
************************************************************************************/
|
||||||
|
/* BCM2708 Family */
|
||||||
|
|
||||||
|
#if defined(CONFIG_ARCH_CHIP_BCM2835)
|
||||||
|
#else
|
||||||
|
# error Unrecognized BCM2708 chip
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Types
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Data
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_INCLUDE_BCM2708_CHIP_H */
|
||||||
@@ -0,0 +1,174 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/include/bcm2708/irq.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* This file should never be included directed but, rather, only indirectly through
|
||||||
|
* nuttx/irq.h
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_INCLUDE_BCM2708_IRQ_H
|
||||||
|
#define __ARCH_ARM_INCLUDE_BCM2708_IRQ_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include <arch/bcm2708/chip.h>
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Chip-Specific External interrupts */
|
||||||
|
|
||||||
|
#if defined(CONFIG_ARCH_CHIP_BCM2835)
|
||||||
|
|
||||||
|
/* Interrupt decode algorithm:
|
||||||
|
*
|
||||||
|
* 1) Check bits 0 through BPR_BIT_LAST in the basic pending register. For
|
||||||
|
* each bit set, dispatch IRQ = bit number
|
||||||
|
* 2) If bits set in pending register 1, check bits IPR1_BIT_FIRST through
|
||||||
|
* IPR1_BIT_LAST for the pending 1 register. For each bit set, dispatch
|
||||||
|
* IRQ = bit number + IPR1_IRQ_FIRST - IPR1_BIT_FIRST.
|
||||||
|
* 2) If bits set in pending register 2, check bits IPR2_BIT_FIRST through
|
||||||
|
* IPR2_BIT_LAST for the pending 2 register. For each bit set, dispatch
|
||||||
|
* IRQ = bit number + IPR2_IRQ_FIRST - IPR2_BIT_FIRST.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Basic pending register */
|
||||||
|
|
||||||
|
#define BPR_IRQ_FIRST 0 /* IRQ of first defined bit */
|
||||||
|
#define BPR_BIT_FIRST 0 /* First defined bit */
|
||||||
|
|
||||||
|
#define BCM_IRQ_ARM_TIMER 0 /* Bit 0: ARM Timer IRQ pending */
|
||||||
|
#define BCM_IRQ_ARM_MAILBOX 1 /* Bit 1: ARM Mailbox IRQ pending */
|
||||||
|
#define BCM_IRQ_ARM_DOORBELL_0 2 /* Bit 2: ARM Doorbell 0 IRQ pending */
|
||||||
|
#define BCM_IRQ_ARM_DOORBELL_1 3 /* Bit 3: ARM Doorbell 2 IRQ pending */
|
||||||
|
#define BCM_IRQ_GPU0_HALTED 4 /* Bit 4: GPU0 halted IRQ pending
|
||||||
|
* (Or GPU1 halted if bit 10 of control
|
||||||
|
* register 1 is set) */
|
||||||
|
#define BCM_IRQ_GPU1_HALTED 5 /* Bit 5: GPU1 halted IRQ pending */
|
||||||
|
#define BCM_IRQ_ILLEGAL_ACCESS_1 6 /* Bit 6: Illegal access type 1 IRQ pending */
|
||||||
|
#define BCM_IRQ_ILLEGAL_ACCESS_0 7 /* Bit 7: Illegal access type 0 IRQ pending */
|
||||||
|
|
||||||
|
#define BCM_BIT_PENDING_1 8 /* Bit 8: Bits set in pending register 1 */
|
||||||
|
#define BCM_BIT_PENDING_2 9 /* Bit 9: Bits set in pending register 2 */
|
||||||
|
|
||||||
|
#define BCM_IRQ_GPU_IRQ_7 10 /* Bit 10: GPU IRQ 7 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_9 11 /* Bit 10: GPU IRQ 9 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_10 12 /* Bit 10: GPU IRQ 10 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_18 13 /* Bit 10: GPU IRQ 18 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_19 14 /* Bit 10: GPU IRQ 19 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_53 15 /* Bit 10: GPU IRQ 53 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_54 16 /* Bit 10: GPU IRQ 54 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_55 17 /* Bit 10: GPU IRQ 55 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_56 18 /* Bit 10: GPU IRQ 56 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_57 19 /* Bit 10: GPU IRQ 57 */
|
||||||
|
#define BCM_IRQ_GPU_IRQ_62 20 /* Bit 10: GPU IRQ 61 */
|
||||||
|
|
||||||
|
#define BPR_BIT_IRQMASK 0x001ffcff /* Mask of defined interrupts */
|
||||||
|
#define BPR_BIT_LAST 20 /* IRQ of last defined bit */
|
||||||
|
#define BPR_IRQ_LAST 20 /* Last defined bit */
|
||||||
|
|
||||||
|
/* IRQ pending 1 register */
|
||||||
|
|
||||||
|
#define IPR1_IRQ_FIRST (BPR_IRQ_LAST + 1) /* IRQ of first defined bit */
|
||||||
|
#define IPR1_BIT_FIRST (29) /* First defined bit */
|
||||||
|
|
||||||
|
#define BCM_IRQ_AUX_INT IPR1_IRQ_FIRST /* Bit 29: Aux interrupt */
|
||||||
|
|
||||||
|
#define IPR1_BIT_IRQMASK 0x20000000 /* Mask of defined interrupts */
|
||||||
|
#define IPR1_IRQ_LAST BCM_IRQ_AUX_INT /* IRQ of last defined bit */
|
||||||
|
#define IPR1_BIT_LAST (29) /* Last defined bit */
|
||||||
|
|
||||||
|
/* IRQ pending 1 register */
|
||||||
|
|
||||||
|
#define IPR2_IRQ_FIRST (IPR1_IRQ_LAST + 1) /* IRQ of first defined bit */
|
||||||
|
#define IPR2_BIT_FIRST (11) /* First defined bit */
|
||||||
|
|
||||||
|
#define BCM_IRQ_I2C_SPI_SLV (IPR2_IRQ_FIRST + 11) /* Bit 11: 43 I2C/SPI slave */
|
||||||
|
#define BCM_IRQ_PWA0 (IPR2_IRQ_FIRST + 13) /* Bit 12: 45 PWA0 */
|
||||||
|
#define BCM_IRQ_PWA1 (IPR2_IRQ_FIRST + 14) /* Bit 14: 46 PWA1 */
|
||||||
|
#define BCM_IRQ_SMI (IPR2_IRQ_FIRST + 16) /* Bit 16: 48 SMI */
|
||||||
|
#define BCM_IRQ_GPIO0 (IPR2_IRQ_FIRST + 17) /* Bit 17: 49 GPIO interrupt 0 */
|
||||||
|
#define BCM_IRQ_GPIO1 (IPR2_IRQ_FIRST + 18) /* Bit 18: 50 GPIO interrupt 1 */
|
||||||
|
#define BCM_IRQ_GPIO2 (IPR2_IRQ_FIRST + 19) /* Bit 19: 51 GPIO interrupt 2 */
|
||||||
|
#define BCM_IRQ_GPIO3 (IPR2_IRQ_FIRST + 20) /* Bit 20: 52 GPIO interrupt 3 */
|
||||||
|
#define BCM_IRQ_I2C (IPR2_IRQ_FIRST + 21) /* Bit 21: 53 I2C interrupt */
|
||||||
|
#define BCM_IRQ_SPI (IPR2_IRQ_FIRST + 22) /* Bit 22: 54 SPI interrupt */
|
||||||
|
#define BCM_IRQ_PCM (IPR2_IRQ_FIRST + 23) /* Bit 23: 55 PCM interrupt */
|
||||||
|
#define BCM_IRQ_UART (IPR2_IRQ_FIRST + 24) /* Bit 24: 57 UART interrupt */
|
||||||
|
|
||||||
|
#define IPR2_BIT_IRQMASK 0x01ff6800 /* Mask of defined interrupts */
|
||||||
|
#define IPR2_IRQ_LAST BCM_IRQ_UART /* IRQ of last defined bit */
|
||||||
|
#define IPR2_BIT_LAST (24) /* Last defined bit */
|
||||||
|
|
||||||
|
/* Number of interrupts */
|
||||||
|
|
||||||
|
#define NR_IRQS (IPR2_IRQ_LAST + 1)
|
||||||
|
|
||||||
|
#else
|
||||||
|
# error Unrecognized BCM2708 chip
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Types
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#define EXTERN extern "C"
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#else
|
||||||
|
#define EXTERN extern
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Function Prototypes
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_INCLUDE_BCM2708_IRQ_H */
|
||||||
@@ -72,40 +72,5 @@
|
|||||||
# include <arch/arm/irq.h>
|
# include <arch/arm/irq.h>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* Pre-processor Definitions
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* Public Types
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* Inline functions
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* Public Data
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* Public Function Prototypes
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
|
||||||
#ifdef __cplusplus
|
|
||||||
#define EXTERN extern "C"
|
|
||||||
extern "C"
|
|
||||||
{
|
|
||||||
#else
|
|
||||||
#define EXTERN extern
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#undef EXTERN
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* __ARCH_ARM_INCLUDE_IRQ_H */
|
#endif /* __ARCH_ARM_INCLUDE_IRQ_H */
|
||||||
|
|
||||||
|
|||||||
@@ -1,7 +1,7 @@
|
|||||||
############################################################################
|
############################################################################
|
||||||
# arch/arm/src/armv/Toolchain.defs
|
# arch/arm/src/armv/Toolchain.defs
|
||||||
#
|
#
|
||||||
# Copyright (C) 2012-2014 Gregory Nutt. All rights reserved.
|
# Copyright (C) 2012-2014, 2017 Gregory Nutt. All rights reserved.
|
||||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
#
|
#
|
||||||
# Redistribution and use in source and binary forms, with or without
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
|||||||
@@ -190,7 +190,7 @@
|
|||||||
* containing both.
|
* containing both.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* REVISIT: This works now of the low vector case only because the RAM
|
/* REVISIT: This works now for the low vector case only because the RAM
|
||||||
* sizes that we have been dealing with are less then 1MB so that both the
|
* sizes that we have been dealing with are less then 1MB so that both the
|
||||||
* page table and the vector table are in the same 1MB RAM block. But
|
* page table and the vector table are in the same 1MB RAM block. But
|
||||||
* this will certainly break later. Hence, the annoying warning.
|
* this will certainly break later. Hence, the annoying warning.
|
||||||
|
|||||||
@@ -0,0 +1,18 @@
|
|||||||
|
#
|
||||||
|
# For a description of the syntax of this configuration file,
|
||||||
|
# see the file kconfig-language.txt in the NuttX tools repository.
|
||||||
|
#
|
||||||
|
|
||||||
|
if ARCH_CHIP_BCM2708
|
||||||
|
|
||||||
|
comment "BCM2708 Configuration Options"
|
||||||
|
|
||||||
|
choice
|
||||||
|
prompt "BCM2708 Chip Selection"
|
||||||
|
default ARCH_CHIP_BCM2835
|
||||||
|
|
||||||
|
config ARCH_CHIP_BCM2835
|
||||||
|
bool "Broadcom BCM2835"
|
||||||
|
|
||||||
|
endchoice # BCM2708 Configuration Option
|
||||||
|
endif # ARCH_CHIP_BCM2708
|
||||||
@@ -0,0 +1,72 @@
|
|||||||
|
############################################################################
|
||||||
|
# arch/arm/bcm2708/Make.defs
|
||||||
|
#
|
||||||
|
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions
|
||||||
|
# are met:
|
||||||
|
#
|
||||||
|
# 1. Redistributions of source code must retain the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer.
|
||||||
|
# 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer in
|
||||||
|
# the documentation and/or other materials provided with the
|
||||||
|
# distribution.
|
||||||
|
# 3. Neither the name Gregory Nutt nor the names of its contributors may be
|
||||||
|
# used to endorse or promote products derived from this software
|
||||||
|
# without specific prior written permission.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
# POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
############################################################################
|
||||||
|
|
||||||
|
# The "head" object, i.e., the one that must forced into the link in order
|
||||||
|
# to draw in all of the other components. In this case, the "head" object
|
||||||
|
# is the power-up reset handling logic.
|
||||||
|
|
||||||
|
HEAD_ASRC = up_head.S
|
||||||
|
|
||||||
|
# Common assembly language files
|
||||||
|
|
||||||
|
CMN_ASRCS = up_cache.S up_fullcontextrestore.S up_saveusercontext.S
|
||||||
|
CMN_ASRCS += up_vectors.S up_vectoraddrexcptn.S up_vectortab.S vfork.S
|
||||||
|
|
||||||
|
# Common C source files
|
||||||
|
|
||||||
|
CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
|
||||||
|
CMN_CSRCS += up_dataabort.c up_mdelay.c up_udelay.c up_exit.c up_idle.c
|
||||||
|
CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
|
||||||
|
CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
|
||||||
|
CMN_CSRCS += up_prefetchabort.c up_releasepending.c up_releasestack.c
|
||||||
|
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c
|
||||||
|
CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_syscall.c up_unblocktask.c
|
||||||
|
CMN_CSRCS += up_undefinedinsn.c up_usestack.c up_vfork.c
|
||||||
|
|
||||||
|
# Use common heap allocation for now (may need to be customized later)
|
||||||
|
|
||||||
|
CMN_CSRCS += up_allocateheap.c
|
||||||
|
|
||||||
|
# Configuration dependent C and assembly language files
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_PAGING),y)
|
||||||
|
CMN_CSRCS += up_pginitialize.c up_checkmapping.c up_allocpage.c up_va2pte.c
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_STACK_COLORATION),y)
|
||||||
|
CMN_CSRCS += up_checkstack.c
|
||||||
|
endif
|
||||||
|
|
||||||
|
CHIP_CSRCS = bcm_boot.c bcm_memorymap.c bcm_clockconfig.c bcm_irq.c
|
||||||
@@ -0,0 +1,411 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_boot.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
* Author: Alan Carvalho de Assis <acassis@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <assert.h>
|
||||||
|
#include <debug.h>
|
||||||
|
|
||||||
|
#ifdef CONFIG_PAGING
|
||||||
|
# include <nuttx/page.h>
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <arch/board/board.h>
|
||||||
|
|
||||||
|
#include "arm.h"
|
||||||
|
#include "cache.h"
|
||||||
|
#include "up_internal.h"
|
||||||
|
#include "up_arch.h"
|
||||||
|
|
||||||
|
#include "chip.h"
|
||||||
|
#include "bcm_config.h"
|
||||||
|
#include "bcm_clockconfig.h"
|
||||||
|
#include "bcm_memorymap.h"
|
||||||
|
#include "bcm_lowputc.h"
|
||||||
|
#include "bcm_serial.h"
|
||||||
|
#include "bcm_boot.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_DEBUG_FEATURES
|
||||||
|
# define PROGRESS(c) bcm_lowputc(c)
|
||||||
|
#else
|
||||||
|
# define PROGRESS(c)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Symbols defined via the linker script */
|
||||||
|
|
||||||
|
extern uint32_t _vector_start; /* Beginning of vector block */
|
||||||
|
extern uint32_t _vector_end; /* End+1 of vector block */
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Private Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_set_level1entry
|
||||||
|
*****************************************************************************/
|
||||||
|
|
||||||
|
static inline void bcm_set_level1entry(uint32_t paddr, uint32_t vaddr,
|
||||||
|
uint32_t mmuflags)
|
||||||
|
{
|
||||||
|
uint32_t *pgtable = (uint32_t *)PGTABLE_BASE_VADDR;
|
||||||
|
uint32_t index = vaddr >> 20;
|
||||||
|
|
||||||
|
/* Save the page table entry */
|
||||||
|
|
||||||
|
pgtable[index] = (paddr | mmuflags);
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_setupmappings
|
||||||
|
*
|
||||||
|
* Description
|
||||||
|
* Map all of the initial memory regions defined in g_section_mapping[]
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static inline void bcm_setupmappings(void)
|
||||||
|
{
|
||||||
|
int i, j;
|
||||||
|
|
||||||
|
for (i = 0; i < g_num_mappings; i++)
|
||||||
|
{
|
||||||
|
uint32_t sect_paddr = g_section_mapping[i].physbase;
|
||||||
|
uint32_t sect_vaddr = g_section_mapping[i].virtbase;
|
||||||
|
uint32_t mmuflags = g_section_mapping[i].mmuflags;
|
||||||
|
|
||||||
|
for (j = 0; j < g_section_mapping[i].nsections; j++)
|
||||||
|
{
|
||||||
|
bcm_set_level1entry(sect_paddr, sect_vaddr, mmuflags);
|
||||||
|
sect_paddr += SECTION_SIZE;
|
||||||
|
sect_vaddr += SECTION_SIZE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_vectorsize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Return the size of the vector data
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static inline size_t bcm_vectorsize(void)
|
||||||
|
{
|
||||||
|
uintptr_t src;
|
||||||
|
uintptr_t end;
|
||||||
|
|
||||||
|
src = (uintptr_t)&_vector_start;
|
||||||
|
end = (uintptr_t)&_vector_end;
|
||||||
|
|
||||||
|
return (size_t)(end - src);
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_copyvectorblock
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Copy the interrupt block to its final destination. Vectors are already
|
||||||
|
* positioned at the beginning of the text region and only need to be
|
||||||
|
* copied in the case where we are using high vectors or where the beginning
|
||||||
|
* of the text region cannot be remapped to address zero.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static void bcm_copyvectorblock(void)
|
||||||
|
{
|
||||||
|
uint32_t *src;
|
||||||
|
uint32_t *end;
|
||||||
|
uint32_t *dest;
|
||||||
|
|
||||||
|
#ifdef CONFIG_PAGING
|
||||||
|
/* If we are using re-mapped vectors in an area that has been marked
|
||||||
|
* read only, then temporarily mark the mapping write-able (non-buffered).
|
||||||
|
*/
|
||||||
|
|
||||||
|
bcm_vectorpermissions(MMU_L2_VECTRWFLAGS);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Copy the vectors into SDRAM at the address that will be mapped to the
|
||||||
|
* vector address:
|
||||||
|
*
|
||||||
|
* BCM_VECTOR_PADDR - Unmapped, physical address of vector table in SDRAM
|
||||||
|
* BCM_VECTOR_VSDRAM - Virtual address of vector table in SDRAM
|
||||||
|
* BCM_VECTOR_VADDR - Virtual address of vector table (0x00000000 or
|
||||||
|
* 0xffff0000)
|
||||||
|
*/
|
||||||
|
|
||||||
|
src = (uint32_t *)&_vector_start;
|
||||||
|
end = (uint32_t *)&_vector_end;
|
||||||
|
dest = (uint32_t *)BCM_VECTOR_VSDRAM;
|
||||||
|
|
||||||
|
while (src < end)
|
||||||
|
{
|
||||||
|
*dest++ = *src++;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Flush the DCache to assure that the vector data is in physical RAM */
|
||||||
|
|
||||||
|
cp15_flush_idcache((uint32_t)BCM_VECTOR_VSDRAM,
|
||||||
|
(uint32_t)BCM_VECTOR_VSDRAM + bcm_vectorsize());
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_wdtdisable
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Disable the watchdog timer. The BCM2708 always boots with the watchdog
|
||||||
|
* timer enabled at its maximum timeout (16 seconds). The watchdog timer
|
||||||
|
* can disabled by writing to the Watchdog Mode Register (WDT_MR). The
|
||||||
|
* WDT_MR, however, can be written only one time after the CPU has been
|
||||||
|
* reset.
|
||||||
|
*
|
||||||
|
* So if no watchdog timer driver has been configured, the watchdog timer
|
||||||
|
* must be disabled as part of the start up logic. But, on the other
|
||||||
|
* hand, we must not write to the WDT_MR register if the watchdog timer
|
||||||
|
* driver is configured. In that case, some later application will
|
||||||
|
* configure the WDT and begin periodic pinging (within 16 seconds,
|
||||||
|
* hopefully).
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef CONFIG_BCM2708_WDT
|
||||||
|
static inline void bcm_wdtdisable(void)
|
||||||
|
{
|
||||||
|
/* REVISIT: WDT initialization */
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
# define bcm_wdtdisable()
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: arm_boot
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Complete boot operations started in arm_head.S
|
||||||
|
*
|
||||||
|
* Boot Sequence
|
||||||
|
*
|
||||||
|
* This logic may be executing in SDRAM or in external memory: CS0, DDR,
|
||||||
|
* CS1, CS2, or CS3. It may be executing in CS0 or SDRAM through the
|
||||||
|
* action of the BCM2708 "first level bootloader;" it might be executing in
|
||||||
|
* CS1-3 through the action of some second level bootloader that provides
|
||||||
|
* configuration for those memories.
|
||||||
|
*
|
||||||
|
* The system always boots from the ROM memory at address 0x0000:0000,
|
||||||
|
* starting the internal first level bootloader. That bootloader can be
|
||||||
|
* configured to work in different ways using the BMS pin and the contents
|
||||||
|
* of the Boot Sequence Configuration Register (BSC_CR).
|
||||||
|
*
|
||||||
|
* If the BMS_BIT is read "1", then the first level bootloader will
|
||||||
|
* support execution of code in the memory connected to CS0 on the EBI
|
||||||
|
* interface (presumably NOR flash). The following sequence is performed
|
||||||
|
* by the first level bootloader if BMS_BIT is "1":
|
||||||
|
*
|
||||||
|
* - The main clock is the on-chip 12 MHz RC oscillator,
|
||||||
|
* - The Static Memory Controller is configured with timing allowing
|
||||||
|
* code execution in CS0 external memory at 12 MHz
|
||||||
|
* - AXI matrix is configured to remap EBI CS0 address at 0x0
|
||||||
|
* - 0x0000:0000 is loaded in the Program Counter register
|
||||||
|
*
|
||||||
|
* The user software in the external memory must perform the next
|
||||||
|
* operation in order to complete the clocks and SMC timings configuration
|
||||||
|
* to run at a higher clock frequency:
|
||||||
|
*
|
||||||
|
* - Enable the 32768 Hz oscillator if best accuracy is needed
|
||||||
|
* - Reprogram the SMC setup, cycle, hold, mode timing registers for EBI
|
||||||
|
* CS0, to adapt them to the new clock.
|
||||||
|
* - Program the PMC (Main Oscillator Enable or Bypass mode)
|
||||||
|
* - Program and Start the PLL
|
||||||
|
* - Switch the system clock to the new value
|
||||||
|
*
|
||||||
|
* If the BMS_BIT is read "0", then the first level bootloader will
|
||||||
|
* perform:
|
||||||
|
*
|
||||||
|
* - Basic chip initialization: XTal or external clock frequency
|
||||||
|
* detection:
|
||||||
|
*
|
||||||
|
* a. Stack Setup for ARM supervisor mode
|
||||||
|
* b. Main Oscillator Detection: The bootloader attempts to use an
|
||||||
|
* external crystal. If this is not successful, then the 12 MHz
|
||||||
|
* Fast RC internal oscillator is used as the main osciallator.
|
||||||
|
* c. Main Clock Selection: The Master Clock source is switched from
|
||||||
|
* to the main oscillator without prescaler. PCK and MCK are now
|
||||||
|
* the Main Clock.
|
||||||
|
* d. PLLA Initialization: PLLA is configured to get a PCK at 96 MHz
|
||||||
|
* and an MCK at 48 MHz. If an external clock or crystal frequency
|
||||||
|
* running at 12 MHz is found, then the PLLA is configured to allow
|
||||||
|
* USB communication.
|
||||||
|
*
|
||||||
|
* - Attempt to retrieve a valid code from external non-volatile
|
||||||
|
* memories (NVM): SPI0 CS0 Flash Boot, SD Card Boot, NAND Flash Boot,
|
||||||
|
* SPI0 CS1 Flash Boot, or TWI EEPROM Boot. Different heuristics are
|
||||||
|
* used with each media type. If a valid image is found, it is copied
|
||||||
|
* to internal SDRAM and started.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void arm_boot(void)
|
||||||
|
{
|
||||||
|
#if defined(CONFIG_ARCH_RAMFUNCS)
|
||||||
|
const uint32_t *src;
|
||||||
|
#endif
|
||||||
|
#if defined(CONFIG_ARCH_RAMFUNCS)
|
||||||
|
uint32_t *dest;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* __start provided the basic MMU mappings for SDRAM. Now provide mappings
|
||||||
|
* for all IO regions (Including the vector region).
|
||||||
|
*/
|
||||||
|
|
||||||
|
bcm_setupmappings();
|
||||||
|
PROGRESS('A');
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_RAMFUNCS
|
||||||
|
/* Copy any necessary code sections from FLASH to RAM. The correct
|
||||||
|
* destination in SDRAM is given by _sramfuncs and _eramfuncs. The
|
||||||
|
* temporary location is in flash after the data initialization code
|
||||||
|
* at _framfuncs
|
||||||
|
*/
|
||||||
|
|
||||||
|
for (src = &_framfuncs, dest = &_sramfuncs; dest < &_eramfuncs; )
|
||||||
|
{
|
||||||
|
*dest++ = *src++;
|
||||||
|
}
|
||||||
|
|
||||||
|
PROGRESS('B');
|
||||||
|
|
||||||
|
/* Flush the copied RAM functions into physical RAM so that will
|
||||||
|
* be available when fetched into the I-Cache.
|
||||||
|
*/
|
||||||
|
|
||||||
|
cp15_flush_idcache((uint32_t)&_sramfuncs, (uint32_t)&_eramfuncs)
|
||||||
|
PROGRESS('C');
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Setup up vector block. _vector_start and _vector_end are exported from
|
||||||
|
* arm_vector.S
|
||||||
|
*/
|
||||||
|
|
||||||
|
bcm_copyvectorblock();
|
||||||
|
PROGRESS('D');
|
||||||
|
|
||||||
|
/* Disable the watchdog timer */
|
||||||
|
|
||||||
|
bcm_wdtdisable();
|
||||||
|
PROGRESS('E');
|
||||||
|
|
||||||
|
/* Initialize clocking to settings provided by board-specific logic */
|
||||||
|
|
||||||
|
bcm_clockconfig();
|
||||||
|
PROGRESS('F');
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_FPU
|
||||||
|
/* Initialize the FPU */
|
||||||
|
|
||||||
|
arm_fpuconfig();
|
||||||
|
PROGRESS('G');
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Perform board-specific memroy initialization, This must include
|
||||||
|
* initialization of board-specific memory resources (e.g., SDRAM)
|
||||||
|
*
|
||||||
|
* NOTE: We must use caution prior to this point to make sure that
|
||||||
|
* the logic does not access any global variables that might lie
|
||||||
|
* in SDRAM.
|
||||||
|
*/
|
||||||
|
|
||||||
|
bcm_memory_initialize();
|
||||||
|
PROGRESS('H');
|
||||||
|
|
||||||
|
#ifdef NEED_SDRAM_REMAPPING
|
||||||
|
/* SDRAM was configured in a temporary state to support low-level
|
||||||
|
* initialization. Now that the SDRAM has been fully initialized,
|
||||||
|
* we can reconfigure the SDRAM in its final, fully cache-able state.
|
||||||
|
*/
|
||||||
|
|
||||||
|
bcm_remap();
|
||||||
|
PROGRESS('I');
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_BOOT_SDRAM_DATA
|
||||||
|
/* If .data and .bss reside in SDRAM, then initialize the data sections
|
||||||
|
* now after SDRAM has been initialized.
|
||||||
|
*/
|
||||||
|
|
||||||
|
arm_data_initialize();
|
||||||
|
PROGRESS('J');
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Perform board-specific device initialization. This would include
|
||||||
|
* configuration of board specific resources such as GPIOs, LEDs, etc.
|
||||||
|
*/
|
||||||
|
|
||||||
|
bcm_board_initialize();
|
||||||
|
PROGRESS('K');
|
||||||
|
|
||||||
|
/* Perform common, low-level chip initialization (might do nothing) */
|
||||||
|
|
||||||
|
bcm_lowsetup();
|
||||||
|
PROGRESS('L');
|
||||||
|
|
||||||
|
#ifdef USE_EARLYSERIALINIT
|
||||||
|
/* Perform early serial initialization if we are going to use the serial
|
||||||
|
* driver.
|
||||||
|
*/
|
||||||
|
|
||||||
|
bcm_earlyserialinit();
|
||||||
|
PROGRESS('M');
|
||||||
|
#endif
|
||||||
|
PROGRESS('\n');
|
||||||
|
}
|
||||||
@@ -0,0 +1,116 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_boot.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_BCM_BOOT_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_BCM_BOOT_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include <nuttx/compiler.h>
|
||||||
|
|
||||||
|
#include <sys/types.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
#include "up_internal.h"
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Function Prototypes
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
#define EXTERN extern "C"
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#else
|
||||||
|
#define EXTERN extern
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_memory_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* All BCM2708 architectures must provide the following entry point. This
|
||||||
|
* entry point is called early in the initialization before memory has
|
||||||
|
* been configured. This board-specific function is responsible for
|
||||||
|
* configuring any on-board memories.
|
||||||
|
*
|
||||||
|
* Logic in bcm_memory_initialize must be careful to avoid using any
|
||||||
|
* global variables because those will be uninitialized at the time this
|
||||||
|
* function is called.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void bcm_memory_initialize(void);
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_board_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* All BCM2708 architectures must provide the following entry point. This
|
||||||
|
* entry point is called in the initialization phase -- after
|
||||||
|
* bcm_memory_initialize and after all memory has been configured and
|
||||||
|
* mapped but before any devices have been initialized.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void bcm_board_initialize(void);
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_BCM_BOOT_H */
|
||||||
@@ -0,0 +1,70 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_clockconfig.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include "bcm_config.h"
|
||||||
|
#include "bcm_clockconfig.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_clockconfig
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Called to initialize the BCM2708. This does whatever setup is needed to
|
||||||
|
* put the SoC in a usable state. This includes the initialization of
|
||||||
|
* clocking using the settings in board.h.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void bcm_clockconfig(void)
|
||||||
|
{
|
||||||
|
/* Don't change the current basic clock configuration if we are running
|
||||||
|
* from SDRAM. In this case, some bootloader logic has already configured
|
||||||
|
* clocking and SDRAM. We are pretty much committed to using things the
|
||||||
|
* way that the bootloader has left them.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CONFIG_BOOT_RUNFROMSDRAM
|
||||||
|
# warning Missing logic
|
||||||
|
#endif
|
||||||
|
}
|
||||||
@@ -0,0 +1,61 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_clockconfig.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_BCM_CLOCKCONFIG_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_BCM_CLOCKCONFIG_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Function Prototypes
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_clockconfig
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Called to initialize the BCM2708. This does whatever setup is needed to
|
||||||
|
* put the SoC in a usable state. This includes the initialization of
|
||||||
|
* clocking using the settings in board.h.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void bcm_clockconfig(void);
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_BCM_CLOCKCONFIG_H */
|
||||||
@@ -0,0 +1,55 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_config.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_BCM_CONFIG_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_BCM_CONFIG_H 1
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Configuration **********************************************************/
|
||||||
|
|
||||||
|
/* Is there a UART enabled? */
|
||||||
|
|
||||||
|
/* Is there a serial console? */
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_BCM_CONFIG_H */
|
||||||
@@ -0,0 +1,313 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm/bcm_irq.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <errno.h>
|
||||||
|
#include <assert.h>
|
||||||
|
#include <debug.h>
|
||||||
|
|
||||||
|
#include <nuttx/irq.h>
|
||||||
|
#include <nuttx/arch.h>
|
||||||
|
|
||||||
|
#include "arm.h"
|
||||||
|
#include "up_arch.h"
|
||||||
|
#include "up_internal.h"
|
||||||
|
#include "group/group.h"
|
||||||
|
|
||||||
|
#include "chip/bcm2708_irq.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* g_current_regs[] holds a references to the current interrupt level
|
||||||
|
* register storage structure. If is non-NULL only during interrupt
|
||||||
|
* processing. Access to g_current_regs[] must be through the macro
|
||||||
|
* CURRENT_REGS for portability.
|
||||||
|
*/
|
||||||
|
|
||||||
|
volatile uint32_t *g_current_regs[1];
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: up_irqinitialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* This function is called by up_initialize() during the bring-up of the
|
||||||
|
* system. It is the responsibility of this function to but the interrupt
|
||||||
|
* subsystem into the working and ready state.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void up_irqinitialize(void)
|
||||||
|
{
|
||||||
|
/* Disable all interrupts */
|
||||||
|
|
||||||
|
putreg32(IRQ_DBR_ALLINTS, BCM_IRQ_DBR);
|
||||||
|
putreg32(IRQ_DIR1_ALLINTS, BCM_IRQ_DIR1);
|
||||||
|
putreg32(IRQ_DIR2_ALLINTS, BCM_IRQ_DIR2);
|
||||||
|
|
||||||
|
/* currents_regs is non-NULL only while processing an interrupt */
|
||||||
|
|
||||||
|
CURRENT_REGS = NULL;
|
||||||
|
|
||||||
|
#ifndef CONFIG_SUPPRESS_INTERRUPTS
|
||||||
|
/* And finally, enable interrupts */
|
||||||
|
|
||||||
|
up_irq_restore(SVC_MODE | PSR_F_BIT);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: up_decodeirq
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* This function is called from the IRQ vector handler in arm_vectors.S.
|
||||||
|
* At this point, the interrupt has been taken and the registers have
|
||||||
|
* been saved on the stack. This function simply needs to determine the
|
||||||
|
* the irq number of the interrupt and then to call irq_dispatch to
|
||||||
|
* dispatch the interrupt.
|
||||||
|
*
|
||||||
|
* Input parameters:
|
||||||
|
* regs - A pointer to the register save area on the stack.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void up_decodeirq(uint32_t *regs)
|
||||||
|
{
|
||||||
|
uint32_t bpr;
|
||||||
|
uint32_t ipr;
|
||||||
|
uint32_t mask;
|
||||||
|
int bitno;
|
||||||
|
int irq;
|
||||||
|
|
||||||
|
/* Current regs non-zero indicates that we are processing an interrupt;
|
||||||
|
* CURRENT_REGS is also used to manage interrupt level context switches.
|
||||||
|
*
|
||||||
|
* Nested interrupts are not supported.
|
||||||
|
*/
|
||||||
|
|
||||||
|
DEBUGASSERT(CURRENT_REGS == NULL);
|
||||||
|
CURRENT_REGS = regs;
|
||||||
|
|
||||||
|
/* Read the basic pending register first */
|
||||||
|
|
||||||
|
bpr = getreg32(BCM_IRQ_BPR);
|
||||||
|
|
||||||
|
/* Handle any pending interrupts in the BPR register first */
|
||||||
|
|
||||||
|
for (bitno = BPR_BIT_FIRST;
|
||||||
|
(bpr & BPR_BIT_IRQMASK) != 0 && bitno <= BPR_BIT_LAST;
|
||||||
|
bitno++)
|
||||||
|
{
|
||||||
|
mask = 1 << bitno;
|
||||||
|
if ((bpr & mask) != 0)
|
||||||
|
{
|
||||||
|
/* Clear the bit in the BPR in hope that we may be
|
||||||
|
* able to terminate the loop early.
|
||||||
|
*/
|
||||||
|
|
||||||
|
bpr &= ~mask;
|
||||||
|
|
||||||
|
/* Dispatch the interrupt */
|
||||||
|
|
||||||
|
irq = bitno + IPR1_IRQ_FIRST - IPR1_BIT_FIRST;
|
||||||
|
irq_dispatch(irq, regs);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check for pending interrupts in IPR1 */
|
||||||
|
|
||||||
|
if ((bpr & BCM_BIT_PENDING_1) != 0)
|
||||||
|
{
|
||||||
|
/* Read the pending 1 register */
|
||||||
|
|
||||||
|
ipr = getreg32(BCM_IRQ_IPR1);
|
||||||
|
|
||||||
|
/* Handle any pending interrupts in the IPR1 register first */
|
||||||
|
|
||||||
|
for (bitno = IPR1_BIT_FIRST;
|
||||||
|
(ipr & IPR1_BIT_IRQMASK) != 0 && bitno <= IPR1_BIT_LAST;
|
||||||
|
bitno++)
|
||||||
|
{
|
||||||
|
mask = 1 << bitno;
|
||||||
|
if ((ipr & mask) != 0)
|
||||||
|
{
|
||||||
|
/* Clear the bit in the IPR1 in hope that we may be
|
||||||
|
* able to terminate the loop early.
|
||||||
|
*/
|
||||||
|
|
||||||
|
ipr &= ~mask;
|
||||||
|
|
||||||
|
/* Dispatch the interrupt */
|
||||||
|
|
||||||
|
irq = bitno + IPR1_IRQ_FIRST - IPR1_BIT_FIRST;
|
||||||
|
irq_dispatch(irq, regs);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check for pending interrupts in IPR2 */
|
||||||
|
|
||||||
|
if ((bpr & BCM_BIT_PENDING_2) != 0)
|
||||||
|
{
|
||||||
|
/* Read the pending 2 register */
|
||||||
|
|
||||||
|
ipr = getreg32(BCM_IRQ_IPR2);
|
||||||
|
|
||||||
|
/* Handle any pending interrupts in the IPR2 register first */
|
||||||
|
|
||||||
|
for (bitno = IPR2_BIT_FIRST;
|
||||||
|
(ipr & IPR2_BIT_IRQMASK) != 0 && bitno <= IPR2_BIT_LAST;
|
||||||
|
bitno++)
|
||||||
|
{
|
||||||
|
mask = 1 << bitno;
|
||||||
|
if ((ipr & mask) != 0)
|
||||||
|
{
|
||||||
|
/* Clear the bit in the IPR2 in hope that we may be
|
||||||
|
* able to terminate the loop early.
|
||||||
|
*/
|
||||||
|
|
||||||
|
ipr &= ~mask;
|
||||||
|
|
||||||
|
/* Dispatch the interrupt */
|
||||||
|
|
||||||
|
irq = bitno + IPR2_IRQ_FIRST - IPR2_BIT_FIRST;
|
||||||
|
irq_dispatch(irq, regs);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV)
|
||||||
|
/* Check for a context switch. If a context switch occurred, then
|
||||||
|
* CURRENT_REGS will have a different value than it did on entry. If an
|
||||||
|
* interrupt level context switch has occurred, then restore the
|
||||||
|
* floating point state and the establish the correct address environment
|
||||||
|
* before returning from the interrupt.
|
||||||
|
*/
|
||||||
|
|
||||||
|
if (regs != CURRENT_REGS)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_ARCH_FPU
|
||||||
|
/* Restore floating point registers */
|
||||||
|
|
||||||
|
up_restorefpu((uint32_t *)CURRENT_REGS);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_ADDRENV
|
||||||
|
/* Make sure that the address environment for the previously running
|
||||||
|
* task is closed down gracefully (data caches dump, MMU flushed) and
|
||||||
|
* set up the address environment for the new thread at the head of
|
||||||
|
* the ready-to-run list.
|
||||||
|
*/
|
||||||
|
|
||||||
|
(void)group_addrenv(NULL);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Set CURRENT_REGS to NULL to indicate that we are no longer in an
|
||||||
|
* interrupt handler.
|
||||||
|
*/
|
||||||
|
|
||||||
|
CURRENT_REGS = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: up_disable_irq
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Disable the IRQ specified by 'irq'
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void up_disable_irq(int irq)
|
||||||
|
{
|
||||||
|
unsigned int bitno;
|
||||||
|
|
||||||
|
if (irq <= BPR_IRQ_LAST)
|
||||||
|
{
|
||||||
|
bitno = irq - BPR_IRQ_FIRST + BPR_BIT_FIRST;
|
||||||
|
putreg32(BCM_IRQ_DBR, (uint32_t)1 << bitno);
|
||||||
|
}
|
||||||
|
else if (irq <= IPR1_IRQ_LAST)
|
||||||
|
{
|
||||||
|
bitno = irq - IPR1_IRQ_FIRST + IPR1_BIT_FIRST;
|
||||||
|
putreg32(BCM_IRQ_DIR1, (uint32_t)1 << bitno);
|
||||||
|
}
|
||||||
|
else if (irq <= IPR2_IRQ_LAST)
|
||||||
|
{
|
||||||
|
bitno = irq - IPR2_IRQ_FIRST + IPR2_BIT_FIRST;
|
||||||
|
putreg32(BCM_IRQ_DIR2, (uint32_t)1 << bitno);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: up_enable_irq
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Enable the IRQ specified by 'irq'
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void up_enable_irq(int irq)
|
||||||
|
{
|
||||||
|
unsigned int bitno;
|
||||||
|
|
||||||
|
if (irq <= BPR_IRQ_LAST)
|
||||||
|
{
|
||||||
|
bitno = irq - BPR_IRQ_FIRST + BPR_BIT_FIRST;
|
||||||
|
putreg32(BCM_IRQ_EBR, (uint32_t)1 << bitno);
|
||||||
|
}
|
||||||
|
else if (irq <= IPR1_IRQ_LAST)
|
||||||
|
{
|
||||||
|
bitno = irq - IPR1_IRQ_FIRST + IPR1_BIT_FIRST;
|
||||||
|
putreg32(BCM_IRQ_EIR1, (uint32_t)1 << bitno);
|
||||||
|
}
|
||||||
|
else if (irq <= IPR2_IRQ_LAST)
|
||||||
|
{
|
||||||
|
bitno = irq - IPR2_IRQ_FIRST + IPR2_BIT_FIRST;
|
||||||
|
putreg32(BCM_IRQ_EIR2, (uint32_t)1 << bitno);
|
||||||
|
}
|
||||||
|
}
|
||||||
@@ -0,0 +1,114 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2780/bcm_lowputc.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_BCM_LOWPUTC_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_BCM_LOWPUTC_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include <nuttx/compiler.h>
|
||||||
|
|
||||||
|
#include <sys/types.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
#include "up_internal.h"
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Types
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef IMX_HAVE_UART
|
||||||
|
/* This structure describes the configuration of an UART */
|
||||||
|
|
||||||
|
struct uart_config_s
|
||||||
|
{
|
||||||
|
uint32_t baud; /* Configured baud */
|
||||||
|
uint8_t parity; /* 0=none, 1=odd, 2=even */
|
||||||
|
uint8_t bits; /* Number of bits (5-9) */
|
||||||
|
bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
|
||||||
|
};
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Function Prototypes
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_lowsetup
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Called at the very beginning of _start. Performs low level
|
||||||
|
* initialization including setup of the console UART. This UART done
|
||||||
|
* early so that the serial console is available for debugging very early
|
||||||
|
* in the boot sequence.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void bcm_lowsetup(void);
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_uart_configure
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Configure a UART for non-interrupt driven operation
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef IMX_HAVE_UART
|
||||||
|
int bcm_uart_configure(uint32_t base, FAR const struct uart_config_s *config);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: bcm_lowputc
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Output a byte with as few system dependencies as possible. This will even work
|
||||||
|
* BEFORE the console is initialized if we are booting from U-Boot (and the same
|
||||||
|
* UART is used for the console, of course.)
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG_FEATURES)
|
||||||
|
void bcm_lowputc(int ch);
|
||||||
|
#else
|
||||||
|
# define bcm_lowputc(ch)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_BCM_LOWPUTC_H */
|
||||||
@@ -0,0 +1,74 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_memorymap.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
* Author: Alan Carvalho de Assis <acassis@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include "chip/bcm_memorymap.h"
|
||||||
|
#include "bcm_memorymap.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* This table describes how to map a set of 1Mb pages to space the physical
|
||||||
|
* address space of the BCM2708/BCM2835.
|
||||||
|
*/
|
||||||
|
|
||||||
|
const struct section_mapping_s g_section_mapping[] =
|
||||||
|
{
|
||||||
|
/* BCM2708 Address Sections Memories */
|
||||||
|
|
||||||
|
{ BCM_SDRAM_PSECTION, BCM_SDRAM_VSECTION, /* SDRAM */
|
||||||
|
BCM_SDRAM_MMUFLAGS, BCM_SDRAM_NSECTIONS
|
||||||
|
},
|
||||||
|
{ BCM_VCSDRAM_PSECTION, BCM_VCSDRAM_PSECTION, /* VideoCore SDRAM */
|
||||||
|
BCM_VCRAM_MMUFLAGS, BCM_VCSDRAM_NSECTIONS
|
||||||
|
},
|
||||||
|
{ BCM_PERIPH_PSECTION, BCM_PERIPH_PSECTION, /* Peripherals */
|
||||||
|
BCM_PERIPH_MMUFLAGS, BCM_PERIPH_NSECTIONS
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
/* The number of entries in the mapping table */
|
||||||
|
|
||||||
|
#define NMAPPINGS \
|
||||||
|
(sizeof(g_section_mapping) / sizeof(struct section_mapping_s))
|
||||||
|
|
||||||
|
const size_t g_num_mappings = NMAPPINGS;
|
||||||
@@ -0,0 +1,76 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_memorymap.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_IMX_MEMORYMAP_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_IMX_MEMORYMAP_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <sys/types.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#include <arch/bcm2708/chip.h>
|
||||||
|
|
||||||
|
#include "chip/bcm2708_memorymap.h"
|
||||||
|
#include "arm.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Types
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
struct section_mapping_s
|
||||||
|
{
|
||||||
|
uint32_t physbase; /* Physical address of the region to be mapped */
|
||||||
|
uint32_t virtbase; /* Virtual address of the region to be mapped */
|
||||||
|
uint32_t mmuflags; /* MMU settings for the region (e.g., cache-able) */
|
||||||
|
uint32_t nsections; /* Number of mappings in the region */
|
||||||
|
};
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* This table describes how to map a set of 1Mb pages to space the physical
|
||||||
|
* address space of the BCM2708.
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern const struct section_mapping_s g_section_mapping[];
|
||||||
|
extern const size_t g_num_mappings;
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_IMX_MEMORYMAP_H */
|
||||||
@@ -0,0 +1,126 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/bcm_serial.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_BCM_SERIAL_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_BCM_SERIAL_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include "up_internal.h"
|
||||||
|
#include "bcm_config.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Types
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Inline Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Data
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
#define EXTERN extern "C"
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#else
|
||||||
|
#define EXTERN extern
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Function Prototypes
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_earlyserialinit
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Performs the low level UART initialization early in debug so that the
|
||||||
|
* serial console will be available during bootup. This must be called
|
||||||
|
* before up_serialinit.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef USE_EARLYSERIALINIT
|
||||||
|
void bcm_earlyserialinit(void);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: uart_earlyserialinit
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Performs the low level UART initialization early in debug so that the
|
||||||
|
* serial console will be available during bootup. This must be called
|
||||||
|
* before up_serialinit.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#if defined(USE_EARLYSERIALINIT) && defined(IMX6_HAVE_UART)
|
||||||
|
void uart_earlyserialinit(void);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: uart_serialinit
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Register the UART serial console and serial ports. This assumes that
|
||||||
|
* uart_earlyserialinit was called previously.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef IMX6_HAVE_UART
|
||||||
|
void uart_serialinit(void);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_BCM_SERIAL_H */
|
||||||
@@ -0,0 +1,67 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/chip.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_CHIP_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include "chip/bcm2708_memorymap.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/* Cache line sizes (in bytes) */
|
||||||
|
|
||||||
|
#define ARM_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
|
#define ARM_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Types
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Data
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_H */
|
||||||
@@ -0,0 +1,255 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/chip/bcm2708_gpio.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Alan Carvalho de Assis <acassis@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_GPIO_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_GPIO_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include "chip/bcm2708_memorymap.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/* GPIO Register Offsets ************************************************************/
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPFSEL0_OFFSET 0x0000 /* GPIO Function Select 0 */
|
||||||
|
#define BCM_GPIO_GPFSEL1_OFFSET 0x0004 /* GPIO Function Select 1 */
|
||||||
|
#define BCM_GPIO_GPFSEL2_OFFSET 0x0008 /* GPIO Function Select 2 */
|
||||||
|
#define BCM_GPIO_GPFSEL3_OFFSET 0x000c /* GPIO Function Select 3 */
|
||||||
|
#define BCM_GPIO_GPFSEL4_OFFSET 0x0010 /* GPIO Function Select 4 */
|
||||||
|
#define BCM_GPIO_GPFSEL5_OFFSET 0x0014 /* GPIO Function Select 5 */
|
||||||
|
#define BCM_GPIO_GPSET0_OFFSET 0x001c /* GPIO Pin Output Set 0 */
|
||||||
|
#define BCM_GPIO_GPSET1_OFFSET 0x0020 /* GPIO Pin Output Set 1 */
|
||||||
|
#define BCM_GPIO_GPCLR0_OFFSET 0x0028 /* GPIO Pin Output Clear 0 */
|
||||||
|
#define BCM_GPIO_GPCLR1_OFFSET 0x002c /* GPIO Pin Output Clear 1 */
|
||||||
|
#define BCM_GPIO_GPLEV0_OFFSET 0x0034 /* GPIO Pin Level 0 */
|
||||||
|
#define BCM_GPIO_GPLEV1_OFFSET 0x0038 /* GPIO Pin Level 1 */
|
||||||
|
#define BCM_GPIO_GPEDS0_OFFSET 0x0040 /* GPIO Pin Event Detect Status 0 */
|
||||||
|
#define BCM_GPIO_GPEDS1_OFFSET 0x0044 /* GPIO Pin Event Detect Status 1 */
|
||||||
|
#define BCM_GPIO_GPREN0_OFFSET 0x004c /* GPIO Pin Rising Edge Detect Enable 0 */
|
||||||
|
#define BCM_GPIO_GPREN1_OFFSET 0x0050 /* GPIO Pin Rising Edge Detect Enable 1 */
|
||||||
|
#define BCM_GPIO_GPFEN0_OFFSET 0x0058 /* GPIO Pin Falling Edge Detect Enable 0 */
|
||||||
|
#define BCM_GPIO_GPFEN1_OFFSET 0x005c /* GPIO Pin Falling Edge Detect Enable 1 */
|
||||||
|
#define BCM_GPIO_GPHEN0_OFFSET 0x0064 /* GPIO Pin High Detect Enable 0 */
|
||||||
|
#define BCM_GPIO_GPHEN1_OFFSET 0x0068 /* GPIO Pin High Detect Enable 1 */
|
||||||
|
#define BCM_GPIO_GPLEN0_OFFSET 0x0070 /* GPIO Pin Low Detect Enable 0 */
|
||||||
|
#define BCM_GPIO_GPLEN1_OFFSET 0x0074 /* GPIO Pin Low Detect Enable 1 */
|
||||||
|
#define BCM_GPIO_GPAREN0_OFFSET 0x007c /* GPIO Pin Async. Rising Edge Detect 0 */
|
||||||
|
#define BCM_GPIO_GPAREN1_OFFSET 0x0080 /* GPIO Pin Async. Rising Edge Detect 1 */
|
||||||
|
#define BCM_GPIO_GPAFEN0_OFFSET 0x0088 /* GPIO Pin Async. Falling Edge Detect 0 */
|
||||||
|
#define BCM_GPIO_GPAFEN1_OFFSET 0x008c /* GPIO Pin Async. Falling Edge Detect 1 */
|
||||||
|
#define BCM_GPIO_GPPUD_OFFSET 0x0094 /* GPIO Pin Pull-up/down Enable */
|
||||||
|
#define BCM_GPIO_GPPUDCLK0_OFFSET 0x0098 /* GPIO Pin Pull-up/down Enable Clock 0 */
|
||||||
|
#define BCM_GPIO_GPPUDCLK1_OFFSET 0x009c /* GPIO Pin Pull-up/down Enable Clock 1 */
|
||||||
|
|
||||||
|
/* GPIO Register Addresses **********************************************************/
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPFSEL0 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPFSEL1 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPFSEL2 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL2_OFFSET)
|
||||||
|
#define BCM_GPIO_GPFSEL3 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL3_OFFSET)
|
||||||
|
#define BCM_GPIO_GPFSEL4 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL4_OFFSET)
|
||||||
|
#define BCM_GPIO_GPFSEL5 (BCM_GPIO_VBASE+BCM_GPIO_GPFSEL5_OFFSET)
|
||||||
|
#define BCM_GPIO_GPSET0 (BCM_GPIO_VBASE+BCM_BCM_GPIO_GPSET0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPSET1 (BCM_GPIO_VBASE+BCM_BCM_GPIO_GPSET1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPCLR0 (BCM_GPIO_VBASE+BCM_GPIO_GPCLR0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPCLR1 (BCM_GPIO_VBASE+BCM_GPIO_GPCLR1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPLEV0 (BCM_GPIO_VBASE+BCM_GPIO_GPLEV0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPLEV1 (BCM_GPIO_VBASE+BCM_GPIO_GPLEV1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPEDS0 (BCM_GPIO_VBASE+BCM_GPIO_GPEDS0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPEDS1 (BCM_GPIO_VBASE+BCM_GPIO_GPEDS1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPREN0 (BCM_GPIO_VBASE+BCM_GPIO_GPREN0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPREN1 (BCM_GPIO_VBASE+BCM_GPIO_GPREN1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPFEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPFEN0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPFEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPFEN1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPHEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPHEN0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPHEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPHEN1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPLEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPLEN0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPLEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPLEN1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPAREN0 (BCM_GPIO_VBASE+BCM_GPIO_GPAREN0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPAREN1 (BCM_GPIO_VBASE+BCM_GPIO_GPAREN1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPAFEN0 (BCM_GPIO_VBASE+BCM_GPIO_GPAFEN0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPAFEN1 (BCM_GPIO_VBASE+BCM_GPIO_GPAFEN1_OFFSET)
|
||||||
|
#define BCM_GPIO_GPPUD (BCM_GPIO_VBASE+BCM_GPIO_GPPUD_OFFSET)
|
||||||
|
#define BCM_GPIO_GPPUDCLK0 (BCM_GPIO_VBASE+BCM_GPIO_GPPUDCLK0_OFFSET)
|
||||||
|
#define BCM_GPIO_GPPUDCLK1 (BCM_GPIO_VBASE+BCM_GPIO_GPPUDCLK1_OFFSET)
|
||||||
|
|
||||||
|
/* GPIO Register Bit Definitions ****************************************************/
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx0_SHIFT 0
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx0_MASK (7 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_INPUT (0 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx0_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx0_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx1_SHIFT 3
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx1_MASK (7 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_INPUT (0 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx1_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx1_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx2_SHIFT 6
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx2_MASK (7 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_INPUT (0 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx2_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx2_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx3_SHIFT 9
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx3_MASK (7 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_INPUT (0 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx3_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx3_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx4_SHIFT 12
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx4_MASK (7 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_INPUT (0 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx4_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx4_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx5_SHIFT 15
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx5_MASK (7 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_INPUT (0 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx5_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx5_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx6_SHIFT 18
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx6_MASK (7 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_INPUT (0 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx6_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx6_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx7_SHIFT 21
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx7_MASK (7 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_INPUT (0 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx7_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx7_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx8_SHIFT 24
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx8_MASK (7 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_INPUT (0 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx8_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx8_SHIFT)
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx9_SHIFT 27
|
||||||
|
#define BCM_GPIO_GPFSEL_FSELx9_MASK (7 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_INPUT (0 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_OUTPUT (1 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_ALT0 (4 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_ALT1 (5 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_ALT2 (6 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_ALT3 (7 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_ALT4 (3 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
# define BCM_GPIO_GPFSEL_FSELx9_ALT5 (2 << BCM_GPIO_GPFSEL_FSELx9_SHIFT)
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPSET0_SET(n) (1 << n) /* Set GPIO pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPSET1_SET(n) (1 << (n-32)) /* Set GPIO pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPCLR0_CLR(n) (1 << n) /* Clear GPIO pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPCLR1_CLR(n) (1 << (n-32)) /* Clear GPIO pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPLEV0_LEV(n) (1 << n) /* Level of pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPLEV1_LEV(n) (1 << (n-32)) /* Level of pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPEDS0_EDS(n) (1 << n) /* Event detected in pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPEDS1_EDS(n) (1 << (n-32)) /* Event detected in pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPREN0_REN(n) (1 << n) /* Rising Edge Enable pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPREN1_REN(n) (1 << (n-32)) /* Rising Edge Enable pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPFEN0_FEN(n) (1 << n) /* Falling Edge Enable pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPFEN0_FEN(n) (1 << (n-32)) /* Falling Edge Enable pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPHEN0_HEN(n) (1 << n) /* High Detect Enable pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPHEN1_HEN(n) (1 << (n-32)) /* High Detect Enable pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPLEN0_LEN(n) (1 << n) /* Low Detect Enable pin n 0-31 */
|
||||||
|
#define BCM_GPIO_GPLEN1_LEN(n) (1 << (n-32)) /* Low Detect Enable pin n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPAREN0_AREN(n) (1 << n) /* Asynchronous Rising Edge Detect Enable n 0-31 */
|
||||||
|
#define BCM_GPIO_GPAREN1_AREN(n) (1 << (n-32) /* Asynchronous Rising Edge Detect Enable n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPAFEN0_AFEN(n) (1 << n) /* Asynchronous Falling Edge Detect Enable n 0-31 */
|
||||||
|
#define BCM_GPIO_GPAFEN1_AFEN(n) (1 << (n-32) /* Asynchronous Falling Edge Detect Enable n 32-53 */
|
||||||
|
|
||||||
|
#define BCM_GPIO_GPPUD_PUD_SHIFT 0 /* bit 0-1: Pull-up/down register */
|
||||||
|
#define BCM_GPIO_GPPUD_PUD_MASK (3 << BCM_GPIO_GPPUD_PUD_SHIFT)
|
||||||
|
#define BCM_GPIO_GPPUD_PUD_OFF (0 << BCM_GPIO_GPPUD_PUD_SHIFT) /* Disable Pull-up/down */
|
||||||
|
#define BCM_GPIO_GPPUD_PUD_PD (1 << BCM_GPIO_GPPUD_PUD_SHIFT) /* Enable Pull-down */
|
||||||
|
#define BCM_GPIO_GPPUD_PUD_PU (2 << BCM_GPIO_GPPUD_PUD_SHIFT) /* Enable Pull-up */
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_BCM2708_GPIO_H */
|
||||||
|
|
||||||
@@ -0,0 +1,135 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/chip/bcm2708_irq.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Alan Carvalho de Assis <acassis@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_IRQ_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_IRQ_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <arch/bcm2708/irq.h>
|
||||||
|
|
||||||
|
#include "chip/bcm2708_memorymap.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/* IRQ Register Offsets ************************************************************/
|
||||||
|
|
||||||
|
#define BCM_IRQ_BPR_OFFSET 0x0200 /* IRQ basic pending register */
|
||||||
|
#define BCM_IRQ_IPR1_OFSET 0x0204 /* IRQ pending 1 register */
|
||||||
|
#define BCM_IRQ_IPR2_OFFSET 0x0208 /* IRQ pending 2 register */
|
||||||
|
#define BCM_IRQ_FIQC_OFFSET 0x020c /* FIQ control register */
|
||||||
|
#define BCM_IRQ_EIR1_OFFSET 0x0210 /* Enable IRQs 1 register */
|
||||||
|
#define BCM_IRQ_EIR2_OFFSET 0x0214 /* Enable IRQs 2 register */
|
||||||
|
#define BCM_IRQ_EBR_OFFSET 0x0218 /* Enable Basic IRQs register */
|
||||||
|
#define BCM_IRQ_DIR1_OFFSET 0x021c /* Disable IRQs 1 register */
|
||||||
|
#define BCM_IRQ_DIR2_OFFSET 0x0220 /* Disable IRQs 2 register */
|
||||||
|
#define BCM_IRQ_DBR_OFFSET 0x0224 /* Disable Basic IRQs */
|
||||||
|
|
||||||
|
/* IRQ Register Addresses **********************************************************/
|
||||||
|
|
||||||
|
#define BCM_IRQ_BPR (BCM_IRQ_OFFSET + BCM_IRQ_BPR_OFFSET)
|
||||||
|
#define BCM_IRQ_IPR1 (BCM_IRQ_OFFSET + BCM_IRQ_IPR1_OFSET)
|
||||||
|
#define BCM_IRQ_IPR2 (BCM_IRQ_OFFSET + BCM_IRQ_IPR2_OFFSET)
|
||||||
|
#define BCM_IRQ_FIQC (BCM_IRQ_OFFSET + BCM_IRQ_FIQC_OFFSET)
|
||||||
|
#define BCM_IRQ_EIR1 (BCM_IRQ_OFFSET + BCM_IRQ_EIR1_OFFSET)
|
||||||
|
#define BCM_IRQ_EIR2 (BCM_IRQ_OFFSET + BCM_IRQ_EIR2_OFFSET)
|
||||||
|
#define BCM_IRQ_EBR (BCM_IRQ_OFFSET + BCM_IRQ_EBR_OFFSET)
|
||||||
|
#define BCM_IRQ_DIR1 (BCM_IRQ_OFFSET + BCM_IRQ_DIR1_OFFSET)
|
||||||
|
#define BCM_IRQ_DIR2 (BCM_IRQ_OFFSET + BCM_IRQ_DIR2_OFFSET)
|
||||||
|
#define BCM_IRQ_DBR (BCM_IRQ_OFFSET + BCM_IRQ_DBR_OFFSET)
|
||||||
|
|
||||||
|
/* IRQ Register Bit Definitions ****************************************************/
|
||||||
|
|
||||||
|
/* IRQ basic pending, IRQ pending 1, and IRQ pending 2 registers:
|
||||||
|
* (See arch/arm/include/bcm2708/irq.h)
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IRQ_BPR_ALLINTS BPR_BIT_IRQMASK
|
||||||
|
#define IRQ_IPR1_ALLINTS IPR1_BIT_IRQMASK
|
||||||
|
#define IRQ_IPR2_ALLINTS IPR2_BIT_IRQMASK
|
||||||
|
|
||||||
|
/* The following provide interrupt numbers that may be used with the FIQC register.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IPR1_IRQ_AUX_INT 29 /* Aux interrupt */
|
||||||
|
#define IPR2_IRQ_I2C_SPI_SLV 43 /* I2C/SPI slave */
|
||||||
|
#define IPR2_IRQ_PWA0 45 /* PWA0 */
|
||||||
|
#define IPR2_IRQ_PWA1 46 /* PWA1 */
|
||||||
|
#define IPR2_IRQ_SMI 48 /* SMI */
|
||||||
|
#define IPR2_IRQ_GPIO0 49 /* GPIO interrupt 0 */
|
||||||
|
#define IPR2_IRQ_GPIO1 50 /* GPIO interrupt 1 */
|
||||||
|
#define IPR2_IRQ_GPIO2 51 /* GPIO interrupt 2 */
|
||||||
|
#define IPR2_IRQ_GPIO3 52 /* GPIO interrupt 3 */
|
||||||
|
#define IPR2_IRQ_I2C 53 /* I2C interrupt */
|
||||||
|
#define IPR2_IRQ_SPI 54 /* SPI interrupt */
|
||||||
|
#define IPR2_IRQ_PCM 55 /* PCM interrupt */
|
||||||
|
#define IPR2_IRQ_UART 57 /* UART interrupt */
|
||||||
|
#define BPR_IRQ_ARM_TIMER 64 /* ARM Timer interrupt */
|
||||||
|
#define BPR_IRQ_ARM_MAILBOX 65 /* ARM Mailbox interrupt */
|
||||||
|
#define BPR_IRQ_ARM_DOORBELL_0 66 /* ARM Doorbell 0 interrupt */
|
||||||
|
#define BPR_IRQ_ARM_DOORBELL_1 67 /* ARM Doorbell 1 interrupt */
|
||||||
|
#define BPR_IRQ_GPU0_HALTED 68 /* GPU0 Halted interrupt (or GPU1) */
|
||||||
|
#define BPR_IRQ_GPU1_HALTED 69 /* GPU1 Halted interrupt */
|
||||||
|
#define BPR_IRQ_ILLEGAL_ACCESS_1 70 /* Illegal access type-1 interrupt */
|
||||||
|
#define BPR_IRQ_ILLEGAL_ACCESS_0 71 /* Illegal access type-0 interrupt */
|
||||||
|
|
||||||
|
/* FIQ control register */
|
||||||
|
|
||||||
|
#define IRQ_FIQC_SOURCE_SHIFT 0 /* Bits 0-6: FIQ source */
|
||||||
|
#define IRQ_FIQC_SOURCE_MASK (0x3f << IRQ_FIQC_SOURCE_SHIFT)
|
||||||
|
# define IRQ_FIQC_SOURCE(n) (0x3f << IRQ_FIQC_SOURCE_SHIFT)
|
||||||
|
#define IRQ_FIQC_ENABLE (1 << 7) /* Bit 7: FIQ enable */
|
||||||
|
|
||||||
|
/* IRQ basic enable/disable, IRQ enable/disable 1, and IRQ enable/disable 2
|
||||||
|
* registers: Same as the interrupt pending registers except that only bits
|
||||||
|
* 0-7 of the BPR are available (see arch/arm/include/bcm2708/irq.h).
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IRQ_EBR_ALLINTS 0x000000ff
|
||||||
|
#define IRQ_EIR1_ALLINTS IPR1_BIT_IRQMASK
|
||||||
|
#define IRQ_EIR2_ALLINTS IPR2_BIT_IRQMASK
|
||||||
|
|
||||||
|
#define IRQ_DBR_ALLINTS 0x000000ff
|
||||||
|
#define IRQ_DIR1_ALLINTS IPR1_BIT_IRQMASK
|
||||||
|
#define IRQ_DIR2_ALLINTS IPR2_BIT_IRQMASK
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM2708_CHIP_BCM2780_IRQ_H */
|
||||||
|
|
||||||
@@ -0,0 +1,189 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/chip/bcm2708_memorymap.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Alan Carvalho de Assis <acassis@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM_CHIP_BCM_MEMORYMAP_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM_CHIP_BCM_MEMORYMAP_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/* BCM2835 Physical (unmapped) Memory Map *******************************************/
|
||||||
|
/* BCM2835 System 1-Mbyte aligned physical sections (PSECTIONS) */
|
||||||
|
|
||||||
|
#define BCM_SDRAM_PSECTION 0x00000000 /* Beginning of SDRAM section */
|
||||||
|
#define BCM_VCSDRAM_PSECTION 0x16000000 /* The VideoCore SDRAM is part of SDRAM */
|
||||||
|
#define BCM_PERIPH_PSECTION 0x20000000 /* Beginning of the peripheral section */
|
||||||
|
|
||||||
|
/* BCM2708 Peripherals PSECTION Offsets */
|
||||||
|
|
||||||
|
#define BCM_SYSTMR_OFFSET 0x00003000 /* System Timer peripheral */
|
||||||
|
#define BCM_MPHI_OFFSET 0x00006000 /* Message Parallel Host Interface */
|
||||||
|
#define BCM_DMA_OFFSET 0x00007000 /* DMA Controller */
|
||||||
|
#define BCM_IRQ_OFFSET 0x0000b000 /* ARM interrupt register */
|
||||||
|
#define BCM_TIMER_OFFSET 0x0000b400 /* Timer peripheral */
|
||||||
|
#define BCM_PM_OFFSET 0x00100000 /* Power Management, Reset and Watchdog */
|
||||||
|
#define BCM_CMGPCLK_OFFSET 0x00101070 /* Clock Manager General Purpose Clocks*/
|
||||||
|
#define BCM_PCM_CLK_OFFSET 0x00101098 /* PCM Clock */
|
||||||
|
#define BCM_RNG_OFFSET 0x00104000 /* Hardware RNG */
|
||||||
|
#define BCM_GPIO_OFFSET 0x00200000 /* GPIO peripheral */
|
||||||
|
#define BCM_UART0_OFFSET 0x00201000 /* UART0 peripheral */
|
||||||
|
#define BCM_MMCI0_OFFSET 0x00202000 /* MMC0 peripheral */
|
||||||
|
#define BCM_I2S_OFFSET 0x00203000 /* PCM/I2S audio interface */
|
||||||
|
#define BCM_SPI0_OFFSET 0x00204000 /* Serial interface peripheral */
|
||||||
|
#define BCM_BSC0_OFFSET 0x00205000 /* Broadcom Serial Controller 0 (BSC0) */
|
||||||
|
#define BCM_PWM_OFFSET 0x0020c000 /* Pulse Width Modulator interface */
|
||||||
|
#define BCM_BSCSPI_OFFSET 0x00214000 /* BSC/SPI peripheral */
|
||||||
|
#define BCM_UART1_OFFSET 0x00215000 /* UART1 peripheral */
|
||||||
|
#define BCM_EMMC_OFFSET 0x00300000 /* External Mass Media Controller */
|
||||||
|
#define BCM_SMI_OFFSET 0x00600000 /* SMI */
|
||||||
|
#define BCM_BSC1_OFFSET 0x00804000 /* Broadcom Serial Controller 1 (BSC1) */
|
||||||
|
#define BCM_BSC2_OFFSET 0x00805000 /* Broadcom Serial Controller 2 (BSC2) */
|
||||||
|
#define BCM_USB_OFFSET 0x00980000 /* USB Controller */
|
||||||
|
|
||||||
|
/* Sizes of memory regions in bytes. */
|
||||||
|
|
||||||
|
#define BCM_SDRAM_SIZE (352*1024*1024) /* 00000000-15ffffff: 352MiB RAM */
|
||||||
|
#define BCM_VCSDRAM_SIZE (160*1024*1024) /* 16000000-1fffffff: 160MiB Video RAM*/
|
||||||
|
#define BCM_PERIPH_SIZE (10*1024*1024) /* 20000000-209fffff: Peripherals */
|
||||||
|
|
||||||
|
/* Convert size in bytes to number of sections (in Mb). */
|
||||||
|
|
||||||
|
#define _NSECTIONS(b) (((b)+0x000fffff) >> 20)
|
||||||
|
|
||||||
|
/* Sizes of memory regions in sections */
|
||||||
|
|
||||||
|
#define BCM_SDRAM_NSECTIONS _NSECTIONS(BCM_SDRAM_SIZE)
|
||||||
|
#define BCM_VCSDRAM_NSECTIONS _NSECTIONS(BCM_VCSDRAM_SIZE)
|
||||||
|
#define BCM_PERIPH_NSECTIONS _NSECTIONS(BCM_PERIPH_SIZE)
|
||||||
|
|
||||||
|
/* Section MMU Flags
|
||||||
|
*
|
||||||
|
* SDRAM is a special case because it requires non-cached access of its
|
||||||
|
* initial configuration, then cached access thereafter.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define BCM_SDRAM_MMUFLAGS MMU_MEMFLAGS
|
||||||
|
#define BCM_VCRAM_MMUFLAGS MMU_IOFLAGS
|
||||||
|
#define BCM_PERIPH_MMUFLAGS MMU_IOFLAGS
|
||||||
|
|
||||||
|
/* BCM2835 System 1-Mbyte aligned virtual sections (VSECTIONS). */
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_ROMPGTABLE
|
||||||
|
# error This configuration does not support a ROM page table
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define BCM_SDRAM_VSECTION 0x00000000 /* Virtual section of the SDRAM */
|
||||||
|
#define BCM_VCSDRAM_VSECTION 0x16000000 /* Virtual section of the GPU RAM: 160MiB */
|
||||||
|
#define BCM_PERIPH_VSECTION 0xf2000000 /* Virtual section of the peripherals */
|
||||||
|
|
||||||
|
/* BCM2708 Peripherals Virtual Base Addresses */
|
||||||
|
|
||||||
|
#define BCM_SYSTMR_VBASE (BCM_PERIPH_VSECTION + BCM_SYSTMR_OFFSET)
|
||||||
|
#define BCM_MPHI_VBASE (BCM_PERIPH_VSECTION + BCM_MPHI_OFFSET)
|
||||||
|
#define BCM_DMA_VBASE (BCM_PERIPH_VSECTION + BCM_DMA_OFFSET)
|
||||||
|
#define BCM_IRQ_VBASE (BCM_PERIPH_VSECTION + BCM_IRQ_OFFSET)
|
||||||
|
#define BCM_TIMER_VBASE (BCM_PERIPH_VSECTION + BCM_TIMER_OFFSET)
|
||||||
|
#define BCM_PM_VBASE (BCM_PERIPH_VSECTION + BCM_PM_OFFSET)
|
||||||
|
#define BCM_CMGPCLK_VBASE (BCM_PERIPH_VSECTION + BCM_CMGPCLK_OFFSET)
|
||||||
|
#define BCM_PCM_CLK_VBASE (BCM_PERIPH_VSECTION + BCM_PCM_CLK_OFFSET)
|
||||||
|
#define BCM_RNG_VBASE (BCM_PERIPH_VSECTION + BCM_RNG_OFFSET)
|
||||||
|
#define BCM_GPIO_VBASE (BCM_PERIPH_VSECTION + BCM_GPIO_OFFSET)
|
||||||
|
#define BCM_UART0_VBASE (BCM_PERIPH_VSECTION + BCM_UART0_OFFSET)
|
||||||
|
#define BCM_MMCI0_VBASE (BCM_PERIPH_VSECTION + BCM_MMCI0_OFFSET)
|
||||||
|
#define BCM_I2S_VBASE (BCM_PERIPH_VSECTION + BCM_I2S_OFFSET)
|
||||||
|
#define BCM_SPI0_VBASE (BCM_PERIPH_VSECTION + BCM_SPI0_OFFSET)
|
||||||
|
#define BCM_BSC0_VBASE (BCM_PERIPH_VSECTION + BCM_BSC0_OFFSET)
|
||||||
|
#define BCM_PWM_VBASE (BCM_PERIPH_VSECTION + BCM_PWM_OFFSET)
|
||||||
|
#define BCM_BSCSPI_VBASE (BCM_PERIPH_VSECTION + BCM_BSCSPI_OFFSET)
|
||||||
|
#define BCM_UART1_VBASE (BCM_PERIPH_VSECTION + BCM_UART1_OFFSET)
|
||||||
|
#define BCM_EMMC_VBASE (BCM_PERIPH_VSECTION + BCM_EMMC_OFFSET)
|
||||||
|
#define BCM_SMI_VBASE (BCM_PERIPH_VSECTION + BCM_SMI_OFFSET)
|
||||||
|
#define BCM_BSC1_VBASE (BCM_PERIPH_VSECTION + BCM_BSC1_OFFSET)
|
||||||
|
#define BCM_BSC2_VBASE (BCM_PERIPH_VSECTION + BCM_BSC2_OFFSET)
|
||||||
|
#define BCM_USB_VBASE (BCM_PERIPH_VSECTION + BCM_USB_OFFSET)
|
||||||
|
|
||||||
|
/* Vector table:
|
||||||
|
*
|
||||||
|
* BCM_VECTOR_PADDR - Unmapped, physical address of vector table in SDRAM
|
||||||
|
* BCM_VECTOR_VSDRAM - Virtual address of vector table in SDRAM
|
||||||
|
* BCM_VECTOR_VADDR - Virtual address of vector table (must be 0x00000000)
|
||||||
|
*
|
||||||
|
* NOTE: Vectors in hight memory are not supported.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CONFIG_ARCH_LOWVECTORS
|
||||||
|
# errno CONFIG_ARCH_LOWVECTORS is required for this memory configuration.
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define VECTOR_TABLE_SIZE 0x00004000
|
||||||
|
#define BCM_VECTOR_PADDR BCM_SDRAM_PSECTION
|
||||||
|
#define BCM_VECTOR_VSDRAM BCM_SDRAM_VSECTION
|
||||||
|
#define BCM_VECTOR_VADDR 0x00000000
|
||||||
|
#define BCM_VECTOR_VCOARSE 0x00000000
|
||||||
|
|
||||||
|
/* Page Table. The page table immediately follows the vector table. .text
|
||||||
|
* should then be positioned after the page table.
|
||||||
|
*
|
||||||
|
* The L1 page table must be on a physical address that is 16KiB aligned.
|
||||||
|
* This is assured by the value of VECTOR_TABLE_SIZE. The size of the L1
|
||||||
|
* page table is also 16KiB: 16KiB / (4bytes/entry) * 1MB gives a 4GB
|
||||||
|
* address space.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PGTABLE_BASE_PADDR (BCM_VECTOR_PADDR + VECTOR_TABLE_SIZE)
|
||||||
|
#define PGTABLE_BASE_VADDR (BCM_VECTOR_VADDR + VECTOR_TABLE_SIZE)
|
||||||
|
|
||||||
|
/* The boot logic will create a temporarily mapping based on where NuttX is
|
||||||
|
* executing in memory. In this case, there is support only for NuttX
|
||||||
|
* running from SDRAM. NuttX is assumed to be positioned by the linker
|
||||||
|
* script to lie immediately following the L1 page table.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(CONFIG_BOOT_RUNFROMSDRAM)
|
||||||
|
# define NUTTX_START_VADDR (PGTABLE_BASE_VADDR + PGTABLE_SIZE)
|
||||||
|
# define NUTTX_START_PADDR (PGTABLE_BASE_PADDR + PGTABLE_SIZE)
|
||||||
|
#else
|
||||||
|
# error Unsupported boot memory
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM_CHIP_BCM_MEMORYMAP_H */
|
||||||
@@ -0,0 +1,211 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/src/bcm2708/chip/bcm2708_uart.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Alan Carvalho de Assis <acassis@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_BCM_CHIP_BCM_UART_H
|
||||||
|
#define __ARCH_ARM_SRC_BCM_CHIP_BCM_UART_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/* UART/AUX Register Offsets ********************************************************/
|
||||||
|
|
||||||
|
#define BCM_AUX_IRQ_OFFSET 0x0000 /* Auxiliary Interrupt status */
|
||||||
|
#define BCM_AUX_ENB_OFFSET 0x0004 /* Auxiliary enables */
|
||||||
|
#define BCM_AUX_MU_IO_OFFSET 0x0040 /* Mini Uart I/O Data */
|
||||||
|
#define BCM_AUX_MU_IER_OFFSET 0x0044 /* Mini Uart Interrupt Enable */
|
||||||
|
#define BCM_AUX_MU_IIR_OFFSET 0x0048 /* Mini Uart Interrupt Identify */
|
||||||
|
#define BCM_AUX_MU_LCR_OFFSET 0x004c /* Mini Uart Line Control */
|
||||||
|
#define BCM_AUX_MU_MCR_OFFSET 0x0050 /* Mini Uart Modem Control */
|
||||||
|
#define BCM_AUX_MU_LSR_OFFSET 0x0054 /* Mini Uart Line Status */
|
||||||
|
#define BCM_AUX_MU_MSR_OFFSET 0x0058 /* Mini Uart Modem Status */
|
||||||
|
#define BCM_AUX_MU_SCRATCH_OFFSET 0x005c /* Mini Uart Scratch */
|
||||||
|
#define BCM_AUX_MU_CNTL_OFFSET 0x0060 /* Mini Uart Extra Control */
|
||||||
|
#define BCM_AUX_MU_STAT_OFFSET 0x0064 /* Mini Uart Extra Status */
|
||||||
|
#define BCM_AUX_MU_BAUD_OFFSET 0x0068 /* Mini Uart Baudrate */
|
||||||
|
#define BCM_AUX_SPI0_CNTL0_OFFSET 0x0080 /* SPI 1 Control register 0 */
|
||||||
|
#define BCM_AUX_SPI0_CNTL1_OFFSET 0x0084 /* SPI 1 Control register 1 */
|
||||||
|
#define BCM_AUX_SPI0_STAT_OFFSET 0x0088 /* SPI 1 Status */
|
||||||
|
#define BCM_AUX_SPI0_IO_OFFSET 0x0090 /* SPI 1 Data */
|
||||||
|
#define BCM_AUX_SPI0_PEEK_OFFSET 0x0094 /* SPI 1 Peek */
|
||||||
|
#define BCM_AUX_SPI1_CNTL0_OFFSET 0x00c0 /* SPI 2 Control register 0 */
|
||||||
|
#define BCM_AUX_SPI1_CNTL1_OFFSET 0x00c4 /* SPI 2 Control register 1 */
|
||||||
|
#define BCM_AUX_SPI1_STAT_OFFSET 0x00c8 /* SPI 2 Status */
|
||||||
|
#define BCM_AUX_SPI1_IO_OFFSET 0x00d0 /* SPI 2 Data */
|
||||||
|
#define BCM_AUX_SPI1_PEEK_OFFSET 0x00d4 /* SPI 2 Peek */
|
||||||
|
|
||||||
|
|
||||||
|
/* UART Register Addresses **********************************************************/
|
||||||
|
|
||||||
|
#define BCM_AUX_IRQ (BCM_AUX_VBASE+BCM_AUX_IRQ_OFFSET)
|
||||||
|
#define BCM_AUX_ENB (BCM_AUX_VBASE+BCM_AUX_ENB_OFFSET)
|
||||||
|
#define BCM_AUX_MU_IO (BCM_AUX_VBASE+BCM_AUX_MU_IO_OFFSET)
|
||||||
|
#define BCM_AUX_MU_IER (BCM_AUX_VBASE+BCM_AUX_MU_IER_OFFSET)
|
||||||
|
#define BCM_AUX_MU_IIR (BCM_AUX_VBASE+BCM_AUX_MU_IIR_OFFSET)
|
||||||
|
#define BCM_AUX_MU_LCR (BCM_AUX_VBASE+BCM_AUX_MU_LCR_OFFSET)
|
||||||
|
#define BCM_AUX_MU_MCR (BCM_AUX_VBASE+BCM_AUX_MU_MCR_OFFSET)
|
||||||
|
#define BCM_AUX_MU_LSR (BCM_AUX_VBASE+BCM_AUX_MU_LSR_OFFSET)
|
||||||
|
#define BCM_AUX_MU_MSR (BCM_AUX_VBASE+BCM_AUX_MU_MSR_OFFSET)
|
||||||
|
#define BCM_AUX_MU_SCRATCH (BCM_AUX_VBASE+BCM_AUX_MU_SCRATCH_OFFSET)
|
||||||
|
#define BCM_AUX_MU_CNTL (BCM_AUX_VBASE+BCM_AUX_MU_CNTL_OFFSET)
|
||||||
|
#define BCM_AUX_MU_STAT (BCM_AUX_VBASE+BCM_AUX_MU_STAT_OFFSET)
|
||||||
|
#define BCM_AUX_MU_BAUD (BCM_AUX_VBASE+BCM_AUX_MU_BAUD_OFFSET)
|
||||||
|
#define BCM_AUX_SPI0_CNTL0 (BCM_AUX_VBASE+BCM_AUX_SPI0_CNTL0_OFFSET)
|
||||||
|
#define BCM_AUX_SPI0_CNTL1 (BCM_AUX_VBASE+BCM_AUX_SPI0_CNTL1_OFFSET)
|
||||||
|
#define BCM_AUX_SPI0_STAT (BCM_AUX_VBASE+BCM_AUX_SPI0_STAT_OFFSET)
|
||||||
|
#define BCM_AUX_SPI0_IO (BCM_AUX_VBASE+BCM_AUX_SPI0_IO_OFFSET)
|
||||||
|
#define BCM_AUX_SPI0_PEEK (BCM_AUX_VBASE+BCM_AUX_SPI0_PEEK_OFFSET)
|
||||||
|
#define BCM_AUX_SPI1_CNTL0 (BCM_AUX_VBASE+BCM_AUX_SPI1_CNTL0_OFFSET)
|
||||||
|
#define BCM_AUX_SPI1_CNTL1 (BCM_AUX_VBASE+BCM_AUX_SPI1_CNTL1_OFFSET)
|
||||||
|
#define BCM_AUX_SPI1_STAT (BCM_AUX_VBASE+BCM_AUX_SPI1_STAT_OFFSET)
|
||||||
|
#define BCM_AUX_SPI1_IO (BCM_AUX_VBASE+BCM_AUX_SPI1_IO_OFFSET)
|
||||||
|
#define BCM_AUX_SPI1_PEEK (BCM_AUX_VBASE+BCM_AUX_SPI1_PEEK_OFFSET)
|
||||||
|
|
||||||
|
|
||||||
|
/* UART Register Bit Definitions ****************************************************/
|
||||||
|
|
||||||
|
#define BCM_AUX_IRQ_MU (1 << 0) /* Mini UART IRQ pending */
|
||||||
|
#define BCM_AUX_IRQ_SPI1 (1 << 1) /* SPI 1 IRQ pending */
|
||||||
|
#define BCM_AUX_IRQ_SPI2 (1 << 2) /* SPI 2 IRQ pending */
|
||||||
|
|
||||||
|
#define BCM_AUX_ENB_MU (1 << 0) /* Mini UART Enable */
|
||||||
|
#define BCM_AUX_ENB_SPI1 (1 << 1) /* SPI 1 Enable */
|
||||||
|
#define BCM_AUX_ENB_SPI2 (1 << 2) /* SPI 2 Enable */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_IO_SHIFT 0 /* LSB 8-bit of baudrate or TXD/RXD */
|
||||||
|
#define BCM_AUX_MU_IO_BAUDRATE (0xff << BCM_AUX_MU_IO_SHIFT) /* If DLAB = 1 */
|
||||||
|
#define BCM_AUX_MU_IO_TXD (0xff << BCM_AUX_MU_IO_SHIFT) /* If DLAB = 0 */
|
||||||
|
#define BCM_AUX_MU_IO_RXD (0xff << BCM_AUX_MU_IO_SHIFT) /* If DLAB = 0 */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_IER_SHIFT 0 /* MSB 8-bit of baudrate or IRQTXE/IRQRXE */
|
||||||
|
#define BCM_AUX_MU_IER_BAUDRATE (0xff << BCM_AUX_MU_IIR_SHIFT) /* If DLAB = 1 */
|
||||||
|
#define BCM_AUX_MU_IER_TXD (1 << 0) /* Enable Transmit Interruption */
|
||||||
|
#define BCM_AUX_MU_IER_RXD (1 << 1) /* Enable Receive Interruption */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_IIR_PEND (1 << 0) /* This bit is clear whenever an IRQ is pending */
|
||||||
|
#define BCM_AUX_MU_IIR_SHIFT 1 /* On read this register shows the interrupt ID bit */
|
||||||
|
# define BCM_AUX_MU_IIR_NONE (0 << BCM_AUX_MU_IIR_SHIFT) /* No ints */
|
||||||
|
# define BCM_AUX_MU_IIR_TXEMPTY (1 << BCM_AUX_MU_IIR_SHIFT) /* TX FIFO empty */
|
||||||
|
# define BCM_AUX_MU_IIR_RXDATA (2 << BCM_AUX_MU_IIR_SHIFT) /* Data in TX FIFO */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_LCR_DATA8BIT (1 << 0) /* 1 = UART 8-bit 0 = UART 7-bit */
|
||||||
|
#define BCM_AUX_MU_LCR_BREAK (1 << 6) /* Set UART TX line to low, breaks if at least 12 bits times */
|
||||||
|
#define BCM_AUX_MU_LCR_DLAB (1 << 7) /* If set access Baudrate register */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_MCR_RTS (1 << 1) /* if set RTS line is low */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_LSR_DTREADY (1 << 0) /* This bit is set if FIFO has data */
|
||||||
|
#define BCM_AUX_MU_LSR_RXOVR (1 << 1) /* Receiver Overrun */
|
||||||
|
#define BCM_AUX_MU_LSR_TXEMPTY (1 << 5) /* TX FIFO can accept at least 1 byte */
|
||||||
|
#define BCM_AUX_MU_LSR_TXIDLE (1 << 6) /* TX FIFO empty and transmitter idle */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_MSR_CTS (1 << 5) /* Holds the inverse of UART CTS status */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_CNTL_RXEN (1 << 0) /* Receiver Enable */
|
||||||
|
#define BCM_AUX_MU_CNTL_TXEN (1 << 1) /* Transmitter Enable */
|
||||||
|
#define BCM_AUX_MU_CNTL_RXAUTOFLOW (1 << 2) /* Enable RXD Auto-flow using RTS */
|
||||||
|
#define BCM_AUX_MU_CNTL_TXAUTOFLOW (1 << 3) /* Enable TXD Auto-flow using CTS */
|
||||||
|
#define BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT 4 /* RX FIFO level to deassert RTS */
|
||||||
|
#define BCM_AUX_MU_CNTL_RTSLEVEL_MASK (3 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT)
|
||||||
|
# define BCM_AUX_MU_CNTL_RTSLEVEL_3 (0 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT)
|
||||||
|
# define BCM_AUX_MU_CNTL_RTSLEVEL_2 (1 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT)
|
||||||
|
# define BCM_AUX_MU_CNTL_RTSLEVEL_1 (2 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT)
|
||||||
|
# define BCM_AUX_MU_CNTL_RTSLEVEL_4 (3 << BCM_AUX_MU_CNTL_RTSLEVEL_SHIFT)
|
||||||
|
#define BCM_AUX_MU_CNTL_RTS_ASSERT (1 << 6) /* Invert RTS auto-flow polarity */
|
||||||
|
#define BCM_AUX_MU_CNTL_CTS_ASSERT (1 << 7) /* Invert CTS auto-flow polarity */
|
||||||
|
|
||||||
|
#define BCM_AUX_MU_STAT_SYM_AVAIL (1 << 0) /* There is at least one symbol in the RX FIFO */
|
||||||
|
#define BCM_AUX_MU_STAT_SPC_AVAIL (1 << 1) /* There is at least one free position in the TX FIFO */
|
||||||
|
#define BCM_AUX_MU_STAT_RX_IDLE (1 << 2) /* The RX is Idle */
|
||||||
|
#define BCM_AUX_MU_STAT_TX_IDLE (1 << 3) /* The TX is Idle */
|
||||||
|
#define BCM_AUX_MU_STAT_RX_OVR (1 << 4) /* Receiver overrun */
|
||||||
|
#define BCM_AUX_MU_STAT_TX_FULL (1 << 5) /* This is the inverse of bit 1 */
|
||||||
|
#define BCM_AUX_MU_STAT_RTS_STAT (1 << 6) /* Status of RTS line */
|
||||||
|
#define BCM_AUX_MU_STAT_CTS_STAT (1 << 7) /* Status of CTS line */
|
||||||
|
#define BCM_AUX_MU_STAT_TX_EMPTY (1 << 8) /* TX FIFO is Empty */
|
||||||
|
#define BCM_AUX_MU_STAT_TX_DONE (1 << 9) /* TX is Idle and FIFO is Empty */
|
||||||
|
#define BCM_AUX_MU_STAT_RX_LEVEL_SHIFT 16 /* Bits 19-16: how many symbols in RX FIFO */
|
||||||
|
#define BCM_AUX_MU_STAT_RX_LEVEL_MASK (0xf << BCM_AUX_MU_STAT_RX_LEVEL_SHIFT)
|
||||||
|
#define BCM_AUX_MU_STAT_TX_LEVEL_SHIFT 24 /* Bits 27-24: how many symbols in TX FIFO */
|
||||||
|
#define BCM_AUX_MU_STAT_TX_LEVEL_MASK (0xf << BCM_AUX_MU_STAT_TX_LEVEL_SHIFT)
|
||||||
|
|
||||||
|
#define BCM_AUX_SPI_CNTL0_SFT_LEN_SHIFT 0 /* Specifies the number of bits to shift */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_SFT_LEN_MASK (0x3f << BCM_AUX_SPI_CNTL0_SFT_LEN_SHIFT)
|
||||||
|
#define BCM_AUX_SPI_CNTL0_MSB_FIRST (1 << 6) /* If 1 the data is shifted out starting with the MS bit */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_INV_SPICLK (1 << 7) /* If 1 the 'idle' clock line state is high */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_OUT_RISING (1 << 8) /* if 1 data is clocked out on the rising edge of the SPI clock */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_CLR_FIFO (1 << 9) /* Clear RX and TX FIFOs */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_IN_RISING (1 << 10) /* If 1 data is clocked in on the rising edge of the SPI clock */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_ENABLE (1 << 11) /* Enables the SPI interface. */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_DOHT_SHIFT 12 /* Bit 13-12: DOUT Hold Time */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_DOHT_MASK (3 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT)
|
||||||
|
# define BCM_AUX_SPI_CNTL0_DOHT_NONE (0 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT)
|
||||||
|
# define BCM_AUX_SPI_CNTL0_DOHT_1CLK (1 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT)
|
||||||
|
# define BCM_AUX_SPI_CNTL0_DOHT_4CLK (2 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT)
|
||||||
|
# define BCM_AUX_SPI_CNTL0_DOHT_7CLK (3 << BCM_AUX_SPI_CNTL0_DOHT_SHIFT)
|
||||||
|
#define BCM_AUX_SPI_CNTL0_VAR_WIDTH (1 << 14) /* Variable Width based on TX FIFO */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_VAR_CS (1 << 15) /* CS pattern and data from TX FIFO */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_PIM (1 << 16) /* Post Input Mode */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_CS_SHIFT 17 /* The pattern output on the CS pins when active */
|
||||||
|
#define BCM_AUX_SPI_CNTL0_CS_MASK (7 << BCM_AUX_SPI_CNTL0_CS_SHIFT)
|
||||||
|
#define BCM_AUX_SPI_CNTL0_SPEED_SHIFT 20
|
||||||
|
#define BCM_AUX_SPI_CNTL0_SPEED_MASK (0xfff << BCM_AUX_SPI_CNTL0_SPEED_SHIFT)
|
||||||
|
|
||||||
|
#define BCM_AUX_SPI_CNTL1_KEEP_IN (1 << 0) /* Keep input, shift register is not cleared */
|
||||||
|
#define BCM_AUX_SPI_CNTL1_MSB_FIRST (1 << 1) /* Shift data from MSB */
|
||||||
|
#define BCM_AUX_SPI_CNTL1_DONE_IRQ (1 << 6) /* If 1 the interrupt line is high when the interface is idle */
|
||||||
|
#define BCM_AUX_SPI_CNTL1_TXEMPTY_IRQ (1 << 7) /* Enable IRQ Line when FIFO is Empty */
|
||||||
|
#define BCM_AUX_SPI_CNTL1_CSHT_SHIFT 8 /* Bits 10-8: Additional CS High Time */
|
||||||
|
#define BCM_AUX_SPI_CNTL1_CSHT_MASK (7 << BCM_AUX_SPI_CNTL1_CSHT_SHIFT)
|
||||||
|
|
||||||
|
#define BCM_AUX_SPI_STAT_BITCNT_SHIFT 0 /* Bits 5-0: The number of bits still to be processed */
|
||||||
|
#define BCM_AUX_SPI_STAT_BITCNT_MASK (0x3f << BCM_AUX_SPI_STAT_BITCNT_SHIFT)
|
||||||
|
#define BCM_AUX_SPI_STAT_BUSY (1 << 6) /* The module is busy transferring data */
|
||||||
|
#define BCM_AUX_SPI_STAT_RXEMPTY (1 << 7) /* RX FIFO is empty */
|
||||||
|
#define BCM_AUX_SPI_STAT_TXEMPTY (1 << 8) /* TX FIFO is empty */
|
||||||
|
#define BCM_AUX_SPI_STAT_TXFULL (1 << 9) /* TX FIFO is full */
|
||||||
|
#define BCM_AUX_SPI_STAT_RXLEVEL_SHIFT 12 /* Data units in the RX FIFO */
|
||||||
|
#define BCM_AUX_SPI_STAT_RXLEVEL_MASK (0xfff << BCM_AUX_SPI_STAT_RXLEVEL_SHIFT)
|
||||||
|
#define BCM_AUX_SPI_STAT_TXLEVEL_SHIFT 24 /* Data units in the FX FIFO */
|
||||||
|
#define BCM_AUX_SPI_STAT_TXLEVEL_MASK (0xff << BCM_AUX_SPI_STAT_TXLEVEL_SHIFT)
|
||||||
|
|
||||||
|
#endif /* __ARCH_ARM_SRC_BCM_CHIP_BCM_UART_H */
|
||||||
@@ -70,7 +70,7 @@
|
|||||||
# undef HAVE_AESENGINE /* No AES engine */
|
# undef HAVE_AESENGINE /* No AES engine */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Cache line sizes (in bytes)for the SAVA5Dx */
|
/* Cache line sizes (in bytes) */
|
||||||
|
|
||||||
#define ARM_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
#define ARM_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
#define ARM_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
#define ARM_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
|
|||||||
@@ -55,7 +55,7 @@
|
|||||||
|
|
||||||
#define L2CC_VBASE SAM_L2CC_VSECTION
|
#define L2CC_VBASE SAM_L2CC_VSECTION
|
||||||
|
|
||||||
/* Cache line sizes (in bytes)for the SAVA5Dx */
|
/* Cache line sizes (in bytes) */
|
||||||
|
|
||||||
#define ARMV7A_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
#define ARMV7A_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
#define ARMV7A_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
#define ARMV7A_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
|
|||||||
@@ -49,7 +49,7 @@
|
|||||||
* Pre-processor Definitions
|
* Pre-processor Definitions
|
||||||
************************************************************************************/
|
************************************************************************************/
|
||||||
|
|
||||||
/* Cache line sizes (in bytes)for the SAVA5Dx */
|
/* Cache line sizes (in bytes) */
|
||||||
|
|
||||||
#define ARMV7A_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
#define ARMV7A_DCACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
#define ARMV7A_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
#define ARMV7A_ICACHE_LINESIZE 32 /* 32 bytes (8 words) */
|
||||||
|
|||||||
@@ -853,6 +853,24 @@ config ARCH_BOARD_NUCLEO_L476RG
|
|||||||
---help---
|
---help---
|
||||||
STMicro Nucleo L476RG board based on the STMicro STM32L476RGT6 MCU.
|
STMicro Nucleo L476RG board based on the STMicro STM32L476RGT6 MCU.
|
||||||
|
|
||||||
|
config ARCH_BOARD_RASPBERRY_PIZERO
|
||||||
|
bool "Raspberry Pi Zero"
|
||||||
|
depends on ARCH_CHIP_BCM2835
|
||||||
|
---help---
|
||||||
|
This is the port of NuttX to the Raspberry Pi Zero. There are two
|
||||||
|
versions of the Raspberry Pi Zero: (1) This standard version and
|
||||||
|
(2) the Raspberry Pi Zero W with wireless support (selected with
|
||||||
|
CONFIG_ARCH_BOARD_RASPBERRY_PIZEROW.
|
||||||
|
|
||||||
|
config ARCH_BOARD_RASPBERRY_PIZEROW
|
||||||
|
bool "Raspberry Pi Zero W"
|
||||||
|
depends on ARCH_CHIP_BCM2835
|
||||||
|
---help---
|
||||||
|
This is the port of NuttX to the Raspberry Pi Zero W. There are two
|
||||||
|
versions of the Raspberry Pi Zero: (1) This standard version
|
||||||
|
(selected with CONFIG_ARCH_BOARD_RASPBERRY_PIZEROW) and (2) this
|
||||||
|
Raspberry Pi Zero W version with wireless support.
|
||||||
|
|
||||||
config ARCH_BOARD_QEMU_I486
|
config ARCH_BOARD_QEMU_I486
|
||||||
bool "Qemu i486 Mode"
|
bool "Qemu i486 Mode"
|
||||||
depends on ARCH_X86 || ARCH_I486
|
depends on ARCH_X86 || ARCH_I486
|
||||||
@@ -1626,6 +1644,7 @@ config ARCH_BOARD
|
|||||||
default "pic32mx-starterkit" if ARCH_BOARD_PIC32MX_STARTERKIT
|
default "pic32mx-starterkit" if ARCH_BOARD_PIC32MX_STARTERKIT
|
||||||
default "pic32mx7mmb" if ARCH_BOARD_PIC32MX7MMB
|
default "pic32mx7mmb" if ARCH_BOARD_PIC32MX7MMB
|
||||||
default "pic32mz-starterkit" if ARCH_BOARD_PIC32MZ_STARTERKIT
|
default "pic32mz-starterkit" if ARCH_BOARD_PIC32MZ_STARTERKIT
|
||||||
|
default "pizero" if ARCH_BOARD_RASPBERRY_PIZERO || ARCH_BOARD_RASPBERRY_PIZEROW
|
||||||
default "qemu-i486" if ARCH_BOARD_QEMU_I486
|
default "qemu-i486" if ARCH_BOARD_QEMU_I486
|
||||||
default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD
|
default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD
|
||||||
default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT
|
default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT
|
||||||
@@ -1964,6 +1983,9 @@ endif
|
|||||||
if ARCH_BOARD_PIC32MZ_STARTERKIT
|
if ARCH_BOARD_PIC32MZ_STARTERKIT
|
||||||
source "configs/pic32mz-starterkit/Kconfig"
|
source "configs/pic32mz-starterkit/Kconfig"
|
||||||
endif
|
endif
|
||||||
|
if ARCH_BOARD_RASPBERRY_PIZERO || ARCH_BOARD_RASPBERRY_PIZEROW
|
||||||
|
source "configs/pizero/Kconfig"
|
||||||
|
endif
|
||||||
if ARCH_BOARD_QEMU_I486
|
if ARCH_BOARD_QEMU_I486
|
||||||
source "configs/qemu-i486/Kconfig"
|
source "configs/qemu-i486/Kconfig"
|
||||||
endif
|
endif
|
||||||
|
|||||||
@@ -549,6 +549,11 @@ configs/pic32mz-starterkit
|
|||||||
|
|
||||||
See www.microchip.com for further information.
|
See www.microchip.com for further information.
|
||||||
|
|
||||||
|
configs/pizero
|
||||||
|
This directory holds the port of NuttX to the Raspberry Pi Zero and
|
||||||
|
the similar Raspberry Pi Zero W with wireless suppoprt. These boards
|
||||||
|
are based on the BCM2835 A1176 CPU.
|
||||||
|
|
||||||
configs/qemu-i486
|
configs/qemu-i486
|
||||||
Port of NuttX to QEMU in i486 mode. This port will also run on real i486
|
Port of NuttX to QEMU in i486 mode. This port will also run on real i486
|
||||||
hardwared (Google the Bifferboard).
|
hardwared (Google the Bifferboard).
|
||||||
|
|||||||
@@ -0,0 +1,4 @@
|
|||||||
|
#
|
||||||
|
# For a description of the syntax of this configuration file,
|
||||||
|
# see the file kconfig-language.txt in the NuttX tools repository.
|
||||||
|
#
|
||||||
@@ -0,0 +1,29 @@
|
|||||||
|
README
|
||||||
|
======
|
||||||
|
|
||||||
|
Basic Setup
|
||||||
|
===========
|
||||||
|
|
||||||
|
+------------+
|
||||||
|
| |
|
||||||
|
| +--+
|
||||||
|
| USB | | <----------------------------> USB Power Source
|
||||||
|
| +--+ +------------+
|
||||||
|
| | | +--+
|
||||||
|
| +--+ | | | <---> Keyboard
|
||||||
|
| USB | | <-------->| USB +--+
|
||||||
|
| +--+ | HUB |
|
||||||
|
| | | +--+
|
||||||
|
| | | | | <---> Mouse
|
||||||
|
| | | +--+
|
||||||
|
| | +------------+
|
||||||
|
| Mini +--+
|
||||||
|
| HDMI | | <----------------------------> Monitor/TV
|
||||||
|
| +--+
|
||||||
|
| |
|
||||||
|
+------------+
|
||||||
|
|
||||||
|
You might be able to use the hub to power the Pi Zero, but I was not
|
||||||
|
able to do that; my hub would not switch on power until it was enumerated
|
||||||
|
by the host (the Raspberry Pi Zero), but then I could not power the Pi
|
||||||
|
with the hub because it was not providing power. Chicken'n'Egg.
|
||||||
@@ -0,0 +1,60 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* configs/pizero/include/board.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __CONFIGS_PIZERO_INCLUDE_BOARD_H
|
||||||
|
#define __CONFIGS_PIZERO_INCLUDE_BOARD_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __CONFIGS_PIZERO_INCLUDE_BOARD_H */
|
||||||
@@ -0,0 +1,43 @@
|
|||||||
|
# CONFIG_NSH_ARGCAT is not set
|
||||||
|
# CONFIG_NSH_CMDOPT_DF_H is not set
|
||||||
|
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
|
||||||
|
# CONFIG_NSH_CMDPARMS is not set
|
||||||
|
CONFIG_ARCH_BOARD_RASPBERRY_PIZERO=y
|
||||||
|
CONFIG_ARCH_BOARD="pizero"
|
||||||
|
CONFIG_ARCH_CHIP_BCM2708=y
|
||||||
|
CONFIG_ARCH_CHIP_BCM2835=y
|
||||||
|
CONFIG_ARCH_LOWVECTORS=y
|
||||||
|
CONFIG_ARCH_STACKDUMP=y
|
||||||
|
CONFIG_ARCH="arm"
|
||||||
|
CONFIG_BOARD_LOOPSPERMSEC=16717
|
||||||
|
CONFIG_BOOT_RUNFROMSDRAM=y
|
||||||
|
CONFIG_BUILTIN=y
|
||||||
|
CONFIG_DISABLE_POLL=y
|
||||||
|
CONFIG_EXAMPLES_NSH=y
|
||||||
|
CONFIG_FS_PROCFS=y
|
||||||
|
CONFIG_HAVE_CXX=y
|
||||||
|
CONFIG_HAVE_CXXINITIALIZE=y
|
||||||
|
CONFIG_HOST_WINDOWS=y
|
||||||
|
CONFIG_INTELHEX_BINARY=y
|
||||||
|
CONFIG_MAX_TASKS=16
|
||||||
|
CONFIG_MAX_WDOGPARMS=2
|
||||||
|
CONFIG_MM_REGIONS=1
|
||||||
|
CONFIG_NFILE_DESCRIPTORS=8
|
||||||
|
CONFIG_NFILE_STREAMS=8
|
||||||
|
CONFIG_NSH_BUILTIN_APPS=y
|
||||||
|
CONFIG_NSH_FILEIOSIZE=512
|
||||||
|
CONFIG_NSH_LINELEN=64
|
||||||
|
CONFIG_NSH_READLINE=y
|
||||||
|
CONFIG_PREALLOC_MQ_MSGS=4
|
||||||
|
CONFIG_PREALLOC_TIMERS=4
|
||||||
|
CONFIG_PREALLOC_WDOGS=16
|
||||||
|
CONFIG_RAM_SIZE=369098752
|
||||||
|
CONFIG_RAM_START=0x00000000
|
||||||
|
CONFIG_RAW_BINARY=y
|
||||||
|
CONFIG_RR_INTERVAL=200
|
||||||
|
CONFIG_SCHED_WAITPID=y
|
||||||
|
CONFIG_SDCLONE_DISABLE=y
|
||||||
|
CONFIG_START_DAY=6
|
||||||
|
CONFIG_START_MONTH=12
|
||||||
|
CONFIG_START_YEAR=2011
|
||||||
|
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||||
@@ -0,0 +1,125 @@
|
|||||||
|
############################################################################
|
||||||
|
# configs/pizero/scripts/Make.defs
|
||||||
|
#
|
||||||
|
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions
|
||||||
|
# are met:
|
||||||
|
#
|
||||||
|
# 1. Redistributions of source code must retain the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer.
|
||||||
|
# 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer in
|
||||||
|
# the documentation and/or other materials provided with the
|
||||||
|
# distribution.
|
||||||
|
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
# used to endorse or promote products derived from this software
|
||||||
|
# without specific prior written permission.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
# POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
############################################################################
|
||||||
|
|
||||||
|
include ${TOPDIR}/.config
|
||||||
|
include ${TOPDIR}/tools/Config.mk
|
||||||
|
include ${TOPDIR}/arch/arm/src/arm/Toolchain.defs
|
||||||
|
|
||||||
|
LDSCRIPT=sdram.ld
|
||||||
|
|
||||||
|
ifeq ($(WINTOOL),y)
|
||||||
|
# Windows-native toolchains
|
||||||
|
DIRLINK = $(TOPDIR)/tools/copydir.sh
|
||||||
|
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
|
||||||
|
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
|
||||||
|
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
|
||||||
|
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
|
||||||
|
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
|
||||||
|
else
|
||||||
|
# Linux/Cygwin-native toolchain
|
||||||
|
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
|
||||||
|
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
|
||||||
|
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
|
||||||
|
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
|
||||||
|
endif
|
||||||
|
|
||||||
|
CC = $(CROSSDEV)gcc
|
||||||
|
CXX = $(CROSSDEV)g++
|
||||||
|
CPP = $(CROSSDEV)gcc -E
|
||||||
|
LD = $(CROSSDEV)ld
|
||||||
|
AR = $(CROSSDEV)ar rcs
|
||||||
|
NM = $(CROSSDEV)nm
|
||||||
|
OBJCOPY = $(CROSSDEV)objcopy
|
||||||
|
OBJDUMP = $(CROSSDEV)objdump
|
||||||
|
|
||||||
|
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
|
||||||
|
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
|
||||||
|
|
||||||
|
ifeq ($(ARCHCCMAJOR),2)
|
||||||
|
OLDGCC = y
|
||||||
|
else ifeq ($(ARCHCCMAJOR),3)
|
||||||
|
OLDGCC = y
|
||||||
|
else
|
||||||
|
OLDGCC = n
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||||
|
ARCHOPTIMIZATION = -g
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifneq ($(CONFIG_DEBUG_NOOPT),y)
|
||||||
|
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(OLDGCC),y)
|
||||||
|
ARCHCPUFLAGS = -mtune=arm1176jz-s -march=armv6zk -mfloat-abi=soft
|
||||||
|
else
|
||||||
|
ARCHCPUFLAGS = -mfpu=vfp -mfloat-abi=hard -march=armv6zk -mtune=arm1176jzf-s
|
||||||
|
endif
|
||||||
|
|
||||||
|
ARCHCFLAGS = -fno-builtin
|
||||||
|
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
|
||||||
|
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
|
||||||
|
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
|
||||||
|
ARCHDEFINES =
|
||||||
|
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
|
||||||
|
|
||||||
|
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||||
|
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
|
||||||
|
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||||
|
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
|
||||||
|
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
|
||||||
|
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
|
||||||
|
|
||||||
|
NXFLATLDFLAGS1 = -r -d -warn-common
|
||||||
|
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
|
||||||
|
LDNXFLATFLAGS = -e main -s 2048
|
||||||
|
|
||||||
|
ASMEXT = .S
|
||||||
|
OBJEXT = .o
|
||||||
|
LIBEXT = .a
|
||||||
|
EXEEXT =
|
||||||
|
|
||||||
|
ifneq ($(CONFIG_ARM_TOOLCHAIN),BUILDROOT)
|
||||||
|
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||||
|
endif
|
||||||
|
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||||
|
LDFLAGS += -g
|
||||||
|
endif
|
||||||
|
|
||||||
|
HOSTCC = gcc
|
||||||
|
HOSTINCLUDES = -I.
|
||||||
|
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
|
||||||
|
HOSTLDFLAGS =
|
||||||
@@ -0,0 +1,138 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* configs/pizero/scripts/sdram.ld
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* The Pi Zero has 512MiB of SDRAM beginning at physical (and virtual)
|
||||||
|
* address zero. In this configuration, the last 160MiB is reserved for
|
||||||
|
* video RAM. The first 16KiB is reserved for vectors, the second 18KiB
|
||||||
|
* is reserved for the pages table, and the .txt can then begian after that.
|
||||||
|
*/
|
||||||
|
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
vectors (WR) : ORIGIN = 0x00000000, LENGTH = 16K
|
||||||
|
pgtable (WR) : ORIGIN = 0x00004000, LENGTH = 16K
|
||||||
|
sdram (WRX) : ORIGIN = 0x00008000, LENGTH = 352M - 32K
|
||||||
|
vdram (WRX) : ORIGIN = 0x16000000, LENGTH = 160M
|
||||||
|
}
|
||||||
|
|
||||||
|
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||||
|
OUTPUT_ARCH(arm)
|
||||||
|
ENTRY(entry)
|
||||||
|
ENTRY(_stext)
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
_stext = ABSOLUTE(.);
|
||||||
|
*(.vectors)
|
||||||
|
*(.text .text.*)
|
||||||
|
*(.fixup)
|
||||||
|
*(.gnu.warning)
|
||||||
|
*(.rodata .rodata.*)
|
||||||
|
*(.gnu.linkonce.t.*)
|
||||||
|
*(.glue_7)
|
||||||
|
*(.glue_7t)
|
||||||
|
*(.got)
|
||||||
|
*(.gcc_except_table)
|
||||||
|
*(.gnu.linkonce.r.*)
|
||||||
|
*(.ARM.extab*)
|
||||||
|
*(.gnu.linkonce.armextab.*)
|
||||||
|
_etext = ABSOLUTE(.);
|
||||||
|
} > sdram
|
||||||
|
|
||||||
|
.init_section :
|
||||||
|
{
|
||||||
|
_sinit = ABSOLUTE(.);
|
||||||
|
*(.init_array .init_array.*)
|
||||||
|
_einit = ABSOLUTE(.);
|
||||||
|
} > sdram
|
||||||
|
|
||||||
|
.ARM.extab :
|
||||||
|
{
|
||||||
|
*(.ARM.extab*)
|
||||||
|
} > sdram
|
||||||
|
|
||||||
|
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||||
|
|
||||||
|
PROVIDE_HIDDEN (__exidx_start = .);
|
||||||
|
.ARM.exidx :
|
||||||
|
{
|
||||||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||||
|
} > sdram
|
||||||
|
PROVIDE_HIDDEN (__exidx_end = .);
|
||||||
|
|
||||||
|
.data :
|
||||||
|
{
|
||||||
|
_sdata = ABSOLUTE(.);
|
||||||
|
*(.data .data.*)
|
||||||
|
*(.gnu.linkonce.d.*)
|
||||||
|
CONSTRUCTORS
|
||||||
|
_edata = ABSOLUTE(.);
|
||||||
|
} > sdram
|
||||||
|
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
_sbss = ABSOLUTE(.);
|
||||||
|
*(.bss .bss.*)
|
||||||
|
*(.gnu.linkonce.b.*)
|
||||||
|
*(COMMON)
|
||||||
|
_ebss = ABSOLUTE(.);
|
||||||
|
} > sdram
|
||||||
|
|
||||||
|
/* Uninitialized data */
|
||||||
|
|
||||||
|
.noinit :
|
||||||
|
{
|
||||||
|
_snoinit = ABSOLUTE(.);
|
||||||
|
*(.noinit*)
|
||||||
|
_enoinit = ABSOLUTE(.);
|
||||||
|
} > sdram
|
||||||
|
|
||||||
|
/* Stabs debugging sections. */
|
||||||
|
|
||||||
|
.stab 0 : { *(.stab) }
|
||||||
|
.stabstr 0 : { *(.stabstr) }
|
||||||
|
.stab.excl 0 : { *(.stab.excl) }
|
||||||
|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||||
|
.stab.index 0 : { *(.stab.index) }
|
||||||
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||||
|
.comment 0 : { *(.comment) }
|
||||||
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||||
|
.debug_info 0 : { *(.debug_info) }
|
||||||
|
.debug_line 0 : { *(.debug_line) }
|
||||||
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||||
|
.debug_aranges 0 : { *(.debug_aranges) }
|
||||||
|
}
|
||||||
@@ -0,0 +1,2 @@
|
|||||||
|
/.depend
|
||||||
|
/Make.dep
|
||||||
@@ -0,0 +1,45 @@
|
|||||||
|
############################################################################
|
||||||
|
# configs/pizero/src/Makefile
|
||||||
|
#
|
||||||
|
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions
|
||||||
|
# are met:
|
||||||
|
#
|
||||||
|
# 1. Redistributions of source code must retain the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer.
|
||||||
|
# 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer in
|
||||||
|
# the documentation and/or other materials provided with the
|
||||||
|
# distribution.
|
||||||
|
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
# used to endorse or promote products derived from this software
|
||||||
|
# without specific prior written permission.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
# POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
############################################################################
|
||||||
|
|
||||||
|
-include $(TOPDIR)/Make.defs
|
||||||
|
|
||||||
|
ASRCS =
|
||||||
|
CSRCS = bcm_initialize.c bcm_bringup.c
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_LIB_BOARDCTL),y)
|
||||||
|
CSRCS += bcm_appinit.c
|
||||||
|
endif
|
||||||
|
|
||||||
|
include $(TOPDIR)/configs/Board.mk
|
||||||
@@ -0,0 +1,89 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* config/pizero/src/bcm_appinit.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <sys/types.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#include <nuttx/board.h>
|
||||||
|
|
||||||
|
#include "pizero.h"
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: board_app_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Perform application specific initialization. This function is never
|
||||||
|
* called directly from application code, but only indirectly via the
|
||||||
|
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* arg - The boardctl() argument is passed to the board_app_initialize()
|
||||||
|
* implementation without modification. The argument has no
|
||||||
|
* meaning to NuttX; the meaning of the argument is a contract
|
||||||
|
* between the board-specific initalization logic and the
|
||||||
|
* matching application logic. The value cold be such things as a
|
||||||
|
* mode enumeration value, a set of DIP switch switch settings, a
|
||||||
|
* pointer to configuration data read from a file or serial FLASH,
|
||||||
|
* or whatever you would like to do with it. Every implementation
|
||||||
|
* should accept zero/NULL as a default configuration.
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||||
|
* any failure to indicate the nature of the failure.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
int board_app_initialize(uintptr_t arg)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_BOARD_INITIALIZE
|
||||||
|
/* Board initialization already performed by board_initialize() */
|
||||||
|
|
||||||
|
return OK;
|
||||||
|
#else
|
||||||
|
/* Perform board-specific initialization */
|
||||||
|
|
||||||
|
return bcm_bringup();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
@@ -0,0 +1,64 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* config/pizero/src/bcm_bringup.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include <sys/types.h>
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_bringup
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Perform architecture-specific initialization
|
||||||
|
*
|
||||||
|
* CONFIG_BOARD_INITIALIZE=y :
|
||||||
|
* Called from board_initialize().
|
||||||
|
*
|
||||||
|
* CONFIG_BOARD_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
|
||||||
|
* Called from the NSH library
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
int bcm_bringup(void)
|
||||||
|
{
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
@@ -0,0 +1,120 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* configs/pizero/src/bcm_initialize.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <debug.h>
|
||||||
|
|
||||||
|
#include <nuttx/board.h>
|
||||||
|
|
||||||
|
#include "bcm_boot.h"
|
||||||
|
#include "pizero.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_memory_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* All BCM2708 architectures must provide the following entry point. This
|
||||||
|
* entry point is called early in the initialization before memory has
|
||||||
|
* been configured. This board-specific function is responsible for
|
||||||
|
* configuring any on-board memories.
|
||||||
|
*
|
||||||
|
* Logic in bcm_memory_initialize must be careful to avoid using any
|
||||||
|
* global variables because those will be uninitialized at the time this
|
||||||
|
* function is called.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void bcm_memory_initialize(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_board_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* All BCM2708 architectures must provide the following entry point. This
|
||||||
|
* entry point is called in the initialization phase -- after
|
||||||
|
* bcm_memory_initialize and after all memory has been configured and
|
||||||
|
* mapped but before any devices have been initialized.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void bcm_board_initialize(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: board_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* If CONFIG_BOARD_INITIALIZE is selected, then an additional
|
||||||
|
* initialization call will be performed in the boot-up sequence to a
|
||||||
|
* function called board_initialize(). board_initialize() will be
|
||||||
|
* called immediately after up_initialize() is called and just before the
|
||||||
|
* initial application is started. This additional initialization phase
|
||||||
|
* may be used, for example, to initialize board-specific device drivers.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_BOARD_INITIALIZE
|
||||||
|
void board_initialize(void)
|
||||||
|
{
|
||||||
|
/* Perform board-specific initialization */
|
||||||
|
|
||||||
|
(void)bcm_bringup();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
@@ -0,0 +1,67 @@
|
|||||||
|
/****************************************************************************
|
||||||
|
* configs/pizero/include/board.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __CONFIGS_PIZERO_INCLUDE_BOARD_H
|
||||||
|
#define __CONFIGS_PIZERO_INCLUDE_BOARD_H
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: bcm_bringup
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Perform architecture-specific initialization
|
||||||
|
*
|
||||||
|
* CONFIG_BOARD_INITIALIZE=y :
|
||||||
|
* Called from board_initialize().
|
||||||
|
*
|
||||||
|
* CONFIG_BOARD_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y :
|
||||||
|
* Called from the NSH library
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
int bcm_bringup(void);
|
||||||
|
|
||||||
|
#endif /* __CONFIGS_PIZERO_INCLUDE_BOARD_H */
|
||||||
Reference in New Issue
Block a user