Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-03-27 02:29:15 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

prohibit re-entrance into sam_configgpio()

Browse Source
This commit is contained in:
Gregory Nutt
2013-07-05 17:15:54 -06:00
parent a9e04b3f47
commit 25c393f371
4 changed files with 42 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
ChangeLog
View File

@@ -5111,4 +5111,6 @@
* /drivers/usbdev/composite.c: Fix a type in the composite device * /drivers/usbdev/composite.c: Fix a type in the composite device
driver unitialization logic. DEV1 should be DEV2 in one case driver unitialization logic. DEV1 should be DEV2 in one case
(2013-7-4). (2013-7-4).
* arch/arm/src/sam34/sam3u_gpio.c: sam_configgpio() must protect
against re-entrancy (2013-7-5).

12
arch/arm/src/sam34/sam3u_gpio.c
View File

@@ -375,11 +375,14 @@ int sam_configgpio(gpio_pinset_t cfgset)
{ {
uintptr_t base = sam_gpiobase(cfgset); uintptr_t base = sam_gpiobase(cfgset);
uint32_t pin = sam_gpiopin(cfgset); uint32_t pin = sam_gpiopin(cfgset);
irqstate_t flags;
int ret; int ret;
/* Enable writing to GPIO registers /* Disable interrupts to prohibit re-entrance. */
* TODO: This probably requires some protection against re-entry.
*/ flags = irqsave();
/* Enable writing to GPIO registers */
putreg32(PIO_WPMR_WPKEY, base + SAM_PIO_WPMR_OFFSET); putreg32(PIO_WPMR_WPKEY, base + SAM_PIO_WPMR_OFFSET);
@@ -409,9 +412,10 @@ int sam_configgpio(gpio_pinset_t cfgset)
break; break;
} }
/* Enable writing to GPIO registers */ /* Disable writing to GPIO registers */
putreg32(PIO_WPMR_WPEN | PIO_WPMR_WPKEY, base + SAM_PIO_WPMR_OFFSET); putreg32(PIO_WPMR_WPEN | PIO_WPMR_WPKEY, base + SAM_PIO_WPMR_OFFSET);
irqrestore(flags);
return ret; return ret;
} }

40
arch/arm/src/sam34/sam_gpioirq.c
View File

@@ -169,14 +169,14 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
} }
/**************************************************************************** /****************************************************************************
* Name: up_gpioa/b/cinterrupt * Name: sam_gpioa/b/cinterrupt
* *
* Description: * Description:
* Receive GPIOA/B/C interrupts * Receive GPIOA/B/C interrupts
* *
****************************************************************************/ ****************************************************************************/
static int up_gpiointerrupt(uint32_t base, int irq0, void *context) static int sam_gpiointerrupt(uint32_t base, int irq0, void *context)
{ {
uint32_t pending; uint32_t pending;
uint32_t bit; uint32_t bit;
@@ -200,44 +200,44 @@ static int up_gpiointerrupt(uint32_t base, int irq0, void *context)
} }
#ifdef CONFIG_GPIOA_IRQ #ifdef CONFIG_GPIOA_IRQ
static int up_gpioainterrupt(int irq, void *context) static int sam_gpioainterrupt(int irq, void *context)
{ {
return up_gpiointerrupt(SAM_PIOA_BASE, SAM_IRQ_PA0, context); return sam_gpiointerrupt(SAM_PIOA_BASE, SAM_IRQ_PA0, context);
} }
#endif #endif
#ifdef CONFIG_GPIOB_IRQ #ifdef CONFIG_GPIOB_IRQ
static int up_gpiobinterrupt(int irq, void *context) static int sam_gpiobinterrupt(int irq, void *context)
{ {
return up_gpiointerrupt(SAM_PIOB_BASE, SAM_IRQ_PB0, context); return sam_gpiointerrupt(SAM_PIOB_BASE, SAM_IRQ_PB0, context);
} }
#endif #endif
#ifdef CONFIG_GPIOC_IRQ #ifdef CONFIG_GPIOC_IRQ
static int up_gpiocinterrupt(int irq, void *context) static int sam_gpiocinterrupt(int irq, void *context)
{ {
return up_gpiointerrupt(SAM_PIOC_BASE, SAM_IRQ_PC0, context); return sam_gpiointerrupt(SAM_PIOC_BASE, SAM_IRQ_PC0, context);
} }
#endif #endif
#ifdef CONFIG_GPIOD_IRQ #ifdef CONFIG_GPIOD_IRQ
static int up_gpiodinterrupt(int irq, void *context) static int sam_gpiodinterrupt(int irq, void *context)
{ {
return up_gpiointerrupt(SAM_PIOD_BASE, SAM_IRQ_PD0, context); return sam_gpiointerrupt(SAM_PIOD_BASE, SAM_IRQ_PD0, context);
} }
#endif #endif
#ifdef CONFIG_GPIOE_IRQ #ifdef CONFIG_GPIOE_IRQ
static int up_gpioeinterrupt(int irq, void *context) static int sam_gpioeinterrupt(int irq, void *context)
{ {
return up_gpiointerrupt(SAM_PIOE_BASE, SAM_IRQ_PE0, context); return sam_gpiointerrupt(SAM_PIOE_BASE, SAM_IRQ_PE0, context);
} }
#endif #endif
#ifdef CONFIG_GPIOF_IRQ #ifdef CONFIG_GPIOF_IRQ
static int up_gpiofinterrupt(int irq, void *context) static int sam_gpiofinterrupt(int irq, void *context)
{ {
return up_gpiointerrupt(SAM_PIOF_BASE, SAM_IRQ_PF0, context); return sam_gpiointerrupt(SAM_PIOF_BASE, SAM_IRQ_PF0, context);
} }
#endif #endif
@@ -270,7 +270,7 @@ void sam_gpioirqinitialize(void)
/* Attach and enable the GPIOA IRQ */ /* Attach and enable the GPIOA IRQ */
(void)irq_attach(SAM_IRQ_PIOA, up_gpioainterrupt); (void)irq_attach(SAM_IRQ_PIOA, sam_gpioainterrupt);
up_enable_irq(SAM_IRQ_PIOA); up_enable_irq(SAM_IRQ_PIOA);
#endif #endif
@@ -288,7 +288,7 @@ void sam_gpioirqinitialize(void)
/* Attach and enable the GPIOB IRQ */ /* Attach and enable the GPIOB IRQ */
(void)irq_attach(SAM_IRQ_PIOB, up_gpiobinterrupt); (void)irq_attach(SAM_IRQ_PIOB, sam_gpiobinterrupt);
up_enable_irq(SAM_IRQ_PIOB); up_enable_irq(SAM_IRQ_PIOB);
#endif #endif
@@ -306,7 +306,7 @@ void sam_gpioirqinitialize(void)
/* Attach and enable the GPIOC IRQ */ /* Attach and enable the GPIOC IRQ */
(void)irq_attach(SAM_IRQ_PIOC, up_gpiocinterrupt); (void)irq_attach(SAM_IRQ_PIOC, sam_gpiocinterrupt);
up_enable_irq(SAM_IRQ_PIOC); up_enable_irq(SAM_IRQ_PIOC);
#endif #endif
@@ -324,7 +324,7 @@ void sam_gpioirqinitialize(void)
/* Attach and enable the GPIOC IRQ */ /* Attach and enable the GPIOC IRQ */
(void)irq_attach(SAM_IRQ_PIOD, up_gpiodinterrupt); (void)irq_attach(SAM_IRQ_PIOD, sam_gpiodinterrupt);
up_enable_irq(SAM_IRQ_PIOD); up_enable_irq(SAM_IRQ_PIOD);
#endif #endif
@@ -342,7 +342,7 @@ void sam_gpioirqinitialize(void)
/* Attach and enable the GPIOE IRQ */ /* Attach and enable the GPIOE IRQ */
(void)irq_attach(SAM_IRQ_PIOE, up_gpioeinterrupt); (void)irq_attach(SAM_IRQ_PIOE, sam_gpioeinterrupt);
up_enable_irq(SAM_IRQ_PIOE); up_enable_irq(SAM_IRQ_PIOE);
#endif #endif
@@ -360,7 +360,7 @@ void sam_gpioirqinitialize(void)
/* Attach and enable the GPIOF IRQ */ /* Attach and enable the GPIOF IRQ */
(void)irq_attach(SAM_IRQ_PIOF, up_gpiofinterrupt); (void)irq_attach(SAM_IRQ_PIOF, sam_gpiofinterrupt);
up_enable_irq(SAM_IRQ_PIOF); up_enable_irq(SAM_IRQ_PIOF);
#endif #endif
} }

28
include/nuttx/spi/spi_bitbang.c
View File

@@ -337,12 +337,11 @@ static void spi_setmode(FAR struct spi_bitbang_s *priv,
* +------------+ +------------+ * +------------+ +------------+
* | | | | * | | | |
* SCLK ---------------+ +------------+ +------------ * SCLK ---------------+ +------------+ +------------
* ` Set MOSI | `- Set MOSI | `- Set MOSI * `- Set MOSI | `- Set MOSI | `- Set MOSI
* | |
* `- Sample MISO `- Sample MISO * `- Sample MISO `- Sample MISO
* *
* MISO <------------X------------><-----------X------------> * MISO /-------------X-----------\/------------X-------------\/-----------
* MOSO * MOSO \-------------X-----------/\------------X-------------/\-----------
* *
* Input Parameters: * Input Parameters:
* dev - Device-specific state data * dev - Device-specific state data
@@ -406,12 +405,11 @@ static uint16_t spi_bitexchange0(uint16_t dataout, uint32_t holdtime)
* +------------+ +------------+ * +------------+ +------------+
* | | | | * | | | |
* SCLK -+ +------------+ +------------ * SCLK -+ +------------+ +------------
* ` Set MOSI | `- Set MOSI | * `- Set MOSI | `- Set MOSI |
* | |
* `- Sample MISO `- Sample MISO * `- Sample MISO `- Sample MISO
* *
* MISO <-----------X-------------><----------X-------------> * MISO /-----------X------------\/-----------X-------------\/------------
* MOSO * MOSO \-----------X------------/\-----------X-------------/\------------
* *
* Input Parameters: * Input Parameters:
* dev - Device-specific state data * dev - Device-specific state data
@@ -474,12 +472,11 @@ static uint16_t spi_bitexchange1(uint16_t dataout, uint32_t holdtime)
* ---------------+ +------------+ +------------ * ---------------+ +------------+ +------------
* | | | | * | | | |
* SCLK +------------+ +------------+ * SCLK +------------+ +------------+
* ` Set MOSI | `- Set MOSI | `- Set MOSI * `- Set MOSI | `- Set MOSI | `- Set MOSI
* | | * `- Sample MISO `- Sample MISO
* `- Sample MISO `- Sample MISO
* *
* MISO <------------X------------><-----------X------------> * MISO /-------------X------------\/-----------X-------------\/-----------
* MOSO * MOSO \-------------X------------/\-----------X-------------/\-----------
* *
* Input Parameters: * Input Parameters:
* dev - Device-specific state data * dev - Device-specific state data
@@ -544,11 +541,10 @@ static uint16_t spi_bitexchange2(uint16_t dataout, uint32_t holdtime)
* | | | | * | | | |
* SCLK +------------+ +------------+ * SCLK +------------+ +------------+
* ` Set MOSI | `- Set MOSI | * ` Set MOSI | `- Set MOSI |
* | |
* `- Sample MISO `- Sample MISO * `- Sample MISO `- Sample MISO
* *
* MISO <-----------X-------------><----------X-------------> * MISO /-----------X------------\/-----------X-------------\/------------
* MOSO * MOSO \-----------X------------/\-----------X-------------/\------------
* *
* Input Parameters: * Input Parameters:
* dev - Device-specific state data * dev - Device-specific state data