diff --git a/arch/arm/include/mps/chip.h b/arch/arm/include/mps/chip.h index b1a4d2a7b42..def1433457f 100644 --- a/arch/arm/include/mps/chip.h +++ b/arch/arm/include/mps/chip.h @@ -31,9 +31,10 @@ * Pre-processor Prototypes ****************************************************************************/ -#define NVIC_SYSH_PRIORITY_MIN 0xe0 /* Bits [7:5] set in minimum priority */ +#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* Bits [7:5] set in minimum priority */ #define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ -#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Steps between priorities */ +#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ +#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */ /**************************************************************************** * Public Types diff --git a/arch/arm/src/mps/mps_irq.c b/arch/arm/src/mps/mps_irq.c index 6e9af56347d..c6091959ee3 100644 --- a/arch/arm/src/mps/mps_irq.c +++ b/arch/arm/src/mps/mps_irq.c @@ -85,7 +85,6 @@ static int mps_reserved(int irq, void *context, void *arg) * ****************************************************************************/ -#ifdef CONFIG_ARMV8M_USEBASEPRI static inline void mps_prioritize_syscall(int priority) { uint32_t regval; @@ -97,12 +96,55 @@ static inline void mps_prioritize_syscall(int priority) regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); putreg32(regval, NVIC_SYSH8_11_PRIORITY); } -#endif /**************************************************************************** * Public Functions ****************************************************************************/ +/**************************************************************************** + * Name: up_prioritize_irq + * + * Description: + * Set the priority of an IRQ. This function may be needed internally + * even if support for prioritized interrupts is not enabled. + * + ****************************************************************************/ + +int up_prioritize_irq(int irq, int priority) +{ + uint32_t regaddr; + uint32_t regval; + int shift; + + DEBUGASSERT(irq >= 0 && irq < NR_IRQS && + (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); + + if (irq < 16) + { + /* NVIC_SYSH_PRIORITY() maps {0..15} to one of three priority + * registers (0-3 are invalid) + */ + + regaddr = NVIC_SYSH_PRIORITY(irq); + irq -= 4; + } + else + { + /* NVIC_IRQ_PRIORITY() maps {0..} to one of many priority registers */ + + irq -= 16; + regaddr = NVIC_IRQ_PRIORITY(irq); + } + + regval = getreg32(regaddr); + shift = ((irq & 3) << 3); + regval &= ~(0xff << shift); + regval |= (priority << shift); + putreg32(regval, regaddr); + + return OK; +} + /**************************************************************************** * Name: up_irqinitialize * @@ -173,14 +215,9 @@ void up_irqinitialize(void) /* Set the priority of the SVCall interrupt */ -#ifdef CONFIG_ARCH_IRQPRIO + up_prioritize_irq(MPS_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); - /* up_prioritize_irq(MPS_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ - -#endif -#ifdef CONFIG_ARMV8M_USEBASEPRI mps_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); -#endif /* If the MPU is enabled, then attach and enable the Memory Management * Fault handler. diff --git a/boards/arm/mps/mps2-an500/configs/nsh/defconfig b/boards/arm/mps/mps2-an500/configs/nsh/defconfig index f666fbeaf80..9b8357e1518 100644 --- a/boards/arm/mps/mps2-an500/configs/nsh/defconfig +++ b/boards/arm/mps/mps2-an500/configs/nsh/defconfig @@ -5,7 +5,6 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # -# CONFIG_DEBUG_WARN is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="mps2-an500" CONFIG_ARCH_BOARD_MPS2_AN500=y @@ -15,6 +14,7 @@ CONFIG_ARCH_CHIP_MPS=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_SYSTICK=y +CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_ARM_MPU_NREGIONS=1 CONFIG_ARM_MPU_RESET=y @@ -29,10 +29,15 @@ CONFIG_CMSDK_UART0_TX_IRQ=17 CONFIG_CMSDK_UART=y CONFIG_CXX_STANDARD="c++17" CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_BUSFAULT=y CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_HARDFAULT_ALERT=y CONFIG_DEBUG_SCHED=y CONFIG_DEBUG_SCHED_ERROR=y +CONFIG_DEBUG_SCHED_INFO=y +CONFIG_DEBUG_SCHED_WARN=y CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_USAGEFAULT=y CONFIG_DEFAULT_TASK_STACKSIZE=4096 CONFIG_DEV_ZERO=y CONFIG_EXAMPLES_HELLO=y @@ -59,6 +64,8 @@ CONFIG_READLINE_CMD_HISTORY=y CONFIG_RR_INTERVAL=200 CONFIG_SCHED_HPWORK=y CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_IRQMONITOR=y +CONFIG_SPINLOCK=y CONFIG_STACK_COLORATION=y CONFIG_STANDARD_SERIAL=y CONFIG_START_DAY=25 diff --git a/boards/arm/mps/mps3-an547/configs/nsh/defconfig b/boards/arm/mps/mps3-an547/configs/nsh/defconfig index edeee995127..54f5e21f223 100644 --- a/boards/arm/mps/mps3-an547/configs/nsh/defconfig +++ b/boards/arm/mps/mps3-an547/configs/nsh/defconfig @@ -15,6 +15,7 @@ CONFIG_ARCH_CHIP_MPS=y CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV8M_SYSTICK=y +CONFIG_ARMV8M_USEBASEPRI=y CONFIG_BUILTIN=y CONFIG_CMSDK_UART0=y CONFIG_CMSDK_UART0_BASE=0x49303000 @@ -25,10 +26,13 @@ CONFIG_CMSDK_UART0_SERIAL_CONSOLE=y CONFIG_CMSDK_UART0_TX_IRQ=49 CONFIG_CMSDK_UART=y CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_BUSFAULT=y CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_HARDFAULT_ALERT=y CONFIG_DEBUG_SCHED=y CONFIG_DEBUG_SCHED_ERROR=y CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_USAGEFAULT=y CONFIG_DEFAULT_TASK_STACKSIZE=4096 CONFIG_DEV_ZERO=y CONFIG_EXAMPLES_HELLO=y @@ -41,7 +45,6 @@ CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IDLETHREAD_STACKSIZE=4096 CONFIG_INIT_ENTRYPOINT="nsh_main" CONFIG_INTELHEX_BINARY=y -CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_MEMFD_ERROR=y CONFIG_MM_REGIONS=2 CONFIG_NSH_ARCHINIT=y @@ -57,6 +60,8 @@ CONFIG_READLINE_CMD_HISTORY=y CONFIG_RR_INTERVAL=200 CONFIG_SCHED_HPWORK=y CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_IRQMONITOR=y +CONFIG_SPINLOCK=y CONFIG_STACK_COLORATION=y CONFIG_STANDARD_SERIAL=y CONFIG_START_DAY=25