mirror of
https://github.com/apache/nuttx.git
synced 2026-05-15 21:19:09 +08:00
Merge remote-tracking branch 'origin/master' into composite
This commit is contained in:
Gregory Nutt
+3
-1
@@ -8,7 +8,7 @@ Make.dep
|
||||
.swp
|
||||
.*.swp
|
||||
core
|
||||
.gdbinit
|
||||
/.gdbinit
|
||||
/cscope.*
|
||||
/.config
|
||||
/.config.old
|
||||
@@ -24,5 +24,7 @@ core
|
||||
/*.bin
|
||||
/*.ihx
|
||||
/*.hex
|
||||
/.cproject
|
||||
/.project
|
||||
/pcode
|
||||
/tags
|
||||
|
||||
@@ -556,6 +556,9 @@ clean: subdir_clean
|
||||
$(call DELFILE, _SAVED_APPS_config)
|
||||
$(call DELFILE, nuttx-export*)
|
||||
$(call DELFILE, nuttx_user*)
|
||||
$(call DELFILE, .gdbinit)
|
||||
$(call DELFILE, .cproject)
|
||||
$(call DELFILE, .project)
|
||||
$(call CLEAN)
|
||||
|
||||
subdir_distclean:
|
||||
|
||||
@@ -538,6 +538,9 @@ clean: subdir_clean
|
||||
$(call DELFILE, _SAVED_APPS_config)
|
||||
$(call DELFILE, nuttx-export*)
|
||||
$(call DELFILE, nuttx_user*)
|
||||
$(call DELFILE, .gdbinit)
|
||||
$(call DELFILE, .cproject)
|
||||
$(call DELFILE, .project)
|
||||
$(call CLEAN)
|
||||
|
||||
subdir_distclean:
|
||||
|
||||
+11
-2
@@ -583,13 +583,18 @@ Instantiating "Canned" Configurations
|
||||
included in the build and what is not. This file is also used
|
||||
to generate a C configuration header at include/nuttx/config.h.
|
||||
|
||||
Copy other, environment-specic files to ${TOPDIR
|
||||
|
||||
This might include files like .gdbinit or IDE configuration files
|
||||
like .project or .cproject.
|
||||
|
||||
General information about configuring NuttX can be found in:
|
||||
|
||||
${TOPDIR}/configs/README.txt
|
||||
${TOPDIR}/configs/<board-name>/README.txt
|
||||
|
||||
There is a configuration script in the tools/ directory that makes this
|
||||
easier. It is used as follows:
|
||||
There is a configuration script in the tools/ directory that makes does
|
||||
all of the above steps for you. It is used as follows:
|
||||
|
||||
cd ${TOPDIR}/tools
|
||||
./configure.sh <board-name>/<config-dir>
|
||||
@@ -600,6 +605,10 @@ Instantiating "Canned" Configurations
|
||||
cd ${TOPDIR}\tools
|
||||
configure.bat <board-name>\<config-dir>
|
||||
|
||||
And, to make sure that other platform is supported, there is also a
|
||||
C program at tools/configure.c that can be compiled to establish the
|
||||
board configuration.
|
||||
|
||||
See tools/README.txt for more information about these scripts.
|
||||
|
||||
Refreshing Configurations
|
||||
|
||||
+1
-1
@@ -397,7 +397,7 @@ config ARCH_CORTEXR5
|
||||
select ARCH_HAVE_MPU
|
||||
select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
|
||||
|
||||
config ARCH_CORTEX5F
|
||||
config ARCH_CORTEXR5F
|
||||
bool
|
||||
default n
|
||||
select ARCH_HAVE_MPU
|
||||
|
||||
@@ -128,11 +128,7 @@ ifeq ($(CONFIG_ARCH_CORTEXM4),y)
|
||||
TOOLCHAIN_MTUNE := -mtune=cortex-m4
|
||||
TOOLCHAIN_MARCH := -march=armv7e-m
|
||||
ifeq ($(CONFIG_ARCH_FPU),y)
|
||||
ifeq ($(CONFIG_ARCH_DPFPU),y)
|
||||
TOOLCHAIN_MFLOAT := -mfpu=fpv4-sp -mfloat-abi=hard
|
||||
else
|
||||
TOOLCHAIN_MFLOAT := -mfpu=fpv4-sp-d16 -mfloat-abi=hard
|
||||
endif
|
||||
else
|
||||
TOOLCHAIN_MFLOAT := -mfloat-abi=soft
|
||||
endif
|
||||
|
||||
@@ -151,7 +151,7 @@ struct twi_dev_s
|
||||
struct i2c_msg_s *msg; /* Message list */
|
||||
uint32_t twiclk; /* TWIHS input clock frequency */
|
||||
uint32_t frequency; /* TWIHS transfer clock frequency */
|
||||
bool initd; /* True :device has been initialized */
|
||||
int refs; /* Reference count */
|
||||
uint8_t msgc; /* Number of message in the message list */
|
||||
|
||||
sem_t exclsem; /* Only one thread can access at a time */
|
||||
@@ -1118,6 +1118,10 @@ static int twi_reset(FAR struct i2c_master_s *dev)
|
||||
|
||||
DEBUGASSERT(priv != NULL);
|
||||
|
||||
/* Our caller must own a ref */
|
||||
|
||||
DEBUGASSERT(priv->refs > 0);
|
||||
|
||||
/* Get exclusive access to the TWIHS device */
|
||||
|
||||
twi_takesem(&priv->exclsem);
|
||||
@@ -1342,6 +1346,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
|
||||
{
|
||||
struct twi_dev_s *priv;
|
||||
uint32_t frequency;
|
||||
const struct twi_attr_s *attr = 0;
|
||||
irqstate_t flags;
|
||||
int ret;
|
||||
|
||||
@@ -1352,8 +1357,8 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
|
||||
{
|
||||
/* Select up TWIHS0 and setup invariant attributes */
|
||||
|
||||
priv = &g_twi0;
|
||||
priv->attr = &g_twi0attr;
|
||||
priv = &g_twi0;
|
||||
attr = &g_twi0attr;
|
||||
|
||||
/* Select the (initial) TWIHS frequency */
|
||||
|
||||
@@ -1366,8 +1371,8 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
|
||||
{
|
||||
/* Select up TWIHS1 and setup invariant attributes */
|
||||
|
||||
priv = &g_twi1;
|
||||
priv->attr = &g_twi1attr;
|
||||
priv = &g_twi1;
|
||||
attr = &g_twi1attr;
|
||||
|
||||
/* Select the (initial) TWIHS frequency */
|
||||
|
||||
@@ -1380,8 +1385,8 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
|
||||
{
|
||||
/* Select up TWIHS2 and setup invariant attributes */
|
||||
|
||||
priv = &g_twi2;
|
||||
priv->attr = &g_twi2attr;
|
||||
priv = &g_twi2;
|
||||
attr = &g_twi2attr;
|
||||
|
||||
/* Select the (initial) TWIHS frequency */
|
||||
|
||||
@@ -1394,14 +1399,16 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Perform one-time TWIHS initialization */
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
/* Has the device already been initialized? */
|
||||
|
||||
if (!priv->initd)
|
||||
if ((volatile int)priv->refs++ == 0)
|
||||
{
|
||||
/* Perform one-time TWIHS initialization */
|
||||
|
||||
priv->attr = attr;
|
||||
|
||||
/* Allocate a watchdog timer */
|
||||
|
||||
priv->timeout = wd_create();
|
||||
@@ -1438,10 +1445,6 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
|
||||
/* Perform repeatable TWIHS hardware initialization */
|
||||
|
||||
twi_hw_initialize(priv, frequency);
|
||||
|
||||
/* Now it has been initialized */
|
||||
|
||||
priv->initd = true;
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
@@ -1452,6 +1455,7 @@ errout_with_wdog:
|
||||
priv->timeout = NULL;
|
||||
|
||||
errout_with_irq:
|
||||
priv->refs--;
|
||||
leave_critical_section(flags);
|
||||
return NULL;
|
||||
}
|
||||
@@ -1469,28 +1473,40 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
|
||||
struct twi_dev_s *priv = (struct twi_dev_s *) dev;
|
||||
irqstate_t flags;
|
||||
|
||||
i2cinfo("TWIHS%d Un-initializing\n", priv->attr->twi);
|
||||
DEBUGASSERT(priv);
|
||||
|
||||
/* Decrement reference count and check for underflow */
|
||||
|
||||
if (priv->refs == 0)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
i2cinfo("TWIHS%d Un-initializing refs:%d\n", priv->attr->twi, priv->refs);
|
||||
|
||||
/* Disable TWIHS interrupts */
|
||||
|
||||
flags = enter_critical_section();
|
||||
up_disable_irq(priv->attr->irq);
|
||||
|
||||
/* Reset data structures */
|
||||
if (--priv->refs == 0)
|
||||
{
|
||||
up_disable_irq(priv->attr->irq);
|
||||
|
||||
sem_destroy(&priv->exclsem);
|
||||
sem_destroy(&priv->waitsem);
|
||||
/* Reset data structures */
|
||||
|
||||
/* Free the watchdog timer */
|
||||
sem_destroy(&priv->exclsem);
|
||||
sem_destroy(&priv->waitsem);
|
||||
|
||||
wd_delete(priv->timeout);
|
||||
priv->timeout = NULL;
|
||||
/* Free the watchdog timer */
|
||||
|
||||
/* Detach Interrupt Handler */
|
||||
wd_delete(priv->timeout);
|
||||
priv->timeout = NULL;
|
||||
|
||||
(void)irq_detach(priv->attr->irq);
|
||||
/* Detach Interrupt Handler */
|
||||
|
||||
(void)irq_detach(priv->attr->irq);
|
||||
}
|
||||
|
||||
priv->initd = false;
|
||||
leave_critical_section(flags);
|
||||
return OK;
|
||||
}
|
||||
|
||||
@@ -466,4 +466,8 @@
|
||||
void stm32_flash_lock(void);
|
||||
void stm32_flash_unlock(void);
|
||||
|
||||
#ifdef CONFIG_STM32_STM32F40XX
|
||||
int stm32_flash_writeprotect(size_t page, bool enabled);
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_FLASH_H */
|
||||
|
||||
@@ -615,7 +615,7 @@
|
||||
#endif
|
||||
|
||||
#define GPIO_SPI3_MISO_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4)
|
||||
#define GPIO_SPI3_MISO_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN7)
|
||||
#define GPIO_SPI3_MISO_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN11)
|
||||
#define GPIO_SPI3_MOSI_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5)
|
||||
#define GPIO_SPI3_MOSI_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN12)
|
||||
#define GPIO_SPI3_NSS_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
|
||||
|
||||
@@ -79,6 +79,8 @@
|
||||
#else
|
||||
# define FLASH_KEY1 0x45670123
|
||||
# define FLASH_KEY2 0xCDEF89AB
|
||||
# define FLASH_OPTKEY1 0x08192A3B
|
||||
# define FLASH_OPTKEY2 0x4C5D6E7F
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX)
|
||||
@@ -384,6 +386,87 @@ ssize_t stm32_eeprom_erase(size_t addr, size_t eraselen)
|
||||
|
||||
#endif /* defined(CONFIG_STM32_STM32L15XX) */
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_flash_writeprotect
|
||||
*
|
||||
* Description:
|
||||
* Enable or disable the write protection of a flash sector.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_STM32_STM32F40XX
|
||||
int stm32_flash_writeprotect(size_t page, bool enabled)
|
||||
{
|
||||
uint32_t reg;
|
||||
uint32_t val;
|
||||
|
||||
#ifdef CONFIG_STM32_STM32F40XX
|
||||
if (page >= STM32_FLASH_NPAGES)
|
||||
{
|
||||
return -EFAULT;
|
||||
}
|
||||
#else
|
||||
# warning missing logic in stm32_flash_writeprotect
|
||||
#endif
|
||||
|
||||
/* Select the register that contains the bit to be changed */
|
||||
|
||||
if (page < 12)
|
||||
{
|
||||
reg = STM32_FLASH_OPTCR;
|
||||
}
|
||||
#if defined(CONFIG_STM32_FLASH_CONFIG_I) && defined(CONFIG_STM32_STM32F40XX)
|
||||
else
|
||||
{
|
||||
reg = STM32_FLASH_OPTCR1;
|
||||
page -= 12;
|
||||
}
|
||||
#else
|
||||
else
|
||||
{
|
||||
return -EFAULT;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Read the option status */
|
||||
|
||||
val = getreg32(reg);
|
||||
|
||||
/* Set or clear the protection */
|
||||
|
||||
if (enabled)
|
||||
{
|
||||
val &= ~(1 << (16+page) );
|
||||
}
|
||||
else
|
||||
{
|
||||
val |= (1 << (16+page) );
|
||||
}
|
||||
|
||||
/* Unlock options */
|
||||
|
||||
putreg32(FLASH_OPTKEY1, STM32_FLASH_OPTKEYR);
|
||||
putreg32(FLASH_OPTKEY2, STM32_FLASH_OPTKEYR);
|
||||
|
||||
/* Write options */
|
||||
|
||||
putreg32(val, reg);
|
||||
|
||||
/* Trigger programmation */
|
||||
|
||||
modifyreg32(STM32_FLASH_OPTCR, 0, FLASH_OPTCR_OPTSTRT);
|
||||
|
||||
/* Wait for completion */
|
||||
|
||||
while(getreg32(STM32_FLASH_SR) & FLASH_SR_BSY) up_waste();
|
||||
|
||||
/* Relock options */
|
||||
|
||||
modifyreg32(STM32_FLASH_OPTCR, 0, FLASH_OPTCR_OPTLOCK);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX)
|
||||
size_t up_progmem_pagesize(size_t page)
|
||||
{
|
||||
|
||||
@@ -2333,7 +2333,7 @@ static int i2s_dma_allocate(struct stm32_i2s_s *priv)
|
||||
{
|
||||
/* Allocate an RX DMA channel */
|
||||
|
||||
priv->rx.dma = stm32_dmachannel(DMAMAP_SPI3_RX_2);
|
||||
priv->rx.dma = stm32_dmachannel(DMACHAN_I2S3_RX);
|
||||
if (!priv->rx.dma)
|
||||
{
|
||||
i2serr("ERROR: Failed to allocate the RX DMA channel\n");
|
||||
@@ -2356,7 +2356,7 @@ static int i2s_dma_allocate(struct stm32_i2s_s *priv)
|
||||
{
|
||||
/* Allocate a TX DMA channel */
|
||||
|
||||
priv->tx.dma = stm32_dmachannel(DMAMAP_SPI3_TX_2);
|
||||
priv->tx.dma = stm32_dmachannel(DMACHAN_I2S3_TX);
|
||||
if (!priv->tx.dma)
|
||||
{
|
||||
i2serr("ERROR: Failed to allocate the TX DMA channel\n");
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/stm32/stm32_irq.c
|
||||
*
|
||||
* Copyright (C) 2009-2016 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2009-2017 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -387,6 +387,12 @@ void up_irqinitialize(void)
|
||||
up_enable_irq(STM32_IRQ_MEMFAULT);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RTC
|
||||
/* RTC was initialized earlier but IRQs weren't ready at that time */
|
||||
|
||||
stm32_rtc_irqinitialize();
|
||||
#endif
|
||||
|
||||
/* Attach all other processor exceptions (except reset and sys tick) */
|
||||
|
||||
#ifdef CONFIG_DEBUG_FEATURES
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
* arch/arm/src/stm32/stm32_rtc.h
|
||||
*
|
||||
* Copyright (C) 2011 Uros Platise. All rights reserved.
|
||||
* Copyright (C) 2011-2013, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011-2013, 2015-2017 Gregory Nutt. All rights reserved.
|
||||
* Author: Uros Platise <uros.platise@isotel.eu> (Original for the F1)
|
||||
* Gregory Nutt <gnutt@nuttx.org> (On-going support and development)
|
||||
*
|
||||
@@ -76,24 +76,41 @@
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define STM32_RTC_PRESCALER_SECOND 32767 /* Default prescaler to get a second base */
|
||||
#define STM32_RTC_PRESCALER_MIN 1 /* Maximum speed of 16384 Hz */
|
||||
#define STM32_RTC_PRESCALER_SECOND 32767 /* Default prescaler to get a
|
||||
* second base */
|
||||
#define STM32_RTC_PRESCALER_MIN 1 /* Maximum speed of 16384 Hz */
|
||||
|
||||
#if defined(CONFIG_STM32_STM32F10XX)
|
||||
/* RTC is only a counter, store RTC data in backup domain register DR1 (if
|
||||
* CONFIG_RTC_HIRES) and DR2 (state).
|
||||
*/
|
||||
|
||||
#if !defined(CONFIG_RTC_MAGIC)
|
||||
# define CONFIG_RTC_MAGIC (0xfacefeee)
|
||||
# define CONFIG_RTC_MAGIC (0xface) /* only 16 bit */
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_RTC_MAGIC_TIME_SET)
|
||||
# define CONFIG_RTC_MAGIC_TIME_SET (CONFIG_RTC_MAGIC + 1)
|
||||
#define RTC_MAGIC_REG STM32_BKP_DR2
|
||||
|
||||
#else /* !CONFIG_STM32_STM32F10XX */
|
||||
|
||||
#if !defined(CONFIG_RTC_MAGIC)
|
||||
# define CONFIG_RTC_MAGIC (0xfacefeee)
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_RTC_MAGIC_REG)
|
||||
# define CONFIG_RTC_MAGIC_REG (0)
|
||||
# define CONFIG_RTC_MAGIC_REG (0)
|
||||
#endif
|
||||
|
||||
#define RTC_MAGIC CONFIG_RTC_MAGIC
|
||||
#define RTC_MAGIC_TIME_SET CONFIG_RTC_MAGIC_TIME_SET
|
||||
#define RTC_MAGIC_REG STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
|
||||
#define RTC_MAGIC_REG STM32_RTC_BKR(CONFIG_RTC_MAGIC_REG)
|
||||
|
||||
#endif /* CONFIG_STM32_STM32F10XX */
|
||||
|
||||
#define RTC_MAGIC CONFIG_RTC_MAGIC
|
||||
#define RTC_MAGIC_TIME_SET CONFIG_RTC_MAGIC_TIME_SET
|
||||
|
||||
#if !defined(CONFIG_RTC_MAGIC_TIME_SET)
|
||||
# define CONFIG_RTC_MAGIC_TIME_SET (CONFIG_RTC_MAGIC + 1)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
@@ -118,6 +135,23 @@ extern "C"
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_rtc_irqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize IRQs for RTC, not possible during up_rtc_initialize because
|
||||
* up_irqinitialize is called later.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno on failure
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int stm32_rtc_irqinitialize(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_rtc_getdatetime_with_subseconds
|
||||
*
|
||||
|
||||
@@ -365,7 +365,11 @@ static int stm32_settime(FAR struct rtc_lowerhalf_s *lower,
|
||||
|
||||
static bool stm32_havesettime(FAR struct rtc_lowerhalf_s *lower)
|
||||
{
|
||||
#if defined(CONFIG_STM32_STM32F10XX)
|
||||
return getreg16(RTC_MAGIC_REG) == RTC_MAGIC_TIME_SET;
|
||||
#else
|
||||
return getreg32(RTC_MAGIC_REG) == RTC_MAGIC_TIME_SET;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/stm32/stm32_rtcc.c
|
||||
*
|
||||
* Copyright (C) 2012-2016 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2012-2017 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -763,17 +763,37 @@ int up_rtc_initialize(void)
|
||||
* 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B).
|
||||
*/
|
||||
|
||||
g_rtc_enabled = true;
|
||||
rtc_dumpregs("After Initialization");
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_rtc_irqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize IRQs for RTC, not possible during up_rtc_initialize because
|
||||
* up_irqinitialize is called later.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno on failure
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int stm32_rtc_irqinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_RTC_ALARM
|
||||
# warning "Missing EXTI setup logic"
|
||||
|
||||
/* Then attach the ALARM interrupt handler */
|
||||
/* Attach the ALARM interrupt handler */
|
||||
|
||||
irq_attach(STM32_IRQ_RTC_WKUP, rtc_interrupt, NULL);
|
||||
up_enable_irq(STM32_IRQ_RTC_WKUP);
|
||||
#endif
|
||||
|
||||
g_rtc_enabled = true;
|
||||
rtc_dumpregs("After Initialization");
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
*
|
||||
* With extensions, modifications by:
|
||||
*
|
||||
* Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011-2013, 2015, 2017 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregroy Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -331,7 +331,9 @@ static int stm32_rtc_interrupt(int irq, void *context, FAR void *arg)
|
||||
#ifdef CONFIG_RTC_HIRES
|
||||
if ((source & RTC_CRL_OWF) != 0)
|
||||
{
|
||||
stm32_pwr_enablebkp(true);
|
||||
putreg16(getreg16(RTC_TIMEMSB_REG) + 1, RTC_TIMEMSB_REG);
|
||||
stm32_pwr_enablebkp(false);
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -373,25 +375,34 @@ static int stm32_rtc_interrupt(int irq, void *context, FAR void *arg)
|
||||
|
||||
int up_rtc_initialize(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Enable write access to the backup domain (RTC registers, RTC backup data
|
||||
* registers and backup SRAM).
|
||||
*/
|
||||
|
||||
stm32_pwr_enablebkp(true);
|
||||
|
||||
regval = getreg32(RTC_MAGIC_REG);
|
||||
if (regval != RTC_MAGIC && regval != RTC_MAGIC_TIME_SET)
|
||||
{
|
||||
/* Reset backup domain if bad magic */
|
||||
|
||||
modifyreg32(STM32_RCC_BDCR, 0, RCC_BDCR_BDRST);
|
||||
modifyreg32(STM32_RCC_BDCR, RCC_BDCR_BDRST, 0);
|
||||
putreg16(RTC_MAGIC, RTC_MAGIC_REG);
|
||||
}
|
||||
|
||||
/* Select the lower power external 32,768Hz (Low-Speed External, LSE) oscillator
|
||||
* as RTC Clock Source and enable the Clock */
|
||||
* as RTC Clock Source and enable the Clock.
|
||||
*/
|
||||
|
||||
modifyreg16(STM32_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE);
|
||||
|
||||
/* Enable RTC and wait for RSF */
|
||||
|
||||
modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
|
||||
|
||||
/* TODO: Get state from this function, if everything is
|
||||
* okay and whether it is already enabled (if it was disabled
|
||||
* reset upper time register)
|
||||
*/
|
||||
|
||||
g_rtc_enabled = true;
|
||||
|
||||
/* TODO: Possible stall? should we set the timeout period? and return with -1 */
|
||||
|
||||
stm32_rtc_wait4rsf();
|
||||
@@ -403,21 +414,22 @@ int up_rtc_initialize(void)
|
||||
putreg16(STM32_RTC_PRESCALAR_VALUE & 0xffff, STM32_RTC_PRLL);
|
||||
stm32_rtc_endwr();
|
||||
|
||||
/* Configure RTC interrupt to catch overflow and alarm interrupts. */
|
||||
stm32_rtc_wait4rsf();
|
||||
|
||||
#if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
|
||||
irq_attach(STM32_IRQ_RTC, stm32_rtc_interrupt, NULL);
|
||||
up_enable_irq(STM32_IRQ_RTC);
|
||||
#endif
|
||||
|
||||
/* Previous write is done? This is required prior writing into CRH */
|
||||
|
||||
while ((getreg16(STM32_RTC_CRL) & RTC_CRL_RTOFF) == 0)
|
||||
{
|
||||
up_waste();
|
||||
}
|
||||
#ifdef CONFIG_RTC_HIRES
|
||||
/* Enable overflow interrupt - alarm interrupt is enabled in
|
||||
* stm32_rtc_setalarm.
|
||||
*/
|
||||
|
||||
modifyreg16(STM32_RTC_CRH, 0, RTC_CRH_OWIE);
|
||||
#endif
|
||||
|
||||
/* TODO: Get state from this function, if everything is
|
||||
* okay and whether it is already enabled (if it was disabled
|
||||
* reset upper time register)
|
||||
*/
|
||||
|
||||
g_rtc_enabled = true;
|
||||
|
||||
/* Alarm Int via EXTI Line */
|
||||
|
||||
@@ -432,6 +444,33 @@ int up_rtc_initialize(void)
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_rtc_irqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize IRQs for RTC, not possible during up_rtc_initialize because
|
||||
* up_irqinitialize is called later.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno on failure
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int stm32_rtc_irqinitialize(void)
|
||||
{
|
||||
#if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
|
||||
/* Configure RTC interrupt to catch overflow and alarm interrupts. */
|
||||
|
||||
irq_attach(STM32_IRQ_RTC, stm32_rtc_interrupt, NULL);
|
||||
up_enable_irq(STM32_IRQ_RTC);
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_rtc_time
|
||||
*
|
||||
@@ -613,6 +652,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
|
||||
do
|
||||
{
|
||||
stm32_rtc_beginwr();
|
||||
putreg16(RTC_MAGIC, RTC_MAGIC_TIME_SET);
|
||||
putreg16(regvals.cnth, STM32_RTC_CNTH);
|
||||
putreg16(regvals.cntl, STM32_RTC_CNTL);
|
||||
cntl = getreg16(STM32_RTC_CNTL);
|
||||
@@ -652,6 +692,8 @@ int stm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
|
||||
uint16_t cr;
|
||||
int ret = -EBUSY;
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
/* Is there already something waiting on the ALARM? */
|
||||
|
||||
if (g_alarmcb == NULL)
|
||||
@@ -664,6 +706,8 @@ int stm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
|
||||
|
||||
stm32_rtc_breakout(tp, ®vals);
|
||||
|
||||
stm32_pwr_enablebkp(true);
|
||||
|
||||
/* Enable RTC alarm */
|
||||
|
||||
cr = getreg16(STM32_RTC_CRH);
|
||||
@@ -672,16 +716,18 @@ int stm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
|
||||
|
||||
/* The set the alarm */
|
||||
|
||||
flags = enter_critical_section();
|
||||
stm32_rtc_beginwr();
|
||||
putreg16(regvals.cnth, STM32_RTC_ALRH);
|
||||
putreg16(regvals.cntl, STM32_RTC_ALRL);
|
||||
stm32_rtc_endwr();
|
||||
leave_critical_section(flags);
|
||||
|
||||
stm32_pwr_enablebkp(false);
|
||||
|
||||
ret = OK;
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
@@ -706,6 +752,8 @@ int stm32_rtc_cancelalarm(void)
|
||||
irqstate_t flags;
|
||||
int ret = -ENODATA;
|
||||
|
||||
flags = enter_critical_section();
|
||||
|
||||
if (g_alarmcb != NULL)
|
||||
{
|
||||
/* Cancel the global callback function */
|
||||
@@ -714,16 +762,18 @@ int stm32_rtc_cancelalarm(void)
|
||||
|
||||
/* Unset the alarm */
|
||||
|
||||
flags = enter_critical_section();
|
||||
stm32_pwr_enablebkp(true);
|
||||
stm32_rtc_beginwr();
|
||||
putreg16(0xffff, STM32_RTC_ALRH);
|
||||
putreg16(0xffff, STM32_RTC_ALRL);
|
||||
stm32_rtc_endwr();
|
||||
leave_critical_section(flags);
|
||||
stm32_pwr_enablebkp(false);
|
||||
|
||||
ret = OK;
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -1058,6 +1058,28 @@ int up_rtc_initialize(void)
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_rtc_irqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize IRQs for RTC, not possible during up_rtc_initialize because
|
||||
* up_irqinitialize is called later.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno on failure
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int stm32_rtc_irqinitialize(void)
|
||||
{
|
||||
/* Nothing to do */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_rtc_getdatetime_with_subseconds
|
||||
*
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/stm32l4/stm32l4_rtcc.c
|
||||
*
|
||||
* Copyright (C) 2012-2016 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2012-2017 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* dev@ziggurat29.com (adaptations to stm32l4)
|
||||
*
|
||||
@@ -1003,6 +1003,28 @@ int up_rtc_initialize(void)
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_rtc_irqinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize IRQs for RTC, not possible during up_rtc_initialize because
|
||||
* up_irqinitialize is called later.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) on success; a negated errno on failure
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int stm32_rtc_irqinitialize(void)
|
||||
{
|
||||
/* Nothing to do */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32l4_rtc_getdatetime_with_subseconds
|
||||
*
|
||||
|
||||
@@ -9,6 +9,8 @@ Make.dep
|
||||
.*.swp
|
||||
core
|
||||
.gdbinit
|
||||
.project
|
||||
.cproject
|
||||
cscope.out
|
||||
/Make.dep
|
||||
/.depend
|
||||
|
||||
@@ -119,7 +119,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -118,7 +118,7 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -116,7 +116,7 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -116,7 +116,7 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -118,7 +118,7 @@ CONFIG_ARCH_ARM7TDMI=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="arm"
|
||||
|
||||
@@ -118,7 +118,7 @@ CONFIG_ARCH_ARM7TDMI=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="arm"
|
||||
|
||||
@@ -118,7 +118,7 @@ CONFIG_ARCH_ARM7TDMI=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="arm"
|
||||
|
||||
@@ -116,7 +116,7 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -304,10 +304,10 @@ Configurations
|
||||
If you do this a lot, you will probably want to invest a little time
|
||||
to develop a tool to automate these steps.
|
||||
|
||||
mrf24j40-radio
|
||||
mrf24j40-mac
|
||||
|
||||
This is a version of nsh that was used for testing the MRF24J40 be as a
|
||||
character device. The most important configuration differences are
|
||||
This is a version of nsh that was used for testing the MRF24J40 MAC be
|
||||
as a character device. The most important configuration differences are
|
||||
summarized below:
|
||||
|
||||
1. Support for the BEE click and SPI are in enabled in the mikroBUS1 slot:
|
||||
@@ -327,7 +327,11 @@ Configurations
|
||||
|
||||
CONFIG_WIRELESS=y
|
||||
CONFIG_WIRELESS_IEEE802154=y
|
||||
CONFIG_IEEE802154_DEV=y
|
||||
CONFIG_IEEE802154_MAC_DEV=y
|
||||
CONFIG_IEEE802154_NTXDESC=3
|
||||
CONFIG_IEEE802154_IND_PREALLOC=20
|
||||
CONFIG_IEEE802154_IND_IRQRESERVE=10
|
||||
CONFIG_IEEE802154_DEFAULT_EADDR=0x00fade00deadbeef
|
||||
|
||||
5. Support for the lower half MRF24J40 character driver is enabled
|
||||
|
||||
@@ -335,17 +339,103 @@ Configurations
|
||||
CONFIG_DRIVERS_IEEE802154=y
|
||||
CONFIG_IEEE802154_MRF24J40=y
|
||||
|
||||
6. Support for the test program at apps/ieee802154 is enabled:
|
||||
6. Support for the i8sak test program at apps/ieee802154 is enabled:
|
||||
|
||||
CONFIG_IEEE802154_COMMON=y
|
||||
CONFIG_IEEE802154_COORD=y
|
||||
CONFIG_IEEE802154_LIBMAC=y
|
||||
CONFIG_IEEE802154_LIBUTILS=y
|
||||
CONFIG_IEEE802154_I8SAK=y
|
||||
CONFIG_IEEE802154_I8SAK_PRIORITY=100
|
||||
CONFIG_IEEE802154_I8SAK_STACKSIZE=2048
|
||||
|
||||
7. Initialization hooks are provided to enable the MRF24J40 and to
|
||||
register the radio character driver.
|
||||
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
|
||||
8. Configuration instructions: WPAN configuration must be performed
|
||||
using the i8sak program. Detailed instructions are provided in a
|
||||
README.txt file at apps/wireless/ieee802154/i8sak. You should make
|
||||
sure that you are familiar with the content of that README.txt file.
|
||||
|
||||
Here is a quick "cheat sheet" for associated to setting up a
|
||||
coordinator and associating wth the WPAN:
|
||||
|
||||
1. Configure the Coordinator. On coordinator device do:
|
||||
|
||||
nsh> i8 /dev/ieee0 startpan
|
||||
nsh> i8 acceptassoc
|
||||
|
||||
2. Assocate and endpoint device with the WPAN. On the endpoint
|
||||
device:
|
||||
|
||||
nsh> i8 /dev/ieee0 assoc
|
||||
|
||||
mrf24j40-6lowpan
|
||||
|
||||
This is another version of nsh that is very similar to the mrf24j40-mac
|
||||
configuration but is focused on testing the IEEE 802.15.4 MAC
|
||||
integration with the 6loWPAN network stack. It derives directly from the
|
||||
mrf24j40-mac and all NOTES provided there apply. Additional differences
|
||||
are summarized below:
|
||||
|
||||
NOTES:
|
||||
|
||||
1. This configuration differs from the mrf24j40-mac configuration in
|
||||
that this configuration, like the usbnsh configuration, uses a USB
|
||||
serial device for console I/O. Such a configuration is useful on the
|
||||
Clicker2 STM32 which has no builtin RS-232 drivers and eliminates the
|
||||
tangle of cables and jumpers needed to debug multi-board setups.
|
||||
|
||||
Most other NOTES for the usbnsh configuration should apply. Specific
|
||||
differences between the usbnsh or mrf24j40-mac configurations and this
|
||||
configuration are listed in these NOTES.
|
||||
|
||||
2. On most serial terminal programs that I have used, the USB
|
||||
connection will be lost when the target board is reset. When that
|
||||
happens, you may have to reset your serial terminal program to adapt
|
||||
to the new USB connection. Using TeraTerm, I actually have to exit
|
||||
the serial program and restart it in order to detect and select the
|
||||
re-established USB serial connection.
|
||||
|
||||
3. This configuration does NOT have USART3 output enabled. This
|
||||
configuration supports logging of debug output to a circular
|
||||
buffer in RAM. This feature is discussed fully in this Wiki page:
|
||||
http://nuttx.org/doku.php?id=wiki:howtos:syslog . Relevant
|
||||
configuration settings are summarized below:
|
||||
|
||||
Device Drivers:
|
||||
CONFIG_RAMLOG=y : Enable the RAM-based logging feature.
|
||||
CONFIG_RAMLOG_CONSOLE=n : (We don't use the RAMLOG console)
|
||||
CONFIG_RAMLOG_SYSLOG=y : This enables the RAM-based logger as the
|
||||
system logger.
|
||||
CONFIG_RAMLOG_NONBLOCKING=y : Needs to be non-blocking for dmesg
|
||||
CONFIG_RAMLOG_BUFSIZE=8192 : Buffer size is 8KiB
|
||||
|
||||
NOTE: This RAMLOG feature is really only of value if debug output
|
||||
is enabled. But, by default, no debug output is disabled in this
|
||||
configuration. Therefore, there is no logic that will add anything
|
||||
to the RAM buffer. This feature is configured and in place only
|
||||
to support any future debugging needs that you may have.
|
||||
|
||||
If you don't plan on using the debug features, then by all means
|
||||
disable this feature and save 8KiB of RAM!
|
||||
|
||||
NOTE: There is an issue with capturing data in the RAMLOG: If
|
||||
the system crashes, all of the crash dump information will go into
|
||||
the RAMLOG and you will be unable to access it! You can tell that
|
||||
the system has crashed because (a) it will be unresponsive and (b)
|
||||
the LD2 will be blinking at about 2Hz.
|
||||
|
||||
4. IPv6 networking is enabled with TCP/IP, UDP, 6loWPAN, and NSH
|
||||
Telnet support.
|
||||
|
||||
5. Configuration instructions: Basic PAN configuration is the same as
|
||||
for the ieee802154-mac configuration with the exception that after
|
||||
the PAN has been configured with the i8sak utility, you must
|
||||
explicity bring the network up:
|
||||
|
||||
nsh> ifup wpan0
|
||||
|
||||
nsh:
|
||||
|
||||
Configures the NuttShell (nsh) located at examples/nsh. This
|
||||
@@ -371,7 +461,6 @@ Configurations
|
||||
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
|
||||
|
||||
usbnsh:
|
||||
-------
|
||||
|
||||
This is another NSH example. If differs from other 'nsh' configurations
|
||||
in that this configurations uses a USB serial device for console I/O.
|
||||
@@ -380,7 +469,14 @@ Configurations
|
||||
|
||||
NOTES:
|
||||
|
||||
1. This configuration does have USART3 output enabled and set up as
|
||||
1. One most serial terminal programs that I have used, the USB
|
||||
connection will be lost when the target board is reset. When that
|
||||
happens, you may have to reset your serial terminal program to adapt
|
||||
to the new USB connection. Using TeraTerm, I actually have to exit
|
||||
the serial program and restart it in order to detect and select the
|
||||
re-established USB serial connection.
|
||||
|
||||
2. This configuration does have USART3 output enabled and set up as
|
||||
the system logging device:
|
||||
|
||||
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
|
||||
@@ -390,7 +486,7 @@ Configurations
|
||||
configuration so nothing should appear on USART3 unless you enable
|
||||
some debug output or enable the USB monitor.
|
||||
|
||||
2. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
|
||||
3. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
|
||||
device will save encoded trace output in in-memory buffer; if the
|
||||
USB monitor is enabled, that trace buffer will be periodically
|
||||
emptied and dumped to the system logging device (USART3 in this
|
||||
|
||||
@@ -125,7 +125,7 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -0,0 +1,122 @@
|
||||
############################################################################
|
||||
# configs/clicker2-stm32/mrf24j40-6lowpan/Make.defs
|
||||
#
|
||||
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include ${TOPDIR}/.config
|
||||
include ${TOPDIR}/tools/Config.mk
|
||||
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
|
||||
|
||||
LDSCRIPT = flash.ld
|
||||
|
||||
ifeq ($(WINTOOL),y)
|
||||
# Windows-native toolchains
|
||||
DIRLINK = $(TOPDIR)/tools/copydir.sh
|
||||
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
|
||||
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
|
||||
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
|
||||
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
|
||||
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
|
||||
else
|
||||
# Linux/Cygwin-native toolchain
|
||||
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
|
||||
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
|
||||
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
|
||||
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
|
||||
endif
|
||||
|
||||
CC = $(CROSSDEV)gcc
|
||||
CXX = $(CROSSDEV)g++
|
||||
CPP = $(CROSSDEV)gcc -E
|
||||
LD = $(CROSSDEV)ld
|
||||
AR = $(CROSSDEV)ar rcs
|
||||
NM = $(CROSSDEV)nm
|
||||
OBJCOPY = $(CROSSDEV)objcopy
|
||||
OBJDUMP = $(CROSSDEV)objdump
|
||||
|
||||
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
|
||||
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
ARCHOPTIMIZATION = -g
|
||||
endif
|
||||
|
||||
ifneq ($(CONFIG_DEBUG_NOOPT),y)
|
||||
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
|
||||
endif
|
||||
|
||||
ARCHCFLAGS = -fno-builtin
|
||||
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
|
||||
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
|
||||
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
|
||||
ARCHDEFINES =
|
||||
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
|
||||
|
||||
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
|
||||
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
|
||||
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
|
||||
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
|
||||
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
|
||||
|
||||
NXFLATLDFLAGS1 = -r -d -warn-common
|
||||
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
|
||||
LDNXFLATFLAGS = -e main -s 2048
|
||||
|
||||
# Loadable module definitions
|
||||
|
||||
CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
|
||||
|
||||
LDMODULEFLAGS = -r -e module_initialize
|
||||
ifeq ($(WINTOOL),y)
|
||||
LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
|
||||
else
|
||||
LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
|
||||
endif
|
||||
|
||||
ASMEXT = .S
|
||||
OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
ifneq ($(CROSSDEV),arm-nuttx-elf-)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
LDFLAGS += -g
|
||||
endif
|
||||
|
||||
HOSTCC = gcc
|
||||
HOSTINCLUDES = -I.
|
||||
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
|
||||
HOSTLDFLAGS =
|
||||
File diff suppressed because it is too large
Load Diff
+1
-1
@@ -1,5 +1,5 @@
|
||||
############################################################################
|
||||
# configs/clicker2-stm32/mrf24j40-radio/Make.defs
|
||||
# configs/clicker2-stm32/mrf24j40-mac/Make.defs
|
||||
#
|
||||
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
+5
-4
@@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y
|
||||
#
|
||||
# Build Configuration
|
||||
#
|
||||
CONFIG_APPS_DIR="../apps"
|
||||
# CONFIG_APPS_DIR="../apps"
|
||||
CONFIG_BUILD_FLAT=y
|
||||
# CONFIG_BUILD_2PASS is not set
|
||||
|
||||
@@ -120,12 +120,11 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
CONFIG_ARCH_CHIP="stm32"
|
||||
# CONFIG_ARCH_TOOLCHAIN_IAR is not set
|
||||
# CONFIG_ARMV7M_USEBASEPRI is not set
|
||||
CONFIG_ARCH_HAVE_CMNVECTOR=y
|
||||
# CONFIG_ARMV7M_CMNVECTOR is not set
|
||||
@@ -534,6 +533,7 @@ CONFIG_STM32_USART3_SERIALDRIVER=y
|
||||
#
|
||||
# USB Device Configuration
|
||||
#
|
||||
# CONFIG_ARCH_TOOLCHAIN_IAR is not set
|
||||
CONFIG_ARCH_TOOLCHAIN_GNU=y
|
||||
|
||||
#
|
||||
@@ -979,6 +979,7 @@ CONFIG_IOB_NCHAINS=0
|
||||
#
|
||||
CONFIG_WIRELESS=y
|
||||
CONFIG_WIRELESS_IEEE802154=y
|
||||
CONFIG_IEEE802154_DEFAULT_EADDR=0x00fade00deadbeef
|
||||
CONFIG_IEEE802154_MAC_DEV=y
|
||||
CONFIG_MAC802154_HPWORK=y
|
||||
CONFIG_IEEE802154_NTXDESC=3
|
||||
@@ -1109,7 +1110,6 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
#
|
||||
# CONFIG_C99_BOOL8 is not set
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
# CONFIG_CXX_NEWLONG is not set
|
||||
|
||||
#
|
||||
@@ -1340,6 +1340,7 @@ CONFIG_NSH_ARCHINIT=y
|
||||
# Platform-specific Support
|
||||
#
|
||||
# CONFIG_PLATFORM_CONFIGDATA is not set
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
|
||||
#
|
||||
# System Libraries and NSH Add-Ons
|
||||
@@ -120,12 +120,11 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
CONFIG_ARCH_CHIP="stm32"
|
||||
# CONFIG_ARCH_TOOLCHAIN_IAR is not set
|
||||
# CONFIG_ARMV7M_USEBASEPRI is not set
|
||||
CONFIG_ARCH_HAVE_CMNVECTOR=y
|
||||
# CONFIG_ARMV7M_CMNVECTOR is not set
|
||||
@@ -394,6 +393,7 @@ CONFIG_STM32_HAVE_I2C2=y
|
||||
CONFIG_STM32_HAVE_I2C3=y
|
||||
CONFIG_STM32_HAVE_SPI2=y
|
||||
CONFIG_STM32_HAVE_SPI3=y
|
||||
CONFIG_STM32_HAVE_I2S3=y
|
||||
# CONFIG_STM32_HAVE_SPI4 is not set
|
||||
# CONFIG_STM32_HAVE_SPI5 is not set
|
||||
# CONFIG_STM32_HAVE_SPI6 is not set
|
||||
@@ -432,6 +432,7 @@ CONFIG_STM32_PWR=y
|
||||
# CONFIG_STM32_SPI1 is not set
|
||||
# CONFIG_STM32_SPI2 is not set
|
||||
# CONFIG_STM32_SPI3 is not set
|
||||
# CONFIG_STM32_I2S3 is not set
|
||||
CONFIG_STM32_SYSCFG=y
|
||||
# CONFIG_STM32_TIM1 is not set
|
||||
# CONFIG_STM32_TIM2 is not set
|
||||
@@ -527,6 +528,7 @@ CONFIG_STM32_USART3_SERIALDRIVER=y
|
||||
#
|
||||
# USB Device Configuration
|
||||
#
|
||||
# CONFIG_ARCH_TOOLCHAIN_IAR is not set
|
||||
CONFIG_ARCH_TOOLCHAIN_GNU=y
|
||||
|
||||
#
|
||||
@@ -1075,7 +1077,6 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
#
|
||||
# CONFIG_C99_BOOL8 is not set
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
# CONFIG_CXX_NEWLONG is not set
|
||||
|
||||
#
|
||||
@@ -1305,6 +1306,7 @@ CONFIG_NSH_CONSOLE=y
|
||||
# Platform-specific Support
|
||||
#
|
||||
# CONFIG_PLATFORM_CONFIGDATA is not set
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
|
||||
#
|
||||
# System Libraries and NSH Add-Ons
|
||||
|
||||
@@ -255,7 +255,7 @@ static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_IEEE802154_NETDEV)
|
||||
#ifdef CONFIG_IEEE802154_NETDEV
|
||||
/* Use the IEEE802.15.4 MAC interface instance to create a 6loWPAN
|
||||
* network interface by wrapping the MAC intrface instance in a
|
||||
* network device driver via mac802154dev_register().
|
||||
@@ -268,7 +268,9 @@ static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv)
|
||||
0, ret);
|
||||
return ret;
|
||||
}
|
||||
#elif defined(CONFIG_IEEE802154_MAC_DEV)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IEEE802154_MAC_DEV
|
||||
/* If want to call these APIs from userspace, you have to wrap the MAC
|
||||
* interface in a character device viamac802154dev_register().
|
||||
*/
|
||||
|
||||
@@ -120,12 +120,11 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
CONFIG_ARCH_CHIP="stm32"
|
||||
# CONFIG_ARCH_TOOLCHAIN_IAR is not set
|
||||
# CONFIG_ARMV7M_USEBASEPRI is not set
|
||||
CONFIG_ARCH_HAVE_CMNVECTOR=y
|
||||
# CONFIG_ARMV7M_CMNVECTOR is not set
|
||||
@@ -394,6 +393,7 @@ CONFIG_STM32_HAVE_I2C2=y
|
||||
CONFIG_STM32_HAVE_I2C3=y
|
||||
CONFIG_STM32_HAVE_SPI2=y
|
||||
CONFIG_STM32_HAVE_SPI3=y
|
||||
CONFIG_STM32_HAVE_I2S3=y
|
||||
# CONFIG_STM32_HAVE_SPI4 is not set
|
||||
# CONFIG_STM32_HAVE_SPI5 is not set
|
||||
# CONFIG_STM32_HAVE_SPI6 is not set
|
||||
@@ -432,6 +432,7 @@ CONFIG_STM32_PWR=y
|
||||
# CONFIG_STM32_SPI1 is not set
|
||||
# CONFIG_STM32_SPI2 is not set
|
||||
# CONFIG_STM32_SPI3 is not set
|
||||
# CONFIG_STM32_I2S3 is not set
|
||||
CONFIG_STM32_SYSCFG=y
|
||||
# CONFIG_STM32_TIM1 is not set
|
||||
# CONFIG_STM32_TIM2 is not set
|
||||
@@ -527,6 +528,7 @@ CONFIG_STM32_USART3_SERIALDRIVER=y
|
||||
#
|
||||
# USB Device Configuration
|
||||
#
|
||||
# CONFIG_ARCH_TOOLCHAIN_IAR is not set
|
||||
CONFIG_ARCH_TOOLCHAIN_GNU=y
|
||||
|
||||
#
|
||||
@@ -1124,7 +1126,6 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
#
|
||||
# CONFIG_C99_BOOL8 is not set
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
# CONFIG_CXX_NEWLONG is not set
|
||||
|
||||
#
|
||||
@@ -1356,6 +1357,7 @@ CONFIG_NSH_ARCHINIT=y
|
||||
# Platform-specific Support
|
||||
#
|
||||
# CONFIG_PLATFORM_CONFIGDATA is not set
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
|
||||
#
|
||||
# System Libraries and NSH Add-Ons
|
||||
|
||||
@@ -125,7 +125,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -124,7 +124,7 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -124,7 +124,7 @@ CONFIG_ARCH_CORTEXM4=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -122,7 +122,7 @@ CONFIG_ARCH_ARM926EJS=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="arm"
|
||||
|
||||
@@ -125,7 +125,7 @@ CONFIG_ARCH_ARM926EJS=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="arm"
|
||||
|
||||
@@ -122,7 +122,7 @@ CONFIG_ARCH_ARM926EJS=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="arm"
|
||||
|
||||
@@ -122,7 +122,7 @@ CONFIG_ARCH_ARM926EJS=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="arm"
|
||||
|
||||
@@ -124,7 +124,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -124,7 +124,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -124,7 +124,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -122,7 +122,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -118,7 +118,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -122,7 +122,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
@@ -122,7 +122,7 @@ CONFIG_ARCH_CORTEXM3=y
|
||||
# CONFIG_ARCH_CORTEXR4 is not set
|
||||
# CONFIG_ARCH_CORTEXR4F is not set
|
||||
# CONFIG_ARCH_CORTEXR5 is not set
|
||||
# CONFIG_ARCH_CORTEX5F is not set
|
||||
# CONFIG_ARCH_CORTEXR5F is not set
|
||||
# CONFIG_ARCH_CORTEXR7 is not set
|
||||
# CONFIG_ARCH_CORTEXR7F is not set
|
||||
CONFIG_ARCH_FAMILY="armv7-m"
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user