diff --git a/arch/arm/src/stm32/stm32_tickless.c b/arch/arm/src/stm32/stm32_tickless.c
index d3d87d35edf..f4220d71a90 100644
--- a/arch/arm/src/stm32/stm32_tickless.c
+++ b/arch/arm/src/stm32/stm32_tickless.c
@@ -614,7 +614,16 @@ int up_timer_gettime(struct timespec *ts)
   int pending;
   irqstate_t flags;
 
-  DEBUGASSERT(g_tickless.tch && ts);
+  DEBUGASSERT(ts);
+
+  /* Timer not initialized yet, return zero */
+
+  if (g_tickless.tch == 0)
+    {
+      ts->tv_nsec = 0;
+      ts->tv_sec  = 0;
+      return OK;
+    }
 
   /* Temporarily disable the overflow counter.  NOTE that we have to be
    * careful here because  stm32_tc_getpending() will reset the pending
@@ -938,6 +947,7 @@ int up_timer_start(const struct timespec *ts)
   /* Set interval compare value. Rollover is fine,
    * channel will trigger on the next period.
    */
+
 #ifdef HAVE_32BIT_TICKLESS
   DEBUGASSERT(period <= UINT32_MAX);
   g_tickless.period = (uint32_t)(period + count);