diff --git a/arch/arm/src/kinetis/chip/kinetis_fmc.h b/arch/arm/src/kinetis/chip/kinetis_fmc.h index fb5bc188876..b3bfd18c0b1 100644 --- a/arch/arm/src/kinetis/chip/kinetis_fmc.h +++ b/arch/arm/src/kinetis/chip/kinetis_fmc.h @@ -1,7 +1,7 @@ /******************************************************************************************** * arch/arm/src/kinetis/chip/kinetis_fmc.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,16 +44,16 @@ #include "chip.h" -/* This file is just a wrapper around pin muxing header files for the Kinetis family selected - * by the logic in chip.h. +/* This file is just a wrapper around FMC header files for the Kinetis family selected by + * the logic in chip.h. */ #if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60) # include "chip/kinetis_k20k40k60fmc.h" #elif defined(KINETIS_K64) # include "chip/kinetis_k64fmc.h" -#elif defined(KINETIS_K66) -# include "chip/kinetis_k66fmc.h" +#elif defined(KINETIS_K28) || defined(KINETIS_K66) +# include "chip/kinetis_k28k66fmc.h" #else # error "No FMC definitions for this Kinetis part" #endif diff --git a/arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h b/arch/arm/src/kinetis/chip/kinetis_k28k64k66mpu.h similarity index 91% rename from arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h rename to arch/arm/src/kinetis/chip/kinetis_k28k64k66mpu.h index 5c9d22ccc63..0e500e84bb4 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h +++ b/arch/arm/src/kinetis/chip/kinetis_k28k64k66mpu.h @@ -1,7 +1,7 @@ /**************************************************************************************************** - * arch/arm/src/kinetis/chip/kinetis_k64k66mpu.h + * arch/arm/src/kinetis/chip/kinetis_k28k64k66mpu.h * - * Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2017-2018 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * David Sidrane * @@ -34,8 +34,8 @@ * ****************************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64K66MPU_H -#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64K66MPU_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K28K64K66MPU_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K28K64K66MPU_H /**************************************************************************************************** * Included Files @@ -51,7 +51,7 @@ /* Register Offsets *********************************************************************************/ -#define KINETIS_MPU_CESR_OFFSET 0x0000 /* Control/Error Status Register */ +#define KINETIS_MPU_CESR_OFFSET 0x0000 /* Control/Error Status Register */ #define KINETIS_MPU_EAR_OFFSET(n) (0x0010+((n)<<3)) /* Error Address Register, Slave Port n */ #define KINETIS_MPU_EDR_OFFSET(n) (0x0014+((n)<<3)) /* Error Detail Register, Slave Port n */ @@ -67,6 +67,13 @@ #define KINETIS_MPU_EAR4_OFFSET 0x0030 /* Error Address Register, Slave Port 4 */ #define KINETIS_MPU_EDR4_OFFSET 0x0034 /* Error Detail Register, Slave Port 4 */ +#if defined(KINETIS_K28) +# define KINETIS_MPU_EAR5_OFFSET 0x0038 /* Error Address Register, Slave Port 5 */ +# define KINETIS_MPU_EDR5_OFFSET 0x003c /* Error Detail Register, Slave Port 5 */ +# define KINETIS_MPU_EAR6_OFFSET 0x0040 /* Error Address Register, Slave Port 6 */ +# define KINETIS_MPU_EDR6_OFFSET 0x0044 /* Error Detail Register, Slave Port 6 */ +#endif + #define KINETIS_MPU_RGD_WORD_OFFSET(n,m) (x0400+((n)<<4)+((m)<< 2) /* Region Descriptor n, Word m */ #define KINETIS_MPU_RGD0_WORD0_OFFSET 0x0400 /* Region Descriptor 0, Word 0 */ @@ -151,6 +158,13 @@ #define KINETIS_MPU_EAR4 (KINETIS_MPU_BASE+KINETIS_MPU_EAR4_OFFSET) #define KINETIS_MPU_EDR4 (KINETIS_MPU_BASE+KINETIS_MPU_EDR4_OFFSET) +#if defined(KINETIS_K28) +# define KINETIS_MPU_EAR5 (KINETIS_MPU_BASE+KINETIS_MPU_EAR5_OFFSET) +# define KINETIS_MPU_EDR5 (KINETIS_MPU_BASE+KINETIS_MPU_EDR5_OFFSET) +# define KINETIS_MPU_EAR6 (KINETIS_MPU_BASE+KINETIS_MPU_EAR6_OFFSET) +# define KINETIS_MPU_EDR7 (KINETIS_MPU_BASE+KINETIS_MPU_EDR6_OFFSET) +#endif + #define KINETIS_MPU_RGD_WORD(n,m) (KINETIS_MPU_BASE+KINETIS_MPU_RGD_WORD_OFFSET(n,m)) #define KINETIS_MPU_RGD0_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD0_OFFSET) @@ -255,7 +269,10 @@ # define MPU_EDR_EATTR_SUPDATA (3 << MPU_EDR_EATTR_SHIFT) /* Supervisor mode, data access */ #define MPU_EDR_EMN_SHIFT (4) /* Bits 4-7: Error master number */ #define MPU_EDR_EMN_MASK (15 << MPU_EDR_EMN_SHIFT) - /* Bits 8-15: Reserved */ +#if defined(KINETIS_K28) +# define MPU_EDR_EPID_SHIFT (8) /* Bits 8-15: Error Process Identification */ +# define MPU_EDR_EPID_MASK (0xff << MPU_EDR_EPID_SHIFT) +#endif #define MPU_EDR_EACD_SHIFT (26) /* Bits 16-31: Error access control detail */ #define MPU_EDR_EACD_MASK (0xffff << MPU_EDR_EACD_SHIFT) @@ -312,29 +329,44 @@ /* Region Descriptor n, Word 3 */ #define MPU_RGD_WORD3_VLD (1 << 0) /* Bit 0: Valid */ - /* Bits 1-31: Reserved */ + /* Bits 1-15: Reserved */ +#if defined(KINETIS_K28) +# define MPU_EDR_PIDMASK_SHIFT (16) /* Bits 16-23: Process Identifier Mask */ +# define MPU_EDR_PIDMASK_MASK (0xff << MPU_EDR_EPID_SHIFT) +# define MPU_EDR_PID_SHIFT (24) /* Bits 24-31: Process Identifier */ +# define MPU_EDR_PID_MASK (0xff << MPU_EDR_EPID_SHIFT) +#endif + /* Region Descriptor Alternate Access Control n */ #define MPU_RGD_RBDACC_M0UM_SHIFT (0) /* Bits 0-2: Bus master 0 user mode access control */ #define MPU_RGD_RBDACC_M0UM_MASK (7 << MPU_RGD_RBDACC_M0UM_SHIFT) #define MPU_RGD_RBDACC_M0SM_SHIFT (3) /* Bits 3-4: Bus master 0 supervisor mode access control */ #define MPU_RGD_RBDACC_M0SM_MASK (3 << MPU_RGD_RBDACC_M0SM_SHIFT) - /* Bit 5: Reserved */ +#if defined(KINETIS_K28) +# define MPU_RGD_RBDACC_M0PE (1 << 5) /* Bit 5: Bus Master 0 Process Identifier Enable */ +#endif #define MPU_RGD_RBDACC_M1UM_SHIFT (6) /* Bits 6-8: Bus master 1 user mode access control */ #define MPU_RGD_RBDACC_M1UM_MASK (7 << MPU_RGD_RBDACC_M1UM_SHIFT) #define MPU_RGD_RBDACC_M1SM_SHIFT (9) /* Bits 9-10: Bus master 1 supervisor mode access control */ #define MPU_RGD_RBDACC_M1SM_MASK (3 << MPU_RGD_RBDACC_M1SM_SHIFT) - /* Bit 11: Reserved */ +#if defined(KINETIS_K28) +# define MPU_RGD_RBDACC_M1PE (1 << 11) /* Bit 11: Bus Master 1 Process Identifier Enable */ +#endif #define MPU_RGD_RBDACC_M2UM_SHIFT (12) /* Bits 12-14: Bus master 2 user mode access control */ #define MPU_RGD_RBDACC_M2UM_MASK (7 << MPU_RGD_RBDACC_M2UM_SHIFT) #define MPU_RGD_RBDACC_M2SM_SHIFT (15) /* Bits 15-16: Bus master 2 supervisor mode access control */ #define MPU_RGD_RBDACC_M2SM_MASK (3 << MPU_RGD_RBDACC_M2SM_SHIFT) - /* Bit 17: Reserved */ +#if defined(KINETIS_K28) +# define MPU_RGD_RBDACC_M2PE (1 << 17) /* Bit 17: Bus Master 2 Process Identifier Enable */ +#endif #define MPU_RGD_RBDACC_M3UM_SHIFT (18) /* Bits 18-20: Bus master 3 user mode access control */ #define MPU_RGD_RBDACC_M3UM_MASK (7 << MPU_RGD_RBDACC_M3UM_SHIFT) #define MPU_RGD_RBDACC_M3SM_SHIFT (21) /* Bits 21-22: Bus master 3 supervisor mode access control */ #define MPU_RGD_RBDACC_M3SM_MASK (3 << MPU_RGD_RBDACC_M3SM_SHIFT) - /* Bit 23: Reserved */ +#if defined(KINETIS_K28) +# define MPU_RGD_RBDACC_M3PE (1 << 23) /* Bit 23: Bus Master 3 Process Identifier Enable */ +#endif #define MPU_RGD_RBDACC_M4WE (1 << 24) /* Bit 24: Bus master 4 write enable */ #define MPU_RGD_RBDACC_M4RE (1 << 25) /* Bit 25: Bus master 4 read enable */ #define MPU_RGD_RBDACC_M5WE (1 << 26) /* Bit 26: Bus master 5 write enable */ @@ -356,4 +388,4 @@ * Public Functions ****************************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64K66MPU_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K28K64K66MPU_H */ diff --git a/arch/arm/src/kinetis/chip/kinetis_k66fmc.h b/arch/arm/src/kinetis/chip/kinetis_k28k66fmc.h similarity index 98% rename from arch/arm/src/kinetis/chip/kinetis_k66fmc.h rename to arch/arm/src/kinetis/chip/kinetis_k28k66fmc.h index 4140902f393..5f95bf99c1a 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k66fmc.h +++ b/arch/arm/src/kinetis/chip/kinetis_k28k66fmc.h @@ -1,7 +1,7 @@ /************************************************************************************ - * arch/arm/src/kinetis/kinetis_k66fmc.h + * arch/arm/src/kinetis/kinetis_k28k66fmc.h * - * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. + * Copyright (C) 2016-2018 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * David Sidrane * @@ -34,8 +34,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66FMC_H -#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66FMC_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K28K66FMC_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K28K66FMC_H /************************************************************************************ * Included Files @@ -306,7 +306,7 @@ # define FMC_PFB01CR_CRC_ALL (0 << FMC_PFB01CR_CRC_SHIFT) /* LRU all four ways */ # define FMC_PFB01CR_CRC_I01D23 (2 << FMC_PFB01CR_CRC_SHIFT) /* LRU ifetches 0-1 data 2-3 */ # define FMC_PFB01CR_CRC_I012D3 (3 << FMC_PFB01CR_CRC_SHIFT) /* LRU ifetches 0-3 data 3 */ - /* Bits 8-16: Reserved */ + /* Bits 8-16: Reserved */ #define FMC_PFB01CR_B0MW_SHIFT (17) /* Bits 17-18: Bank 0 Memory Width */ #define FMC_PFB01CR_B0MW_MASK (3 << FMC_PFB01CR_B0MW_SHIFT) # define FMC_PFB01CR_B0MW_32BITS (0 << FMC_PFB01CR_B0MW_SHIFT) /* 32 bits */ @@ -361,4 +361,4 @@ * Public Functions ************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K66FMC_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K28K66FMC_H */ diff --git a/arch/arm/src/kinetis/chip/kinetis_mpu.h b/arch/arm/src/kinetis/chip/kinetis_mpu.h index 50a4593238e..9aa4b097c45 100644 --- a/arch/arm/src/kinetis/chip/kinetis_mpu.h +++ b/arch/arm/src/kinetis/chip/kinetis_mpu.h @@ -1,7 +1,7 @@ /******************************************************************************************** * arch/arm/src/kinetis/chip/kinetis_mpu.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,14 +44,14 @@ #include "chip.h" -/* This file is just a wrapper around pin muxing header files for the Kinetis family selected - * by the logic in chip.h. +/* This file is just a wrapper around MPU header files for the Kinetis family selected by the + * in chip.h. */ #if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60) # include "chip/kinetis_k20k40k60mpu.h" -#elif defined(KINETIS_K64) || defined(KINETIS_K66) -# include "chip/kinetis_k64k66mpu.h" +#elif defined(KINETIS_K28) || defined(KINETIS_K64) || defined(KINETIS_K66) +# include "chip/kinetis_k28k64k66mpu.h" #else # error "No MPU definitions for this Kinetis part" #endif