diff --git a/arch/arm/src/stm32/chip/stm32_can.h b/arch/arm/src/stm32/chip/stm32_can.h
index 6b4a12a855e..c1e3500d5e6 100644
--- a/arch/arm/src/stm32/chip/stm32_can.h
+++ b/arch/arm/src/stm32/chip/stm32_can.h
@@ -360,7 +360,7 @@
 #define CAN_BTR_SJW_SHIFT         (24)      /* Bits 25-24: Resynchronization Jump Width */
 #define CAN_BTR_SJW_MASK          (3 << CAN_BTR_SJW_SHIFT)
 #define CAN_BTR_LBKM              (1 << 30) /* Bit 30: Loop Back Mode (Debug) */
-#define CAN_BTR_SILM              (1 << 31) /* Bit 31: Silent Mode (Debug) */
+#define CAN_BTR_SILM              (1ul << 31) /* Bit 31: Silent Mode (Debug) */
 
 #define CAN_BTR_BRP_MAX           (1024)    /* Maximum BTR value (without decrement) */
 #define CAN_BTR_TSEG1_MAX         (16)      /* Maximum TSEG1 value (without decrement) */
diff --git a/arch/arm/src/stm32l4/chip/stm32l4_can.h b/arch/arm/src/stm32l4/chip/stm32l4_can.h
index 75c48cfeb8a..0e4876d3396 100644
--- a/arch/arm/src/stm32l4/chip/stm32l4_can.h
+++ b/arch/arm/src/stm32l4/chip/stm32l4_can.h
@@ -302,7 +302,7 @@
 #define CAN_BTR_SJW_SHIFT         (24)      /* Bits 25-24: Resynchronization Jump Width */
 #define CAN_BTR_SJW_MASK          (3 << CAN_BTR_SJW_SHIFT)
 #define CAN_BTR_LBKM              (1 << 30) /* Bit 30: Loop Back Mode (Debug) */
-#define CAN_BTR_SILM              (1 << 31) /* Bit 31: Silent Mode (Debug) */
+#define CAN_BTR_SILM              (1ul << 31) /* Bit 31: Silent Mode (Debug) */
 
 #define CAN_BTR_BRP_MAX           (1024)    /* Maximum BTR value (without decrement) */
 #define CAN_BTR_TSEG1_MAX         (16)      /* Maximum TSEG1 value (without decrement) */