diff --git a/ChangeLog b/ChangeLog index 8f3cefa8ffc..7b20e8cc1ba 100755 --- a/ChangeLog +++ b/ChangeLog @@ -11878,7 +11878,7 @@ * arch/arm/src/samv7: Fix missing unlock of device in MCAN mcan_txempty(). From Frank Benkert (2016-06-01). -7.17 2016-xx-xx Gregory Nutt +7.17 2016-07-25 Gregory Nutt * drivers/mtd/flash_eraseall.c: Removed. This is no longer used in the OS and is simply a wrapper around the MDIOC_BULKERASE @@ -11917,27 +11917,16 @@ * arch/arm/src/stm32: Add support for the STM32F105R. From Konstantin Berezenko (2016-06-06). * include/signal.h: Change type of SIG_ERR, SIG_IGN, ... to - _sa_handler_t. They type void does not work with the IAR toolchain. + _sa_handler_t. The type void does not work with the IAR toolchain. From Aleksandr Vyhovanec (2016-06-07). - * arch/arm/src/stm32f7 and include/stm32f7: Added STM32FF76xxx and - STM32FF7xx families. From David Sidrane (2016-06-08). - * Refactoring configs/nucleo-144 sub-directories to support additional - nucleo-144 board. Add support for the Nucleo-F767ZI board. From David - Sidrane (2016-06-08). - * arch/arm/src/kinetis: Add a USB device controller driver for kinetis. - Derived from pic32mx usb driver, which uses the same usb controller. - From kfazz (2016-06-06). - * configs/teensy-3.x: Add USB device support and usbnsh configuration. - From kfazz (2016-06-06. - * arch/arm/src/stm32: Add STM32F105R support. From Konstantin Berezenko - (2016-06-06). - * include/signal.h: Change type of SIG_IGN and related defines to - _sa_handler_t. From Aleksandr Vyhovanec (2016-06-07). * configs/nucleo-144: Refactored configs/nucleo-144 sub-directories to support additional nucleo-144 board. Add support for the Nucleo-F767ZI board. From David Sidrane (2016-06-07). - * arch/arm/src/stm32f7: Add support for STM32FF76xxx and STM32FF7xx - families. From David Sidrane (2016-06-08). + * arch/arm/src/stm32f7 and include/stm32f7: Added STM32F76xxx and + STM32F77xx families. From David Sidrane (2016-06-08). + * Refactoring configs/nucleo-144 sub-directories to support additional + nucleo-144 board. Add support for the Nucleo-F767ZI board. From David + Sidrane (2016-06-08). * include/assert.h: Check if NDEBUG is defined. From Paul Alexander Patience (2016-06-08). * arch/arm/src/stm32: Fix STM32 DMA code and configuration for STM32F37X @@ -11958,25 +11947,10 @@ and the full packet length, need to subtract the size of the link layer header before making the comparison or we will get false positives (i.e., the packet is really too small) (2016-06-09) - * drivers/mtd: Added driver of IS25xP SPI flash devices. Based on - sst25xx driver. From Marten Svanfeldt (2016-06-09). - * arch/arm/src/kinetis: Teensy clock fixes. The High Gain bit in - MCG_C1 was preventing teensy from booting except after a programming - session. The second change doesn't appear to change any functionality, - but complies with restrictions in the k20 family reference manual on - FEI -> FBE clock transiions. From kfazz (2016-06-09). - * arch/arm/src/stm32: Fix timer input clock definitions. From David - Sidrane (2016-06-09). * configs/: All configurations that have both CONFIG_NSH_LIBRARY=y and CONFIG_NET=y must now also have CONFIG_NSH_NETINIT=y (2016-06-09). * arch/arm/src/kinetis: Kinetis pwm support, based on kl_pwm driver. From kfazz (2016-06-09). - * net/: In both IPv6 and IPv4 incoming logic: (1) Should check if the - packet size is large enough before trying to access the packet length - in the IP header. (2) In the comparison between the IP length and the - full packet length, need to subtract the size of the link layer header - before making the comparison or we will get false positives (i.e., the - packet is really too small) (2016-06-09). * arch/srm/src/stm32: Fix compilation errors in debug mode of stm32_pwm.c. From Konstantin Berezenko (2016-06-09). * arch/arm/src/kinetis: Support up to 8 channels per timer. From kfazz @@ -11991,7 +11965,7 @@ chips. From Konstantin Berezenko (2016-06-10). * drivers/include/input: Button upper half driver: Add definitions needed for compilation with the poll() interface is not disabled - (2016-06-11). + (2016-06-11). * Kconfig/, include/debug.h, and many other files: (1) Debug features are now enabled separately from debug output. CONFIG_DEBUG is gone. It is replaced with CONFIG_DEBUG_FEATURES. (2) The macros dbg() and @@ -12033,7 +12007,7 @@ control the delay between the assertion of the ChipSelect and the first bit, between the last bit and the de-assertion of the ChipSelect and between two ChipSelects. This is needed to tune the - transfer according the specification of the connected devices. + transfer according the specification of the connected devices. - Add three "hw-features" for the SAMV7, which controls the behavior of the ChipSelect: - force CS inactive after transfer: this forces a (short) @@ -12136,7 +12110,7 @@ refresh (via tools/refresh.sh). I assume that it is a hand-edited configuration and, hence, must be removed from the repository (2016-06-23). - * arch/arm/arc/sam34: DAC bugfix: DACC_WPMR_WPKEY_MASK -> DACC_WPMR_WPKEY. + * arch/arm/arc/sam34: DAC bugfix: DACC_WPMR_WPKEY_MASK -> DACC_WPMR_WPKEY. Timer bugfix: Fix ops check in TCIOC_STOP. From Wolfgang Reissnegge (2016-06-23). * configs/nucleo-144: Added SDMMC support to Nucleo-144. From David @@ -12212,7 +12186,7 @@ style symbolic links. The fix here is to also execute the clean_context AFTER executing menuconfig. A lot more happens now: It used to be that doing 'make - menuconfig' only did the menuconfig operation. No it does context, + menuconfig' only did the menuconfig operation. Now it does context, pre_config, menuconfig, clean_context. Not nearly as snappy as it used to be (2016-06-28). * arch/arm/src/efm32, lcp43, stm32, stm32l4: disable interrupts with @@ -12375,3 +12349,141 @@ adds DEBUGASSERT for invalid geometry and additional memory debug logic. Also fixes the dangling pointer on error bug. From Ken Pettit (2016-07-14). + * arch/arm/src/lpc32xx: Extend LPC43xx EMC code to support SDRAM on a + dynamic memory interface. From Vytautas Lukenskas (2016-07-19). + * arch/sim/src: Add the simulated QSPI (N25Q) flash to the simulation + and modify sim up_spiflash.c to enable it to run with different MTD + drivers based on config options (currently m25p, sst26 and w25). + From Ken Pettit (2016-07-19). + * drivers/pipe: Add support to allocating different sizes for pipe and + fifo buffers. Adds mkfifo2() and pipe2() which are just like mkfifo() + and pipe(), but allow control of the size of the underlying, in-memory + circular buffer . Move pipe() and mkpipe() to nuttx/libc, they are no + longer core OS interfaces. Capability currenty used only by PTY logic + to support, configurable, smaller buffers for PTYs (2016-07-19). + * include/nuttx/drivers: Move driver-related files from include/nuttx + to include/nuttx/drivers. Move driver related prototypes out of + include/nuttx/fs/fs.h and into new include/drivers/drivers.h + (2016-07-20). + * include /nuttx/lib: Move library-related files from include/nuttx to + include/nuttx/lib (2016-07-21). + * drivers/serial/serial.c: Fix a race condition noted by Stefan Kolb. + Between the test if the TX buffer is full and entering a critical + section, bytes may be removed from the TX buffer making the wait + unnecessary. The unnecessary wait is an inefficiency, but not really + a problem. But with USB CDC/ACM it can be a problem because the + entire TX buffer may be emptied when we lose the race. If that + happens that uart_putxmitchar() can hang waiting for data to be + removed from an empty TX buffer (2016-07-22). + * arch/arm/src/stm32 and stm32l4: STM32 F4/L4 RTC ALARM: were enabling + interrupts too early in the power-up sequence, BEFORE the interrupt + system was being initialized (2016-07-23). + * drivers/ioexpander: GPIO driver: Add support for receiving signals + from interrupt pins (2016-07-23). + * drivers/usbdev: USBMSC: Add locks when removing request from queue. + From Wolfgang Reissnegger (2016-07-23). + * drivers/usbdev: USBMSC: Fix reversed logic on waiting for SCSI thread + start. The scsi thread was waiting for the wrong condition. However, + this was masked by the fact that the code creating the scsi thread was + also holding usbmsc_scsi_lock(priv) while initializing data, hence + this lock synchronized the scsi thread start with init completion. + From Wolfgang Reissnegger (2016-07-23). + * arch/arm/src/sam34: SAM3/4 UDP: Fix handling of endpoint RX FIFO + banks. This fixes a race condition where the HW fills a FIFO bank + while the SW is busy, resulting in out of sequence USB packets + (2016-07-23). + * Freedom-K64F: Add PWM support. From Jordan MacIntyre (2016-07-25). + + +7.18 2016-xx-xx Gregory Nutt + + * drivers/serial/pty.c, serial.c, usbdev/cdcacm.c, include/nuttx/fs/ioctl.h: + Fix FIONWRITE and add FIONSPACE. All implementations of FIONWRITE + were wrong. FIONWRITE should return the number of bytes waiting in + the outgoing send queue, not the free space. Rather, FIONSPACE should + return the free space in the send queue (2016-07-25). + * lib_dumpbuffer: Now prints a large on-stack buffer first to avoid + problems when the syslog output is prefixed with time. From Pierre- + noel Bouteville (2016-07-27). + * sched/clock and sched/sched: Add standard adjtime() interface and + basic timekeeping support. Normally used with an NTP client to keep + system time in synchronizationi. From Max Neklyudov (Merged on + 20160-07-28). + * arch/arm/src/stm32: Add timekeeping support for the STM32 tickless + mode. From Max Neklyudov (Merged on 20160-07-28). + * Top-Level Makefiles. Fix a chicken-and-egg problem. In the menuconfig + target, the context dependency was executed before kconfig-mconf. + That was necessary because the link at apps/platform/board needed to + be set up before creating the apps/Kconfig file. Otherwise, the + platform Kconfig files would not be included. But this introduces + the chicken-and-egg problem in some configurations. + In particular: (1) An NX graphics configuration is used that requires + auto-generation of source files using cpp, (2) the configuration is + set for Linux, but (3) we are running under Cygwin with (4) a Windows + native toolchain. In this case, POSIX-style symbolic links are set + up but the Windows native toolchain cannot follow them. + The reason we are running 'make menuconfig' is to change from Linux + to Cygwin, but the target fails. During the context phase, NX runs + CPP to generate source files but that fails because the Windows native + toolchain cannot follow the links. Checkmate. + This was fixed by changing all of the make menuconfig (and related) + targets. They no longer depend on context being run. Instead, they + depend only on the dirlinks target. The dirlinks target only sets + up the directory links but does not try to run all of the context + setup; the compiler is never invoked; no code is autogeneraed; and + things work (2016-07-28). + * tools/refresh.sh: Recent complexities added to apps/ means that + configuration needs correct Make.defs file in place in order to + configure properly (2016-07-28). + * tools/kconfig2html.c: Update to handle absolute paths when sourcing + Kconfig files (2016-07-29). + * libc/math: This fixes the following libc/math issues: (1) asin[f l]() + use Newton’s method to converge on a solution. But Newton’s method + converges very slowly (> 500,000 iterations) for values of x close + to 1.0; and, in the case of asinl(), sometimes fails to converge + (loops forever). The attached patch uses an trig identity for + values of x > sqrt(2). The resultant functions converge in no more + than 5 iterations, 6 for asinl(). (2) The NuttX erf[f l]() functions + are based on Chebyshev fitting to a good guess. The problem there’s a + bug in the implementation that causes the functions to blow up with x + near -3.0. This patch fixes that problem. It should be noted that + this method returns the error function erf(x) with fractional error + less than 1.2E-07 and that’s fine for the float version erff(), but + the same method is used for double and long double version which + will yield only slightly better precision. This patch doesn't address + the issue of lower precision for erf() and erfl(). (3) a faster + version of copysignf() for floats is included. From David S. Alessio + (2016-07-30). + * I/O Expander: Remove hard-coded PCA9555 fields from ioexpander.h + definitons. Add support for an attach() method that may be used when + any subset of pin interrupts occur (2016-07-31). + * PCA9555 Driver: Replace the signalling logic with a simple callback + using the new definitons of ioexpander.h. This repartitioning of + functionality is necessary because (1) the I/O expander driver is the + lower-lower part of any driver that uses GPIOs (include the GPIO + driver itself) and should not be interacting directly with the much + higher level application layer. And (2) in order to be compatible + with the GPIO driver (and any arbitrary upper half driver), the + PCA9555 should not directly signal, but should call back into the + upper half. The upper half driver that interacts directly with the + application is the appropriate place to be generating signal + (2016-07-31). + * drivers/ioexpander/skeleton.c: Add a skeleton I/O Expander driver + (based on the PCA9555 driver) (2016-07-31). + * I/O Expander Interface: Encode and extend I/O expander options to + include interrupt configuration (2016-07-31). + * drivers/ioexpander: Add an (untested) TCA64XX I/O Expander driver + leveraged from Project Ara (2016-07-31). + * I/O Expander Interface: Add argument to interrupt callback. Add a + method to detach the interrupt (2016-08-01). + * drivers/ioexpander: Add a GPIO lower-half driver that can be used to + register a GPIO character driver for accessing pins on an I/O expander + (2016-08-01). + * drivers/ioexpander: Add PCF8574 I/O Expander driver. Some cleanup + also of other expander drivers (2016-08-01). + * drivers/ioexpander: GPIO driver: Add IOCTLs to get the pin type and + to unregister a signal handler (2016-08-01). + * configs/sim: Add simulator-based test support for apps/examples/gpio + 2016-08-01). + * drivers/sensors: Add KXJT9 Accelerometer driver from the Motorola + Moto Z MDK (2016-08-02). diff --git a/Documentation/NuttShell.html b/Documentation/NuttShell.html index 90e0764a791..1d284dbea7a 100644 --- a/Documentation/NuttShell.html +++ b/Documentation/NuttShell.html @@ -8,7 +8,7 @@

NuttShell (NSH)

-

Last Updated: February 8, 2016

+

Last Updated: August 4, 2016

@@ -3277,7 +3277,7 @@ nsh> mkfifo - CONFIG_NFILE_DESCRIPTORS > 0 + CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_PIPES && CONFIG_DEV_FIFO_SIZE > 0 CONFIG_NSH_DISABLE_MKFIFO diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html index 83c42c61cfd..700876be653 100644 --- a/Documentation/NuttX.html +++ b/Documentation/NuttX.html @@ -8,7 +8,7 @@

NuttX RTOS

-

Last Updated: June 1, 2016

+

Last Updated: July 25, 2016

@@ -389,9 +389,10 @@

-

  • Inheritable "controlling terminals" and I/O re-direction.
    • +
  • Inheritable "controlling terminals" and I/O re-direction. Pseudo-terminals

    • +
    @@ -1003,7 +1004,7 @@

    -

  • USB device controller drivers available for the PIC32, Atmel AVR, SAM3, SAM4, and SAMA5Dx, NXP LPC17xx, LPC214x, LPC313x, and LPC43xx, Silicon Laboraties EFM32, STMicro STM32 F1, F2, F3, and F4, and TI DM320.
    • +
  • USB device controller drivers available for the PIC32, Atmel AVR, SAM3, SAM4, SAMv7, and SAMA5Dx, NXP/Freescale LPC17xx, LPC214x, LPC313x, LPC43xx, and Kinetis, Silicon Laboraties EFM32, STMicro STM32 F1, F2, F3, F4, and F7, and TI DM320.

    • @@ -1340,11 +1341,11 @@

    Released Versions

    In addition to the ever-changing GIT repository, there are frozen released versions of NuttX available. - The current release is NuttX 7.16. - NuttX 7.16 is the 116th release of NuttX. + The current release is NuttX 7.17. + NuttX 7.17 is the 117th release of NuttX. It was released on June 1, 2016, and is available for download from the Bitbucket.org website. - Note that the release consists of two tarballs: nuttx-7.16.tar.gz and apps-7.16.tar.gz. + Note that the release consists of two tarballs: nuttx-7.17.tar.gz and apps-7.17.tar.gz. Both may be needed (see the top-level nuttx/README.txt file for build information).

    @@ -1353,7 +1354,7 @@
  • Texas Instruments (some formerly Luminary)
      @@ -1659,7 +1663,7 @@

      STATUS: Does not support interrupts but is otherwise fully functional. - Refer to the NuttX README file for further information. + Refer to the NuttX README file for further information.

    @@ -1684,7 +1688,7 @@

    STATUS: This port is complete, verified, and included in the initial NuttX release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -1709,7 +1713,7 @@ This port was contributed by Denis Carilki and includes the work of Denis Carikli, Alan Carvalho de Assis, and Stefan Richter. Calypso support first appeared in NuttX-6.17 with LCD drivers. Support for the Calypso keyboard was added in NuttX-6.24 by Denis Carilki. - Refer to the NuttX board README files for the Compal E88, Compal E99 and Pirelli DP-L10 phones for further information. + Refer to the NuttX board README files for the Compal E88, Compal E99 and Pirelli DP-L10 phones for further information.

    @@ -1736,7 +1740,7 @@ timer interrupts, serial console, USB driver, and SPI-based MMC/SD card support. A verified NuttShell (NSH) configuration is also available. - Refer to the NuttX board README files for the mcu123.com and for the ZPA213X/4XPA boards for further information. + Refer to the NuttX board README files for the mcu123.com and for the ZPA213X/4XPA boards for further information.

    Development Environments: @@ -1771,7 +1775,7 @@ The port is complete and verified. As of NuttX 5.3, the port included only basic timer interrupts and serial console support. In NuttX 7.1, Lizhuoyi contributed additional I2C and SPI drivers. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Development Environments: (Same as for the NXP LPC214x). @@ -1804,7 +1808,7 @@ SD cards). An SPI-based ENC28J60 Ethernet driver for add-on hardware is available and but has not been fully verified on the Olimex board (due to issues powering the ENC28J60 add-on board). - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Development Environments: @@ -1836,7 +1840,7 @@ STATUS: This port has stalled due to development tool issues. Coding is complete on the basic port (timer, serial console, SPI). - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -1865,7 +1869,7 @@ The basic port (timer interrupts, serial ports, network, framebuffer, etc.) is complete. All implemented features have been verified with the exception of the USB device-side driver; that implementation is complete but untested. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -1901,7 +1905,7 @@ However, as of this writing, I have not had the opportunity to verify this new feature.

    - Refer to the Embedded Artists EA3131 board README file for further information. + Refer to the Embedded Artists EA3131 board README file for further information.

    • @@ -1917,7 +1921,7 @@ NOTE: That driver should work on the EA3131 as well. However, the EA3131 uses a PCA9532 PWM part to controller the port power so the it would not quite be a simple drop-in.

    - Refer to the Olimex LPC-H3131 board README file for further information. + Refer to the Olimex LPC-H3131 board README file for further information.

    @@ -1945,7 +1949,7 @@ At this point, verification of the EA3152 port has been overcome by events and may never happen. However, the port is available for anyone who may want to use it. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2137,7 +2141,7 @@ NuttX-7.4 added support for the on-board WM8904 CODEC chip and for Tickless operation.

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -2158,7 +2162,7 @@ The SAMA5D3 Xplained board does not have NOR FLASH and, as a consequence NuttX must boot into SDRAM with the help of U-Boot.

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -2189,7 +2193,7 @@ The TM7000 LCDC with the maXTouch multi-touch controller are also fully support in a special NxWM configuration for that larger display. Support for a graphics media player is included (although there were issues with the WM8904 audio CODEC on my board). An SRAM bootloader was also included. - Refer to the NuttX board README file for current status. + Refer to the NuttX board README file for current status.

    @@ -2232,7 +2236,7 @@ This port was developed on the v1 board, but the others may be compatible:

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    STATUS. @@ -2264,7 +2268,7 @@

    Sabre-6Quad. This is a port to the NXP/Freescale Sabre-6Quad board. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    STATUS: @@ -2274,7 +2278,7 @@

    Basic support of NuttX running in SMP mode on the i.MX6Q was also accomplished in NuttX-7.16. - However, there are still known issues with SMP support on this platform as described in the README file for the board. + However, there are still known issues with SMP support on this platform as described in the README file for the board.

    @@ -2298,13 +2302,13 @@

    STATUS. This is currently in progress but the effort is stalled due to tool-related issues. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Toolchain: The TMS570 is a big-endian ARM platform and requires a big-endian ARM toolchain. All testing has been performed using a big-endian NuttX buildroot toolchain. - Instructions for building this toolchain are included in the board README file. + Instructions for building this toolchain are included in the board README file.

    @@ -2329,7 +2333,7 @@ This initial support is very minimal: There is a NuttShell (NSH) configuration that might be the basis for an application development. As of this writing, more device drivers are needed to make this a more complete port. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Memory Usage. @@ -2393,7 +2397,7 @@ nsh> As of NuttX-6.28 more device driver development would be needed to make this a complete port, particularly to support USB OTG. A TSI and a SPI driver were added in NuttX-6.29. Alan contributed a PWM driver in NuttX-6.32. - Refer to the Freedom KL25Z board README file for further information. + Refer to the Freedom KL25Z board README file for further information.

    @@ -2407,7 +2411,7 @@ nsh> STATUS. This is the work of Michael Hope. Verified, initial support for the Teensy-LC first appeared in NuttX-7.10. - Refer to the Teensy-LC board README file for further information. + Refer to the Teensy-LC board README file for further information.

    @@ -2431,7 +2435,7 @@ nsh> This work was contributed in NuttX 7.8 by Derek B. Noonburg. The board support is very similar to the Freedom-KL25Z. It was decided to support this a a separate board, however, due to some small board-level differences. - Refer to the Freedom KL26Z board README file for further information. + Refer to the Freedom KL26Z board README file for further information.

    @@ -2454,7 +2458,7 @@ nsh> The initial SAMD20 Xplained Pro release (NuttX 7.1) included a functional NuttShell (NSH) configuration. An SPI driver was also included to support the OLED1 and I/O1 modules. That SPI driver, however, was not completed verified due to higher priority tasks that came up (I hope to get back to this later). - Refer to the SAMD20 Explained Pro board README file for further information. + Refer to the SAMD20 Explained Pro board README file for further information.

    @@ -2478,7 +2482,7 @@ nsh> Initial support for the SAML21 Xplained Pro was release in the NuttX 7.10. This initial support included a basic configuration for the NuttShell (NSH) (see the NSH User Guide). - Refer to the SAML21 Explained Pro board README file for further information. + Refer to the SAML21 Explained Pro board README file for further information.

    @@ -2500,7 +2504,7 @@ nsh>

    STATUS: The first released version was provided in NuttX 7.10. - Refer to the board README.txt file for further information. + Refer to the board README.txt file for further information.

    @@ -2541,7 +2545,7 @@ nsh>

    STATUS: This port was was released in NuttX 6.14. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2565,7 +2569,7 @@ nsh> The current port includes timer, serial console, Ethernet, SSI, and microSD support. There are working configurations to run the NuttShell (NSH), the NuttX networking test, and the uIP web server. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2605,7 +2609,7 @@ nsh> NOTE: As it is configured now, you MUST have a network connected. Otherwise, the NSH prompt will not come up because the Ethernet driver is waiting for the network to come up. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2631,7 +2635,7 @@ nsh> STATUS: This port was released in NuttX 5.10. Features are the same as with the Eagle-100 LM3S6918 described above. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2648,7 +2652,7 @@ nsh> Header file support was contributed by Tiago Maluta for this part. Jose Pablo Rojas V. is used those header file changes to port NuttX to the TI/Stellaris EKK-LM3S9B96. That port was available in the NuttX-6.20 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2691,7 +2695,7 @@ nsh> DMA and USART-based SPI supported are included, but not fully tested.

    - Refer to the EFM32 Gecko Starter Kit README.txt file for further information. + Refer to the EFM32 Gecko Starter Kit README.txt file for further information.

  • @@ -2715,7 +2719,7 @@ nsh> The board suppport is complete but untested because of tool-related issues. An OpenOCD compatible, SWD debugger would be required to make further progress in testing.

    - Refer to the Olimex EFM32G880F120-STK README.txt for further information. + Refer to the Olimex EFM32G880F120-STK README.txt for further information.

    • @@ -2810,7 +2814,7 @@ nsh> This initial support includes a configuration using the NuttShell (NSH) that might be the basis for an application development. A driver for the on-board segment LCD is included as well as an option to drive the segment LCD from an NSH "built-in" command. As of this writing, a few more things are needed to make this a more complete port: 1) Verfication of more device drivers (timers, quadrature encoders, PWM, etc.), and 2) logic that actually uses the low-power consumption modes of the EnergyLite part. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Memory Usage. @@ -2877,7 +2881,7 @@ nsh> STM32VL-Discovery. In NuttX-6.33, support for the STMicro STM32VL-Discovery board was contributed by Alan Carvalho de Assis. The STM32VL-Discovery board features an STM32F100RB MCU. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2933,7 +2937,7 @@ nsh>
      The basic STM32F103C8 port was released in NuttX version 6.28. This work was contributed by Laurent Latil. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -2958,21 +2962,21 @@ nsh> STM3210E-EVAL. A port for the STMicro STM3210E-EVAL development board that features the STM32F103ZET6 MCU. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • HY-Mini STM32v board. This board is based on the STM32F103VCT chip. Port contributed by Laurent Latil. - Refer to the NuttX board README file. + Refer to the NuttX board README file.

  • The M3 Wildfire development board (STM32F103VET6), version 2. See http://firestm32.taobao.com (the current board is version 3). - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -2980,7 +2984,7 @@ nsh> LeafLab's Maple and Maple Mini boards. These boards are based on the STM32F103RBT6 chip for the standard version and on the STM32F103CBT6 for the mini version. See the LeafLabs web site for hardware information; - see the NuttX board README file for further information about the NuttX port. + see the NuttX board README file for further information about the NuttX port.

  • @@ -2989,7 +2993,7 @@ nsh> The Spark boards are based on the STM32F103CBT6 chip and feature wireless networking using the TI CC3000 WLAN module. See the Spark web site for hardware information; The emulated Spark is a base board for the Maple Mini board (see above) developed by David Sidrane that supports Spark development while we all way breathlessly for or Spark boards. - see the NuttX board README file for further information about the NuttX port. + see the NuttX board README file for further information about the NuttX port.

    Initially Spark support was introduced in NuttX 6.31 and completed in NuttX 6.32. @@ -3078,6 +3082,20 @@ nsh>
    + +
    + +

    + STMicro STM32F105x. + Architecture support (only) for the STM32 F105R was contribed in NuttX-7.17 by Konstantin Berezenko. + There is currently no support for boards using any STM32F105x parts in the source tree. +

    + + + +
    +
    +
    @@ -3110,7 +3128,7 @@ nsh> (1) Basic Cortex-M3 port, (2) Ethernet, (3) On-board LEDs. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -3137,7 +3155,7 @@ nsh> STATUS: Networking and touchscreen support are well test. But, at present, neither USB nor LCD functionality have been verified. - Refer to the SViewtool STM32F103/F107 README file for further information. + Refer to the SViewtool STM32F103/F107 README file for further information.

    • @@ -3181,7 +3199,7 @@ nsh> STATUS: The peripherals of the STM32 F2 family are compatible with the STM32 F4 family. See discussion of the STM3240G-EVAL board below for further information. - Refer also to the NuttX board README file for further information. + Refer also to the NuttX board README file for further information.

    Support for both the IAR and uVision GCC IDEs added for the STM3220G-EVAL board in NuttX 7.16. @@ -3219,7 +3237,7 @@ nsh>

    Subsequent NuttX releases will extend this port and add support for the SDIO-based SD cards and USB device. - Refer to the NuttX board README file for further information about this port. + Refer to the NuttX board README file for further information about this port.

    @@ -3249,7 +3267,7 @@ nsh> STATUS: As of this writing, the basic port is code complete and a fully verified configuration exists for the NuttShell NSH). The first fully functional Arduino Due port was released in NuttX-6.29. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3341,7 +3359,7 @@ nsh>

    • Support for the mbed board was contributed by Dave Marples and released in NuttX-5.11. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3365,7 +3383,7 @@ nsh> The NuttX-5.17 released added support for low-speed USB devices, interrupt endpoints, and a USB host HID keyboard class driver.
  • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -3384,7 +3402,7 @@ nsh> An fully verified board configuration is included in NuttX-6.2. The Code Red toolchain is supported under either Linux or Windows. Verified configurations include DHCPD, the NuttShell (NSH), NuttX graphis (NX), THTTPD, and USB mass storage device. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -3395,7 +3413,7 @@ nsh> The initial release was included NuttX-6.26. The Nuttx Buildroot toolchain is used by default. Verifed configurations include the "Hello, World!" example application and a THTTPD demonstration. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • @@ -3403,7 +3421,7 @@ nsh>

    This board configuration was contributed and made available in NuttX-6.20. As contributed board support, I am unsure of what all has been verfied and what has not. - See the Microment website Lincoln60 board and the NuttX board README file for further information about the Lincoln board. + See the Microment website Lincoln60 board and the NuttX board README file for further information about the Lincoln board.

  • @@ -3411,7 +3429,7 @@ nsh>

    This board configuration was contributed by Vladimir Komendantskiy and made available in NuttX-7.15. This is a variant of the LPCXpresso LPC1768 board support with special provisions for the U-Blox Model Evaluation board. - See the NuttX board README file for further information about this port. + See the NuttX board README file for further information about this port.

    • @@ -3446,7 +3464,7 @@ nsh> The NSH configuration includes verified support for a DMA-based SD card interface. The frame-buffer LCD driver is functional and uses the SDRAM for frame-buffer memory. A touchscreen interface has been developed but there appears to be a hardware issue with the WaveShare implementation of the XPT2046 touchscreen controller. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information. @@ -3469,7 +3487,7 @@ nsh>

      STATUS: - Refer to the Teensy-3.1 board README file for further information. + Refer to the Teensy-3.1 board README file for further information.

    @@ -3497,7 +3515,7 @@ nsh> (2) bring up the NuttShell NSH, (3) develop support for the SDHC-based SD card, (4) develop support for USB host and device, and (2) develop an LCD driver. NOTE: Some of these remaining tasks are shared with the K60 work described below. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3522,12 +3540,7 @@ nsh> An additional, validated configuration exists for the NuttShell (NSH, see the NSH User Guide). This basic TWR-K60N512 first appeared in NuttX-6.8. - Ethernet and SD card (SDHC) drivers also exist: - The SDHC driver is partially integrated in to the NSH configuration but has some outstanding issues. - the Ethernet driver became stable in NuttX-7.14 thanks to the efforts of Andrew Webster. - Additional work remaining includes: (1) integrate th SDHC drivers, and (2) develop support for USB host and device. - NOTE: Most of these remaining tasks are the same as the pending K40 tasks described above. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3536,6 +3549,43 @@ nsh>

    + +
    + +

    + FreeScale Kinetis K64. + Support for the Kinetis K64 family and specifically for the NXP/Freescale Freedom K64F board was added in NuttX 7.17. + Initial release includes two NSH configurations with support for on-board LEDs, buttons, and Ethernet with the on-board KSZ8081 PHY. + SDHC supported has been integrated, but not verified. + Refer to the NuttX board README file for further information. +

    + + + +
    + +

    + Driver Status. +

    +
      +
    • + NuttX-6.8. + Ethernet and SD card (SDHC) drivers also exist: + The SDHC driver is partially integrated in to the NSH configuration but has some outstanding issues. + Additional work remaining includes: (1) integrate th SDHC drivers, and (2) develop support for USB host and device. + NOTE: Most of these remaining tasks are the same as the pending K40 tasks described above. +
      • +
    • + NuttX-7.14. + The Ethernet driver became stable in NuttX-7.14 thanks to the efforts of Andrew Webster. +
    • + NuttX-7.17. + Ethernet support was extended and verified on the Freedom K64F. + A Kinetis USB device controller driver and PWM support was contributed by kfazz. +
      • +
    + +
    @@ -3577,7 +3627,7 @@ nsh> The basic port for the STM32F3-Discover was first released in NuttX-6.26. Many of the drivers previously released for the STM32 F1, Value Line, and F2 and F4 may be usable on this platform as well. New drivers will be required for ADC and I2C which are very different on this platform. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3632,7 +3682,7 @@ nsh>
  • NuttX-7.2 The basic port for STMicro Nucleo F401RE board was contributed by Frank Bennett.
  • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -3685,7 +3735,7 @@ nsh> Support for the Olimex STM32 H405 board was added in NuttX-7.3.
  • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    • @@ -3716,7 +3766,7 @@ nsh> STATUS: The basic port for the STM32F4-Discovery was contributed by Mike Smith and was first released in NuttX-6.14. All drivers listed for the STM3240G-EVAL are usable on this platform as well. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -3733,7 +3783,7 @@ nsh>

  • Battery connect and batter charger circuit.

    • - See the Mikroelektronika website for more information about this board and the NuttX board README file for further information about the NuttX port. + See the Mikroelektronika website for more information about this board and the NuttX board README file for further information about the NuttX port.

      @@ -3745,12 +3795,17 @@ nsh>

      Olimex STM32 H405. Support for the Olimex STM32 H405 development board was contributed by Martin Lederhilger and appeared in NuttX-7.3. - See the NuttX board README file for further information about the NuttX port. + See the NuttX board README file for further information about the NuttX port.

      Olimex STM32 H407. Support for the Olimex STM32 H407 development board was contributed by Neil Hancock and appeared in NuttX-7.14. - See the NuttX board README file for further information about the NuttX port. + See the NuttX board README file for further information about the NuttX port. +

      +

      + Olimex STM32 E407. + Support for the Olimex STM32 E407 development board was contributed by Mateusz Szafoni and appeared in NuttX-7.17. + See the NuttX board README file for further information about the NuttX port.

      @@ -3808,7 +3863,7 @@ nsh>

    - Refer to the STM32F429I-Discovery board README file for further information. + Refer to the STM32F429I-Discovery board README file for further information.

    @@ -3857,13 +3912,13 @@ nsh>

  • Nucleo-L476RG. - Board support for the STMicro NucleoL476RG board from ST Micro was contributed by Sebastien Lorquet in NuttX-7.15. See the STMicro website and the board README file for further information. + Board support for the STMicro NucleoL476RG board from ST Micro was contributed by Sebastien Lorquet in NuttX-7.15. See the STMicro website and the board README file for further information.

  • STM32L476VG Discovery. - Board support for the STMicro STM32L476VG Discovery board from ST Micro was contributed by Dave in NuttX-7.15. See the STMicro website and the board README file for further information. + Board support for the STMicro STM32L476VG Discovery board from ST Micro was contributed by Dave in NuttX-7.15. See the STMicro website and the board README file for further information.

    • @@ -3912,42 +3967,15 @@ nsh>

    • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

    • NuttX-6.20 - The basic port is complete. + The basic LPC4330-Xplorer port is complete. The basic NuttShell (NSH) configuration is present and fully verified. This includes verified support for: SYSTICK system time, pin and GPIO configuration, and a serial console.

      -

      - Several drivers have been copied from the related LPC17xx port but require integration into the LPC43xx: ADC, DAC, GPDMA, I2C, SPI, and SSP. - The registers for these blocks are the same in both the LPC43xx and the LPC17xx and they should integrate into the LPC43xx very easily by simply adapting the clocking and pin configuration logic. -

      -

      - Other LPC17xx drivers were not brought into the LPC43xx port because these peripherals have been completely redesigned: CAN, Ethernet, USB device, and USB host. -

      -

      - So then there is no support for the following LPC43xx peripherals: SD/MMC, EMC, USB0,USB1, Ethernet, LCD, SCT, Timers 0-3, MCPWM, QEI, Alarm timer, WWDT, RTC, Event monitor, and CAN. -

      -

      - Some of these can be leveraged from other MCUs that appear to support the same peripheral IP: -

      -
        -
      • - The LPC43xx USB0 peripheral appears to be the same as the USB OTG peripheral for the LPC31xx. - The LPC31xx USB0 device-side driver has been copied from the LPC31xx port but also integration into the LPC43xx (clocking and pin configuration). - It should be possible to complete porting of this LPC31xx driver with a small porting effort. -
        • -
      • - The Ethernet block looks to be based on the same IP as the STM32 Ethernet and, as a result, it should be possible to leverage the NuttX STM32 Ethernet driver with a little more effort. -
        • -
      -
      • -
    • -

      NuttX-6.21 - Added support for a SPIFI block driver and for RS-485 option to the serial driver.

    @@ -3959,7 +3987,7 @@ nsh>

    • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

    • @@ -3979,7 +4007,7 @@ nsh>

      • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

      • @@ -3996,7 +4024,7 @@ nsh>

        • STATUS: - Refer to the NuttX board README file for more detailed information about this port. + Refer to the NuttX board README file for more detailed information about this port.

        • @@ -4010,10 +4038,52 @@ nsh> Alexander also contributed an LPC43xx AES driver available in NuttX-7.16.

          • -
        + +
        + +

        + Driver Status. +

        +
          +
        • +

          NuttX-6.20 + Several drivers have been copied from the related LPC17xx port but require integration into the LPC43xx: ADC, DAC, GPDMA, I2C, SPI, and SSP. + The registers for these blocks are the same in both the LPC43xx and the LPC17xx and they should integrate into the LPC43xx very easily by simply adapting the clocking and pin configuration logic. +

          +

          + Other LPC17xx drivers were not brought into the LPC43xx port because these peripherals have been completely redesigned: CAN, Ethernet, USB device, and USB host. +

          +

          + So then there is no support for the following LPC43xx peripherals: SD/MMC, EMC, USB0,USB1, Ethernet, LCD, SCT, Timers 0-3, MCPWM, QEI, Alarm timer, WWDT, RTC, Event monitor, and CAN. +

          +

          + Some of these can be leveraged from other MCUs that appear to support the same peripheral IP: +

          +
            +
          • + The LPC43xx USB0 peripheral appears to be the same as the USB OTG peripheral for the LPC31xx. + The LPC31xx USB0 device-side driver has been copied from the LPC31xx port but also integration into the LPC43xx (clocking and pin configuration). + It should be possible to complete porting of this LPC31xx driver with a small porting effort. +
            • +
          • + The Ethernet block looks to be based on the same IP as the STM32 Ethernet and, as a result, it should be possible to leverage the NuttX STM32 Ethernet driver with a little more effort. +
            • +
          +
          • +
        • +

          NuttX-6.21 + Added support for a SPIFI block driver and for RS-485 option to the serial driver. +

          • +
        • +

          NuttX-7.17 + EMC support was extended to include support SDRAM by Vytautas Lukenska. +

          • +
        + +
        @@ -4063,7 +4133,7 @@ nsh>

      - Refer to the EK-TM4C123GXL board README file for more detailed information about this port. + Refer to the EK-TM4C123GXL board README file for more detailed information about this port.

    @@ -4089,7 +4159,7 @@ nsh>

    - Refer to the EK-TM4C1294XL board README file for more detailed information about this port. + Refer to the EK-TM4C1294XL board README file for more detailed information about this port.

    @@ -4119,11 +4189,11 @@ nsh>
  • This board supports included two configurations for the NuttShell (NSH). Both are networked enabled: One configured to support IPv4 and one configured to supported IPv6. - Instructions are included in the board README file for configuring both IPv4 and IPv6 simultaneously.. + Instructions are included in the board README file for configuring both IPv4 and IPv6 simultaneously..

    • - Refer to the DK-TM4C129X board README file for more detailed information about this port. + Refer to the DK-TM4C129X board README file for more detailed information about this port.

    @@ -4146,7 +4216,7 @@ nsh> The basic port was released in NuttX-7.5. This basic board supported includes an verified configuration for the NuttShell NSH). Key wireless networking capability is still missing. - Refer to the CC3200 LaunchPad board README file for more detailed information about this port. + Refer to the CC3200 LaunchPad board README file for more detailed information about this port.

    @@ -4182,7 +4252,7 @@ nsh>

    - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    Memory Usage. @@ -4258,7 +4328,7 @@ Mem: 29232 5920 23312 23312 A DMA-base SPI driver is supported and has been verified with the AT25 Serial FLASH. Touchscreen and LCD support was added in NuttX-7.3, but has not been fully integrated as of this writing. The SAM4E-EK should be compatible with most of the other SAM3/4 drivers (like HSMCI, DMAC, etc.) but those have not be verified on the SAM4E-EK as of this writing. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information. @@ -4287,7 +4357,7 @@ Mem: 29232 5920 23312 23312 Support for the on-board 1MB SRAM was added in NuttX-6.29. An RTT driver was Bob Doiron in NuttX-7.3. Bob also added an high resolution RTC emulation using the RTT for the sub-second counter. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4302,7 +4372,7 @@ Mem: 29232 5920 23312 23312 As of this writing, the basic port is code complete and a fully verified configuration exists for the NuttShell NSH). The first fully functional SAM4S Xplained Pro port was released in NuttX-7.2. This supported also added HSMCI, RTC, and watchdog and verified support for USB device. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4335,7 +4405,7 @@ Mem: 29232 5920 23312 23312 A new Ethernet MAC driver has been developed and is functional in the NSH configuration. A DMA-base SPI driver is supported and has been verified with the AT25 Serial FLASH. The SAM4E-EK should be compatible with most of the other SAM3/4 drivers (like HSMCI, DMAC, etc.) but those have not be verified on the SAM4E-EK as of this writing. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information. @@ -4421,7 +4491,7 @@ Mem: 29232 5920 23312 23312
  • RSWDT driver.

    • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4438,7 +4508,7 @@ Mem: 29232 5920 23312 23312 This port uses Atmel SAM E70 Xplained Evaluation Kit (ATSAME70-XPLD). This board is essentially a lower cost version of the SAMV71-XULT board featuring the ATSAME70Q21 Cortex-M7 microcontroller. See the Atmel SAMV71 for supported features. - Also refer to the NuttX board README file for further information. + Also refer to the NuttX board README file for further information.

    @@ -4461,24 +4531,39 @@ Mem: 29232 5920 23312 23312

    A basic port for the Nucleo-144 board with the STM32F746ZG MCU was contribued in NuttX-7.16 by Kconstantin Berezenko.

    +

    + STATUS: +

    +
      +

      + The basic STM32F746G-DISCO port is complete and there are two, verified configurations available. + Both configurations use the NuttShell (NSH) and a serial console; one includes Ethernet support. + The first release of the STM32F746G_DISCO port was available in NuttX-7.11. +

      +

      + Refer to the NuttX board README file for further information. +

      +

    - STATUS: + STM32 F7 Driver Status:

      -

      - The basic STM32F746G-DISCO port is complete and there are two, verified configurations available. - Both configurations use the NuttShell (NSH) and a serial console; one includes Ethernet support. - DMA supports is available. - The STM32 F7 peripherals are very similar to some members of the STM32 F4 and additional drivers can easily be ported the F7 as discussed in this Wiki page: Porting Drivers to the STM32 F7 - The first release of the STM32F746G_DISCO port was available in NuttX-7.11. -

      -

      - Refer to the NuttX board README file for further information. -

      +
    • +

      NuttX-7.11. + Serial driver and Ethernet driver support, along with DMA support, were available availabe in this initial release. + The STM32 F7 peripherals are very similar to some members of the STM32 F4 and additional drivers can easily be ported the F7 as discussed in this Wiki page: Porting Drivers to the STM32 F7 +

      +
      • +
    • +

      NuttX-7.17. + Davide Sidrane contributed PWR, RTC, BBSRAM, and DBGMCU support. + Lok Tep contribed SPI, I2c, ADC, SDMMC, and USB device driver support. +

    +
    @@ -4490,9 +4575,38 @@ Mem: 29232 5920 23312 23312 STMicro STM32 F756. Architecture-only support is available for the STM32 F756 family (meaning that the parts are supported, but there is not example board supported in the system). This support was made available in NuttX-7.11. + See above for STM32 F7 driver availability.

    + + +
    +
    + + +
    + +

    + STMicro STM32 F76xx/F77xx. + Architecture support for the STM32 F76xx and F77xx families was contributed by David Sidrane in NuttX 7.17. Support is available for one board from this family: +

    +
      +
    • +

      + Nucleo-F767ZI. + This is a member of the Nucleo-144 board family. + Support for this board was also contributed by David Sidrane in NuttX-7.17. + See the board README.txt file for further information. +

      +
      • +
    +

    + See above for STM32 F7 driver availability. +

    + + +
    @@ -4530,14 +4644,14 @@ Mem: 29232 5920 23312 23312

    STATUS: Work on this port has stalled due to toolchain issues. Complete, but untested code for this port appears in the NuttX 6.5 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    LowPowerLab MoteinoMEGA. This port of NuttX to the MoteinoMEGA from LowPowerLab. The MoteinoMEGA is based on an Atmel ATMega1284P. - See the LowPowerlab website and the board README file for further information. + See the LowPowerlab website and the board README file for further information.

      @@ -4554,7 +4668,7 @@ Mem: 29232 5920 23312 23312 STATUS: The basic port was released in NuttX-7.14 including a simple "Hello, World!" and OS test configurations. Extensive effort was made to the use the special capabilities of the Atmel Studio AVR compiler to retain strings in FLASH memory and so keep the SRAM memory usage to a minimum. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4584,7 +4698,7 @@ Mem: 29232 5920 23312 23312 The basic port was released in NuttX-6.5. This basic port consists only of a "Hello, World!!" example that demonstrates initialization of the OS, creation of a simple task, and serial console output. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4606,7 +4720,7 @@ Mem: 29232 5920 23312 23312 An SPI driver and a USB device driver exist for the AT90USB as well as a USB mass storage configuration. However, this configuration is not fully debugged as of the NuttX-6.5 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4699,7 +4813,7 @@ Mem: 29232 5920 23312 23312 The basic, port was be released in NuttX-5.13. A complete port will include drivers for additional AVR32 UC3 devices -- like SPI and USB --- and will be available in a later release, time permitting. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4736,7 +4850,7 @@ Mem: 29232 5920 23312 23312 However, testing has not yet begun due to issues with BDMs, Code Warrior, and the paging in the build process. Progress is slow, but I hope to see a fully verified MC9S12NE64 port in the near future. - Refer to the NuttX board README files for DEMO9S12NE64 and for the NE64 /PoE Badge for further information. + Refer to the NuttX board README files for DEMO9S12NE64 and for the NE64 /PoE Badge for further information.

    @@ -4763,7 +4877,7 @@ Mem: 29232 5920 23312 23312 The port is reported to be functional on the Bifferboard as well. In NuttX 7.1, Lizhuoyi contributed additional keyboard and VGA drivers. This is a great, stable starting point for anyone interest in fleshing out the x86 port! - Refer to the NuttX README file for further information. + Refer to the NuttX README file for further information.

    @@ -4791,7 +4905,7 @@ Mem: 29232 5920 23312 23312 This initial port of NuttX to RGMP was provided in NuttX-6.3. This initial RGP port provides only minimal driver support and does not use the native NuttX interrupt system. This is a great, stable starting point for anyone interest in working with NuttX under RGMP! - Refer to the NuttX README file for further information. + Refer to the NuttX README file for further information.

    @@ -4822,7 +4936,7 @@ Mem: 29232 5920 23312 23312 The PGA117, however, is not yet fully integrated to support ADC sampling. See the NSH User Guide for further information about NSH. The first verified port to the Mirtoo module was available with the NuttX 6.20 release. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4856,7 +4970,7 @@ Mem: 29232 5920 23312 23312 An untested USB device-side driver is available in the source tree. A more complete port would include support of the USB OTG port and of the LCD display on this board. Those drivers are not yet available as of this writing. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4872,7 +4986,7 @@ Mem: 29232 5920 23312 23312 STATUS: The basic port is code complete and fully verified in NuttX 6.13. Available configurations include the NuttShell (NSH - see the NSH User Guide). - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • UBW32 Board from Sparkfun This is the port to the Sparkfun UBW32 board. @@ -4885,7 +4999,7 @@ Mem: 29232 5920 23312 23312 The basic port is code complete and fully verified in NuttX 6.18. Available configurations include the NuttShell (NSH - see the NSH User Guide). USB has not yet been fully tested but on first pass appears to be functional. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -4916,7 +5030,7 @@ Mem: 29232 5920 23312 23312 A verified configuration is available for the NuttShel (NSH) appeared in NuttX-6.16. Board support includes a verified USB (device-side) driver. Also included are a a verified Ethernet driver, a partially verified USB device controller driver, and an unverifed SPI driver. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

  • Mikroelektronika PIC32MX7 Mulitmedia Board (MMB). A port has been completed for the Mikroelektronika PIC32MX7 Multimedia Board (MMB). @@ -4939,7 +5053,7 @@ Mem: 29232 5920 23312 23312 However, additional verification and tuning of this driver is required. Further display/touchscreen verification would require C++ support (for NxWidgets and NxWM). Since I there is no PIC32 C++ is the free version of the MPLAB C32 toolchain, further graphics development is stalled. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5010,7 +5124,7 @@ Mem: 29232 5920 23312 23312
  • Ethernet (code complete, but not yet functional),

    • - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5056,7 +5170,7 @@ Mem: 29232 5920 23312 23312 (which has very limit SH-1 support to begin with), or perhaps with the CMON debugger. At any rate, I have exhausted all of the energy that I am willing to put into this cool old processor for the time being. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5093,7 +5207,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1);

    No workaround is known at this time. This is a show stopper for M16C. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5120,7 +5234,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); The initial release of support for the z16f was made available in NuttX version 0.3.7. A working NuttShell (NSH) configuration as added in NuttX-6.33 (although a patch is required to work around an issue with a ZDS-II 5.0.1 tool problem). An ESPI driver was added in NuttX-7.2. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

    @@ -5155,7 +5269,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); The first integrated version was released in NuttX version 0.4.2 (with important early bugfixes in 0.4.3 and 0.4.4). As of this writing, that port provides basic board support with a serial console, SPI, and eZ80F91 EMAC driver. - Refer to the NuttX board README files for the ez80f0910200kitg and ez80f910200zcofile for further information. + Refer to the NuttX board README files for the ez80f0910200kitg and ez80f910200zcofile for further information.

    @@ -5186,7 +5300,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); STATUS: This release has been verified only on the ZiLOG ZDS-II Z8Encore! chip simulation as of nuttx-0.3.9. - Refer to the NuttX board README files for the z8encore000zco and for thez8f64200100kit for further information. + Refer to the NuttX board README files for the z8encore000zco and for thez8f64200100kit for further information.

      @@ -5215,7 +5329,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); Most of the NuttX is in port for both the Z80182 and for the P112 board. Boards from Kickstarter project will not be available, however, until the third quarter of 2013. So it will be some time before this port is verified on hardware. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

        @@ -5240,7 +5354,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); STATUS: This port is complete and stable to the extent that it can be tested using an instruction set simulator. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

          @@ -5264,7 +5378,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1); STATUS: Basically the same as for the Z80 instruction set simulator. This port was contributed by Jacques Pelletier. - Refer to the NuttX board README file for further information. + Refer to the NuttX board README file for further information.

            diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html index d36ca6f2104..bf32596fef0 100644 --- a/Documentation/NuttxPortingGuide.html +++ b/Documentation/NuttxPortingGuide.html @@ -4439,7 +4439,7 @@ void board_autoled_off(int led);

            • Interface Definition. - The header file for the NuttX PWM driver reside at include/nuttx/pwm.h. + The header file for the NuttX PWM driver reside at include/nuttx/drivers/pwm.h. This header file includes both the application level interface to the PWM driver as well as the interface between the "upper half" and "lower half" drivers. The PWM module uses a standard character driver framework. However, since the PWM driver is a devices control interface and not a data transfer interface, @@ -4472,7 +4472,7 @@ void board_autoled_off(int led);

              • Interface Definition. - The header file for the NuttX CAN driver reside at include/nuttx/can.h. + The header file for the NuttX CAN driver resides at include/nuttx/drivers/can.h. This header file includes both the application level interface to the CAN driver as well as the interface between the "upper half" and "lower half" drivers. The CAN module uses a standard character driver framework.
                • diff --git a/Kconfig b/Kconfig index c174c16e4cb..31f6f54629c 100644 --- a/Kconfig +++ b/Kconfig @@ -339,10 +339,10 @@ config ARCH_MATH_H default n ---help--- There is also a re-directing version of math.h in the source tree. - However, it resides out-of-the-way at include/nuttx/math.h because it + However, it resides out-of-the-way at include/nuttx/lib/math.h because it conflicts too often with the system math.h. If ARCH_MATH_H=y is defined, however, the top-level makefile will copy the redirecting - math.h header file from include/nuttx/math.h to include/math.h. math.h + math.h header file from include/nuttx/lib/math.h to include/math.h. math.h will then include the architecture-specific version of math.h that you must provide at nuttx/arch/>architecture/include/stdarg.h If ARCH_STDARG_H=y is defined, the top-level makefile will copy the - re-directing stdarg.h header file from include/nuttx/stdarg.h to + re-directing stdarg.h header file from include/nuttx/lib/stdarg.h to include/stdarg.h. So for the architectures that cannot use their toolchain's stdarg.h file, they can use this alternative by defining ARCH_STDARG_H=y and providing. If ARCH_STDARG_H, is not defined, then diff --git a/Makefile.unix b/Makefile.unix index a117f171fc1..d1ee224a67e 100644 --- a/Makefile.unix +++ b/Makefile.unix @@ -181,18 +181,18 @@ endif BIN = nuttx$(EXEEXT) all: $(BIN) -.PHONY: context clean_context check_context export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean +.PHONY: dirlinks context clean_context check_context export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean -# Target used to copy include/nuttx/math.h. If CONFIG_ARCH_MATH_H is +# Target used to copy include/nuttx/lib/math.h. If CONFIG_ARCH_MATH_H is # defined, then there is an architecture specific math.h header file # that will be included indirectly from include/math.h. But first, we # have to copy math.h from include/nuttx/. to include/. Logic within -# include/nuttx/math.h will hand the redirection to the architecture- +# include/nuttx/lib/math.h will hand the redirection to the architecture- # specific math.h header file. # # If the CONFIG_LIBM is defined, the Rhombus libm will be built at libc/math. # Definitions and prototypes for the Rhombus libm are also contained in -# include/nuttx/math.h and so the file must also be copied in that case. +# include/nuttx/lib/math.h and so the file must also be copied in that case. # # If neither CONFIG_ARCH_MATH_H nor CONFIG_LIBM is defined, then no math.h # header file will be provided. You would want that behavior if (1) you @@ -208,8 +208,8 @@ endif endif ifeq ($(NEED_MATH_H),y) -include/math.h: include/nuttx/math.h - $(Q) cp -f include/nuttx/math.h include/math.h +include/math.h: include/nuttx/lib/math.h + $(Q) cp -f include/nuttx/lib/math.h include/math.h else include/math.h: endif @@ -221,20 +221,20 @@ endif # the settings in this float.h are actually correct for your platform! ifeq ($(CONFIG_ARCH_FLOAT_H),y) -include/float.h: include/nuttx/float.h - $(Q) cp -f include/nuttx/float.h include/float.h +include/float.h: include/nuttx/lib/float.h + $(Q) cp -f include/nuttx/lib/float.h include/float.h else include/float.h: endif -# Target used to copy include/nuttx/stdarg.h. If CONFIG_ARCH_STDARG_H is +# Target used to copy include/nuttx/lib/stdarg.h. If CONFIG_ARCH_STDARG_H is # defined, then there is an architecture specific stdarg.h header file -# that will be included indirectly from include/stdarg.h. But first, we +# that will be included indirectly from include/lib/stdarg.h. But first, we # have to copy stdarg.h from include/nuttx/. to include/. ifeq ($(CONFIG_ARCH_STDARG_H),y) -include/stdarg.h: include/nuttx/stdarg.h - $(Q) cp -f include/nuttx/stdarg.h include/stdarg.h +include/stdarg.h: include/nuttx/lib/stdarg.h + $(Q) cp -f include/nuttx/lib/stdarg.h include/stdarg.h else include/stdarg.h: endif @@ -315,6 +315,8 @@ ifneq ($(CONFIG_ARCH_CHIP),) endif dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip + $(Q) $(MAKE) -C configs dirlinks TOPDIR="$(TOPDIR)" + $(Q) $(MAKE) -C $(CONFIG_APPS_DIR) dirlinks TOPDIR="$(TOPDIR)" # context # @@ -470,32 +472,32 @@ pass2dep: context tools/mkdeps$(HOSTEXEEXT) tools/cnvwindeps$(HOSTEXEEXT) # location: http://ymorin.is-a-geek.org/projects/kconfig-frontends. See # README.txt file in the NuttX tools GIT repository for additional information. -do_config: context apps_preconfig +do_config: dirlinks apps_preconfig $(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf Kconfig config: do_config clean_context -do_oldconfig: context apps_preconfig +do_oldconfig: dirlinks apps_preconfig $(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --oldconfig Kconfig oldconfig: do_oldconfig clean_context -do_olddefconfig: context apps_preconfig +do_olddefconfig: dirlinks apps_preconfig $(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --olddefconfig Kconfig olddefconfig: do_olddefconfig clean_context -do_menuconfig: context apps_preconfig +do_menuconfig: dirlinks apps_preconfig $(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-mconf Kconfig menuconfig: do_menuconfig clean_context -do_qconfig: context apps_preconfig +do_qconfig: dirlinks apps_preconfig $(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-qconf Kconfig qconfig: do_qconfig clean_context -gconfig: context apps_preconfig +gconfig: dirlinks apps_preconfig $(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-gconf Kconfig gconfig: do_gconfig clean_context diff --git a/Makefile.win b/Makefile.win index 1f30310525e..b15052f16ca 100644 --- a/Makefile.win +++ b/Makefile.win @@ -174,7 +174,7 @@ endif BIN = nuttx$(EXEEXT) all: $(BIN) -.PHONY: context clean_context check_context configenv config oldconfig menuconfig export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean +.PHONY: dirlinks context clean_context check_context configenv config oldconfig menuconfig export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean # Target used to copy include\nuttx\math.h. If CONFIG_ARCH_MATH_H is # defined, then there is an architecture specific math.h header file @@ -335,6 +335,8 @@ endif endif dirlinks: include\arch include\arch\board include\arch\chip $(ARCH_SRC)\board $(ARCH_SRC)\chip + $(Q) $(MAKE) -C configs dirlinks TOPDIR="$(TOPDIR)" + $(Q) $(MAKE) -C $(CONFIG_APPS_DIR) dirlinks TOPDIR="$(TOPDIR)" # context # @@ -466,22 +468,22 @@ pass2dep: context tools\mkdeps$(HOSTEXEEXT) # location: http://ymorin.is-a-geek.org/projects/kconfig-frontends. See # misc\tools\README.txt for additional information. -do_config: context apps_preconfig +do_config: dirlinks apps_preconfig $(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf Kconfig config: do_config clean_context -do_oldconfig: context apps_preconfig +do_oldconfig: dirlinks apps_preconfig $(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --oldconfig Kconfig oldconfig: do_oldconfig clean_context -do_olddefconfig: context apps_preconfig +do_olddefconfig: dirlinks apps_preconfig $(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --olddefconfig Kconfig olddefconfig: do_olddefconfig clean_context -do_menuconfig: context configenv apps_preconfig +do_menuconfig: dirlinks configenv apps_preconfig $(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-mconf Kconfig menuconfig: do_menuconfig clean_context diff --git a/README.txt b/README.txt index 4c12dca85ac..6843d81a4b8 100644 --- a/README.txt +++ b/README.txt @@ -15,6 +15,7 @@ README - NuttX Configuration Tool - Finding Selections in the Configuration Menus - Reveal Hidden Configuration Options + - Make Sure that You on on the Right Platform - Comparing Two Configurations - Incompatibilities with Older Configurations - NuttX Configuration Tool under DOS @@ -321,13 +322,13 @@ Notes about Header Files If you have a custom, architecture specific math.h header file, then that header file should be placed at arch//include/math.h. There - is a stub math.h header file located at include/nuttx/math.h. This stub + is a stub math.h header file located at include/nuttx/lib/math.h. This stub header file can be used to "redirect" the inclusion to an architecture- specific math.h header file. If you add an architecture specific math.h header file then you should also define CONFIG_ARCH_MATH_H=y in your NuttX Configuration file. If CONFIG_ARCH_MATH_H is selected, then the top-level Makefile will copy the stub math.h header file from - include/nuttx/math.h to include/math.h where it will become the system + include/nuttx/lib/math.h to include/math.h where it will become the system math.h header file. The stub math.h header file does nothing other than to include that architecture-specific math.h header file as the system math.h header file. @@ -576,6 +577,38 @@ Reveal Hidden Configuration Options cannot be selected and has no value). About all you do is to select the option to see what the dependencies are. +Make Sure that You on on the Right Platform +------------------------------------------- + + Saved configurations may run on Linux, Cygwin (32- or 64-bit), or other + platforms. The platform characteristics can be changed use 'make + menuconfig'. Sometimes this can be confusing due to the differences + between the platforms. Enter sethost.sh + + sethost.sh is a simple script that changes a configuration to your + host platform. This can greatly simplify life if you use many different + configurations. For example, if you are running on Linux and you + configure like this: + + $ cd tools + $ ./configure.sh board/configuration + $ cd .. + + The you can use the following command to both (1) make sure that the + configuration is up to date, AND (2) the configuration is set up + correctly for Linux: + + $ tools/sethost.sh -l + + Or, if you are on a Windows/Cygwin 64-bit platform: + + $ tools/sethost.sh -w + + Other options are available from the help option built into the + script. You can see all options with: + + $ tools/sethost.sh -h + Comparing Two Configurations ---------------------------- @@ -948,9 +981,13 @@ Native Windows Build -------------------- The beginnings of a Windows native build are in place but still not often - used as of this writing. The windows native build logic initiated - if CONFIG_WINDOWS_NATIVE=y is defined in the NuttX configuration file: + used as of this writing. The build was functional but because of lack of + use may find some issues to be resolved with this build configuration. + The windows native build logic initiated if CONFIG_WINDOWS_NATIVE=y is + defined in the NuttX configuration file: + + This build: - Uses all Windows style paths diff --git a/ReleaseNotes b/ReleaseNotes index 5afe3d5724e..27710f0c6b3 100644 --- a/ReleaseNotes +++ b/ReleaseNotes @@ -8905,25 +8905,25 @@ Additional new features and extended functionality: This is based on the similar SAMD20 Xplained Pro board. * Freescale/NXP KL: - + - KL25Z64: Added support for the KL25Z64. The KL25Z64 is a lower memory variant of the KL25Z128 and is used on the Teensy LC. From Michael as SourceForge patch 50. * Freescale/NXP KL Boards: - + - Teensy-LC: Add board support for the Teensy LC board. Support is based off the Freedom KL25Z board. LED, PWM, and UART0 have been tested. The SPI pins are mapped correctly but have not yet been tested. From Michael Hope as SourceForge patch 51. * NXP LPC111x: - + - LPC111x: Support for the LPC11xx family (the LPC1115 MCU in particular). Contributed by Alan Carvalho de Assis. * NXP LPC111x Boards: - + - LPCXpresso LPC1115: Support for the LPCXpression LPC1115 board. Contributed by Alan Carvalho de Assis. @@ -9158,7 +9158,7 @@ detailed bugfix information): - LPC17 USB OHCI: Correct some initialization of data structures. When hub support is enabled, it would overwrite the end of an array and clobber some OS data structures. - - LPC17xx Ethernet: Review, update, and modify the Ethernet driver so + - LPC17xx Ethernet: Review, update, and modify the Ethernet driver so that it works better with CONFIG_NET_NOINTS=y. Also, update all LPC17xx networking configurations so that they have CONFIG_NET_NOTINTS=y selected. @@ -9585,7 +9585,7 @@ detailed bugfix information): * ARMv7-A: - Cortex-A5 vfork(): Fix a Cortex-A compilation error when system - calls are enabled in modes other than CONFIG_BUILD_KERNEL. + calls are enabled in modes other than CONFIG_BUILD_KERNEL. * Atmel SAMA5 Drivers: @@ -10099,7 +10099,7 @@ Additional new features and extended functionality: - ps command: The 'ps' command now uses /proc// to obtain task status information. A consequence of this is that you cannot use the 'ps' command if the procfs is not enabled and mounted at /proc. - + * Applications: apps/system: - apps/system/hexed: Port the hexed command line hexadeciamal editor @@ -10144,7 +10144,7 @@ detailed bugfix information): * Graphics/Graphic Drivers: - - ILI9432: Fixed errors in orientation. Portrait, RPortrait, and + - ILI9432: Fixed errors in orientation. Portrait, RPortrait, and Landscript should work correly now. They were displayed mirrored. From Marco Krahl. @@ -10321,7 +10321,7 @@ Additional new features and extended functionality: pointer indicates that the referenced object may reside either in flash or in RAM. The compiler automatically makes 32-bit pointer with flag indicating whether referenced object is in flash or RAM - and generates code to access either in run-time. Thus, any function + and generates code to access either in run-time. Thus, any function hat accepts __memx object can transparently work with RAM and flash objects. For platforms with a Harvard architecture and a very small RAM like @@ -10350,7 +10350,7 @@ Additional new features and extended functionality: dependencies generated by a Windows compiler so that they can be used with the Cygwin make. - tools/mkwindeps.sh: A script that coordinates use of cnvwindeps.exe. - Dependencies now work on the Cygwin platform when using a Windows + Dependencies now work on the Cygwin platform when using a Windows ative toolchain. * Applications: NSH @@ -10516,7 +10516,7 @@ Additional new features and extended functionality: implemented via ioctl calls. However, it does not yet implement the standard ADC interface. From Alexander Entinger. - U-Blox Modem: Add an upper half driver for the U-Blox Modem. From - Vladimir Komendantskiy. + Vladimir Komendantskiy. - I2C: Add an I2C, "upper half", character drivers to support raw I2C data transfers for test applications. - RGB LED: Add a driver to manage a RGB LED via PWM. From Alan @@ -10857,7 +10857,7 @@ Additional new features and extended functionality: Neil Hancock. - STM32 L4 QSPI: Add a QSPI driver with DMA support and (optional memory mapped mode support. From Dave ziggurat29). - - STM32, STM32 L4, and STM32 F7 Serial: Add support for compliant + - STM32, STM32 L4, and STM32 F7 Serial: Add support for compliant SD-style breaks. From David Sidrane. - STM32 L4 CAN: Add CAN support for STM32L4. From Sebastien Lorquet. - STM32 1-Wire: Add support for a custom 1-wire driver. The serial @@ -11079,3 +11079,699 @@ detailed bugfix information): - Several Makefiles: Add .PHONY definitions to prevent 'clean up to date' message weirdness when 'make clean' is done with no .config or Make.defs file. + +NuttX-7.17 Release Notes +------------------------ + +The 117th release of NuttX, Version 7.17, was made on July 25, 2016, +and is available for download from the Bitbucket.org website. Note +that release consists of two tarballs: nuttx-7.17.tar.gz and +apps-7.17.tar.gz. These are available from: + + https://bitbucket.org/nuttx/nuttx/downloads + https://bitbucket.org/nuttx/apps/downloads + +Both may be needed (see the top-level nuttx/README.txt file for build +information). + +Additional new features and extended functionality: + + * File System and Block and MTD Drivers: + + - drivers/mtd: Add a driver of IS25xP SPI flash devices. Based on + sst25xx driver. From Marten Svanfeldt. + + * Networking and Network Drivers: + + - Break out internal interface psock_ioctl(). + + * Common Device Drivers: + + - PTYs: Added support for pseduo-terminals: Device drivers that can be + used for communications between tasks (usually with re-directed I/O). + Based on existing pipe logic. + - Button upper half driver: Added support for poll(). + - CAN: Add support for poll. From Paul Alexander Patience. + - GPIO: Add support for a simple GPIO driver. It supports only pre- + configured input, output, and interrupting pins with basic input and + output operations. Interrupt events can lead to notification via a + signal. + - I/O Expander: Shadow-Mode: The output- and configuration registers of + the IO-Expander are held in the microcontrollers memory and only + written to the IO-Expander. This reduces bus traffic and is more + error-proof than the normal read-modify-write operation. Retry Mode: + If enabled and an error occurs while writing to the IO-Expander the + current transmission is automatically repeated once. From Michael + Spahlinger. + - Pipes/FIFOs: Add support to allocating different sizes for pipe and + fifo buffers. Adds mkfifo2() and pipe2() which are just like mkfifo() + and pipe(), but allow control of the size of the underlying, in-memory + circular buffer. Move pipe() and mkpipe() to the C library, they are + no longer core OS interfaces. Capability currenty used only by PTY + logic to support, configurable, smaller buffers for PTYs. + + * SYSLOG/Debug Output: + + - SYSLOG: Consolidated all SYSLOG logic in drivers/syslog. Added an + abstraction layer that supports: (1) redirection of SYSLOG outpout. + This is usually so that you can boot with one SYSLOG output but + transition to another SYSLOG output when the OS has initialialized, + (2) adds common serialization of interrupt output as a configuration + option. Without this configuration setting, interrupt level output + will be asynchronous. And (3) vsyslog is now a system call and is + usable with other-than-FLAT builds. + - SYSLOG: syslog() will now automatically redirect output to + lowsyslog() if called from an interrupt handler. + - Extended SYSLOG logic so that we can send SYSLOG output to a file. + - SYSLOG character device channel will now expand LF to CR-LF. + Controllable with a configuration option. + - Add a SYSLOG character device that can be used to re-direct output + to the SYSLOG channel (Not be be confused the the SYSLGO output to a + character device). + - Debug features are now enabled separately from debug output. + (1) CONFIG_DEBUG is gone. It is replaced with CONFIG_DEBUG_FEATURES. + (2) The macros dbg() and vdbg() have renamed as _err() and _info(), + respectively. This also applies to all of the variants as well, + XXdbg() and XXvdbg(). (3) Add a new debug level, _warn() (and + all variants XXwarn(), XXvwarn(), etc.). (4) Debug assertions can + now be enabled separately from debug output. (5) You can now enable + subsystem/device driver debug output at different output levels. For + example, CONFIG_DEBUG_FS no longer enables file system debug output + It enables general file system debug logic and enables selection of + CONFIG_DEBUG_FS_ERROR, CONFIG_DEBUG_FS_WARN, and CONFIG_DEBUG_FS_INFO. + - Since the SYSLOG layer now automatically handles low-level vs. + high-level output, the low-level (ll) variants of the debug macros + were eliminated. + - Reviewed all uses of *err(). These macro family should indicate + only error conditions. Convert *err() to either *info() or add + ERROR:, depending on if an error is reported. + - _alert(): New debug macro: _alert(). This is high priority, + unconditional output and is used to simplify and standardize crash + error reporting. + - Many CONFIG_DEBUG_* options did not have matching macros defined in + include/debug.h. Rather, there were various definitions scattered + throughout the sourse tree. These were collected together and + centralized with single macro definitions in include/debug.h + + * Simulation Platform: + + - Added the simulated QSPI (N25Q) flash to the simulation and extened + flash simulation capabilities to run with MTD drivers based on config + options (currently m25p, sst26 and w25). From Ken Pettit. + + * Atmel SAMV7 Drivers: + + - SPI: SPI-Freq. 40MHz; VARSELECT; hw-features This change adds the + following improvements: + + o Increase the allowed SPI-Frequency from 20 to 40 MHz. + o Correct and rename the "VARSELECT" option This option was + included in the code as "CONFIG_SPI_VARSELECT" but nowhere + defined in a Kconfig file. The change renames it to + "CONFIG_SAMV7_SPI_VARSELECT" and corrects the implementation + according the datasheet of Atmel. In short, this option + switches the processor from "fixed peripheral selection" + (single device) to "variable peripheral selection" (multiple + devices on the bus). + o Add a new Function to the interface to control the timing and + delays of the chip according the ChipSelect lines. This function + can control the delay between the assertion of the ChipSelect and + the first bit, between the last bit and the de-assertion of the + ChipSelect and between two ChipSelects. This is needed to tune + the transfer according the specification of the connected devices. + o Add three "hw-features" for the SAMV7, which controls the behavior + of the ChipSelect: + - force CS inactive after transfer: this forces a (short) de- + assertion of the CS after a transfer, even if more data is + available in time + - force CS active after transfer: this forces the CS to stay + active after a transfer, even if the chip runs out of data. + Btw.: this is a prerequisit to make the LASTXFER bit working + at all. + - escape LASTXFER: this suppresses the LASTXFER bit at the end + of the next transfer. The "escape"-Flag is reset automatically. + + From Frank Benkert + - TWISHS: Driver improvements from Michael Spahlinger. + - GPIO-Driver fixed for Open-Drain Pins: + + o sam_gpioread: Now the actual line level from the pin is read + back. This is extremely important for Open-Drain Pins, which + can be used bidirectionally + o Re-Implemented twi_reset-function and enhanced it so it can be + called from inside the driver (see next point) + o Glitch-Filter: Added a configuration option to enable the twi- + built-in glitch filter + o Added a "Single Master Mode": In EMC Testing the TWI-Bus got + stuck because the TWI-Master detected a Multi-Master access (but + there is no second master). With the option "Single Master" we + detect these events and automatically trigger a twi_reset. We + also do an automatic recovery if a slave got stuck (SDA stays + low). + + With the above changes I²C-Bus reliability in harsh environments (eg. + EMC) is greatly improved. The small change in the GPIO-Driver was + necessary because otherwise you cannot read back the correct line + status of Open-Drain Outputs and this is needed by the twi_reset + function. From Michael Spahlinger + + * NXP Freescale LPC43xx Drivers: + + - EMC: Extend LPC43xx EMC code to support SDRAM on a dynamic memory + interface. From Vytautas Lukenskas. + + * NXP Freescale Kinetis: + + - Kinetis K64: Add basic support for the K64 family. I leveraged the + changes from https://github.com/jmacintyre/nuttx-k64f and merged + into the existing kinetis code with a lot of changes and additions + (like pin multiplexing definitions). + + * NXP Freescale Kinetis Drivers: + + - Add a KinetisUSB device controller driver. Derived from the pic32mx + usb driver, which uses the same usb controller. From kfazz. + - Kinetis pwm support, based on the KL pwm driver. From kfazz. + - Kinetis Ethernet: Add support for the KSZ8081 PHY. + - Kinetis Ethernet: Modified Ethernet driver to try all PHY addresses + and then only fail if the driver cannot find a usable PHY address. + This means that you no longer have to specific the PHY address in + advance. + - Kinetis Ethernet: Add support for CONFIG_NET_NOINTS. The driver no + longer runs the networking at interrupt level but can defer interrupt + work to the high-priority work queue. + + * NXP Freescale Kinetis Boards: + + - Teensy-3.x: Add USB support and a usbnsh configuration. + From kfazz (2016-06). + - Freedom-K64F: Add support for the NXP Freedom-K64F board at 120MHz. + This is primarily the work of Jordan Macintyre. I leveraged this + code from https://github.com/jmacintyre/nuttx-k64f which was, itself, + a leverage from the old K60 TWR configuration. This includes + significant corrections (LEDs, buttons, README, etc) and extensions + and updates to match more recent BSPs. + - Freedom-K64F: Added a configuration that supports networking. + + * STMicro STM32: + + - STM32 F1-4: Added support for the STM32F105R. From Konstantin + Berezenko. + - STM32 F4: Added support for the STM32FF76xxx and STM32FF7xx + families. From David Sidrane. + - STM32 F1-4: Add support for Tickless mode (two timer + implementation). From Max Neklyudov. + - STM32 L4: Add support for tickless OS, and incidentally timers, + PWM, oneshot, free-running.... From ziggurat29. + + * STMicro STM32 Drivers: + + - STM32 F1-4: Add the up_getc() function to STM32 in order to support + the minnsh configuration. From Alan Carvalho de Assis. + - STM32 F7: Add SPI driver. From David Sidrane. + - STM32 F7: Add SPI, I2C, and ADC drivers. From Lok Tep. + - STM32 L4: Add ioctls to set/get CAN bit timing in stm32l4. Add + ioctl hooks to allow future management of can id filters. From + Sebastien Lorquet. + - STM32 L4: Add some CAN mode IOCTL calls. These will be useful for + device autotest when the application boots. They are redundant + with the CONFIG_CAN_LOOPBACK option, which can now just be + interpreted as a default setting. From Sebastien Lorquet. + - STM32 F1-4: Port STM32L4 CAN IOCTLs to STM32. From Sebastien Lorquet. + - STM32 L4: Implementation of loopback IOCTLs. From Sebastien + Lorquet. + - STM32 F7: Added SDMMC1 support for stm32F7 74-75. From Lok Tep. + - STM32 F7: Add USB support. From Lok Tep. + - STM32 F7: Added PWR, RTC, and BBSRAM support for stm32f7. From David + Sidrane. + - STM32 F7: Added STMF7xxx RTC. From David Sidrane. + - STM32 F7: Added STM32F7 DBGMCU. From David Sidrane. + - STM32 L4: Port support for both RX FIFOs from STM32 CAN. From Paul + Alexander Patience. + + * STMicro STM32 Boards: + + - Added a minnsh configuration for the STM32F103-Minimum board. From + Alan Carvalho de Assis . + - Added support for the Nucleo-F767ZI board. From David Sidrane. + - Nucleo-144/Nucleo-F767ZI: Add test for STM32 F7 SPI. From David + Sidrane. + - Nucleo-144: Added SDMMC support to Nucleo-144. From David Sidrane. + - Olimex STM32-E4077: Add support for Olimex STM32 E407 board. From + Mateusz Szafoni. + - Nucleo-144: Added USB OTG device to Nucleo-144. From David Sidrane. + - Nucleo-144: Added bbsram test to Nucleo-144. From David Sidrane. + - STM32F4 Disovery: add CAN support for STM32F4 Discovery. From + Matthias Renner. + - STM32F4 Disovery: added a canard configuration files. From + Matthias Renner. + - STM32F4 Discovery: Add FPU support for ostest for the STM32F4 + Disovery platform. From David Alessio. + - STM32L476 Discovery: Update stm32l476 disco to include init code for + smartfs and nxffs for cases where those fs are included in build. + From ziggurat29. + + * C Library/Header Files: + + - include/assert.h: Check if NDEBUG is defined. From Paul Alexander + Patience. + - assert.h: Define static assert for C++ usage. From Paul Alexander + Patience. + - Add crc64 support. From Paul Alexander Patience. + - hex2bin: Move the portable library portion of apps/system/hex2bin + the C library with the OS internals. It is used in certain internal + boot-loader builds. + - Add raise(). + - libm: This change should significantly improve the performance of + single precision floating point math library functions. The vast + majority of changes have to do with preventing the compiler from + needlessly promoting floats to doubles, performing the calculation + with doubles, only to demote the result to float. These changes only + affect the math lib functions that return float. From David Alessio. + - printf(): If there are no streams, let printf() fall back to use + syslog() for output. + - Move pipe() and mkpipe() to nuttx/libc, they are no + longer core OS interfaces. Capability currenty used only by PTY logi + to support, configurable, smaller buffers for PTYs. + - Move driver-related files from include/nuttx to include/nuttx/drivers. + Move driver related prototypes out of include/nuttx/fs/fs.h and into + new include/drivers/drivers.h. + - include /nuttx/lib: Move library-related files from include/nuttx to + include/nuttx/lib. + + * Build/Configuration System: + + - Custom Board Configuration: Add logic to support custom board + directories that include a Kconfig file. During the context phase + of the build, any Kconfig file in the custom board directory is + copied into configs/dummy, replacing the existing Kconfig file with + the target Kconfig file. + - Remove the includes/apps link to apps/include. It is no longer + used. From Sebastien Lorquet. + + * Tools: + + - tools/tesbuild.sh will now build NxWM configurations. + + * Appplication Build/Configuration System: + + - Change to the way that apps/ Kconfig files are generated in + order to better support reuse of the apps/ directory in NuttX + products. Changes include: Make the full tree use wildcards + make.defs, Add empty preconfig rules to 'leaf' makefiles, Use + directory.mk for recursive dir makefiles, Individual app kconfig + fixes, Recursive Kconfig autogeneration, Add kconfig files for + pcode and tiff, and fix a gitignore rule, From Sébastien Lorquet. + - apps/include directory structure reorganized. There are no longer + any header files in the apps/include/. directory. Rather, sub- + directories were added to match the partitioning of apps/ sub- + directories and the header files were moved into the appropriate + sub-directory. This change is intended to help with some changes + being considered by Sébastien Lorquet. + - Call all includes from to "bla/bla.h". From Sebastien + Lorquet. + - Add apps/include to include path in top-level Make.defs file. + + * Applications: apps/nshlib: + + - Make NSH net-initialization be a configuration option. From Marten + Svanfeld. + - Add NTP client initialization in NSH network startup logic. From + David S. Alessio . + - 'ps' command now prints out the stack usage if stack coloration is + enabled. From Frank Benkert. + - Allow stack usage to be disabled on constrained systems. From David + Sidrane. + + * Applications: apps/netutils: + + - NTP Client: Add retries. From David S. Alessio. + - NTP Client: The NTP client will now optionally use pool.ntp.org as + the NTP server; and reset the retry count upon success -- more robust. + From David Alessio. + - ESP8266: Add logic to set the BAUD rate. From Pierre-noel Bouteville. + - ESP8266: In Kconfig, select ARCH_HAVE_NET when NETUTILS_ESP8266 is + selected. This allows, among other things, support for network debug + output. From Pierre-noel Bouteville. + + * Applications: apps/fsutils: + + - flash_eraseall: IOCTL wrapper for MDCIO_BULKERASE command. Was in + nuttx/drivers/mtd. Moved to apps/fsutils because the call directly into + the OS was incorrect. + + * Applications: apps/canutils: + + - canlib: Basic CAN utility library. From Sebastien Lorquet. + + * Platforms: apps/system: + + - flash_eraseall: Now uses the IOCTL wrapper at apps/fsutils/flash_eraseall. + + * Platforms: apps/platform: + + - Add platform files for Olimex STM32 E407. From Mateusz Szafoni. + + * Applications: apps/examples: + + - apps/examples/canard: Add canard example application. From + Matthias Renner. + - apps/examples/pty_test: PTY test program. From Alan Carvalho de + Assis. + +Works-In-Progress: + + * IEEE802.14.5/6LowPAN. Hooks and framework for this effort were + introduced in NuttX-7.15. Work has continued on this effort on + forks from the main repositories, albeit with many interruptions. + The completion of this wireless feature will postponed until at + least NuttX-7.18. + + * i.MX6 SMP. Partially functional, but there is more that still + needs to be done. + +Bugfixes. Only the most critical bugfixes are listed here (see the +ChangeLog for the complete list of bugfixes and for additional, more +detailed bugfix information): + + * Core OS: + + - semaphores: Need to set errno to EINVAL on errors in sem_post() + and sem_wait(). From Paul Alexander Patience. + + * File System/Block Drivers/MTD Drivers: + + - Several MTD FLASH drivers nullify the freed 'priv' structure and + failed to return NULL as stated in the comments. Result, will + operate on a NULL pointer later. Noted by David Sidrane. + - VFS ioctl(). Per comments from David Sidrane, file_ioctl() should + not return succeed if the ioctl method is not supported. It + probably should return ENOTTY in that case. + - SST26 Driver: Before accessing the sst26 flash, the "Global Unlock" + command must me executed, which I do in the sst26 driver. BUT re- + reading the datasheet, the WREN instruction is required to enable + the execution of this command. This was not done. I have no idea how + the driver currently works except by chance. The writes should never + happen at all, the flash is half-enabled! From Sebastien Lorquet. + - N25Qxx Driver: Alter the notion of 'blocksize' to be equivalent to + 'flash write page size' in order to align with assumptions in the + smartfs driver (at least, maybe other things do as well). Correct a + bug that was previously masked by having blocksize=eraseblocksize + which would cause buffer overflows and delicious hardfaults. + Trivial spelling changes in comments, etc. From ziggurat29. + - SmartFS: Fix a 32-byte memory leak. From Ken Pettit. + - SMART MTD layer: Fixes freesector logic error when sectorsPerBlk=256, + adds DEBUGASSERT for invalid geometry and additional memory debug + logic. Also fixes the dangling pointer on error bug. From Ken + Pettit. + + * Common Drivers: + + - USB CDC/ACM Device Class: cdcacm_unbind leaks write request objects. + This arises due to freeing the bulk IN endpoint before the loop + that frees the requests via cdcasm_freereq. That function checks + the parameters and skips the freeing if either is NULL. Freeing + the bulk IN enpoint will cause the first param to be NULL, thereby + bypassing the free operation. To fix, I moved the release of the + bulk IN endpoint until after to loop (much as was the case for the + OUT and read requests, which did not exhibit the problem). From + ziggurat29. + - Pipes and FIFOs: Add missing configuration for pipe ring buffer + size. From Frank Benkert. + - UART 16550: Handle when CONFIG_SERIAL_UART_ARCH_IOCTL is not + enabled. From Heath Petersen. + - Common Serial Upper Half: Fix a race condition noted by Stefan + Kolb. Between the test if the TX buffer is full and entering a + critical section, bytes may be removed from the TX buffer making + the wait unnecessary. The unnecessary wait is an inefficiency, + but not really a problem. But with USB CDC/ACM it can be a problem + because the entire TX buffer may be emptied when we lose the race. + If that happens that uart_putxmitchar() can hang waiting for data + to be removed from an empty TX buffer. + - USB MSC Device Class: Add locks when removing request from queue. + From Wolfgang Reissnegger. + - USB MSC Device Class: Fix reversed logic on waiting for SCSI thread + start. The scsi thread was waiting for the wrong condition. + However, this was masked by the fact that the code creating the + scsi thread was also holding usbmsc_scsi_lock(priv) while + initializing data, hence this lock synchronized the scsi thread + start with init completion. From Wolfgang Reissnegger. + + * Graphics and Graphic Drivers: + + - Correct conditional compilation in ST7565 LCD driver. From Pierre- + noel Bouteville + + * Networking: + + - In both IPv6 and IPv4 incoming logic: (1) Should check if the + packet size is large enough before trying to access the packet + length in the IP header. (2) In the comparison between the IP + length and the full packet length, need to subtract the size of + he link layer header before making the comparison or we will get + false positives (i.e., the packet is really too small) + - TCP Networking: While working with version 7.10 I discovered a + problem in TCP stack that could be observed on high network load. + Generally speaking, the problem is that RST flag is set in + unnecessary case, in which between loss of some TCP packet and its + proper retransmission, another packets had been successfully sent. + The scenario is as follows: NuttX did not receive ACK for some sent + packet, so it has been probably lost somewhere. But before its + retransmission starts, NuttX is correctly issuing next TCP packets, + with sequence numbers increasing properly. When the retransmission + of previously lost packet finally succeeds, tcp_input receives the + accumulated ACK value, which acknowledges also the packets sent in + the meantime (i.e. between unsuccessful sending of lost packet and + its proper retransmission). However, variable unackseq is still set + to conn->isn + conn->sent, which is truth only if no further + packets transmission occurred in the meantime. Because of incorrect + (in such specific case) unackseq value, few lines further condition + if (ackseq <= unackseq)is not met, and, as a result, we are going to + reset label. From Jakub Lagwa. + + * ARMv7-M: + + - ARM stack check: Fix double fault on IDLE task with stack size = 0. + From David Sidrane. + + * Atmel SAMV7 Drivers: + + - CAN: CAN Message Filtering fixed: (1) stdfilters didn't work because + the filter was never enabled (wrong number of bits to shift), and + (2) Filters were never used because the configuration register + cannot be written without using the initialization mode. Both bugs + are fixed by this change. Filtering has been tested with both + standard and extended identifiers and is now working properly. From + Michael Spahlinger. + + * Atmel SAMA5: + + + * Atmel SAM3/4 Drivers: + + - Fix some errors in AFEC header file. From OrbitalFox. + - DAC: DACC_WPMR_WPKEY_MASK -> DACC_WPMR_WPKEY. From Wolfgang + Reissnegge. + - Timer: Fix ops check in TCIOC_STOP. From Wolfgang Reissnegge. + - I2C: Fix reversed logic in twi_startmessage(). From Wolfgang + Reissnegger. + - SAM3/4 UDP: Fix handling of endpoint RX FIFO banks. This fixes + a race condition where the HW fills a FIFO bank while the SW is + busy, resulting in out of sequence USB packets. + + * Atmel SAMV7 Drivers: + + - USBHS Device: This change solves a problem which causes data loss + while sending data via USB. This problem is caused by an incorrect + handling of the endpoint state in the USB driver sam_usbdevhs. This + leads under some circumstances to situations in which an DMA + transfer is setup while a previous DMA transfer is currently active. + Amongst other things I introduced the new endpoint state + USBHS_EPSTATE_SENDING_DMA for the fix. To reproduce the problem, I + used a program which send as many data as possible via a CDC/ACM + device and verified the received data on the PC. From Stefan Kolb. + + * NXP Freescale Kinetis Drivers: + + - Timers: Support up to 8 channels per timer. From kfazz. + + * NXP Freescale Kinetis Boards: + + - Teensy 3.x clock fixes: The High Gain bit in MCG_C1 was preventing + teensy from booting except after a programming session. The second + change doesn't appear to change any functionality, but complies with + restrictions in the k20 family reference manual on FEI -> FBE clock + transiions. From kfazz. + + * NXP Freescale LPC17xx Drivers: + + - LPC17 Ethernet: Needs to correctly ignore PHYID2 revision number + when comparing PHY IDs. + + * NXP Freescale LPC43xx Drivers: + + - Fix errors in GPIO interrupt logic. From v01d (phreakuencies) + - Ethernet: Correct auto-negotiation mode in the LPC43xx Ethernet. + From Alexander Vasiljev + - Writing zero to NVIC_IRQ_ENABLE has no effect. Disable interrupts + with NVIC_IRQ_CLEAR. From Paul Alexander Patience. + - SPIFI: If CONFIG_SPIFI_SECTOR512 undefined, lpc43_bwrite doesn't do + actual write (probably copy/paste errors). Still not sure about + current state of lpc43_spifi implementation, but for me NXFFS works + with this change. From Vytautas Lukenskas. + + * Qemu-i486: + + - Fix qemu-i486/ostest/Make.defs test for M32. From Heath Petersen. + + * SiLabs EFM32 Drivers: + + - Fix EFM32 FLASH conditional compilation. From Pierre-noel + Bouteville + - Writing zero to NVIC_IRQ_ENABLE has no effect. Disable interrupts + with NVIC_IRQ_CLEAR. From Paul Alexander Patience. + + * STMicro STM32: + + - STM32 F1-F4: In PWM driver, just update duty if frequency is not + changed and PSM started. This removeis glitch or blinking when + only duty is frequently changed. From Pierre-noel Bouteville. + + * STMicro STM32 Drivers: + + - STM32 F7: Fixed STM32F7 DMA stm32_dmacapable. DMA working on SDMMC. + From David Sidrane. + - STM32 F1-F4 Timer Driver: Change calculation of per- timer pre-scaler + value. Add support for all timers + - STM32 F1-F4: Correct conditional compilation in STM32 timer capture + logic. From Pierre-noel Bouteville + - STM32 F1-F4: Fix STM32 DMA code and configuration for STM32F37X chips. + From Marten Svanfeldt. + - STM32 F1-F4: Fix compilation errors in debug mode of stm32_pwm.c. + From Konstantin Berezenko. + - STM32 F1-F4: Correct the CAN2 RX IRQ number for stm32f10xx chips. + From Konstantin Berezenko. + - STM32 F1-F4: Move backup domain reset to to earlier in the + initialization sequence (stm32_rcc.c() in order to avoid disabling + LSE during RTC initialiation. From Alan Carvalho de Assis. + - STM32 F1-F4: When configuring a GPIO via stm32_configgpio() the + function will first set the mode to output and then set the initial + state of the gpio later on. If you have an application with an + externaly pulled-up pin, this would lead to a glitch on the line + that may be dangerous in some applications (e.G. Reset Line for + other chips, etc). This changes sets the output state before + configuring the pin as an output. From Pascal Speck . + - STM32 F7: Apply Pascal Speck's GPIO STM32 change to STM32 L4. + - STM32 L4: Apply Pascal Speck's GPIO STM32 change to STM32 L4. + From Sebastien Lorquet. + - STM32 F7: BUGFIX: PLLs IS2 and SAI P Calculation. From David + Sidrane. + - STM32 L4: STM32 CAN fixes need to be backported to STM32L4 as well. + - STM32 F1-F4 and L4: Writing zero to NVIC_IRQ_ENABLE has no effect. + Disable interrupts with NVIC_IRQ_CLEAR. From Paul Alexander + Patience. + - STM32 F7: STMF7xxx RTC: (1) Remove proxy #defines, (2) Ensure the + LSE(ON) etal are set and remembered in a) A cold start (RTC_MAGIC + invalid) of the RTC, and b) A warm start (RTC_MAGIC valid) of the + RTC but a clock change. The change was needed because in bench + testing a merge of the latest's STM32 53ec3ca (and friends) it + became apparent that the sequence of operation is wrong in the + reset of the Backup Domain in the RCC code. PWR is required before + the Backup Domain can be futzed with. !!!This Code should be tested + on STM32 and if needed rippled to the STM32 families. From David + Sidrane. + - STM32 F1-F4: STM32 BBSRAM fixed (and formatted) flags. From David + Sidrane. + - STM32 F7: STM32F7 BBSRAM fixed (and formatted) flags. From David + Sidrane. + - STM32 L4: Fix incorrect clock setup for LPTIM1. From ziggurat29. + - STM32 F4/L4 RTC ALARM: were enabling interrupts too early in the + power-up sequence, BEFORE the interrupt system was being + initialized. + + * STMicro STM32 Boards: + + - STM32 board.h: Fix STM32 timer input clock definitions. From David + Sidrane. + + * TI Tiva Drivers: + + - Bug Fix in tiva_serial.c - UART5, UART6 and UART7 were not being + configured as TTYS0 for printing over serial console. From Shirshak + Sengupta. + + * C Library/Header Files: + + - include/signal.h: Change type of SIG_ERR, SIG_IGN, ... to + _sa_handler_t. The type void does not work with the IAR toolchain. + From Aleksandr Vyhovanec. + - crc16: fix error. From Paul Alexander Patience. + - strtoul() and strtoull(): Fix errno settings required by function + definition. Resolved Bitbucket Issue #1. From Sebastien Lorquet. + + * Build/Configuration System: + + - Build system: This change fixes a build problem that only occurs + when reconfiguring from Linux to Windows or vice-versa. It is a + problem that was present but not usually experienced until two + things happened: (1) The pre_config target was added to run before + the menconfig operation and (2) the context target was added before + the pre_config target in order to set up the correct symbolic links + (in the apps/platform directory) needed by the pre_config target. + But then now if you start with a Linux system and run 'make + menuconfig' to switch to Linux, the context target will execute + first and set up POSIX style symbolic links before doing the + menuconfig. Then after the menuconfig, the make will fail on + Windows if you are using a Windows native toolchain because that + native toolchain cannot follow the Cygwin- style symbolic links. + The fix here is to also execute the clean_context AFTER executing + menuconfig. A lot more happens now: It used to be that doing + 'make menuconfig' only did the menuconfig operation. Now it does + context, pre_config, menuconfig, clean_context. Not nearly as + snappy as it used to be. + - Need to build the drivers/ directory even it file descriptors are + not supported. There are things in the drivers/ directory that are + still needed (like SYSLOG logic). + - Remove all inclusion of header files from the apps/include + directory from NuttX core logic. There should be no dependency on + logic within NuttX on logic within apps/. This caused a lot of + reshuffling of logic: binfmt pcode support, usbmonitor is now a + kernel thread, TZ/Olson database moved to libc/zoneinfo. + + * Application Build/Configuration System: + + - Make sure that APPNAME is defined in all Makefiles that generate + applications. From Sebastien Lorquet. + + * apps/builtins: + + - apps/builtins: exec_builtin was not using the provided open flags. + As a result >> redirection was not working; it was treated the same + as >. + + * apps/nshlib: + + - apps/nshilib: PS Command: When Priority Inheritance is enabled, the + format of /proc//status changes to show both the current + priority and the thread’s base priority. This messes up the format + of cmd_ps. From David Alessio. + + * apps/netutils: + + - apps/netutils, uIP webserver: Fix a data declaration in a header + file. + + * apps/canutils: + + - apps/canutils/libuavcan: Fix for recent change to STM32 timer + frequency definiitions. + + * apps/examples: + + - apps/examples/alarm: ioctl call was clobbering file descriptor. + - apps/examples/can: Some variables were not declared in all required + cases. From Sebastien Lorquet. + - apps/examples/media: media example was intended to take either a + command line argument, or a compiled-in default value from config. + However, the default was ignored, leading to confusing error + messages. From ziggurat29. diff --git a/TODO b/TODO index bbc8f7657ac..215d21d983e 100644 --- a/TODO +++ b/TODO @@ -1,4 +1,4 @@ -NuttX TODO List (Last updated July 3, 2016) +NuttX TODO List (Last updated July 20, 2016) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This file summarizes known NuttX bugs, limitations, inconsistencies with @@ -447,6 +447,7 @@ o Kernel/Protected Build mkfatfs mkfatfs mkrd ramdisk_register() ping icmp_ping() + mount foreach_mountpoint() The busybox mkfatfs does not involve any OS calls; it does its job by simply opening the block driver (using open/xopen) @@ -818,7 +819,7 @@ o Binary loaders (binfmt/) "Read-Only Data in RAM" at http://nuttx.org/Documentation/NuttXNxFlat.html#limitations). - The newer 4.6.3compiler generated PC relative relocations to the strings: + The newer 4.6.3 compiler generated PC relative relocations to the strings: .L2: .word .LC0-(.LPIC0+4) @@ -1339,6 +1340,8 @@ o Libraries (libc/) UPDATE: 2015-09-01: A fix for the noted problems with asin() has been applied. + 2016-07-30: Numerous fixes and performance improvements from + David Alessio. Status: Open Priority: Low for casual users but clearly high if you need care about @@ -1399,6 +1402,15 @@ o File system / Generic drivers (fs/, drivers/) socket structures. There really should be one array that is a union of file and socket descriptors. Then socket and file descriptors could lie in the same range. + + Another example of how the current implementation limits + functionality: I recently started an implement of the FILEMAX + (using pctl() instead sysctl()). My objective was to be able + to control the number of available file descriptors on a task- + by-task basis. The complexity due to the partitioning of + desciptor space in a range for file descriptors and a range + for socket descriptors made this feature nearly impossible to + implement. Status: Open Priority: Low diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 87282302762..50153eb3cba 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -225,6 +225,7 @@ config ARCH_CHIP_STM32 select ARCH_HAVE_I2CRESET select ARCH_HAVE_HEAPCHECK select ARCH_HAVE_TICKLESS + select ARCH_HAVE_TIMEKEEPING select ARMV7M_HAVE_STACKCHECK ---help--- STMicro STM32 architectures (ARM Cortex-M3/4). diff --git a/arch/arm/include/lpc17xx/lpc176x_irq.h b/arch/arm/include/lpc17xx/lpc176x_irq.h index 248c5c47d66..b844b33d652 100644 --- a/arch/arm/include/lpc17xx/lpc176x_irq.h +++ b/arch/arm/include/lpc17xx/lpc176x_irq.h @@ -147,7 +147,7 @@ * 42 */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ # define LPC17_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrupt set */ # define LPC17_VALID_GPIOINT2 (0x00003ffful) /* GPIO port 2 interrupt set */ diff --git a/arch/arm/include/lpc17xx/lpc178x_irq.h b/arch/arm/include/lpc17xx/lpc178x_irq.h index 76c74904528..52ed1731a5c 100644 --- a/arch/arm/include/lpc17xx/lpc178x_irq.h +++ b/arch/arm/include/lpc17xx/lpc178x_irq.h @@ -166,7 +166,7 @@ * 42 */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ # define LPC17_VALID_GPIOINT0 (0xfffffffful) /* GPIO port 0 interrupt set */ # define LPC17_VALID_GPIOINT2 (0xfffffffful) /* GPIO port 2 interrupt set */ diff --git a/arch/arm/include/samdl/samd20_irq.h b/arch/arm/include/samdl/samd20_irq.h index 01361e8e00e..709fddaeac8 100644 --- a/arch/arm/include/samdl/samd20_irq.h +++ b/arch/arm/include/samdl/samd20_irq.h @@ -81,7 +81,7 @@ /* GPIO interrupts. Up to 16 pins may be configured to support interrupts */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_SAMDL_GPIOIRQ # define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */ # define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */ # define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */ diff --git a/arch/arm/include/samdl/samd21_irq.h b/arch/arm/include/samdl/samd21_irq.h index 2ea4db82579..7b5c633ef62 100644 --- a/arch/arm/include/samdl/samd21_irq.h +++ b/arch/arm/include/samdl/samd21_irq.h @@ -88,7 +88,7 @@ /* GPIO interrupts. Up to 16 pins may be configured to support interrupts */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_SAMDL_GPIOIRQ # define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */ # define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */ # define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */ diff --git a/arch/arm/include/samdl/saml21_irq.h b/arch/arm/include/samdl/saml21_irq.h index 9622a032152..24c774dbd0f 100644 --- a/arch/arm/include/samdl/saml21_irq.h +++ b/arch/arm/include/samdl/saml21_irq.h @@ -89,7 +89,7 @@ /* GPIO interrupts. Up to 16 pins may be configured to support interrupts */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_SAMDL_GPIOIRQ # define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */ # define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */ # define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */ diff --git a/arch/arm/src/armv7-r/arm_doirq.c b/arch/arm/src/armv7-r/arm_doirq.c index fdf392d3384..5d492f5ddc7 100644 --- a/arch/arm/src/armv7-r/arm_doirq.c +++ b/arch/arm/src/armv7-r/arm_doirq.c @@ -52,22 +52,6 @@ #include "group/group.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/up_initialize.c index 6b5117adf1b..a97cd40a92e 100644 --- a/arch/arm/src/common/up_initialize.c +++ b/arch/arm/src/common/up_initialize.c @@ -44,14 +44,16 @@ #include #include #include -#include +#include #include #include #include #include #include #include +#include #include +#include #include @@ -158,21 +160,21 @@ void up_initialize(void) up_irqinitialize(); +#ifdef CONFIG_PM /* Initialize the power management subsystem. This MCU-specific function * must be called *very* early in the initialization sequence *before* any * other device drivers are initialized (since they may attempt to register * with the power management subsystem). */ -#ifdef CONFIG_PM up_pminitialize(); #endif +#ifdef CONFIG_ARCH_DMA /* Initialize the DMA subsystem if the weak function up_dmainitialize has been * brought into the build */ -#ifdef CONFIG_ARCH_DMA #ifdef CONFIG_HAVE_WEAKFUNCTIONS if (up_dmainitialize) #endif @@ -196,6 +198,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -228,22 +238,10 @@ void up_initialize(void) ramlog_consoleinit(); #endif - /* Initialize the HW crypto and /dev/crypto */ +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ -#if defined(CONFIG_CRYPTO) - up_cryptoinitialize(); -#endif - -#if CONFIG_NFILE_DESCRIPTORS > 0 -#if defined(CONFIG_CRYPTO_CRYPTODEV) - devcrypto_register(); -#endif -#endif - - /* Initialize the Random Number Generator (RNG) */ - -#ifdef CONFIG_DEV_RANDOM - up_rnginitialize(); + (void)ptmx_register(); #endif /* Early initialization of the system logging device. Some SYSLOG channel @@ -253,6 +251,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/arch/arm/src/common/up_internal.h b/arch/arm/src/common/up_internal.h index feec4333558..36095a87a45 100644 --- a/arch/arm/src/common/up_internal.h +++ b/arch/arm/src/common/up_internal.h @@ -545,12 +545,6 @@ void up_usbuninitialize(void); # define up_usbuninitialize() #endif -/* Random Number Generator (RNG) ********************************************/ - -#ifdef CONFIG_DEV_RANDOM -void up_rnginitialize(void); -#endif - /* Debug ********************************************************************/ #ifdef CONFIG_STACK_COLORATION void up_stack_color(FAR void *stackbase, size_t nbytes); diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c index 63a82b194ca..db5992dea7b 100644 --- a/arch/arm/src/efm32/efm32_irq.c +++ b/arch/arm/src/efm32/efm32_irq.c @@ -93,10 +93,6 @@ volatile uint32_t *g_current_regs[1]; extern uint32_t _vectors[]; -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -261,15 +257,9 @@ static int efm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, { if (irq < NR_VECTORS) { - n = irq - EFM32_IRQ_INTERRUPTS; + n = irq - EFM32_IRQ_INTERRUPTS; *regaddr = NVIC_IRQ_ENABLE(n) + offset; - - while (n >= 32) - { - n -= 32; - } - - *bit = 1 << n; + *bit = (uint32_t)1 << (n & 0x1f); } else { diff --git a/arch/arm/src/efm32/efm32_pwm.c b/arch/arm/src/efm32/efm32_pwm.c index b34d8aeb2ff..f07a3eed4b7 100644 --- a/arch/arm/src/efm32/efm32_pwm.c +++ b/arch/arm/src/efm32/efm32_pwm.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "up_arch.h" diff --git a/arch/arm/src/efm32/efm32_pwm.h b/arch/arm/src/efm32/efm32_pwm.h index af46c3b6f8b..61e4f5f116d 100644 --- a/arch/arm/src/efm32/efm32_pwm.h +++ b/arch/arm/src/efm32/efm32_pwm.h @@ -39,7 +39,7 @@ /* The EFM32 does not have dedicated PWM hardware. Rather, pulsed output * control is a capability of the EFM32 timers. The logic in this file * implements the lower half of the standard, NuttX PWM interface using the - * EFM32 timers. That interface is described in include/nuttx/pwm.h. + * EFM32 timers. That interface is described in include/nuttx/drivers/pwm.h. */ /**************************************************************************** diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig index 4be634107b2..6028e6470b2 100644 --- a/arch/arm/src/kinetis/Kconfig +++ b/arch/arm/src/kinetis/Kconfig @@ -418,6 +418,9 @@ config KINETIS_PIT endmenu +menu "Kinetis FTM PWM Configuration" + depends on KINETIS_FTM0 || KINETIS_FTM1 || KINETIS_FTM2 + config KINETIS_FTM0_PWM bool "FTM0 PWM" default n @@ -481,14 +484,16 @@ config KINETIS_FTM2_CHANNEL If FTM2 is enabled for PWM usage, you also need specifies the timer output channel {0,..,1} +endmenu # Kinetis FTM PWM Configuration + menu "Kinetis GPIO Interrupt Configuration" -config GPIO_IRQ +config KINETIS_GPIOIRQ bool "GPIO pin interrupts" ---help--- Enable support for interrupting GPIO pins -if GPIO_IRQ +if KINETIS_GPIOIRQ config KINETIS_PORTAINTS bool "GPIOA interrupts" diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs index 662dd618737..9d4ea5083ab 100644 --- a/arch/arm/src/kinetis/Make.defs +++ b/arch/arm/src/kinetis/Make.defs @@ -103,7 +103,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y) CHIP_CSRCS += kinetis_userspace.c kinetis_mpuinit.c endif -ifeq ($(CONFIG_GPIO_IRQ),y) +ifeq ($(CONFIG_KINETIS_GPIOIRQ),y) CHIP_CSRCS += kinetis_pinirq.c endif diff --git a/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h b/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h index 8b00303ef7b..135da475536 100644 --- a/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h +++ b/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h @@ -44,7 +44,7 @@ #include "chip.h" -#ifdef KINETIS_K64 +#ifdef KINETIS_K60 /************************************************************************************ * Pre-processor Definitions @@ -192,5 +192,5 @@ * Public Functions ************************************************************************************/ -#endif /* KINETIS_K64 */ +#endif /* KINETIS_K60 */ #endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H */ diff --git a/arch/arm/src/kinetis/kinetis.h b/arch/arm/src/kinetis/kinetis.h index fccd4b90af7..bb02f01e92c 100644 --- a/arch/arm/src/kinetis/kinetis.h +++ b/arch/arm/src/kinetis/kinetis.h @@ -476,7 +476,7 @@ bool kinetis_gpioread(uint32_t pinset); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KINETIS_GPIOIRQ void kinetis_pinirqinitialize(void); #else # define kinetis_pinirqinitialize() @@ -514,7 +514,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KINETIS_GPIOIRQ void kinetis_pinirqenable(uint32_t pinset); #else # define kinetis_pinirqenable(pinset) @@ -528,7 +528,7 @@ void kinetis_pinirqenable(uint32_t pinset); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KINETIS_GPIOIRQ void kinetis_pinirqdisable(uint32_t pinset); #else # define kinetis_pinirqdisable(pinset) diff --git a/arch/arm/src/kinetis/kinetis_clockconfig.c b/arch/arm/src/kinetis/kinetis_clockconfig.c index 2f703ea96e7..7d3d6ecb22a 100644 --- a/arch/arm/src/kinetis/kinetis_clockconfig.c +++ b/arch/arm/src/kinetis/kinetis_clockconfig.c @@ -39,8 +39,6 @@ #include -#include - #include "up_arch.h" #include "kinetis.h" @@ -50,6 +48,8 @@ #include "chip/kinetis_llwu.h" #include "chip/kinetis_pinmux.h" +#include + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c index d2a04de3ae6..a969bbacd7a 100644 --- a/arch/arm/src/kinetis/kinetis_irq.c +++ b/arch/arm/src/kinetis/kinetis_irq.c @@ -439,7 +439,7 @@ void up_irqinitialize(void) * configured pin interrupts. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KINETIS_GPIOIRQ kinetis_pinirqinitialize(); #endif diff --git a/arch/arm/src/kinetis/kinetis_pinirq.c b/arch/arm/src/kinetis/kinetis_pinirq.c index 919d51e67c9..cc5933e715a 100644 --- a/arch/arm/src/kinetis/kinetis_pinirq.c +++ b/arch/arm/src/kinetis/kinetis_pinirq.c @@ -52,7 +52,7 @@ #include "kinetis.h" #include "chip/kinetis_port.h" -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KINETIS_GPIOIRQ /**************************************************************************** * Pre-processor Definitions @@ -450,4 +450,4 @@ void kinetis_pinirqdisable(uint32_t pinset) } #endif /* HAVE_PORTINTS */ } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_KINETIS_GPIOIRQ */ diff --git a/arch/arm/src/kinetis/kinetis_pwm.c b/arch/arm/src/kinetis/kinetis_pwm.c index 19de382634e..4eea85bd420 100644 --- a/arch/arm/src/kinetis/kinetis_pwm.c +++ b/arch/arm/src/kinetis/kinetis_pwm.c @@ -49,7 +49,7 @@ #include #include -#include +#include #include #include "up_internal.h" @@ -58,7 +58,7 @@ #include "chip.h" #include "kinetis.h" -#include "chip/kinetis_pwm.h" +#include "kinetis_pwm.h" #include "chip/kinetis_gpio.h" #include "chip/kinetis_ftm.h" #include "chip/kinetis_sim.h" diff --git a/arch/arm/src/kl/Kconfig b/arch/arm/src/kl/Kconfig index bfa40491538..7dd13a686b9 100644 --- a/arch/arm/src/kl/Kconfig +++ b/arch/arm/src/kl/Kconfig @@ -345,12 +345,12 @@ config KL_TPM2_CHANNEL comment "Kinetis GPIO Interrupt Configuration" -config GPIO_IRQ +config KL_GPIOIRQ bool "GPIO pin interrupts" ---help--- Enable support for interrupting GPIO pins -if GPIO_IRQ +if KL_GPIOIRQ config KL_PORTAINTS bool "GPIOA interrupts" diff --git a/arch/arm/src/kl/Make.defs b/arch/arm/src/kl/Make.defs index 105d267a73a..d7712f0983c 100644 --- a/arch/arm/src/kl/Make.defs +++ b/arch/arm/src/kl/Make.defs @@ -81,7 +81,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y) CHIP_CSRCS += kl_userspace.c endif -ifeq ($(CONFIG_GPIO_IRQ),y) +ifeq ($(CONFIG_KL_GPIOIRQ),y) CHIP_CSRCS += kl_gpioirq.c endif diff --git a/arch/arm/src/kl/kl_gpio.h b/arch/arm/src/kl/kl_gpio.h index fc2cd7f37e9..0024e676086 100644 --- a/arch/arm/src/kl/kl_gpio.h +++ b/arch/arm/src/kl/kl_gpio.h @@ -386,7 +386,7 @@ xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KL_GPIOIRQ void kl_gpioirqenable(uint32_t pinset); #else # define kl_gpioirqenable(pinset) @@ -400,7 +400,7 @@ void kl_gpioirqenable(uint32_t pinset); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KL_GPIOIRQ void kl_gpioirqdisable(uint32_t pinset); #else # define kl_gpioirqdisable(pinset) diff --git a/arch/arm/src/kl/kl_gpioirq.c b/arch/arm/src/kl/kl_gpioirq.c index 2b481bce3a2..61331343ccd 100644 --- a/arch/arm/src/kl/kl_gpioirq.c +++ b/arch/arm/src/kl/kl_gpioirq.c @@ -51,7 +51,7 @@ #include "chip/kl_port.h" #include "kl_gpio.h" -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KL_GPIOIRQ /**************************************************************************** * Pre-processor Definitions @@ -396,4 +396,4 @@ void kl_gpioirqdisable(uint32_t pinset) } #endif /* HAVE_PORTINTS */ } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_KL_GPIOIRQ */ diff --git a/arch/arm/src/kl/kl_irq.c b/arch/arm/src/kl/kl_irq.c index b37f7afe1c9..94628f26bf7 100644 --- a/arch/arm/src/kl/kl_irq.c +++ b/arch/arm/src/kl/kl_irq.c @@ -248,7 +248,7 @@ void up_irqinitialize(void) * configured pin interrupts. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_KL_GPIOIRQ kl_gpioirqinitialize(); #endif diff --git a/arch/arm/src/kl/kl_pwm.c b/arch/arm/src/kl/kl_pwm.c index 6f3f6e40503..a34aa0f8175 100644 --- a/arch/arm/src/kl/kl_pwm.c +++ b/arch/arm/src/kl/kl_pwm.c @@ -48,7 +48,7 @@ #include #include -#include +#include #include #include "up_internal.h" diff --git a/arch/arm/src/kl/kl_pwm.h b/arch/arm/src/kl/kl_pwm.h index f9afbcd7800..5b64e40967b 100644 --- a/arch/arm/src/kl/kl_pwm.h +++ b/arch/arm/src/kl/kl_pwm.h @@ -90,13 +90,13 @@ # elif CONFIG_KL_TPM0_CHANNEL == 1 # define PWM_TPM0_PINCFG GPIO_TPM0_CH1OUT # elif CONFIG_KL_TPM0_CHANNEL == 2 -# define PWM_TPM0_PINCFG GPIO_TPM1_CH2OUT +# define PWM_TPM0_PINCFG GPIO_TPM0_CH2OUT # elif CONFIG_KL_TPM0_CHANNEL == 3 -# define PWM_TPM0_PINCFG GPIO_TPM1_CH3OUT +# define PWM_TPM0_PINCFG GPIO_TPM0_CH3OUT # elif CONFIG_KL_TPM0_CHANNEL == 4 -# define PWM_TPM0_PINCFG GPIO_TPM1_CH4OUT +# define PWM_TPM0_PINCFG GPIO_TPM0_CH4OUT # elif CONFIG_KL_TPM0_CHANNEL == 5 -# define PWM_TPM0_PINCFG GPIO_TPM1_CH5OUT +# define PWM_TPM0_PINCFG GPIO_TPM0_CH5OUT # else # error "Unsupported value of CONFIG_KL_TPM1_CHANNEL" # endif diff --git a/arch/arm/src/lpc11xx/Kconfig b/arch/arm/src/lpc11xx/Kconfig index 31a9711cf07..33ab254958b 100644 --- a/arch/arm/src/lpc11xx/Kconfig +++ b/arch/arm/src/lpc11xx/Kconfig @@ -237,7 +237,7 @@ config CAN_REGDEBUG endmenu -config GPIO_IRQ +config LPC11_GPIOIRQ bool "GPIO interrupt support" default n ---help--- diff --git a/arch/arm/src/lpc11xx/Make.defs b/arch/arm/src/lpc11xx/Make.defs index 041419c2488..a347d99946d 100644 --- a/arch/arm/src/lpc11xx/Make.defs +++ b/arch/arm/src/lpc11xx/Make.defs @@ -84,7 +84,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y) CHIP_CSRCS += lpc11_userspace.c endif -ifeq ($(CONFIG_GPIO_IRQ),y) +ifeq ($(CONFIG_LPC11_GPIOIRQ),y) CHIP_CSRCS += lpc11_gpioint.c endif diff --git a/arch/arm/src/lpc11xx/lpc111x_gpio.c b/arch/arm/src/lpc11xx/lpc111x_gpio.c index 6a0718e11d7..cba1ee71734 100644 --- a/arch/arm/src/lpc11xx/lpc111x_gpio.c +++ b/arch/arm/src/lpc11xx/lpc111x_gpio.c @@ -79,7 +79,7 @@ * actually set up to interrupt until the interrupt is enabled. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ uint64_t g_intedge0; uint64_t g_intedge2; #endif @@ -295,7 +295,7 @@ static int lpc11_pullup(lpc11_pinset_t cfgset, unsigned int port, * ****************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ static void lpc11_setintedge(unsigned int port, unsigned int pin, unsigned int value) { @@ -323,7 +323,7 @@ static void lpc11_setintedge(unsigned int port, unsigned int pin, *intedge &= ~((uint64_t)3 << shift); *intedge |= ((uint64_t)value << shift); } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_LPC11_GPIOIRQ */ /**************************************************************************** * Name: lpc11_setopendrain @@ -453,7 +453,7 @@ static inline int lpc11_configinput(lpc11_pinset_t cfgset, unsigned int port, /* Forget about any falling/rising edge interrupt enabled */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ lpc11_setintedge(port, pin, 0); #endif } @@ -495,7 +495,7 @@ static inline int lpc11_configinterrupt(lpc11_pinset_t cfgset, unsigned int port /* Then just remember the rising/falling edge interrupt enabled */ DEBUGASSERT(port == 0 || port == 2); -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ lpc11_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT); #endif return OK; diff --git a/arch/arm/src/lpc11xx/lpc11_gpio.h b/arch/arm/src/lpc11xx/lpc11_gpio.h index a0e1c2d8990..f77b748613e 100644 --- a/arch/arm/src/lpc11xx/lpc11_gpio.h +++ b/arch/arm/src/lpc11xx/lpc11_gpio.h @@ -88,7 +88,7 @@ extern "C" * lpc11_gpioint.c, and lpc11_gpiodbg.c */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ EXTERN uint64_t g_intedge0; EXTERN uint64_t g_intedge2; #endif @@ -108,7 +108,7 @@ EXTERN const uint32_t g_intbase[GPIO_NPORTS]; * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ void lpc11_gpioirqinitialize(void); #else # define lpc11_gpioirqinitialize() @@ -152,7 +152,7 @@ bool lpc11_gpioread(lpc11_pinset_t pinset); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ void lpc11_gpioirqenable(int irq); #else # define lpc11_gpioirqenable(irq) @@ -166,7 +166,7 @@ void lpc11_gpioirqenable(int irq); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ void lpc11_gpioirqdisable(int irq); #else # define lpc11_gpioirqdisable(irq) diff --git a/arch/arm/src/lpc11xx/lpc11_gpioint.c b/arch/arm/src/lpc11xx/lpc11_gpioint.c index 4ce6b48c9ed..8aaefed1497 100644 --- a/arch/arm/src/lpc11xx/lpc11_gpioint.c +++ b/arch/arm/src/lpc11xx/lpc11_gpioint.c @@ -51,7 +51,7 @@ #include "chip.h" #include "lpc11_gpio.h" -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ /**************************************************************************** * Pre-processor Definitions @@ -543,5 +543,5 @@ void lpc11_gpioirqdisable(int irq) } } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_LPC11_GPIOIRQ */ diff --git a/arch/arm/src/lpc11xx/lpc11_irq.c b/arch/arm/src/lpc11xx/lpc11_irq.c index f861943bc0a..4399c582003 100644 --- a/arch/arm/src/lpc11xx/lpc11_irq.c +++ b/arch/arm/src/lpc11xx/lpc11_irq.c @@ -244,7 +244,7 @@ void up_irqinitialize(void) * configured pin interrupts. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ lpc11_gpioirqinitialize(); #endif diff --git a/arch/arm/src/lpc11xx/lpc11_timer.c b/arch/arm/src/lpc11xx/lpc11_timer.c index e742dc2de0b..a9ce65a073a 100644 --- a/arch/arm/src/lpc11xx/lpc11_timer.c +++ b/arch/arm/src/lpc11xx/lpc11_timer.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "up_internal.h" diff --git a/arch/arm/src/lpc17xx/Kconfig b/arch/arm/src/lpc17xx/Kconfig index abfd205fedc..5038000d865 100644 --- a/arch/arm/src/lpc17xx/Kconfig +++ b/arch/arm/src/lpc17xx/Kconfig @@ -604,7 +604,7 @@ config LPC17_CAN_REGDEBUG endmenu -config GPIO_IRQ +config LPC17_GPIOIRQ bool "GPIO interrupt support" default n ---help--- diff --git a/arch/arm/src/lpc17xx/Make.defs b/arch/arm/src/lpc17xx/Make.defs index 919f70e7579..f1dd3cde114 100644 --- a/arch/arm/src/lpc17xx/Make.defs +++ b/arch/arm/src/lpc17xx/Make.defs @@ -133,7 +133,7 @@ ifeq ($(CONFIG_LPC17_EMC),y) CHIP_CSRCS += lpc17_emc.c endif -ifeq ($(CONFIG_GPIO_IRQ),y) +ifeq ($(CONFIG_LPC17_GPIOIRQ),y) CHIP_CSRCS += lpc17_gpioint.c endif diff --git a/arch/arm/src/lpc17xx/lpc176x_gpio.c b/arch/arm/src/lpc17xx/lpc176x_gpio.c index 7de2fd04bcc..b2b8e9805ab 100644 --- a/arch/arm/src/lpc17xx/lpc176x_gpio.c +++ b/arch/arm/src/lpc17xx/lpc176x_gpio.c @@ -78,7 +78,7 @@ * actually set up to interrupt until the interrupt is enabled. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ uint64_t g_intedge0; uint64_t g_intedge2; #endif @@ -300,7 +300,7 @@ static int lpc17_pullup(lpc17_pinset_t cfgset, unsigned int port, * ****************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ static void lpc17_setintedge(unsigned int port, unsigned int pin, unsigned int value) { @@ -328,7 +328,7 @@ static void lpc17_setintedge(unsigned int port, unsigned int pin, *intedge &= ~((uint64_t)3 << shift); *intedge |= ((uint64_t)value << shift); } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_LPC17_GPIOIRQ */ /**************************************************************************** * Name: lpc17_setopendrain @@ -412,7 +412,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un /* Forget about any falling/rising edge interrupt enabled */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ lpc17_setintedge(port, pin, 0); #endif } @@ -453,7 +453,7 @@ static inline int lpc17_configinterrupt(lpc17_pinset_t cfgset, unsigned int port /* Then just remember the rising/falling edge interrupt enabled */ DEBUGASSERT(port == 0 || port == 2); -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ lpc17_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT); #endif return OK; diff --git a/arch/arm/src/lpc17xx/lpc178x_gpio.c b/arch/arm/src/lpc17xx/lpc178x_gpio.c index a30b7d42558..a6892d597f6 100644 --- a/arch/arm/src/lpc17xx/lpc178x_gpio.c +++ b/arch/arm/src/lpc17xx/lpc178x_gpio.c @@ -79,7 +79,7 @@ * actually set up to interrupt until the interrupt is enabled. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ uint64_t g_intedge0; uint64_t g_intedge2; #endif @@ -526,7 +526,7 @@ static void lpc17_setpullup(lpc17_pinset_t cfgset, unsigned int port, * ****************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ static void lpc17_setintedge(unsigned int port, unsigned int pin, unsigned int value) { @@ -554,7 +554,7 @@ static void lpc17_setintedge(unsigned int port, unsigned int pin, *intedge &= ~((uint64_t)3 << shift); *intedge |= ((uint64_t)value << shift); } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_LPC17_GPIOIRQ */ /**************************************************************************** * Name: lpc17_configinput @@ -601,7 +601,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, /* Forget about any falling/rising edge interrupt enabled */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ lpc17_setintedge(port, pin, 0); #endif } @@ -656,7 +656,7 @@ static inline int lpc17_configinterrupt(lpc17_pinset_t cfgset, unsigned int port /* Then just remember the rising/falling edge interrupt enabled */ DEBUGASSERT(port == 0 || port == 2); -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ lpc17_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT); #endif return OK; diff --git a/arch/arm/src/lpc17xx/lpc17_can.c b/arch/arm/src/lpc17xx/lpc17_can.c index f25de325b9f..f961bef5493 100644 --- a/arch/arm/src/lpc17xx/lpc17_can.c +++ b/arch/arm/src/lpc17xx/lpc17_can.c @@ -57,7 +57,7 @@ #include #include #include -#include +#include #include "up_internal.h" #include "up_arch.h" diff --git a/arch/arm/src/lpc17xx/lpc17_gpio.h b/arch/arm/src/lpc17xx/lpc17_gpio.h index 1129a26235d..6aab5b9f84c 100644 --- a/arch/arm/src/lpc17xx/lpc17_gpio.h +++ b/arch/arm/src/lpc17xx/lpc17_gpio.h @@ -89,7 +89,7 @@ extern "C" * lpc17_gpioint.c, and lpc17_gpiodbg.c */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ EXTERN uint64_t g_intedge0; EXTERN uint64_t g_intedge2; #endif @@ -109,7 +109,7 @@ EXTERN const uint32_t g_intbase[GPIO_NPORTS]; * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ void lpc17_gpioirqinitialize(void); #else # define lpc17_gpioirqinitialize() @@ -153,7 +153,7 @@ bool lpc17_gpioread(lpc17_pinset_t pinset); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ void lpc17_gpioirqenable(int irq); #else # define lpc17_gpioirqenable(irq) @@ -167,7 +167,7 @@ void lpc17_gpioirqenable(int irq); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ void lpc17_gpioirqdisable(int irq); #else # define lpc17_gpioirqdisable(irq) diff --git a/arch/arm/src/lpc17xx/lpc17_gpioint.c b/arch/arm/src/lpc17xx/lpc17_gpioint.c index 46acb05e6fa..0c1ca613625 100644 --- a/arch/arm/src/lpc17xx/lpc17_gpioint.c +++ b/arch/arm/src/lpc17xx/lpc17_gpioint.c @@ -51,7 +51,7 @@ #include "chip.h" #include "lpc17_gpio.h" -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ /**************************************************************************** * Pre-processor Definitions @@ -543,4 +543,4 @@ void lpc17_gpioirqdisable(int irq) } } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_LPC17_GPIOIRQ */ diff --git a/arch/arm/src/lpc17xx/lpc17_irq.c b/arch/arm/src/lpc17xx/lpc17_irq.c index 44d149c7342..ac8fb8855cd 100644 --- a/arch/arm/src/lpc17xx/lpc17_irq.c +++ b/arch/arm/src/lpc17xx/lpc17_irq.c @@ -412,7 +412,7 @@ void up_irqinitialize(void) * GPIO pins. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ lpc17_gpioirqinitialize(); #endif @@ -456,7 +456,7 @@ void up_disable_irq(int irq) putreg32(regval, regaddr); } } -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ else if (irq >= LPC17_VALID_FIRST0L) { /* Maybe it is a (derived) GPIO IRQ */ @@ -501,7 +501,7 @@ void up_enable_irq(int irq) putreg32(regval, regaddr); } } -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ else if (irq >= LPC17_VALID_FIRST0L) { /* Maybe it is a (derived) GPIO IRQ */ diff --git a/arch/arm/src/lpc17xx/lpc17_mcpwm.c b/arch/arm/src/lpc17xx/lpc17_mcpwm.c index be526964c4a..db0d1a9d67d 100644 --- a/arch/arm/src/lpc17xx/lpc17_mcpwm.c +++ b/arch/arm/src/lpc17xx/lpc17_mcpwm.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "up_internal.h" diff --git a/arch/arm/src/lpc17xx/lpc17_pwm.c b/arch/arm/src/lpc17xx/lpc17_pwm.c index dc073fc1a73..c284934570c 100644 --- a/arch/arm/src/lpc17xx/lpc17_pwm.c +++ b/arch/arm/src/lpc17xx/lpc17_pwm.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "up_internal.h" diff --git a/arch/arm/src/lpc17xx/lpc17_timer.c b/arch/arm/src/lpc17xx/lpc17_timer.c index 9278578b678..434f416021f 100644 --- a/arch/arm/src/lpc17xx/lpc17_timer.c +++ b/arch/arm/src/lpc17xx/lpc17_timer.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "up_internal.h" diff --git a/arch/arm/src/lpc43xx/Kconfig b/arch/arm/src/lpc43xx/Kconfig index e7f830ed2ba..80da35c00ca 100644 --- a/arch/arm/src/lpc43xx/Kconfig +++ b/arch/arm/src/lpc43xx/Kconfig @@ -81,36 +81,43 @@ config ARCH_FAMILY_LPC4320 bool default y if ARCH_CHIP_LPC4320FBD144 || ARCH_CHIP_LPC4320FET100 select ARCH_HAVE_TICKLESS + select ARCH_HAVE_AHB_SRAM_BANK1 config ARCH_FAMILY_LPC4330 bool default y if ARCH_CHIP_LPC4330FBD144 || ARCH_CHIP_LPC4330FET100 || ARCH_CHIP_LPC4330FET180 || ARCH_CHIP_LPC4330FET256 || ARCH_CHIP_LPC4337JET100 select ARCH_HAVE_TICKLESS + select ARCH_HAVE_AHB_SRAM_BANK1 config ARCH_FAMILY_LPC4337 bool default y if ARCH_CHIP_LPC4337JBD144 select ARCH_HAVE_TICKLESS + select ARCH_HAVE_AHB_SRAM_BANK1 config ARCH_FAMILY_LPC4350 bool default y if ARCH_CHIP_LPC4350FBD208 || ARCH_CHIP_LPC4350FET180 || ARCH_CHIP_LPC4350FET256 select ARCH_HAVE_TICKLESS + select ARCH_HAVE_AHB_SRAM_BANK1 config ARCH_FAMILY_LPC4353 bool default y if ARCH_CHIP_LPC4353FBD208 || ARCH_CHIP_LPC4353FET180 || ARCH_CHIP_LPC4353FET256 select ARCH_HAVE_TICKLESS + select ARCH_HAVE_AHB_SRAM_BANK1 config ARCH_FAMILY_LPC4357 bool default y if ARCH_CHIP_LPC4357FET180 || ARCH_CHIP_LPC4357FBD208 || ARCH_CHIP_LPC4357FET256 select ARCH_HAVE_TICKLESS + select ARCH_HAVE_AHB_SRAM_BANK1 config ARCH_FAMILY_LPC4370 bool default y if ARCH_CHIP_LPC4370FET100 select ARCH_HAVE_TICKLESS + select ARCH_HAVE_AHB_SRAM_BANK1 choice prompt "LPC43XX Boot Configuration" @@ -177,9 +184,15 @@ config LPC43_DAC config LPC43_EMC bool "External Memory Controller (EMC)" default n + select ARCH_HAVE_EXTSDRAM0 + select ARCH_HAVE_EXTSDRAM1 + select ARCH_HAVE_EXTSDRAM2 + select ARCH_HAVE_EXTSDRAM3 config LPC43_ETHERNET bool "Ethernet" + select NETDEVICES + select ARCH_HAVE_PHY default n config LPC43_EVNTMNTR @@ -320,6 +333,158 @@ config LPC43_GPIO_IRQ ---help--- Enable support for GPIO interrupts +menu "Internal Memory Configuration" + +config ARCH_HAVE_AHB_SRAM_BANK1 + bool + +if !LPC43_BOOT_SRAM + +config LPC43_USE_LOCSRAM_BANK1 + bool "Use local SRAM bank 1 memory region" + default n + ---help--- + Add local SRAM bank 1 memory region. + +endif # LPC43_BOOT_SRAM + +config LPC43_USE_AHBSRAM_BANK0 + bool "Use AHB SRAM bank 0 memory region" + default n + ---help--- + Add local AHB SRAM bank 0 memory region. + +config LPC43_USE_AHBSRAM_BANK1 + bool "Use AHB SRAM bank 1 memory region" + default n + depends on ARCH_HAVE_AHB_SRAM_BANK1 + ---help--- + Add local AHB SRAM bank 1 memory region. + +config LPC43_HEAP_AHBSRAM_BANK2 + bool "Use AHB SRAM bank 2 (ETB SRAM) memory region" + default n + ---help--- + Add local AHB SRAM bank 2 (ETB SRAM) memory region. + +endmenu # LPC43xx Internal Memory Configuration + +menu "External Memory Configuration" + +config ARCH_HAVE_EXTSDRAM0 + bool + +config ARCH_HAVE_EXTSDRAM1 + bool + +config ARCH_HAVE_EXTSDRAM2 + bool + +config ARCH_HAVE_EXTSDRAM3 + bool + +config LPC43_EXTSDRAM0 + bool "Configure external SDRAM0 (on DYNCS0)" + default n + depends on ARCH_HAVE_EXTSDRAM0 + select ARCH_HAVE_EXTSDRAM + ---help--- + Configure external SDRAM memory and, if applicable, map then external + SDRAM into the memory map. + +if LPC43_EXTSDRAM0 + +config LPC43_EXTSDRAM0_SIZE + int "External SDRAM0 size" + default 0 + ---help--- + Size of the external SDRAM on DYNCS0 in bytes. + +config LPC43_EXTSDRAM0_HEAP + bool "Add external SDRAM on DYNCS0 to the heap" + default y + ---help--- + Add the external SDRAM on DYNCS0 into the heap. + +endif # LCP43_EXTSDRAM0 + +config LPC43_EXTSDRAM1 + bool "Configure external SDRAM1 (on DYNCS1)" + default n + depends on ARCH_HAVE_EXTSDRAM1 + select ARCH_HAVE_EXTSDRAM + ---help--- + Configure external SDRAM memoryand, if applicable, map then external + SDRAM into the memory map. + +if LPC43_EXTSDRAM1 + +config LPC43_EXTSDRAM1_SIZE + int "External SDRAM1 size" + default 0 + ---help--- + Size of the external SDRAM on DYNCS1 in bytes. + +config LPC43_EXTSDRAM1_HEAP + bool "Add external SDRAM on DYNCS1 to the heap" + default y + ---help--- + Add the external SDRAM on DYNCS1 into the heap. + +endif # LCP43_EXTSDRAM1 + +config LPC43_EXTSDRAM2 + bool "Configure external SDRAM2 (on DYNCS2)" + default n + depends on ARCH_HAVE_EXTSDRAM2 + select ARCH_HAVE_EXTSDRAM + ---help--- + Configure external SDRAM memoryand, if applicable, map then external + SDRAM into the memory map. + +if LPC43_EXTSDRAM2 + +config LPC43_EXTSDRAM2_SIZE + int "External SDRAM2 size" + default 0 + ---help--- + Size of the external SDRAM on DYNCS2 in bytes. + +config LPC43_EXTSDRAM2_HEAP + bool "Add external SDRAM on DYNCS2 to the heap" + default y + ---help--- + Add the external SDRAM on DYNCS2 into the heap. + +endif # LCP43_EXTSDRAM2 + +config LPC43_EXTSDRAM3 + bool "Configure external SDRAM3 (on DYNCS3)" + default n + depends on ARCH_HAVE_EXTSDRAM3 + select ARCH_HAVE_EXTSDRAM + ---help--- + Configure external SDRAM memoryand, if applicable, map then external + SDRAM into the memory map. + +if LPC43_EXTSDRAM3 + +config LPC43_EXTSDRAM3_SIZE + int "External SDRAM3 size" + default 0 + ---help--- + Size of the external SDRAM in bytes. + +config LPC43_EXTSDRAM3_HEAP + bool "Add external SDRAM on DYNCS3 to the heap" + default y + ---help--- + Add the external SDRAM on DYNCS3 into the heap. + +endif # LCP43_EXTSDRAM3 + +endmenu # External Memory Configuration + if LPC43_ETHERNET menu "Ethernet MAC configuration" diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs index 6e5d7ef3a78..79ddaa4a022 100644 --- a/arch/arm/src/lpc43xx/Make.defs +++ b/arch/arm/src/lpc43xx/Make.defs @@ -126,6 +126,10 @@ ifeq ($(CONFIG_LPC43_ETHERNET),y) CHIP_CSRCS += lpc43_ethernet.c endif +ifeq ($(CONFIG_LPC43_EMC),y) +CHIP_CSRCS += lpc43_emc.c +endif + ifeq ($(CONFIG_LPC43_SPI),y) CHIP_CSRCS += lpc43_spi.c else diff --git a/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h b/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h index 1b8312c965f..852bd2a862e 100644 --- a/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h +++ b/arch/arm/src/lpc43xx/chip/lpc435357_memorymap.h @@ -90,6 +90,8 @@ /* AHB SRAM */ #define LPC43_AHBSRAM_BANK0_BASE (LPC43_AHBSRAM_BASE) +#define LPC43_AHBSRAM_BANK1_BASE (LPC43_AHBSRAM_BASE + 0x00008000) +#define LPC43_AHBSRAM_BANK2_BASE (LPC43_AHBSRAM_BASE + 0x0000c000) #define LPC43_EEPROM_BASE (LPC43_AHBSRAM_BASE + 0x00004000) #define LPC43_AHBSRAM_BITBAND_BASE (LPC43_AHBSRAM_BASE + 0x02000000) diff --git a/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h b/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h index b29722479a3..41a5d939540 100644 --- a/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h +++ b/arch/arm/src/lpc43xx/chip/lpc4357fet256_pinconfig.h @@ -190,86 +190,86 @@ #define PINCONF_CTOUT15_2 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_0) #define PINCONF_CTOUT15_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_11) -#define PINCONF_EMC_A0 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_9) -#define PINCONF_EMC_A1 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_10) -#define PINCONF_EMC_A2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_11) -#define PINCONF_EMC_A3 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_12) -#define PINCONF_EMC_A4 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_13) -#define PINCONF_EMC_A5 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_0) -#define PINCONF_EMC_A6 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_1) -#define PINCONF_EMC_A7 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_2) -#define PINCONF_EMC_A8 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_8) -#define PINCONF_EMC_A9 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_7) -#define PINCONF_EMC_A10 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_6) -#define PINCONF_EMC_A11 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_2) -#define PINCONF_EMC_A12 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_1) -#define PINCONF_EMC_A13 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_0) -#define PINCONF_EMC_A14 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_8) -#define PINCONF_EMC_A15 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_7) -#define PINCONF_EMC_A16 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_16) -#define PINCONF_EMC_A17 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_15) -#define PINCONF_EMC_A18 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_0) -#define PINCONF_EMC_A19 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_1) -#define PINCONF_EMC_A20 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_2) -#define PINCONF_EMC_A21 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_3) -#define PINCONF_EMC_A22 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_4) -#define PINCONF_EMC_A23 (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_4) -#define PINCONF_EMC_BLS0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_4) -#define PINCONF_EMC_BLS1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_6) -#define PINCONF_EMC_BLS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_13) -#define PINCONF_EMC_BLS3 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_10) -#define PINCONF_EMC_CAS (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_4) -#define PINCONF_EMC_CKEOUT0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_11) -#define PINCONF_EMC_CKEOUT1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_2) -#define PINCONF_EMC_CKEOUT2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_1) -#define PINCONF_EMC_CKEOUT3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_15) -#define PINCONF_EMC_CS0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_5) -#define PINCONF_EMC_CS1 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_3) -#define PINCONF_EMC_CS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_12) -#define PINCONF_EMC_CS3 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_11) -#define PINCONF_EMC_D0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_7) -#define PINCONF_EMC_D1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_8) -#define PINCONF_EMC_D2 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_9) -#define PINCONF_EMC_D3 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_10) -#define PINCONF_EMC_D4 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_11) -#define PINCONF_EMC_D5 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_12) -#define PINCONF_EMC_D6 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_13) -#define PINCONF_EMC_D7 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_14) -#define PINCONF_EMC_D8 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_4) -#define PINCONF_EMC_D9 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_5) -#define PINCONF_EMC_D10 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_6) -#define PINCONF_EMC_D11 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_7) -#define PINCONF_EMC_D12 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_0) -#define PINCONF_EMC_D13 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_1) -#define PINCONF_EMC_D14 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_2) -#define PINCONF_EMC_D15 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_3) -#define PINCONF_EMC_D16 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_2) -#define PINCONF_EMC_D17 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_3) -#define PINCONF_EMC_D18 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_4) -#define PINCONF_EMC_D19 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_5) -#define PINCONF_EMC_D20 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_6) -#define PINCONF_EMC_D21 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_7) -#define PINCONF_EMC_D22 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_8) -#define PINCONF_EMC_D23 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_9) -#define PINCONF_EMC_D24 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_5) -#define PINCONF_EMC_D25 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_6) -#define PINCONF_EMC_D26 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_7) -#define PINCONF_EMC_D27 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_8) -#define PINCONF_EMC_D28 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_9) -#define PINCONF_EMC_D29 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_10) -#define PINCONF_EMC_D30 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_11) -#define PINCONF_EMC_D31 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_12) -#define PINCONF_EMC_DQMOUT0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_12) -#define PINCONF_EMC_DQMOUT1 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_10) -#define PINCONF_EMC_DQMOUT2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_0) -#define PINCONF_EMC_DQMOUT3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_13) -#define PINCONF_EMC_DYCS0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_9) -#define PINCONF_EMC_DYCS1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_1) -#define PINCONF_EMC_DYCS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_14) -#define PINCONF_EMC_DYCS3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_14) -#define PINCONF_EMC_OE (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_3) -#define PINCONF_EMC_RAS (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_5) -#define PINCONF_EMC_WE (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_6) +#define PINCONF_EMC_A0 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_9) +#define PINCONF_EMC_A1 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_10) +#define PINCONF_EMC_A2 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_11) +#define PINCONF_EMC_A3 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_12) +#define PINCONF_EMC_A4 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_13) +#define PINCONF_EMC_A5 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_0) +#define PINCONF_EMC_A6 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_1) +#define PINCONF_EMC_A7 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_2) +#define PINCONF_EMC_A8 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_8) +#define PINCONF_EMC_A9 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_7) +#define PINCONF_EMC_A10 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_EMC_A11 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_EMC_A12 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_EMC_A13 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_EMC_A14 (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_8) +#define PINCONF_EMC_A15 (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_7) +#define PINCONF_EMC_A16 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_16) +#define PINCONF_EMC_A17 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_15) +#define PINCONF_EMC_A18 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_0) +#define PINCONF_EMC_A19 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_1) +#define PINCONF_EMC_A20 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_2) +#define PINCONF_EMC_A21 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_3) +#define PINCONF_EMC_A22 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_4) +#define PINCONF_EMC_A23 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSA|PINCONF_PIN_4) +#define PINCONF_EMC_BLS0 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_EMC_BLS1 (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_6) +#define PINCONF_EMC_BLS2 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_13) +#define PINCONF_EMC_BLS3 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_10) +#define PINCONF_EMC_CAS (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_4) +#define PINCONF_EMC_CKEOUT0 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_11) +#define PINCONF_EMC_CKEOUT1 (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_EMC_CKEOUT2 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_1) +#define PINCONF_EMC_CKEOUT3 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_15) +#define PINCONF_EMC_CS0 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_5) +#define PINCONF_EMC_CS1 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_3) +#define PINCONF_EMC_CS2 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_12) +#define PINCONF_EMC_CS3 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_11) +#define PINCONF_EMC_D0 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_EMC_D1 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_EMC_D2 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_EMC_D3 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_EMC_D4 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_11) +#define PINCONF_EMC_D5 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_EMC_D6 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_EMC_D7 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_EMC_D8 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_EMC_D9 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_EMC_D10 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_6) +#define PINCONF_EMC_D11 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_7) +#define PINCONF_EMC_D12 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_EMC_D13 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_EMC_D14 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_EMC_D15 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_EMC_D16 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_2) +#define PINCONF_EMC_D17 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_3) +#define PINCONF_EMC_D18 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_4) +#define PINCONF_EMC_D19 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_5) +#define PINCONF_EMC_D20 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_6) +#define PINCONF_EMC_D21 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_7) +#define PINCONF_EMC_D22 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_8) +#define PINCONF_EMC_D23 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_9) +#define PINCONF_EMC_D24 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_5) +#define PINCONF_EMC_D25 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_6) +#define PINCONF_EMC_D26 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_7) +#define PINCONF_EMC_D27 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_8) +#define PINCONF_EMC_D28 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_9) +#define PINCONF_EMC_D29 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_10) +#define PINCONF_EMC_D30 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_11) +#define PINCONF_EMC_D31 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_12) +#define PINCONF_EMC_DQMOUT0 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_12) +#define PINCONF_EMC_DQMOUT1 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_10) +#define PINCONF_EMC_DQMOUT2 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_0) +#define PINCONF_EMC_DQMOUT3 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_13) +#define PINCONF_EMC_DYCS0 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_9) +#define PINCONF_EMC_DYCS1 (PINCONF_FUNC1|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_1) +#define PINCONF_EMC_DYCS2 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSD|PINCONF_PIN_14) +#define PINCONF_EMC_DYCS3 (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINSE|PINCONF_PIN_14) +#define PINCONF_EMC_OE (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_EMC_RAS (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS6|PINCONF_PIN_5) +#define PINCONF_EMC_WE (PINCONF_FUNC3|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_SLEW_FAST|PINCONF_PINS1|PINCONF_PIN_6) #define PINCONF_ENET_COL_1 (PINCONF_FUNC2|PINCONF_INBUFFER|PINCONF_SLEW_FAST|PINCONF_PINS0|PINCONF_PIN_1) #define PINCONF_ENET_COL_2 (PINCONF_FUNC5|PINCONF_INBUFFER|PINCONF_SLEW_FAST|PINCONF_PINS9|PINCONF_PIN_6) diff --git a/arch/arm/src/lpc43xx/chip/lpc43_ccu.h b/arch/arm/src/lpc43xx/chip/lpc43_ccu.h index a2cb20ca62f..51cdcdb9fc9 100644 --- a/arch/arm/src/lpc43xx/chip/lpc43_ccu.h +++ b/arch/arm/src/lpc43xx/chip/lpc43_ccu.h @@ -1,7 +1,7 @@ /**************************************************************************************************** * arch/arm/src/lpc43xx/chip/lpc43_ccu.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ + /* Register Offsets *********************************************************************************/ #define LPC43_CCU1_PM_OFFSET 0x0000 /* CCU1 power mode register */ @@ -343,6 +344,23 @@ #define CCU_CLK_STAT_WAKEUP (1 << 2) /* Bit 2: Wake-up mechanism enable status */ /* Bits 3-31: Reserved */ +/* CCU1 Branch Clock EMCDIV Configuration Registers */ + +#define CCU_CLK_EMCDIV_CFG_RUN (1 << 0) /* Bit 0: Run enable */ +#define CCU_CLK_EMCDIV_CFG_AUTO (1 << 1) /* Bit 1: Auto (AHB disable mechanism) enable */ +#define CCU_CLK_EMCDIV_CFG_WAKEUP (1 << 2) /* Bit 2: Wake-up mechanism enable */ + /* Bits 3-4: Reserved */ +#define CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT (5) /* Bits 5-7: Clock divider */ +#define CCU_CLK_EMCDIV_CLOCK_DIV_MASK (7 << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT) +# define CCU_CLK_EMCDIV_CFG_DIV_FUNC(n) ((n) << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT) +# define CCU_CLK_EMCDIV_CFG_DIV_NODIV (0 << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT) /* Bit 5-7: No division */ +# define CCU_CLK_EMCDIV_CFG_DIV_BY2 (1 << CCU_CLK_EMCDIV_CLOCK_DIV_SHIFT) /* Bit 5-7: Division by 2 */ + /* Bits 8-26: Reserved */ +#define CCU_CLK_EMCDIV_CLOCK_DIVSTAT_SHIFT (27) /* Bits 27-29: Clock divider status */ +#define CCU_CLK_EMCDIV_CLOCK_DIVSTAT_MASK (7 << CCU_CLK_EMCDIV_CLOCK_DIVSTAT_SHIFT) +# define CCU_CLK_EMCDIV_CFG_DIVSTAT_NODIV (0 << CCU_CLK_EMCDIV_CLOCK_DIVSTAT_SHIFT) /* Bit 27-29: No division */ +# define CCU_CLK_EMCDIV_CFG_DIVSTAT_BY2 (1 << CCU_CLK_EMCDIV_CLOCK_DIVSTAT_MASK) /* Bit 26-29: Divistion by 2 */ + /**************************************************************************************************** * Public Types ****************************************************************************************************/ diff --git a/arch/arm/src/lpc43xx/chip/lpc43_emc.h b/arch/arm/src/lpc43xx/chip/lpc43_emc.h index 4fb3ae38be6..b61cbcbc585 100644 --- a/arch/arm/src/lpc43xx/chip/lpc43_emc.h +++ b/arch/arm/src/lpc43xx/chip/lpc43_emc.h @@ -1,7 +1,7 @@ /**************************************************************************************************** * arch/arm/src/lpc43xx/chip/lpc43_emc.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ + /* Register Offsets *********************************************************************************/ #define LPC43_EMC_CONTROL_OFFSET 0x0000 /* EMC Control register */ @@ -213,6 +214,7 @@ #define EMC_CONTROL_LOWPOWER (1 << 2) /* Bit 2: Low-power mode */ /* Bits 3-31: Reserved */ /* EMC Status register */ + #define EMC__ #define EMC_STATUS_BUSY (1 << 0) /* Bit 0: Busy */ #define EMC_STATUS_WB (1 << 1) /* Bit 1: Write buffer status */ @@ -333,13 +335,64 @@ # define EMC_DYNCONFIG_MD_SDRAM (0 << EMC_DYNCONFIG_MD_SHIFT) /* SDRAM (POR reset value) */ /* Bits 5-6: Reserved */ #define EMC_DYNCONFIG_AM0_SHIFT (7) /* Bits 7-12: AM0 Address mapping (see user manual) */ -#define EMC_DYNCONFIG_AM0_MASK (0x3f << EMC_DYNCONFIG_AM0_SHIFT) +#define EMC_DYNCONFIG_AM0_MASK (0x3F << EMC_DYNCONFIG_AM0_SHIFT) /* Bit 13: Reserved */ #define EMC_DYNCONFIG_AM1 (1 << 14) /* Bit 14: AM1 Address mapping (see user manual) */ /* Bits 15-18: Reserved */ -#define EMC_DYNCONFIG_BENA (1 << 10) /* Bit 19: Buffer enable */ +#define EMC_DYNCONFIG_BENA (1 << 19) /* Bit 19: Buffer enable */ #define EMC_DYNCONFIG_WP (1 << 20) /* Bit 20: Write protect. */ /* Bits 21-31: Reserved */ + +/* Dynamic Memory Configuration register Memory Configuration Values */ +/* TODO: complete configuration */ + +/* Data Bus Width Value in LPC43_EMC_DYNCONFIG register (bit 14) */ + +#define EMC_DYNCONFIG_DATA_BUS_16 (0 << 14) /* Data bus width 16 bit */ +#define EMC_DYNCONFIG_DATA_BUS_32 (1 << 14) /* Data bus width 32 bit */ + +/* Low power SDRAM value in LPC43_EMC_DYNCONFIG register (bit 12) */ + +#define EMC_DYNCONFIG_LPSDRAM (1 << 12) /* Low power SDRAM value (Bank, Row, Column)*/ +#define EMC_DYNCONFIG_HPSDRAM (0 << 12) /* High performance SDRAM value (Row, Bank, Column)*/ + +/* Address mapping table for LPC43_EMC_DYNCONFIG register (bits 7-11) */ + +/* Device size bits in LPC43_EMC_DYNCONFIG register (bits 9-11) */ + +#define EMC_DYNCONFIG_DEV_SIZE_SHIFT (9) +#define EMC_DYNCONFIG_DEV_SIZE_MASK (0x7) +# define EMC_DYNCONFIG_DEV_SIZE_16Mb (0x00 << EMC_DYNCONFIG_DEV_SIZE_SHIFT) +# define EMC_DYNCONFIG_DEV_SIZE_64Mb (0x01 << EMC_DYNCONFIG_DEV_SIZE_SHIFT) +# define EMC_DYNCONFIG_DEV_SIZE_128Mb (0x02 << EMC_DYNCONFIG_DEV_SIZE_SHIFT) +# define EMC_DYNCONFIG_DEV_SIZE_256Mb (0x03 << EMC_DYNCONFIG_DEV_SIZE_SHIFT) +# define EMC_DYNCONFIG_DEV_SIZE_512Mb (0x04 << EMC_DYNCONFIG_DEV_SIZE_SHIFT) + +/* Bus width bits in LPC43_EMC_DYNCONFIG register (bits 7-8) */ + +#define EMC_DYNCONFIG_DEV_BUS_SHIFT (7) +#define EMC_DYNCONFIG_DEV_BUS_MASK (0x3) +# define EMC_DYNCONFIG_DEV_BUS_8 (0x00 << EMC_DYNCONFIG_DEV_BUS_SHIFT) +# define EMC_DYNCONFIG_DEV_BUS_16 (0x01 << EMC_DYNCONFIG_DEV_BUS_SHIFT) +# define EMC_DYNCONFIG_DEV_BUS_32 (0x02 << EMC_DYNCONFIG_DEV_BUS_SHIFT) + +#define EMC_DYNCONFIG_2Mx8_2BANKS_11ROWS_9COLS ((0x0 << 9) | (0x0 << 7)) /* 16Mb (2Mx8), 2 banks, row length = 11, column length = 9 */ +#define EMC_DYNCONFIG_1Mx16_2BANKS_11ROWS_8COLS ((0x0 << 9) | (0x1 << 7)) /* 16Mb (1Mx16), 2 banks, row length = 11, column length = 8 */ +#define EMC_DYNCONFIG_8Mx8_4BANKS_12ROWS_9COLS ((0x1 << 9) | (0x0 << 7)) /* 64Mb (8Mx8), 4 banks, row length = 12, column length = 9 */ +#define EMC_DYNCONFIG_4Mx16_4BANKS_12ROWS_8COLS ((0x1 << 9) | (0x1 << 7)) /* 64Mb (4Mx16), 4 banks, row length = 12, column length = 8 */ +#define EMC_DYNCONFIG_2Mx32_4BANKS_11ROWS_8COLS ((0x1 << 9) | (0x2 << 7)) /* 64Mb (2Mx32), 4 banks, row length = 11, column length = 8, 32 bit bus only */ +#define EMC_DYNCONFIG_16Mx8_4BANKS_12ROWS_10COLS ((0x2 << 9) | (0x0 << 7)) /* 128Mb (16Mx8), 4 banks, row length = 12, column length = 10 */ +#define EMC_DYNCONFIG_8Mx16_4BANKS_12ROWS_9COLS ((0x2 << 9) | (0x1 << 7)) /* 128Mb (8Mx16), 4 banks, row length = 12, column length = 9 */ +#define EMC_DYNCONFIG_4Mx32_4BANKS_12ROWS_8COLS ((0x2 << 9) | (0x2 << 7)) /* 128Mb (4Mx32), 4 banks, row length = 12, column length = 8 */ +#define EMC_DYNCONFIG_32Mx8_4BANKS_13ROWS_10COLS ((0x3 << 9) | (0x0 << 7)) /* 256Mb (32Mx8), 4 banks, row length = 13, column length = 10, 32 bit bus only */ +#define EMC_DYNCONFIG_16Mx16_4BANKS_13ROWS_9COLS ((0x3 << 9) | (0x1 << 7)) /* 256Mb (16Mx16), 4 banks, row length = 13, column length = 9 */ +#define EMC_DYNCONFIG_8Mx32_4BANKS_13ROWS_8COLS ((0x3 << 9) | (0x2 << 7)) /* 256Mb (8Mx32), 4 banks, row length = 13, column length = 8, 32 bit bus only */ +#define EMC_DYNCONFIG_8Mx32_4BANKS_12ROWS_9COLS ((0x2 << 9) | (0x1 << 7)) /* 256Mb (8Mx32), 4 banks, row length = 12, column length = 9, 32 bit bus only */ +#define EMC_DYNCONFIG_64Mx8_4BANKS_13ROWS_10COLS ((0x4 << 9) | (0x0 << 7)) /* 512Mb (64Mx8), 4 banks, row length = 13, column length = 11 */ +#define EMC_DYNCONFIG_32Mx16_4BANKS_13ROWS_10COLS ((0x4 << 9) | (0x1 << 7)) /* 512Mb (32Mx16), 4 banks, row length = 13, column length = 10 */ +#define EMC_DYNCONFIG_16Mx32_4BANKS_13ROWS_9COLS ((0x3 << 9) | (0x1 << 7)) /* 512Mb (16Mx32), 4 banks, row length = 13, column length = 9, 32 bit bus only */ +#define EMC_DYNCONFIG_32Mx32_4BANKS_13ROWS_10COLS ((0x4 << 9) | (0x1 << 7)) /* 1Gb (32Mx32), 4 banks, row length = 13, column length = 10,32 bit bus only */ + /* Dynamic Memory RAS & CAS Delay registers */ #define EMC_DYNRASCAS_RAS_SHIFT (0) /* Bits 0-1: RAS latency (active to read/write delay) */ @@ -354,6 +407,35 @@ # define EMC_DYNRASCAS_CAS_2CCLK (2 << EMC_DYNRASCAS_CAS_SHIFT) /* Two CCLK cycles */ # define EMC_DYNRASCAS_CAS_3CCLK (3 << EMC_DYNRASCAS_CAS_SHIFT) /* Three CCLK cycles (POR reset value) */ /* Bits 10-31: Reserved */ + +/* Dynamic SDRAM mode register definitions */ + + /* Bits 0-2: Burst length. All other values are reserved. */ +#define EMC_DYNMODE_BURST_LENGTH_SHIFT (0) +#define EMC_DYNMODE_BURST_LENGTH_MASK (0x7) +# define EMC_DYNMODE_BURST_LENGTH_1 (0 << EMC_DYNMODE_BURST_LENGTH_SHIFT) +# define EMC_DYNMODE_BURST_LENGTH_2 (1 << EMC_DYNMODE_BURST_LENGTH_SHIFT) +# define EMC_DYNMODE_BURST_LENGTH_4 (2 << EMC_DYNMODE_BURST_LENGTH_SHIFT) +# define EMC_DYNMODE_BURST_LENGTH_8 (3 << EMC_DYNMODE_BURST_LENGTH_SHIFT) + /* Bit 3: Burst mode type */ +#define EMC_DYNMODE_BURST_TYPE_SHIFT (3) +# define EMC_DYNMODE_BURST_TYPE_SEQUENTIAL (0 << EMC_DYNMODE_BURST_TYPE_SHIFT) /* burst type sequential */ +# define EMC_DYNMODE_BURST_TYPE_INTERLEAVED (1 << EMC_DYNMODE_BURST_TYPE_INTERLEAVED) /* burst type interleaved */ + /* Bits 4-6: Latency mode. All other values are reserved. */ +#define EMC_DYNMODE_CAS_SHIFT (4) +#define EMC_DYNMODE_CAS_MASK (0x7) +# define EMC_DYNMODE_CAS_2 (2 << EMC_DYNMODE_CAS_SHIFT) /* CAS latency of 2 cycles */ +# define EMC_DYNMODE_CAS_3 (3 << EMC_DYNMODE_CAS_SHIFT) /* CAS latency of 3 cycles */ + /* Bits 7-8: Operating mode. All other values are reserved. */ +#define EMC_DYNMODE_OPMODE_SHIFT (7) +#define EMC_DYNMODE_OPMODE_MASK (0x3) +# define EMC_DYNMODE_OPMODE_STANDARD (0 << EMC_DYNMODE_OPMODE_SHIFT) /* dynamic standard operation mode */ + /* Bit 9: Write burst mode */ +#define EMC_DYNMODE_WBMODE_SHIFT (9) +# define EMC_DYNMODE_WBMODE_PROGRAMMED (0 << EMC_DYNMODE_WBMODE_SHIFT) /* write burst mode programmed */ +# define EMC_DYNMODE_WBMODE_SINGLE_LOC (1 << EMC_DYNMODE_WBMODE_SHIFT) /* write burst mode single loc */ + /* Bits 10-11: Reserved */ + /* Static Memory Configuration registers */ #define EMC_STATCONFIG_MW_SHIFT (0) /* Bits 0-1: Memory width */ diff --git a/arch/arm/src/lpc43xx/lpc43_adc.c b/arch/arm/src/lpc43xx/lpc43_adc.c index 4286451f11e..2a9db4297d9 100644 --- a/arch/arm/src/lpc43xx/lpc43_adc.c +++ b/arch/arm/src/lpc43xx/lpc43_adc.c @@ -59,7 +59,6 @@ #include #include -#include #include #include #include @@ -80,6 +79,12 @@ #include "lpc43_pinconfig.h" +/* board.h should be included last because it depends on the previous + * inclusions and may need to modify other definitions. + */ + +#include + #if defined(CONFIG_LPC43_ADC0) /* TODO ADC1 */ /**************************************************************************** diff --git a/arch/arm/src/lpc43xx/lpc43_allocateheap.c b/arch/arm/src/lpc43xx/lpc43_allocateheap.c index 70a0bbe5873..b7a947b668f 100644 --- a/arch/arm/src/lpc43xx/lpc43_allocateheap.c +++ b/arch/arm/src/lpc43xx/lpc43_allocateheap.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lpc43xx/lpc43_allocateheap.c * - * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -61,6 +61,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Get customizations for each supported chip. * * SRAM Resources @@ -95,6 +96,25 @@ * NOTE 1: The 64Kb of AHB of SRAM on the LPC4350/30/20 span all AHB SRAM * banks but are treated as two banks of 48 an 16Kb by the NuttX memory * manager. This gives some symmetry to all of the members of the family. + * + * ---------------------------------------------------------------------- + * EMC SDRAM + * ---------------------------------------------------------------------- + * LPC43xx may have dynamic RAM connected on EMC bus. Up to 4 chips can be + * connected. + * + * DYCS0 (0x2800 0000) up to 128MB + * DYCS1 (0x3000 0000) up to 256MB + * DYCS2 (0x6000 0000) up to 256MB + * DYCS3 (0x7000 0000) up to 256MB + * + * LPC43xx may have static RAM connected on EMC bus. + * + * CS0 (0x1C00 0000) up to 16MB + * CS1 (0x1D00 0000) up to 16MB + * CS2 (0x1E00 0000) up to 16MB + * CS3 (0x1F00 0000) up to 16MB + * */ /* Configuration ************************************************************/ @@ -136,58 +156,89 @@ * * CONFIG_RAM_START = The start of the data RAM region which may be * either local SRAM bank 0 (Configuration A) or 1 (Configuration B). - * CONFIG_RAM_START = The size of the data RAM region. - * CONFIG_RAM_END = The sum of the above + * CONFIG_RAM_SIZE = The size of the data RAM region. + * CONFIG_RAM_END = The sum of the above. + */ + +/* External Memory Configuration + * + * Dynamic memory configuration + * For dynamic memory configuration at least one of LPC43_EXTSDRAMx + * should by defined. + * Also, together with LPC43_EXTSDRAMx should be defined: + * LPC43_EXTSDRAMxSIZE = External RAM size in bytes. + * LPC43_EXTSDRAMxHEAP = Should this RAM be use as heap space? */ /* Check for Configuration A. */ +#undef MM_USE_LOCSRAM_BANK0 +#undef MM_USE_LOCSRAM_BANK1 +#undef MM_USE_AHBSRAM_BANK0 +#undef MM_USE_AHBSRAM_BANK1 +#undef MM_USE_AHBSRAM_BANK2 +#undef MM_USE_EXTSDRAM0 +#undef MM_USE_EXTSDRAM1 +#undef MM_USE_EXTSDRAM2 +#undef MM_USE_EXTSDRAM3 +#undef MM_HAVE_REGION + #ifndef CONFIG_LPC43_BOOT_SRAM /* Configuration A */ -/* CONFIG_RAM_START should be set to the base of AHB SRAM, local 0. */ +/* CONFIG_RAM_START shoudl be set to the base of local SRAM, Bank 0. */ # if CONFIG_RAM_START != LPC43_LOCSRAM_BANK0_BASE -# error "CONFIG_RAM_START must be set to the base address of RAM Bank 0" +# error "CONFIG_RAM_START must be set to the base address of RAM bank 0" # endif -/* The configured RAM size should be equal to the size of local SRAM Bank 0 */ +/* The configured RAM size should be equal to the size of local SRAM Bank 0. */ # if CONFIG_RAM_SIZE != LPC43_LOCSRAM_BANK0_SIZE -# error "CONFIG_RAM_SIZE must be set to size of AHB SRAM Bank 0" +# error "CONFIG_RAM_SIZE must be set to size of local SRAM Bank 0" # endif -/* Now we can assign all of the memory regions for configuration A */ +/* Local SRAM Bank 0 will be used as main memory region */ -# define MM_REGION1_BASE LPC43_LOCSRAM_BANK0_BASE -# define MM_REGION1_SIZE LPC43_LOCSRAM_BANK0_SIZE -# define MM_REGION2_BASE LPC43_LOCSRAM_BANK1_BASE -# define MM_REGION2_SIZE LPC43_LOCSRAM_BANK1_SIZE -# define MM_REGION3_BASE LPC43_AHBSRAM_BANK0_BASE -# define MM_REGION3_SIZE LPC43_AHBSRAM_BANK0_SIZE -#else +# define MM_USE_LOCSRAM_BANK0 0 + +/* Use local SRAM Bank 1 if configured */ + +# ifdef CONFIG_LPC43_USE_LOCSRAM_BANK1 +# define MM_USE_LOCSRAM_BANK1 1 +# endif + +#else /* CONFIG_LPC43_BOOT_SRAM */ /* Configuration B */ -/* CONFIG_RAM_START should be set to the base of local SRAM, bank 1. */ +/* CONFIG_RAM_START should be set to the base of local SRAM, Bank 1. */ # if CONFIG_RAM_START != LPC43_LOCSRAM_BANK1_BASE -# error "CONFIG_RAM_START must be set to the base address of SRAM Bank 1" +# error "CONFIG_RAM_START must be set to the base address of RAM bank 1" # endif -/* The configured RAM size should be equal to the size of local SRAM Bank 1 */ +/* The configured RAM size should be equal to the size of local SRAM Bank 1. */ # if CONFIG_RAM_SIZE != LPC43_LOCSRAM_BANK1_SIZE -# error "CONFIG_RAM_SIZE must be set to size of AHB SRAM Bank 1" +# error "CONFIG_RAM_SIZE must be set to size of local SRAM Bank 1" # endif -/* Now we can assign all of the memory regions for configuration B */ +/* Shouldn't use Local SRAM Bank 0 as system use it for code. + * Local SRAM Bank1 is used as main memory region. + */ -# define MM_REGION1_BASE LPC43_LOCSRAM_BANK1_BASE -# define MM_REGION1_SIZE LPC43_LOCSRAM_BANK1_SIZE -# define MM_REGION2_BASE LPC43_AHBSRAM_BANK0_BASE -# define MM_REGION2_SIZE LPC43_AHBSRAM_BANK0_SIZE -# undef MM_REGION3_BASE -# undef MM_REGION3_SIZE +# define MM_USE_LOCSRAM_BANK1 0 + +#endif /* CONFIG_LPC43_BOOT_SRAM */ + +/* Configure other memory banks */ + +#ifdef CONFIG_LPC43_AHBSRAM_BANK0 +# define MM_USE_AHBSRAM_BANK0 1 +#endif + +#ifdef CONFIG_LPC43_AHBSRAM_BANK1 +# define MM_USE_AHBSRAM_BANK1 1 #endif #define MM_DMAREGION_BASE LPC43_AHBSRAM_BANK2_BASE @@ -199,8 +250,69 @@ #warning "Missing Logic" -#define MM_DMAHEAP_BASE MM_DMAREGION_BASE /* For now... use it all */ -#define MM_DMAHEAP_SIZE MM_DMAREGION_SIZE +#ifdef CONFIG_LPC43_AHBSRAM_BANK2 +# define MM_USE_AHBSRAM_BANK2 1 +# define MM_DMAHEAP_BASE MM_DMAREGION_BASE /* For now... use it all */ +# define MM_DMAHEAP_SIZE MM_DMAREGION_SIZE +#endif + +/* External RAM configuration */ + +/* Check if external SDRAM is supported and, if so, it is intended to be used + * used as heap. + */ + +#if !defined(CONFIG_LPC43_EXTSDRAM0) || !defined(CONFIG_LPC43_EXTSDRAM0_HEAP) +# undef CONFIG_LPC43_EXTSDRAM0_SIZE +# define CONFIG_LPC43_EXTSDRAM0_SIZE 0 +#endif + +#if !defined(CONFIG_LPC43_EXTSDRAM1) || !defined(CONFIG_LPC43_EXTSDRAM1_HEAP) +# undef CONFIG_LPC43_EXTSDRAM1_SIZE +# define CONFIG_LPC43_EXTSDRAM1_SIZE 0 +#endif + +#if !defined(CONFIG_LPC43_EXTSDRAM2) || !defined(CONFIG_LPC43_EXTSDRAM2_HEAP) +# undef CONFIG_LPC43_EXTSDRAM2_SIZE +# define CONFIG_LPC43_EXTSDRAM2_SIZE 0 +#endif + +#if !defined(CONFIG_LPC43_EXTSDRAM3) || !defined(CONFIG_LPC43_EXTSDRAM3_HEAP) +# undef CONFIG_LPC43_EXTSDRAM3_SIZE +# define CONFIG_LPC43_EXTSDRAM3_SIZE 0 +#endif + +#if CONFIG_LPC43_EXTSDRAM0_SIZE > 0 +# define MM_USE_EXTSDRAM0 1 +# define MM_EXTSDRAM0_REGION LPC43_DYCS0_BASE +# define MM_EXTSDRAM0_SIZE CONFIG_LPC43_EXTSDRAM0_SIZE +#endif /* CONFIG_LPC43_EXTSDRAM0_SIZE */ + +#if CONFIG_LPC43_EXTSDRAM1_SIZE > 0 +# define MM_USE_EXTSDRAM1 1 +# define MM_EXTSDRAM1_REGION LPC43_DYCS1_BASE +# define MM_EXTSDRAM1_SIZE CONFIG_LPC43_EXTSDRAM1_SIZE +#endif /* CONFIG_LPC43_EXTSDRAM1_SIZE */ + +#if CONFIG_LPC43_EXTSDRAM2_SIZE > 0 +# define MM_USE_EXTSDRAM2 1 +# define MM_EXTSDRAM2_REGION LPC43_DYCS2_BASE +# define MM_EXTSDRAM2_SIZE CONFIG_LPC43_EXTSDRAM2_SIZE +#endif /* CONFIG_LPC43_EXTSDRAM1_SIZE */ + +#if CONFIG_LPC43_EXTSDRAM3_SIZE > 0 +# define HAVE_EXTSDRAM3_REGION 1 +# define MM_EXTSDRAM3_REGION LPC43_DYCS3_BASE +# define MM_EXTSDRAM3_SIZE CONFIG_LPC43_EXTSDRAM3_SIZE +#endif /* CONFIG_LPC43_EXTSDRAM3_SIZE */ + +#if CONFIG_MM_REGIONS > 1 && \ + (defined(MM_USE_LOCSRAM_BANK1) || defined(MM_USE_AHBSRAM_BANK0) || \ + defined(MM_USE_AHBSRAM_BANK1) || defined(MM_USE_AHBSRAM_BANK2) || \ + defined(MM_USE_EXTSDRAM0) || defined(MM_USE_EXTSDRAM1) || \ + defined(MM_USE_EXTSDRAM2) || defined(MM_USE_EXTSDRAM3)) +# define MM_HAVE_REGION 1 +#endif /**************************************************************************** * Private Data @@ -216,15 +328,31 @@ * thread is the thread that the system boots on and, eventually, becomes the * idle, do nothing task that runs only when there is nothing else to run. * The heap continues from there until the configured end of memory. - * g_idle_topstack is the beginning of this heap region (not necessarily aligned). + * g_idle_topstack is the beginning of this heap region (not necessarily + * aligned). */ const uint32_t g_idle_topstack = (uint32_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE; +#ifdef MM_HAVE_REGION +static uint8_t g_mem_region_next = 0; +#endif + /**************************************************************************** * Private Functions ****************************************************************************/ +#ifdef MM_HAVE_REGION +static void mem_addregion(FAR void *region_start, size_t region_size) +{ + if (g_mem_region_next <= CONFIG_MM_REGIONS) + { + kmm_addregion(region_start, region_size); + g_mem_region_next++; + } +} +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -265,35 +393,42 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) #if CONFIG_MM_REGIONS > 1 void up_addregion(void) { -#if CONFIG_MM_REGIONS > 1 - /* Add the next SRAM region (which should exist) */ +#ifdef MM_HAVE_REGION + /* start from second region */ - kmm_addregion((FAR void *)MM_REGION2_BASE, MM_REGION2_SIZE); + g_mem_region_next = 2; -#ifdef MM_REGION3_BASE - /* Add the third SRAM region (which will not exist in configuration B) */ +# ifdef MM_USE_LOCSRAM_BANK1 + mem_addregion((FAR void *)LPC43_LOCSRAM_BANK1_BASE, LPC43_LOCSRAM_BANK1_SIZE); +# endif -#if CONFIG_MM_REGIONS > 2 - /* Add the third SRAM region (which may not exist) */ +# ifdef MM_USE_AHBSRAM_BANK0 + mem_addregion((FAR void *)LPC43_AHBSRAM_BANK0_BASE, LPC43_AHBSRAM_BANK0_SIZE); +# endif - kmm_addregion((FAR void *)MM_REGION3_BASE, MM_REGION3_SIZE); +# ifdef MM_USE_AHBSRAM_BANK1 + mem_addregion((FAR void *)LPC43_AHBSRAM_BANK1_BASE, LPC43_AHBSRAM_BANK1_SIZE); +# endif -#if CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE) - /* Add the DMA region (which may not be available) */ +# ifdef MM_USE_AHBSRAM_BANK2 + mem_addregion((FAR void *)MM_DMAREGION_BASE, MM_DMAREGION_SIZE); +# endif - kmm_addregion((FAR void *)MM_DMAHEAP_BASE, MM_DMAHEAP_SIZE); +# ifdef MM_USE_EXTSDRAM0 + mem_addregion((FAR void *)MM_EXTSDRAM0_REGION, MM_EXTSDRAM0_SIZE); +# endif -#endif /* CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE) */ -#endif /* CONFIG_MM_REGIONS > 2 */ -#else /* MM_REGION3_BASE */ +# ifdef MM_USE_EXTSDRAM1 + mem_addregion((FAR void *)MM_EXTSDRAM1_REGION, MM_EXTSDRAM1_SIZE); +# endif -#if CONFIG_MM_REGIONS > 2 && defined(MM_DMAHEAP_BASE) - /* Add the DMA region (which may not be available) */ +# ifdef MM_USE_EXTSDRAM2 + mem_addregion((FAR void *)MM_EXTSDRAM2_REGION, MM_EXTSDRAM2_SIZE); +# endif - kmm_addregion((FAR void *)MM_DMAHEAP_BASE, MM_DMAHEAP_SIZE); - -#endif /* CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE) */ -#endif /* MM_REGION3_BASE */ -#endif /* CONFIG_MM_REGIONS > 1 */ +# ifdef MM_USE_EXTSDRAM3 + mem_addregion((FAR void *)MM_EXTSDRAM3_REGION, MM_EXTSDRAM3_SIZE); +# endif +#endif } #endif diff --git a/arch/arm/src/lpc43xx/lpc43_emc.c b/arch/arm/src/lpc43xx/lpc43_emc.c new file mode 100644 index 00000000000..a15ecb5610d --- /dev/null +++ b/arch/arm/src/lpc43xx/lpc43_emc.c @@ -0,0 +1,141 @@ +/**************************************************************************** + * arch/arm/src/lpc43xx/lpc43_emc.c + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + + +/* TODO: add #if defined(CONFIG_LPC43_EMC) */ + +#include +#include +#include +#include +#include +#include +#include + + +#include +#include +#include + +#include "up_internal.h" + +#include "chip.h" +#include "lpc43_pinconfig.h" +#include "lpc43_emc.h" +#include "chip/lpc43_creg.h" +#include "chip/lpc43_cgu.h" +#include "chip/lpc43_ccu.h" +#include "lpc43_rgu.h" +#include "lpc43_gpio.h" +#include "up_arch.h" +#include + + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc43_emcinit + * + * Description: + * Initialize EMC controller. Start in full power + * mode. + * + ****************************************************************************/ +void lpc43_emcinit(uint32_t enable, uint32_t clock_ratio, uint32_t endian_mode) +{ + uint32_t regval; + + /* Enable clock for EMC controller. */ + + regval = getreg32(LPC43_CCU1_M4_EMC_CFG); + regval |= CCU_CLK_CFG_RUN; + putreg32(regval, LPC43_CCU1_M4_EMC_CFG); + + /* Configure endian mode and clock ratio. */ + + regval = 0; + if (endian_mode) + regval |= EMC_CONFIG_EM; + if (clock_ratio) + regval |= EMC_CONFIG_CR; + + putreg32(regval, LPC43_EMC_CONFIG); + + /* Enable EMC 001 normal memory map, no low power mode. */ + + putreg32(EMC_CONTROL_ENA, LPC43_EMC_CONTROL); +} + +/**************************************************************************** + * Name: lpc43_lowpowermode + * + * Description: + * Set EMC lowpower mode. + * + ****************************************************************************/ +void lpc43_lowpowermode(uint8_t enable) +{ + uint32_t regval; + + regval = getreg32(LPC43_EMC_CONTROL); + if (enable) + { + regval |= EMC_CONTROL_LOWPOWER; + putreg32(regval, LPC43_EMC_CONTROL); + } + else + { + regval &= ~EMC_CONTROL_LOWPOWER; + putreg32(regval, LPC43_EMC_CONTROL); + } +} + +/**************************************************************************** + * Name: lpc43_emcenable + * + * Description: + * Enable or disable EMC controller. + * + ****************************************************************************/ +void lpc43_emcenable(uint8_t enable) +{ + uint32_t regval; + + regval = getreg32(LPC43_EMC_CONTROL); + if (enable) + { + regval |= EMC_CONTROL_ENA; + putreg32(regval, LPC43_EMC_CONTROL); + } + else + { + regval &= ~EMC_CONTROL_ENA; + putreg32(regval, LPC43_EMC_CONTROL); + } +} diff --git a/arch/arm/src/lpc43xx/lpc43_emc.h b/arch/arm/src/lpc43xx/lpc43_emc.h index 3c2bd2496fe..77b71d86120 100644 --- a/arch/arm/src/lpc43xx/lpc43_emc.h +++ b/arch/arm/src/lpc43xx/lpc43_emc.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/lpc43xx/lpc43_emc.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -48,16 +48,22 @@ * Pre-processor Definitions ************************************************************************************/ -/************************************************************************************ - * Public Types - ************************************************************************************/ +/* Chip select Definitions **********************************************************/ + +#define EMC_CS0 0 +#define EMC_CS1 1 +#define EMC_CS2 2 +#define EMC_CS3 3 + +#define EMC_DYNCS0 0 +#define EMC_DYNCS1 1 +#define EMC_DYNCS2 2 +#define EMC_DYNCS3 3 /************************************************************************************ - * Public Data + * Public Function Prototypes ************************************************************************************/ -/************************************************************************************ - * Public Functions - ************************************************************************************/ +void lpc43_emcinit(uint32_t enable, uint32_t clock_ratio, uint32_t endian_mode); #endif /* __ARCH_ARM_SRC_LPC43XX_LPC43_EMC_H */ diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c index 26881472c8d..09680bd9e91 100644 --- a/arch/arm/src/lpc43xx/lpc43_irq.c +++ b/arch/arm/src/lpc43xx/lpc43_irq.c @@ -91,10 +91,6 @@ volatile uint32_t *g_current_regs[1]; extern uint32_t _vectors[]; -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -250,15 +246,9 @@ static int lpc43_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, if (irq >= LPC43_IRQ_EXTINT) { - n = irq - LPC43_IRQ_EXTINT; + n = irq - LPC43_IRQ_EXTINT; *regaddr = NVIC_IRQ_ENABLE(n) + offset; - - while (n >= 32) - { - n -= 32; - } - - *bit = 1 << n; + *bit = (uint32_t)1 << (n & 0x1f); } /* Handle processor exceptions. Only a few can be disabled */ diff --git a/arch/arm/src/sam34/chip/sam3x_memorymap.h b/arch/arm/src/sam34/chip/sam3x_memorymap.h index e32e6ec226e..ba053d3c353 100644 --- a/arch/arm/src/sam34/chip/sam3x_memorymap.h +++ b/arch/arm/src/sam34/chip/sam3x_memorymap.h @@ -91,6 +91,7 @@ # define SAM_TC8_BASE 0x40088080 /* 0x40088080-0x400880bf: Timer Counter 5 */ /* 0x400880c0-0x4008ffff Reserved */ #define SAM_TWI_BASE 0x4008c000 /* 0x4008c000-0x4001ffff: Two-Wire Interface */ +# define SAM_TWIN_BASE(n) (SAM_TWI_BASE + ((n) << 14)) # define SAM_TWI0_BASE 0x4008c000 /* 0x4008c000-0x4008ffff: Two-Wire Interface 0 */ # define SAM_TWI1_BASE 0x40090000 /* 0x40090000-0x40093fff: Two-Wire Interface 1 */ #define SAM_PWM_BASE 0x40094000 /* 0x40020000-0x4003ffff: Pulse Width Modulation */ diff --git a/arch/arm/src/sam34/chip/sam4cm_memorymap.h b/arch/arm/src/sam34/chip/sam4cm_memorymap.h index 15505238845..c0b2de041b8 100644 --- a/arch/arm/src/sam34/chip/sam4cm_memorymap.h +++ b/arch/arm/src/sam34/chip/sam4cm_memorymap.h @@ -77,8 +77,12 @@ #define SAM_TC3_BASE 0x40014000 #define SAM_TC4_BASE 0x40014040 #define SAM_TC5_BASE 0x40014080 + +#define SAM_TWI_BASE 0x40018000 +#define SAM_TWIN_BASE(n) (SAM_TWI_BASE + ((n) << 14)) #define SAM_TWI0_BASE 0x40018000 #define SAM_TWI1_BASE 0x4001C000 + #define SAM_USART0_BASE 0x40024000 #define SAM_USART1_BASE 0x40028000 #define SAM_USART2_BASE 0x4002C000 diff --git a/arch/arm/src/sam34/chip/sam4e_memorymap.h b/arch/arm/src/sam34/chip/sam4e_memorymap.h index 95bfdef2eb7..1cf95993996 100644 --- a/arch/arm/src/sam34/chip/sam4e_memorymap.h +++ b/arch/arm/src/sam34/chip/sam4e_memorymap.h @@ -108,6 +108,7 @@ # define SAM_USART0_BASE 0x400a0000 /* 0x400a0000-0x400a3fff: USART0 */ # define SAM_USART1_BASE 0x400a4000 /* 0x400a4000-0x400abfff: USART1 */ #define SAM_TWI_BASE 0x400a8000 /* 0x400a8000-0x400affff: Two-Wire Interface */ +# define SAM_TWIN_BASE(n) (SAM_TWI_BASE + ((n) << 14)) # define SAM_TWI0_BASE 0x400a8000 /* 0x400a8000-0x400abfff: Two-Wire Interface 0 */ # define SAM_TWI1_BASE 0x400ac000 /* 0x400ac000-0x400affff: Two-Wire Interface 1 */ #define SAM_AFEC_BASE 0x400b0000 /* 0x400b0000-0x400b7fff: Analog Front End */ diff --git a/arch/arm/src/sam34/chip/sam4l_memorymap.h b/arch/arm/src/sam34/chip/sam4l_memorymap.h index 56810fe442c..62a8c6a0c5c 100644 --- a/arch/arm/src/sam34/chip/sam4l_memorymap.h +++ b/arch/arm/src/sam34/chip/sam4l_memorymap.h @@ -82,6 +82,9 @@ /* 0x4000c000-0x4000ffff: Reserved */ #define SAM_TC0_BASE 0x40100000 /* 0x40100000-0x4013ffff: Timer Counter 0 */ #define SAM_TC1_BASE 0x40140000 /* 0x40180000-0x4017ffff: Timer Counter 1 */ + +#define SAM_TWIMS_BASE 0x40180000 /* 0x40180000-0x401fffff: Two-wire Master/Slave */ +#define SAM_TWIN_BASE(n) (SAM_TWIMS_BASE + ((n) << 14)) #define SAM_TWIMS0_BASE 0x40180000 /* 0x40180000-0x401bffff: Two-wire Master/Slave Interface 0 */ #define SAM_TWIMS1_BASE 0x401c0000 /* 0x401c0000-0x401fffff: Two-wire Master/Slave Interface 1 */ /* 0x40020000-0x40023fff: Reserved */ diff --git a/arch/arm/src/sam34/chip/sam4s_memorymap.h b/arch/arm/src/sam34/chip/sam4s_memorymap.h index 0ebf658866c..45e8a97a3f6 100644 --- a/arch/arm/src/sam34/chip/sam4s_memorymap.h +++ b/arch/arm/src/sam34/chip/sam4s_memorymap.h @@ -84,6 +84,7 @@ # define SAM_TC5_BASE 0x40014080 /* 0x40014080-0x400140bf: Timer Counter 5 */ #define SAM_TWI_BASE 0x40018000 /* 0x40018000-0x4001ffff: Two-Wire Interface */ +# define SAM_TWIN_BASE(n) (SAM_TWI_BASE + ((n) << 14)) # define SAM_TWI0_BASE 0x40018000 /* 0x40018000-0x4001bfff: Two-Wire Interface 0 */ # define SAM_TWI1_BASE 0x4001c000 /* 0x4001c000-0x4001ffff: Two-Wire Interface 1 */ #define SAM_PWM_BASE 0x40020000 /* 0x40020000-0x4003ffff: Pulse Width Modulation */ diff --git a/arch/arm/src/sam34/chip/sam_twi.h b/arch/arm/src/sam34/chip/sam_twi.h index 8ad5a0f8aeb..2f843dd07c3 100644 --- a/arch/arm/src/sam34/chip/sam_twi.h +++ b/arch/arm/src/sam34/chip/sam_twi.h @@ -143,6 +143,7 @@ #define TWI_MMR_MREAD (1 << 12) /* Bit 12: Master Read Direction */ #define TWI_MMR_DADR_SHIFT (16) /* Bits 16-22: Device Address */ #define TWI_MMR_DADR_MASK (0x7f << TWI_MMR_DADR_SHIFT) +# define TWI_MMR_DADR(n) ((uint32_t)(n) << TWI_MMR_DADR_SHIFT) /* TWI Slave Mode Register */ @@ -186,6 +187,9 @@ #define TWI_INT_RXBUFF (1 << 14) /* Bit 14: RX Buffer */ #define TWI_INT_TXBUFE (1 << 15) /* Bit 15: TX Buffer Empty */ +#define TWI_INT_ERRORS (0x00000340) +#define TWI_INT_ALL (0x0000ffff) + /* TWI Receive Holding Register */ #define TWI_RHR_RXDATA_SHIFT (0) /* Bits 0-7: Master or Slave Receive Holding Data */ diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c index 46df27954a1..36043e9deb8 100644 --- a/arch/arm/src/sam34/sam_serial.c +++ b/arch/arm/src/sam34/sam_serial.c @@ -692,8 +692,8 @@ static void up_disableallints(struct up_dev_s *priv, uint32_t *imr) static int up_setup(struct uart_dev_s *dev) { - struct up_dev_s *priv = (struct up_dev_s *)dev->priv; #ifndef CONFIG_SUPPRESS_UART_CONFIG + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; uint32_t regval; uint32_t imr; diff --git a/arch/arm/src/sam34/sam_udp.c b/arch/arm/src/sam34/sam_udp.c index 6fe76f4f57b..96a521d0ba5 100644 --- a/arch/arm/src/sam34/sam_udp.c +++ b/arch/arm/src/sam34/sam_udp.c @@ -305,6 +305,7 @@ struct sam_ep_s uint8_t zlpneeded:1; /* Zero length packet needed at end of transfer */ uint8_t zlpsent:1; /* Zero length packet has been sent */ uint8_t txbusy:1; /* Write request queue is busy (recursion avoidance kludge) */ + uint8_t lastbank:1; /* Last bank we read data from */ }; struct sam_usbdev_s @@ -1188,9 +1189,14 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep, /* We get here when an RXDATABK0/1 interrupt occurs. That interrupt * cannot be cleared until all of the data has been taken from the RX - * FIFO. But we can + * FIFO. + * + * Also, we need to remember which bank we read last so the interrupt handler + * can determine the correct bank read sequence for future reads. */ + privep->lastbank = bank; + sam_csr_clrbits(epno, bank ? UDPEP_CSR_RXDATABK1 : UDPEP_CSR_RXDATABK0); /* Complete the transfer immediately and give the data to the class @@ -1873,7 +1879,6 @@ static void sam_ep_bankinterrupt(struct sam_usbdev_s *priv, * transferred from the FIFO. */ - privep->epstate = UDP_EPSTATE_IDLE; (void)sam_req_read(priv, privep, pktsize, bank); } @@ -1959,6 +1964,8 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno) struct sam_ep_s *privep; uintptr_t regaddr; uint32_t csr; + bool bk0; + bool bk1; DEBUGASSERT((unsigned)epno < SAM_UDP_NENDPOINTS); @@ -2020,34 +2027,82 @@ static void sam_ep_interrupt(struct sam_usbdev_s *priv, int epno) } } - /* OUT packet received in data bank 0 */ - if ((csr & UDPEP_CSR_RXDATABK0) != 0) + /* OUT packet received. + * + * OUT packets are received in two banks. The hardware does not provide + * information about which bank has been filled last. Therefore we need to + * keep track about which bank we read last to figure out which bank(s) we + * need to read next. + * + * When we get here either none, one or both banks can be filled with data. + * Depending on which bank we read last and which bank(s) contain data we + * need to correctly sequence the FIFO reads: + * + * case lastbank bk0 bk1 read sequence + * 1. 0 0 0 No data to read + * 2. 0 1 0 Only read bank 0 + * 3. 0 0 1 Only read bank 1 + * 4. 0 1 1 Read bank 1, then read bank 0 + * + * 5. 1 0 0 No data to read + * 6. 1 1 0 Only read bank 0 + * 7. 1 0 1 Only read bank 1 (should not happen) + * 8. 1 1 1 Read bank 0, then read bank 1 + * + * lastbank will be updated in sam_req_read() after the FIFO has been read + * and clear RXDATABKx. + */ + + bk0 = (csr & UDPEP_CSR_RXDATABK0) != 0; + bk1 = (csr & UDPEP_CSR_RXDATABK1) != 0; + + /* 2. and 6. - Only read bank 0 */ + + if (bk0 && !bk1) { usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK0), (uint16_t)csr); - - /* Handle data received on Bank 0. sam_ep_bankinterrupt will - * clear the RXDATABK0 interrupt once that data has been - * transferred from the FIFO. - */ - sam_ep_bankinterrupt(priv, privep, csr, 0); } - /* OUT packet received in data bank 1 */ + /* 3. and 7. - Only read bank 1*/ - else if ((csr & UDPEP_CSR_RXDATABK1) != 0) + else if (!bk0 && bk1) { +#ifdef CONFIG_DEBUG_USB_WARN + if (privep->lastbank == 1) + { + uwarn("WARNING: Unexpected USB RX case.\n"); + } +#endif + usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK1), (uint16_t)csr); - DEBUGASSERT(SAM_UDP_NBANKS(epno) > 1); - - /* Handle data received on Bank 1. sam_ep_bankinterrupt will - * clear the RXDATABK1 interrupt once that data has been - * transferred from the FIFO. - */ - sam_ep_bankinterrupt(priv, privep, csr, 1); } + else if (bk0 && bk1) + { + /* 4. - Read bank 1, then read bank 0 */ + + if (privep->lastbank == 0) + { + usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK1), (uint16_t)csr); + sam_ep_bankinterrupt(priv, privep, csr, 1); + + usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK0), (uint16_t)csr); + sam_ep_bankinterrupt(priv, privep, csr, 0); + } + + /* 8. - Read bank 0, then read bank 1 */ + + else + { + usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK0), (uint16_t)csr); + sam_ep_bankinterrupt(priv, privep, csr, 0); + + usbtrace(TRACE_INTDECODE(SAM_TRACEINTID_RXDATABK1), (uint16_t)csr); + sam_ep_bankinterrupt(priv, privep, csr, 1); + } + } /* STALL sent */ @@ -2510,6 +2565,7 @@ static void sam_ep_reset(struct sam_usbdev_s *priv, uint8_t epno) privep->zlpneeded = false; privep->zlpsent = false; privep->txbusy = false; + privep->lastbank = 1; } /**************************************************************************** diff --git a/arch/arm/src/sama5/sam_can.c b/arch/arm/src/sama5/sam_can.c index 3e1b3d116a1..f801e6e8341 100644 --- a/arch/arm/src/sama5/sam_can.c +++ b/arch/arm/src/sama5/sam_can.c @@ -60,7 +60,7 @@ #include #include -#include +#include #include "up_internal.h" #include "up_arch.h" diff --git a/arch/arm/src/sama5/sam_can.h b/arch/arm/src/sama5/sam_can.h index c18361533f2..5a26fe83143 100644 --- a/arch/arm/src/sama5/sam_can.h +++ b/arch/arm/src/sama5/sam_can.h @@ -45,7 +45,7 @@ #include "chip.h" #include "chip/sam_can.h" -#include +#include #if defined(CONFIG_CAN) && (defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1)) diff --git a/arch/arm/src/sama5/sam_pwm.c b/arch/arm/src/sama5/sam_pwm.c index 0de1d91dea0..d523da24a1c 100644 --- a/arch/arm/src/sama5/sam_pwm.c +++ b/arch/arm/src/sama5/sam_pwm.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include "chip/sam_pinmap.h" #include diff --git a/arch/arm/src/sama5/sam_trng.c b/arch/arm/src/sama5/sam_trng.c index a3eb102640e..4c0f5ab1bcc 100644 --- a/arch/arm/src/sama5/sam_trng.c +++ b/arch/arm/src/sama5/sam_trng.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/sama5/sam_trng.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Derives, in part, from Max Holtzberg's STM32 RNG Nuttx driver: @@ -52,6 +52,8 @@ #include #include +#include +#include #include "up_arch.h" #include "up_internal.h" @@ -59,6 +61,9 @@ #include "sam_periphclks.h" #include "sam_trng.h" +#if defined(CONFIG_SAMA5_TRNG) +#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH) + /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -325,14 +330,10 @@ errout: } /**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_rnginitialize + * Name: sam_rng_initialize * * Description: - * Initialize the TRNG hardware and register the /dev/randome driver. + * Initialize the TRNG hardware. * * Input Parameters: * None @@ -342,7 +343,7 @@ errout: * ****************************************************************************/ -void up_rnginitialize(void) +static int sam_rng_initialize(void) { int ret; @@ -360,10 +361,11 @@ void up_rnginitialize(void) /* Initialize the TRNG interrupt */ - if (irq_attach(SAM_IRQ_TRNG, sam_interrupt)) + ret = irq_attach(SAM_IRQ_TRNG, sam_interrupt); + if (ret < 0) { ferr("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG); - return; + return ret; } /* Disable the interrupts at the TRNG */ @@ -374,16 +376,80 @@ void up_rnginitialize(void) putreg32(TRNG_CR_DISABLE | TRNG_CR_KEY, SAM_TRNG_CR); - /* Register the character driver */ - - ret = register_driver("/dev/random", &g_trngops, 0644, NULL); - if (ret < 0) - { - ferr("ERROR: Failed to register /dev/random\n"); - return; - } - /* Enable the TRNG interrupt at the AIC */ up_enable_irq(SAM_IRQ_TRNG); + return OK; } + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: devrandom_register + * + * Description: + * Initialize the TRNG hardware and register the /dev/random driver. + * Must be called BEFORE devurandom_register. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_RANDOM +void devrandom_register(void) +{ + int ret; + + ret = sam_rng_initialize(); + if (ret >= 0) + { + ret = register_driver("/dev/random", &g_trngops, 0644, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register /dev/random\n"); + } + } +} +#endif + +/**************************************************************************** + * Name: devurandom_register + * + * Description: + * Register /dev/urandom + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_ARCH +void devurandom_register(void) +{ + int ret; + +#ifndef CONFIG_DEV_RANDOM + ret = sam_rng_initialize(); + if (ret >= 0) +#endif + { + ret = register_driver("/dev/urandom", &g_trngops, 0644, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register /dev/urandom\n"); + } + } +} +#endif + +#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */ +#endif /* CONFIG_SAMA5_TRNG */ diff --git a/arch/arm/src/samv7/sam_mcan.c b/arch/arm/src/samv7/sam_mcan.c index 748b01b10b3..49e05f306b9 100644 --- a/arch/arm/src/samv7/sam_mcan.c +++ b/arch/arm/src/samv7/sam_mcan.c @@ -56,7 +56,7 @@ #include #include #include -#include +#include #include "cache.h" #include "up_internal.h" diff --git a/arch/arm/src/samv7/sam_mcan.h b/arch/arm/src/samv7/sam_mcan.h index 540800b37d3..07ecdd71ad3 100644 --- a/arch/arm/src/samv7/sam_mcan.h +++ b/arch/arm/src/samv7/sam_mcan.h @@ -45,7 +45,7 @@ #include "chip.h" #include "chip/sam_mcan.h" -#include +#include #if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || \ defined(CONFIG_SAMV7_MCAN1)) diff --git a/arch/arm/src/samv7/sam_trng.c b/arch/arm/src/samv7/sam_trng.c index 7dc29a77d83..d6cc16eb0b4 100644 --- a/arch/arm/src/samv7/sam_trng.c +++ b/arch/arm/src/samv7/sam_trng.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/samv7/sam_trng.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Derives from the SAMA5D3 TRNG Nuttx driver which, in turn, derives, in @@ -53,6 +53,8 @@ #include #include +#include +#include #include "up_arch.h" #include "up_internal.h" @@ -60,6 +62,9 @@ #include "sam_periphclks.h" #include "sam_trng.h" +#if defined(CONFIG_SAMV7_TRNG) +#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH) + /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -326,14 +331,10 @@ errout: } /**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: up_rnginitialize + * Name: sam_rng_initialize * * Description: - * Initialize the TRNG hardware and register the /dev/randome driver. + * Initialize the TRNG hardware. * * Input Parameters: * None @@ -343,7 +344,7 @@ errout: * ****************************************************************************/ -void up_rnginitialize(void) +static int sam_rng_initialize(void) { int ret; @@ -361,10 +362,11 @@ void up_rnginitialize(void) /* Initialize the TRNG interrupt */ - if (irq_attach(SAM_IRQ_TRNG, sam_interrupt)) + ret = irq_attach(SAM_IRQ_TRNG, sam_interrupt); + if (ret < 0) { ferr("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG); - return; + return ret; } /* Disable the interrupts at the TRNG */ @@ -375,16 +377,80 @@ void up_rnginitialize(void) putreg32(TRNG_CR_DISABLE | TRNG_CR_KEY, SAM_TRNG_CR); - /* Register the character driver */ - - ret = register_driver("/dev/random", &g_trngops, 0644, NULL); - if (ret < 0) - { - ferr("ERROR: Failed to register /dev/random\n"); - return; - } - /* Enable the TRNG interrupt at the AIC */ up_enable_irq(SAM_IRQ_TRNG); + return OK; } + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: devrandom_register + * + * Description: + * Initialize the TRNG hardware and register the /dev/random driver. + * Must be called BEFORE devurandom_register. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_RANDOM +void devrandom_register(void) +{ + int ret; + + ret = sam_rng_initialize(); + if (ret >= 0) + { + ret = register_driver("/dev/random", &g_trngops, 0644, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register /dev/random\n"); + } + } +} +#endif + +/**************************************************************************** + * Name: devurandom_register + * + * Description: + * Register /dev/urandom + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_ARCH +void devurandom_register(void) +{ + int ret; + +#ifndef CONFIG_DEV_RANDOM + ret = sam_rng_initialize(); + if (ret >= 0) +#endif + { + ret = register_driver("/dev/urandom", &g_trngops, 0644, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register /dev/urandom\n"); + } + } +} +#endif + +#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */ +#endif /* CONFIG_SAMV7_TRNG */ diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 932e74c81b5..3b7a1cf8cc8 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -1206,7 +1206,6 @@ config STM32_CONNECTIVITYLINE select STM32_HAVE_TIM5 select STM32_HAVE_TIM6 select STM32_HAVE_TIM7 - select STM32_HAVE_TIM8 select STM32_HAVE_ADC2 select STM32_HAVE_CAN1 select STM32_HAVE_CAN2 diff --git a/arch/arm/src/stm32/stm32_1wire.c b/arch/arm/src/stm32/stm32_1wire.c index 4c0fa6c0f77..d0afa9d8bba 100644 --- a/arch/arm/src/stm32/stm32_1wire.c +++ b/arch/arm/src/stm32/stm32_1wire.c @@ -54,9 +54,9 @@ #include #include -#include #include #include +#include #include diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c index 334c7337d62..ed973d57bd0 100644 --- a/arch/arm/src/stm32/stm32_can.c +++ b/arch/arm/src/stm32/stm32_can.c @@ -53,7 +53,7 @@ #include #include #include -#include +#include #include "up_internal.h" #include "up_arch.h" diff --git a/arch/arm/src/stm32/stm32_can.h b/arch/arm/src/stm32/stm32_can.h index e78b3af34f7..765dc95c0ca 100644 --- a/arch/arm/src/stm32/stm32_can.h +++ b/arch/arm/src/stm32/stm32_can.h @@ -45,7 +45,7 @@ #include "chip.h" #include "chip/stm32_can.h" -#include +#include /************************************************************************************ * Pre-processor Definitions diff --git a/arch/arm/src/stm32/stm32_exti_alarm.c b/arch/arm/src/stm32/stm32_exti_alarm.c index f38574f2523..2e6d582a4aa 100644 --- a/arch/arm/src/stm32/stm32_exti_alarm.c +++ b/arch/arm/src/stm32/stm32_exti_alarm.c @@ -53,10 +53,6 @@ #include "stm32_gpio.h" #include "stm32_exti.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Private Data ****************************************************************************/ @@ -65,10 +61,6 @@ static xcpt_t stm32_exti_callback; -/**************************************************************************** - * Public Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_freerun.c b/arch/arm/src/stm32/stm32_freerun.c index 836df043ad7..38133c7c365 100644 --- a/arch/arm/src/stm32/stm32_freerun.c +++ b/arch/arm/src/stm32/stm32_freerun.c @@ -53,7 +53,7 @@ #ifdef CONFIG_STM32_FREERUN /**************************************************************************** - * Private Functions + * Private Data ****************************************************************************/ static struct stm32_freerun_s *g_freerun; @@ -80,6 +80,7 @@ static struct stm32_freerun_s *g_freerun; * ****************************************************************************/ +#ifndef CONFIG_CLOCK_TIMEKEEPING static int stm32_freerun_handler(int irq, void *context) { struct stm32_freerun_s *freerun = g_freerun; @@ -90,6 +91,7 @@ static int stm32_freerun_handler(int irq, void *context) STM32_TIM_ACKINT(freerun->tch, 0); return OK; } +#endif /* CONFIG_CLOCK_TIMEKEEPING */ /**************************************************************************** * Public Functions @@ -140,15 +142,21 @@ int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan, * success. */ - freerun->chan = chan; - freerun->running = false; - freerun->overflow = 0; + freerun->chan = chan; + freerun->running = false; - g_freerun = freerun; +#ifdef CONFIG_CLOCK_TIMEKEEPING + freerun->counter_mask = 0xffffffffull; +#endif + +#ifndef CONFIG_CLOCK_TIMEKEEPING + freerun->overflow = 0; + g_freerun = freerun; /* Set up to receive the callback when the counter overflow occurs */ STM32_TIM_SETISR(freerun->tch, stm32_freerun_handler, 0); +#endif /* Set timer period */ @@ -157,8 +165,11 @@ int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan, /* Start the counter */ STM32_TIM_SETMODE(freerun->tch, STM32_TIM_MODE_UP); + +#ifndef CONFIG_CLOCK_TIMEKEEPING STM32_TIM_ACKINT(freerun->tch, 0); STM32_TIM_ENABLEINT(freerun->tch, 0); +#endif return OK; } @@ -182,6 +193,8 @@ int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan, * ****************************************************************************/ +#ifndef CONFIG_CLOCK_TIMEKEEPING + int stm32_freerun_counter(struct stm32_freerun_s *freerun, struct timespec *ts) { @@ -257,6 +270,16 @@ int stm32_freerun_counter(struct stm32_freerun_s *freerun, return OK; } +#else /* CONFIG_CLOCK_TIMEKEEPING */ + +int stm32_freerun_counter(struct stm32_freerun_s *freerun, uint64_t *counter) +{ + *counter = (uint64_t)STM32_TIM_GETCOUNTER(freerun->tch); + return OK; +} + +#endif /* CONFIG_CLOCK_TIMEKEEPING */ + /**************************************************************************** * Name: stm32_freerun_uninitialize * diff --git a/arch/arm/src/stm32/stm32_freerun.h b/arch/arm/src/stm32/stm32_freerun.h index 08dd1786da7..bc7609666cf 100644 --- a/arch/arm/src/stm32/stm32_freerun.h +++ b/arch/arm/src/stm32/stm32_freerun.h @@ -64,9 +64,16 @@ struct stm32_freerun_s { uint8_t chan; /* The timer/counter in use */ bool running; /* True: the timer is running */ - uint32_t overflow; /* Timer counter overflow */ FAR struct stm32_tim_dev_s *tch; /* Handle returned by stm32_tim_init() */ uint32_t frequency; + +#ifndef CONFIG_CLOCK_TIMEKEEPING + uint32_t overflow; /* Timer counter overflow */ +#endif + +#ifdef CONFIG_CLOCK_TIMEKEEPING + uint64_t counter_mask; +#endif }; /**************************************************************************** @@ -127,9 +134,18 @@ int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan, * ****************************************************************************/ +#ifndef CONFIG_CLOCK_TIMEKEEPING + int stm32_freerun_counter(struct stm32_freerun_s *freerun, struct timespec *ts); +#else /* CONFIG_CLOCK_TIMEKEEPING */ + +int stm32_freerun_counter(struct stm32_freerun_s *freerun, + uint64_t *counter); + +#endif /* CONFIG_CLOCK_TIMEKEEPING */ + /**************************************************************************** * Name: stm32_freerun_uninitialize * diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index ea7c4ddfcbe..ff40bf8d033 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -253,15 +253,9 @@ static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, if (irq >= STM32_IRQ_FIRST) { - n = irq - STM32_IRQ_FIRST; + n = irq - STM32_IRQ_FIRST; *regaddr = NVIC_IRQ_ENABLE(n) + offset; - - while (n >= 32) - { - n -= 32; - } - - *bit = 1 << n; + *bit = (uint32_t)1 << (n & 0x1f); } /* Handle processor exceptions. Only a few can be disabled */ diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index 7b8f4224e08..425f256ba05 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -48,7 +48,7 @@ #include #include -#include +#include #include #include "up_internal.h" diff --git a/arch/arm/src/stm32/stm32_pwm.h b/arch/arm/src/stm32/stm32_pwm.h index e636ead3a37..1321389046e 100644 --- a/arch/arm/src/stm32/stm32_pwm.h +++ b/arch/arm/src/stm32/stm32_pwm.h @@ -41,7 +41,7 @@ /* The STM32 does not have dedicated PWM hardware. Rather, pulsed output control * is a capabilitiy of the STM32 timers. The logic in this file implements the * lower half of the standard, NuttX PWM interface using the STM32 timers. That - * interface is described in include/nuttx/pwm.h. + * interface is described in include/nuttx/drivers/pwm.h. */ /************************************************************************************ diff --git a/arch/arm/src/stm32/stm32_rng.c b/arch/arm/src/stm32/stm32_rng.c index fce55ebf0a3..8dde6a6c35c 100644 --- a/arch/arm/src/stm32/stm32_rng.c +++ b/arch/arm/src/stm32/stm32_rng.c @@ -46,16 +46,21 @@ #include #include +#include +#include #include "up_arch.h" #include "chip/stm32_rng.h" #include "up_internal.h" +#if defined(CONFIG_STM32_RNG) +#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH) + /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int stm32_rnginitialize(void); +static int stm32_rng_initialize(void); static int stm32_interrupt(int irq, void *context); static void stm32_enable(void); static void stm32_disable(void); @@ -98,7 +103,7 @@ static const struct file_operations g_rngops = * Private functions ****************************************************************************/ -static int stm32_rnginitialize() +static int stm32_rng_initialize() { uint32_t regval; @@ -258,8 +263,52 @@ static ssize_t stm32_read(struct file *filep, char *buffer, size_t buflen) * Public Functions ****************************************************************************/ -void up_rnginitialize() +/**************************************************************************** + * Name: devrandom_register + * + * Description: + * Initialize the RNG hardware and register the /dev/random driver. + * Must be called BEFORE devurandom_register. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_RANDOM +void devrandom_register(void) { - stm32_rnginitialize(); - register_driver("/dev/random", &g_rngops, 0444, NULL); + stm32_rng_initialize(); + (void)register_driver("/dev/random", &g_rngops, 0444, NULL); } +#endif + +/**************************************************************************** + * Name: devurandom_register + * + * Description: + * Register /dev/urandom + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_ARCH +void devurandom_register(void) +{ +#ifndef CONFIG_DEV_RANDOM + stm32_rng_initialize(); +#endif + (void)register_driver("/dev/urandom", &g_rngops, 0444, NULL); +} +#endif + +#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */ +#endif /* CONFIG_STM32_RNG */ diff --git a/arch/arm/src/stm32/stm32_tickless.c b/arch/arm/src/stm32/stm32_tickless.c index eadef5ce90d..82d7a593d25 100644 --- a/arch/arm/src/stm32/stm32_tickless.c +++ b/arch/arm/src/stm32/stm32_tickless.c @@ -272,11 +272,44 @@ void up_timer_initialize(void) * ****************************************************************************/ +#ifndef CONFIG_CLOCK_TIMEKEEPING + int up_timer_gettime(FAR struct timespec *ts) { return stm32_freerun_counter(&g_tickless.freerun, ts); } +#else + +int up_timer_getcounter(FAR uint64_t *cycles) +{ + return stm32_freerun_counter(&g_tickless.freerun, cycles); +} + +#endif /* CONFIG_CLOCK_TIMEKEEPING */ + +/**************************************************************************** + * Name: up_timer_getmask + * + * Description: + * To be provided + * + * Input Parameters: + * mask - Location to return the 64-bit mask + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_CLOCK_TIMEKEEPING +void up_timer_getmask(FAR uint64_t *mask) +{ + DEBUGASSERT(mask != NULL); + *mask = g_tickless.freerun.counter_mask; +} +#endif /* CONFIG_CLOCK_TIMEKEEPING */ + /**************************************************************************** * Name: up_timer_cancel * diff --git a/arch/arm/src/stm32/stm32f40xxx_rtcc.c b/arch/arm/src/stm32/stm32f40xxx_rtcc.c index c20024d8b1a..7145243b894 100644 --- a/arch/arm/src/stm32/stm32f40xxx_rtcc.c +++ b/arch/arm/src/stm32/stm32f40xxx_rtcc.c @@ -136,6 +136,7 @@ struct alm_cbinfo_s /* Callback to use when an EXTI is activated */ static struct alm_cbinfo_s g_alarmcb[RTC_ALARM_LAST]; +static bool g_alarm_enabled; /* True: Alarm interrupts are enabled */ #endif /**************************************************************************** @@ -157,6 +158,7 @@ static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg); static int rtchw_check_alrbwf(void); static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg); #endif +static inline void rtc_enable_alarm(void); #endif /**************************************************************************** @@ -811,6 +813,46 @@ rtchw_set_alrmbr_exit: } #endif +/**************************************************************************** + * Name: rtc_enable_alarm + * + * Description: + * Enable ALARM interrupts + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static inline void rtc_enable_alarm(void) +{ + /* Is the alarm already enabled? */ + + if (!g_alarm_enabled) + { + /* Configure RTC interrupt to catch alarm interrupts. All RTC + * interrupts are connected to the EXTI controller. To enable the + * RTC Alarm interrupt, the following sequence is required: + * + * 1. Configure and enable the EXTI Line 17 RTC ALARM in interrupt + * mode and select the rising edge sensitivity. + * For STM32F4xx + * EXTI line 21 RTC Tamper & Timestamp + * EXTI line 22 RTC Wakeup + * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC. + * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B). + */ + + stm32_exti_alarm(true, false, true, stm32_rtc_alarm_handler); + g_alarm_enabled = true; + } +} +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -1010,25 +1052,7 @@ int up_rtc_initialize(void) return -ETIMEDOUT; } -#ifdef CONFIG_RTC_ALARM - /* Configure RTC interrupt to catch alarm interrupts. All RTC interrupts - * are connected to the EXTI controller. To enable the RTC Alarm - * interrupt, the following sequence is required: - * - * 1. Configure and enable the EXTI Line 17 RTC ALARM in interrupt mode - * and select the rising edge sensitivity. - * For STM32F4xx - * EXTI line 21 RTC Tamper & Timestamp - * EXTI line 22 RTC Wakeup - * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC. - * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B). - */ - - stm32_exti_alarm(true, false, true, stm32_rtc_alarm_handler); - rtc_dumpregs("After InitExtiAlarm"); -#else rtc_dumpregs("After Initialization"); -#endif g_rtc_enabled = true; return OK; @@ -1321,6 +1345,10 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) ASSERT(alminfo != NULL); DEBUGASSERT(RTC_ALARM_LAST > alminfo->as_id); + /* Make sure the the alarm interrupt is enabled at the NVIC */ + + rtc_enable_alarm(); + /* REVISIT: Should test that the time is in the future */ rtc_dumptime(&alminfo->as_time, "New alarm time"); @@ -1335,7 +1363,7 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) (rtc_bin2bcd(alminfo->as_time.tm_hour) << RTC_ALRMR_HU_SHIFT) | (rtc_bin2bcd(alminfo->as_time.tm_mday) << RTC_ALRMR_DU_SHIFT); - /* Set the alarm in hardware and enable interrupts */ + /* Set the alarm in hardware and enable interrupts from the RTC */ switch (alminfo->as_id) { diff --git a/arch/arm/src/stm32l4/stm32l4_can.c b/arch/arm/src/stm32l4/stm32l4_can.c index 7891319e8f1..18b49a86e74 100644 --- a/arch/arm/src/stm32l4/stm32l4_can.c +++ b/arch/arm/src/stm32l4/stm32l4_can.c @@ -57,7 +57,7 @@ #include #include #include -#include +#include #include "up_internal.h" #include "up_arch.h" diff --git a/arch/arm/src/stm32l4/stm32l4_can.h b/arch/arm/src/stm32l4/stm32l4_can.h index 453b031bda2..86eb26fb659 100644 --- a/arch/arm/src/stm32l4/stm32l4_can.h +++ b/arch/arm/src/stm32l4/stm32l4_can.h @@ -49,7 +49,7 @@ #include "chip.h" #include "chip/stm32l4_can.h" -#include +#include /************************************************************************************ * Pre-processor Definitions diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c index 8e90bf0fa8a..720c05ecc69 100644 --- a/arch/arm/src/stm32l4/stm32l4_irq.c +++ b/arch/arm/src/stm32l4/stm32l4_irq.c @@ -1,8 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32l4/stm32l4_irq.c - * arch/arm/src/chip/stm32l4_irq.c * - * Copyright (C) 2009-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -90,10 +89,6 @@ volatile uint32_t *g_current_regs[1]; extern uint32_t _vectors[]; -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -252,15 +247,9 @@ static int stm32l4_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, if (irq >= STM32L4_IRQ_FIRST) { - n = irq - STM32L4_IRQ_FIRST; + n = irq - STM32L4_IRQ_FIRST; *regaddr = NVIC_IRQ_ENABLE(n) + offset; - - while (n >= 32) - { - n -= 32; - } - - *bit = 1 << n; + *bit = (uint32_t)1 << (n & 0x1f); } /* Handle processor exceptions. Only a few can be disabled */ diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.c b/arch/arm/src/stm32l4/stm32l4_pwm.c index b5cd35fb29d..d3478ea0df2 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwm.c +++ b/arch/arm/src/stm32l4/stm32l4_pwm.c @@ -48,7 +48,7 @@ #include #include -#include +#include #include #include "up_internal.h" diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.h b/arch/arm/src/stm32l4/stm32l4_pwm.h index fff04e9e476..942aef0cfa5 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwm.h +++ b/arch/arm/src/stm32l4/stm32l4_pwm.h @@ -41,7 +41,7 @@ /* The STM32L4 does not have dedicated PWM hardware. Rather, pulsed output control * is a capability of the STM32L4 timers. The logic in this file implements the * lower half of the standard, NuttX PWM interface using the STM32L4 timers. That - * interface is described in include/nuttx/pwm.h. + * interface is described in include/nuttx/drivers/pwm.h. */ /************************************************************************************ diff --git a/arch/arm/src/stm32l4/stm32l4_rng.c b/arch/arm/src/stm32l4/stm32l4_rng.c index f9324fb6f1e..a544847061b 100644 --- a/arch/arm/src/stm32l4/stm32l4_rng.c +++ b/arch/arm/src/stm32l4/stm32l4_rng.c @@ -47,18 +47,21 @@ #include #include +#include +#include #include "up_arch.h" #include "chip/stm32l4_rng.h" #include "up_internal.h" -#ifdef CONFIG_STM32L4_RNG +#if defined(CONFIG_STM32L4_RNG) +#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH) /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int stm32l4_rnginitialize(void); +static int stm32l4_rng_initialize(void); static int stm32l4_rnginterrupt(int irq, void *context); static void stm32l4_rngenable(void); static void stm32l4_rngdisable(void); @@ -105,7 +108,7 @@ static const struct file_operations g_rngops = * Private functions ****************************************************************************/ -static int stm32l4_rnginitialize(void) +static int stm32l4_rng_initialize(void) { _info("Initializing RNG\n"); @@ -289,10 +292,52 @@ static ssize_t stm32l4_rngread(struct file *filep, char *buffer, size_t buflen) * Public Functions ****************************************************************************/ -void up_rnginitialize(void) -{ - stm32l4_rnginitialize(); - register_driver("/dev/random", &g_rngops, 0444, NULL); -} +/**************************************************************************** + * Name: devrandom_register + * + * Description: + * Initialize the RNG hardware and register the /dev/random driver. + * Must be called BEFORE devurandom_register. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ +#ifdef CONFIG_DEV_RANDOM +void devrandom_register(void) +{ + stm32l4_rng_initialize(); + (void)register_driver("/dev/random", &g_rngops, 0444, NULL); +} +#endif + +/**************************************************************************** + * Name: devurandom_register + * + * Description: + * Register /dev/urandom + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_ARCH +void devurandom_register(void) +{ +#ifndef CONFIG_DEV_RANDOM + stm32l4_rng_initialize(); +#endif + (void)register_driver("/dev/urandom", &g_rngops, 0444, NULL); +} +#endif + +#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */ #endif /* CONFIG_STM32L4_RNG */ diff --git a/arch/arm/src/stm32l4/stm32l4_rtcc.c b/arch/arm/src/stm32l4/stm32l4_rtcc.c index 338d9a54076..1ee4306080f 100644 --- a/arch/arm/src/stm32l4/stm32l4_rtcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rtcc.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/stm32l4/stm32l4_rtcc.c * - * Copyright (C) 2012-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * dev@ziggurat29.com (adaptations to stm32l4) * @@ -134,6 +134,7 @@ struct alm_cbinfo_s /* Callback to use when an EXTI is activated */ static struct alm_cbinfo_s g_alarmcb[RTC_ALARM_LAST]; +static bool g_alarm_enabled; /* True: Alarm interrupts are enabled */ #endif /************************************************************************************ @@ -153,6 +154,7 @@ static int rtchw_check_alrawf(void); static int rtchw_check_alrbwf(void); static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg); static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg); +static inline void rtc_enable_alarm(void); #endif /************************************************************************************ @@ -234,31 +236,6 @@ static void rtc_dumptime(FAR const struct tm *tp, FAR const char *msg) # define rtc_dumptime(tp, msg) #endif -/************************************************************************************ - * Name: rtc_is_inits - * - * Description: - * Returns 'true' if the RTC has been initialized (according to the RTC itself). - * It will be 'false' if the RTC has never been initialized since first time power - * up, and the counters are stopped until it is first initialized. - * - * Input Parameters: - * None - * - * Returned Value: - * bool -- true if the INITS flag is set in the ISR. - * - ************************************************************************************/ - -bool rtc_is_inits(void) -{ - uint32_t regval; - - regval = getreg32(STM32L4_RTC_ISR); - - return (regval & RTC_ISR_INITS) ? true : false; -} - /************************************************************************************ * Name: rtc_wprunlock * @@ -791,10 +768,74 @@ rtchw_set_alrmbr_exit: } #endif +/**************************************************************************** + * Name: rtc_enable_alarm + * + * Description: + * Enable ALARM interrupts + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static inline void rtc_enable_alarm(void) +{ + /* Is the alarm already enabled? */ + + if (!g_alarm_enabled) + { + /* Configure RTC interrupt to catch alarm interrupts. All RTC + * interrupts are connected to the EXTI controller. To enable the + * RTC Alarm interrupt, the following sequence is required: + * + * 1. Configure and enable the EXTI Line 18 in interrupt mode and + * select the rising edge sensitivity. + * EXTI line 19 RTC Tamper or Timestamp or CSS_LSE + * EXTI line 20 RTC Wakeup + * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC. + * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B). + */ + + stm32l4_exti_alarm(true, false, true, stm32l4_rtc_alarm_handler); + g_alarm_enabled = true; + } +} +#endif + /************************************************************************************ * Public Functions ************************************************************************************/ +/************************************************************************************ + * Name: rtc_is_inits + * + * Description: + * Returns 'true' if the RTC has been initialized (according to the RTC itself). + * It will be 'false' if the RTC has never been initialized since first time power + * up, and the counters are stopped until it is first initialized. + * + * Input Parameters: + * None + * + * Returned Value: + * bool -- true if the INITS flag is set in the ISR. + * + ************************************************************************************/ + +bool rtc_is_inits(void) +{ + uint32_t regval; + + regval = getreg32(STM32L4_RTC_ISR); + + return (regval & RTC_ISR_INITS) ? true : false; +} + /************************************************************************************ * Name: up_rtc_initialize * @@ -949,22 +990,6 @@ int up_rtc_initialize(void) (void)stm32l4_pwr_enablebkp(false); } -#ifdef CONFIG_RTC_ALARM - /* Configure RTC interrupt to catch alarm interrupts. All RTC interrupts are - * connected to the EXTI controller. To enable the RTC Alarm interrupt, the - * following sequence is required: - * - * 1. Configure and enable the EXTI Line 18 in interrupt mode and select the - * rising edge sensitivity. - * EXTI line 19 RTC Tamper or Timestamp or CSS_LSE - * EXTI line 20 RTC Wakeup - * 2. Configure and enable the RTC_Alarm IRQ channel in the NVIC. - * 3. Configure the RTC to generate RTC alarms (Alarm A or Alarm B). - */ - - stm32l4_exti_alarm(true, false, true, stm32l4_rtc_alarm_handler); -#endif - g_rtc_enabled = true; rtc_dumpregs("After Initialization"); @@ -1241,6 +1266,10 @@ int stm32l4_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) ASSERT(alminfo != NULL); DEBUGASSERT(RTC_ALARM_LAST > alminfo->as_id); + /* Make sure the the alarm interrupt is enabled at the NVIC */ + + rtc_enable_alarm(); + /* REVISIT: Should test that the time is in the future */ rtc_dumptime(&alminfo->as_time, "New alarm time"); @@ -1249,7 +1278,7 @@ int stm32l4_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) alarmreg = rtc_reg_alrmr_bin2bcd(&alminfo->as_time); - /* Set the alarm in hardware and enable interrupts */ + /* Set the alarm in hardware and enable interrupts from the RTC */ switch (alminfo->as_id) { diff --git a/arch/avr/src/common/up_initialize.c b/arch/avr/src/common/up_initialize.c index 669821631c0..55a9b167530 100644 --- a/arch/avr/src/common/up_initialize.c +++ b/arch/avr/src/common/up_initialize.c @@ -43,13 +43,16 @@ #include #include -#include +#include #include #include #include #include #include #include +#include +#include +#include #include @@ -199,11 +202,21 @@ void up_initialize(void) up_irqinitialize(); - /* Initialize the DMA subsystem if the weak function stm32_dmainitialize has been +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif + +#ifdef CONFIG_ARCH_DMA + /* Initialize the DMA subsystem if the weak function up_dmainitialize has been * brought into the build */ -#ifdef CONFIG_ARCH_DMA #ifdef CONFIG_HAVE_WEAKFUNCTIONS if (up_dmainitialize) #endif @@ -226,6 +239,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -258,6 +279,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on only minimal OS initialization. @@ -265,6 +292,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/arch/hc/include/m9s12/irq.h b/arch/hc/include/m9s12/irq.h index 63ab556b8e4..d70e40de349 100644 --- a/arch/hc/include/m9s12/irq.h +++ b/arch/hc/include/m9s12/irq.h @@ -108,7 +108,7 @@ * Port J: Pins 0-3 and 6-7 */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ /* To conserve space, interrupts must also be configured, port by port */ @@ -156,7 +156,7 @@ # endif #else # define HCS12_IRQ_NIRQS HCS12_IRQ_NVECTORS -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_HCS12_GPIOIRQ */ #define HCS12_IRQ_VILLEGAL HCS12_IRQ_NIRQS /* Any reserved vector */ #define NR_IRQS (HCS12_IRQ_NIRQS+1) diff --git a/arch/hc/src/common/up_initialize.c b/arch/hc/src/common/up_initialize.c index c5b1149d04a..1d75e24baf9 100644 --- a/arch/hc/src/common/up_initialize.c +++ b/arch/hc/src/common/up_initialize.c @@ -44,13 +44,16 @@ #include #include #include -#include +#include #include #include #include #include #include #include +#include +#include +#include #include "up_arch.h" #include "up_internal.h" @@ -125,11 +128,21 @@ void up_initialize(void) up_irqinitialize(); - /* Initialize the DMA subsystem if the weak function stm32_dmainitialize has been +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif + +#ifdef CONFIG_ARCH_DMA + /* Initialize the DMA subsystem if the weak function up_dmainitialize has been * brought into the build */ -#ifdef CONFIG_ARCH_DMA #ifdef CONFIG_HAVE_WEAKFUNCTIONS if (up_dmainitialize) #endif @@ -152,6 +165,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -184,6 +205,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on only minimal OS initialization. @@ -191,6 +218,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/arch/hc/src/m9s12/Kconfig b/arch/hc/src/m9s12/Kconfig index 9e05745e49c..37c357c79d7 100644 --- a/arch/hc/src/m9s12/Kconfig +++ b/arch/hc/src/m9s12/Kconfig @@ -40,4 +40,12 @@ config HCS12_NONBANKED in memory. endmenu # HSC12 Build Options + +config HCS12_GPIOIRQ + bool "GPIO interrupt support" + default n + depends on EXPERIMENTAL + ---help--- + Enable support for GPIO interrupts (not implemented) + endif # ARCH_HSC12 diff --git a/arch/hc/src/m9s12/m9s12.h b/arch/hc/src/m9s12/m9s12.h index 9a1c9711599..50e3a14abe7 100644 --- a/arch/hc/src/m9s12/m9s12.h +++ b/arch/hc/src/m9s12/m9s12.h @@ -266,7 +266,7 @@ bool hcs12_gpioread(uint16_t pinset); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ void hcs12_gpioirqenable(int irq); #else # define hcs12_gpioirqenable(irq) @@ -280,7 +280,7 @@ void hcs12_gpioirqenable(int irq); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ void hcs12_gpioirqdisable(int irq); #else # define hcs12_gpioirqdisable(irq) diff --git a/arch/hc/src/m9s12/m9s12_gpioirq.c b/arch/hc/src/m9s12/m9s12_gpioirq.c index 4dae0551244..d16c208f4cb 100644 --- a/arch/hc/src/m9s12/m9s12_gpioirq.c +++ b/arch/hc/src/m9s12/m9s12_gpioirq.c @@ -75,7 +75,7 @@ * ****************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ static int hcs12_mapirq(int irq, uint16_t *regaddr, uint8_t *pin) { if (irq >= HCC12_IRQ_PGFIRST) @@ -121,7 +121,7 @@ static int hcs12_mapirq(int irq, uint16_t *regaddr, uint8_t *pin) } return -EINVAL; } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_HCS12_GPIOIRQ */ /**************************************************************************** * Name: up_gpioa/b/cinterrupt @@ -131,7 +131,7 @@ static int hcs12_mapirq(int irq, uint16_t *regaddr, uint8_t *pin) * ****************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ static int hcs12_interrupt(uint16_t base, int irq0, uint8_t valid, void *context) { uint8_t pending; @@ -204,7 +204,7 @@ static int hcs12_pjinterrupt(int irq, void *context) HCS12_IRQ_PJSET, context); } #endif -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_HCS12_GPIOIRQ */ /**************************************************************************** * Public Functions @@ -229,7 +229,7 @@ void hcs12_gpioirqinitialize(void) /* Attach GPIO IRQ interrupt handlers */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ # ifdef CONFIG_HCS12_PORTG_INTS irq_attach(HCS12_IRQ_VPORTG, hcs12_pginterrupt); # endif @@ -239,7 +239,7 @@ void hcs12_gpioirqinitialize(void) # ifdef CONFIG_HCS12_PORTJ_INTS irq_attach(HCS12_IRQ_VPORTJ, hcs12_pjinterrupt); # endif -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_HCS12_GPIOIRQ */ } /**************************************************************************** @@ -250,7 +250,7 @@ void hcs12_gpioirqinitialize(void) * ****************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ void hcs12_gpioirqenable(int irq) { uint16_t regaddr; @@ -265,7 +265,7 @@ void hcs12_gpioirqenable(int irq) leave_critical_section(flags); } } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_HCS12_GPIOIRQ */ /**************************************************************************** * Name: hcs12_gpioirqdisable @@ -275,7 +275,7 @@ void hcs12_gpioirqenable(int irq) * ****************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ void hcs12_gpioirqdisable(int irq) { uint16_t regaddr; @@ -290,5 +290,5 @@ void hcs12_gpioirqdisable(int irq) leave_critical_section(flags); } } -#endif /* CONFIG_GPIO_IRQ */ +#endif /* CONFIG_HCS12_GPIOIRQ */ diff --git a/arch/hc/src/m9s12/m9s12_irq.c b/arch/hc/src/m9s12/m9s12_irq.c index a91c270f099..4ce19d70e90 100644 --- a/arch/hc/src/m9s12/m9s12_irq.c +++ b/arch/hc/src/m9s12/m9s12_irq.c @@ -75,7 +75,7 @@ void up_irqinitialize(void) * GPIO pins. */ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_HCS12_GPIOIRQ hcs12_gpioirqinitialize(); #endif diff --git a/arch/mips/src/common/up_initialize.c b/arch/mips/src/common/up_initialize.c index d6d634c9bc7..609ce62f826 100644 --- a/arch/mips/src/common/up_initialize.c +++ b/arch/mips/src/common/up_initialize.c @@ -44,13 +44,16 @@ #include #include #include -#include +#include #include #include #include #include #include #include +#include +#include +#include #include @@ -127,11 +130,21 @@ void up_initialize(void) up_irqinitialize(); - /* Initialize the DMA subsystem if the weak function stm32_dmainitialize has been +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif + +#ifdef CONFIG_ARCH_DMA + /* Initialize the DMA subsystem if the weak function up_dmainitialize has been * brought into the build */ -#ifdef CONFIG_ARCH_DMA #ifdef CONFIG_HAVE_WEAKFUNCTIONS if (up_dmainitialize) #endif @@ -154,6 +167,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -186,6 +207,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on only minimal OS initialization. @@ -193,6 +220,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/arch/rgmp/src/nuttx.c b/arch/rgmp/src/nuttx.c index 4a274264d7f..07faf590fd7 100644 --- a/arch/rgmp/src/nuttx.c +++ b/arch/rgmp/src/nuttx.c @@ -45,14 +45,21 @@ #include #include -#include -#include -#include #include #include #include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include + #include "task/task.h" #include "sched/sched.h" #include "group/group.h" @@ -85,23 +92,90 @@ static inline void up_switchcontext(struct tcb_s *ctcb, struct tcb_s *ntcb) void up_initialize(void) { - extern pidhash_t g_pidhash[]; - extern void vdev_init(void); - extern void nuttx_arch_init(void); + extern pidhash_t g_pidhash[]; + extern void vdev_init(void); + extern void nuttx_arch_init(void); - // initialize the current_task to g_idletcb - current_task = g_pidhash[PIDHASH(0)].tcb; + /* Initialize the current_task to g_idletcb */ - // OS memory alloc system is ready - use_os_kmalloc = 1; + current_task = g_pidhash[PIDHASH(0)].tcb; - // rgmp vdev init - vdev_init(); + /* OS memory alloc system is ready */ - nuttx_arch_init(); + use_os_kmalloc = 1; - // enable interrupt - local_irq_enable(); + /* rgmp vdev init */ + + vdev_init(); + + nuttx_arch_init(); + +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + + /* Early initialization of the system logging device. Some SYSLOG channel + * can be initialized early in the initialization sequence because they + * depend on only minimal OS initialization. + */ + + syslog_initialize(SYSLOG_INIT_EARLY); + + /* Register devices */ + +#if CONFIG_NFILE_DESCRIPTORS > 0 + +#if defined(CONFIG_DEV_NULL) + devnull_register(); /* Standard /dev/null */ +#endif + +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + +#if defined(CONFIG_DEV_ZERO) + devzero_register(); /* Standard /dev/zero */ +#endif + +#if defined(CONFIG_DEV_LOOP) + loop_register(); /* Standard /dev/loop */ +#endif +#endif /* CONFIG_NFILE_DESCRIPTORS */ + +#if defined(CONFIG_SCHED_INSTRUMENTATION_BUFFER) && \ + defined(CONFIG_DRIVER_NOTE) + note_register(); /* Non-standard /dev/note */ +#endif + +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + + /* Enable interrupt */ + + local_irq_enable(); } void up_idle(void) @@ -251,6 +325,7 @@ void up_release_stack(struct tcb_s *dtcb, uint8_t ttype) * hold the blocked task TCB. * ****************************************************************************/ + void up_block_task(struct tcb_s *tcb, tstate_t task_state) { /* Verify that the context switch can be performed */ diff --git a/arch/rgmp/src/x86/arch_nuttx.c b/arch/rgmp/src/x86/arch_nuttx.c index d5ae6916862..32f919cd784 100644 --- a/arch/rgmp/src/x86/arch_nuttx.c +++ b/arch/rgmp/src/x86/arch_nuttx.c @@ -44,7 +44,6 @@ #include #include - void nuttx_arch_init(void) { extern void e1000_mod_init(void); @@ -57,7 +56,6 @@ void nuttx_arch_init(void) // setup e1000 e1000_mod_init(); #endif - } void nuttx_arch_exit(void) diff --git a/arch/sh/src/common/up_initialize.c b/arch/sh/src/common/up_initialize.c index c333f4b9939..2cd40a07188 100644 --- a/arch/sh/src/common/up_initialize.c +++ b/arch/sh/src/common/up_initialize.c @@ -44,13 +44,16 @@ #include #include #include -#include +#include #include #include #include #include #include #include +#include +#include +#include #include "up_arch.h" #include "up_internal.h" @@ -129,9 +132,19 @@ void up_initialize(void) up_irqinitialize(); - /* Initialize the system timer interrupt */ +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS) + /* Initialize the system timer interrupt */ + up_timer_initialize(); #endif @@ -143,6 +156,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -178,6 +199,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on only minimal OS initialization. @@ -185,6 +212,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/arch/sim/Kconfig b/arch/sim/Kconfig index 7384d3d7230..975d0449a5b 100644 --- a/arch/sim/Kconfig +++ b/arch/sim/Kconfig @@ -211,8 +211,33 @@ config SIM_TCNWAITERS default 4 depends on !POLL_DISABLE && SIM_TOUCHSCREEN ---help--- - The maximum number of threads that can be waiting on poll() for a touchscreen event. - Default: 4 + The maximum number of threads that can be waiting on poll() for a + touchscreen event. Default: 4 + +config SIM_IOEXPANDER + bool "Simulated I/O Expander" + default n + depends on IOEXPANDER + select IOEXPANDER_INT_ENABLE + ---help--- + Build a simple, simulated I/O Expander chip simulation (for testing + purposes only). + +if SIM_IOEXPANDER + +config SIM_INT_NCALLBACKS + int "Max number of interrupt callbacks" + default 4 + ---help--- + This is the maximum number of interrupt callbacks supported + +config SIM_INT_POLLDELAY + int "Interrupt poll delay (used)" + default 500000 + ---help--- + This microsecond delay defines the polling rate for missed interrupts. + +endif # SIM_IOEXPANDER config SIM_SPIFLASH bool "Simulated SPI FLASH with SMARTFS" @@ -245,20 +270,6 @@ config SIM_SPIFLASH_128M endchoice -config SIM_SPIFLASH_MANUFACTURER - hex "Hex ID of the FLASH manufacturer code" - default 0x20 - depends on SIM_SPIFLASH - ---help--- - Allows the simulated FLASH Manufacturer ID to be set. - -config SIM_SPIFLASH_MEMORY_TYPE - hex "Hex ID of the FLASH Memory Type code" - default 0x20 - depends on SIM_SPIFLASH - ---help--- - Allows the simulated FLASH Memory Type code to be set. - config SIM_SPIFLASH_SECTORSIZE int "FLASH Sector Erase Size" default 65536 @@ -277,6 +288,51 @@ config SIM_SPIFLASH_SUBSECTORSIZE Sets the smaller sub-sector erase size supported by the FLASH emulation +config SIM_SPIFLASH_M25P + bool "Enable M25Pxx FLASH" + depends on MTD_M25P + ---help--- + Enables simulation of an M25P type FLASH + +config SIM_SPIFLASH_SST26 + bool "Enable SST26 FLASH" + depends on MTD_SST26 + ---help--- + Enables simulation of an SST26 type FLASH + +config SIM_SPIFLASH_W25 + bool "Enable W25 FLASH" + depends on MTD_W25 + ---help--- + Enables simulation of a W25 type FLASH + +config SIM_SPIFLASH_CUSTOM + bool "Enable Emulation of a Custom Manufacturer / ID FLASH" + depends on SIM_SPIFLASH + ---help--- + Enables simulation of FLASH with a custom Manufacturer, ID and Capacity + +config SIM_SPIFLASH_MANUFACTURER + hex "Hex ID of the FLASH manufacturer code" + default 0x20 + depends on SIM_SPIFLASH_CUSTOM + ---help--- + Allows the simulated FLASH Manufacturer ID to be set. + +config SIM_SPIFLASH_MEMORY_TYPE + hex "Hex ID of the FLASH Memory Type code" + default 0x20 + depends on SIM_SPIFLASH_CUSTOM + ---help--- + Allows the simulated FLASH Memory Type code to be set. + +config SIM_SPIFLASH_CAPACITY + hex "Hex ID of the FLASH capacity code" + default 0x14 + depends on SIM_SPIFLASH_CUSTOM + ---help--- + Allows the simulated FLASH Memory Capacity code to be set. + config SIM_SPIFLASH_PAGESIZE int "FLASH Write / Program Page Size" default 256 @@ -289,4 +345,79 @@ config SIM_SPIFLASH_PAGESIZE "wrap" causing the initial data sent to be overwritten. This is consistent with standard SPI FLASH operation. -endif +config SIM_QSPIFLASH + bool "Simulated QSPI FLASH with SMARTFS" + default n + select FS_SMARTFS + select MTD_SMART + ---help--- + Adds a simulated QSPI FLASH that responds to N25QXXX style + commands on the QSPI bus. + +choice + prompt "Simulated QSPI FLASH Size" + default SIM_QSPIFLASH_1M + depends on SIM_QSPIFLASH + +config SIM_QSPIFLASH_1M + bool "1 MBit (128K Byte)" + +config SIM_QSPIFLASH_8M + bool "8 MBit (1M Byte)" + +config SIM_QSPIFLASH_32M + bool "32 MBit (4M Byte)" + +config SIM_QSPIFLASH_64M + bool "64 MBit (8M Byte)" + +config SIM_QSPIFLASH_128M + bool "128 MBit (16M Byte)" + +endchoice + +config SIM_QSPIFLASH_MANUFACTURER + hex "Hex ID of the FLASH manufacturer code" + default 0x20 + depends on SIM_QSPIFLASH + ---help--- + Allows the simulated FLASH Manufacturer ID to be set. + +config SIM_QSPIFLASH_MEMORY_TYPE + hex "Hex ID of the FLASH Memory Type code" + default 0xba + depends on SIM_QSPIFLASH + ---help--- + Allows the simulated FLASH Memory Type code to be set. + +config SIM_QSPIFLASH_SECTORSIZE + int "FLASH Sector Erase Size" + default 65536 + depends on SIM_QSPIFLASH + ---help--- + Sets the large sector erase size that the part simulates. + This driver simulates QSPI devices that have both a large + sector erase as well as a "sub-sector" (per the datasheet) + erase size (typically 4K bytes). + +config SIM_QSPIFLASH_SUBSECTORSIZE + int "FLASH Sub-Sector Erase Size" + default 4096 + depends on SIM_QSPIFLASH + ---help--- + Sets the smaller sub-sector erase size supported by the + FLASH emulation + +config SIM_QSPIFLASH_PAGESIZE + int "FLASH Write / Program Page Size" + default 256 + depends on SIM_QSPIFLASH + ---help--- + Sets the size of a page program operation. The page size + represents the maximum number of bytes that can be sent + for a program operation. If more bytes than this are + sent on a single Page Program, then the address will + "wrap" causing the initial data sent to be overwritten. + This is consistent with standard SPI FLASH operation. + +endif # ARCH_SIM diff --git a/arch/sim/src/Makefile b/arch/sim/src/Makefile index 72401d6c773..d669f394218 100644 --- a/arch/sim/src/Makefile +++ b/arch/sim/src/Makefile @@ -57,7 +57,7 @@ CSRCS = up_initialize.c up_idle.c up_interruptcontext.c up_initialstate.c CSRCS += up_createstack.c up_usestack.c up_releasestack.c up_stackframe.c CSRCS += up_unblocktask.c up_blocktask.c up_releasepending.c CSRCS += up_reprioritizertr.c up_exit.c up_schedulesigaction.c up_spiflash.c -CSRCS += up_allocateheap.c up_devconsole.c +CSRCS += up_allocateheap.c up_devconsole.c up_qspiflash.c HOSTSRCS = up_hostusleep.c @@ -103,6 +103,10 @@ endif endif endif +ifeq ($(CONFIG_SIM_IOEXPANDER),y) + CSRCS += up_ioexpander.c +endif + ifeq ($(CONFIG_ELF),y) CSRCS += up_elf.c endif diff --git a/arch/sim/src/nuttx-names.dat b/arch/sim/src/nuttx-names.dat index 698df015764..759743be534 100644 --- a/arch/sim/src/nuttx-names.dat +++ b/arch/sim/src/nuttx-names.dat @@ -1,34 +1,58 @@ +_exit NX_exit accept NXaccept +asprintf NXasprintf +basename NXbasename calloc NXcalloc +chdir NXchdir +clearenv NXclearenv clock_gettime NXclock_gettime close NXclose closedir NXclosedir dup NXdup +dup2 NXdup2 +exit NXexit free NXfree fclose NXfclose +fdopen NXfdopen +fgetc NXfgetc fopen NXfopen +fprintf NXfprintf fputc NXfputc fcntl NXfcntl fputs NXfputs fread NXfread +fseek NXfseek fwrite NXfwrite fsync NXfsync +ftell NXftell getenv NXgetenv +getopt NXgetopt +getpid NXgetpid gettimeofday NXgettimeofday ioctl NXioctl isatty NXisatty +kill NXkill listen NXlisten lseek NXlseek +mallinfo NXmallinfo malloc NXmalloc malloc_init NXmalloc_init +memcmp NXmemcmp +memcpy NXmemcpy +memset NXmemset +mkfifo NXmkfifo +mktime NXmktime +mq_close NXmq_close mkdir NXmkdir mount NXmount open NXopen opendir NXopendir nanosleep NXnanosleep +pipe NXpipe poll NXpoll printf NXprintf pthread_create NXpthread_create +pthread_exit NXpthread_exit pthread_getspecific NXpthread_getspecific pthread_key_create NXpthread_key_create pthread_kill NXpthread_kill @@ -40,38 +64,72 @@ pthread_mutex_unlock NXpthread_mutex_unlock pthread_setspecific NXpthread_setspecific pthread_sigmask NXpthread_sigmask pthread_yield NXpthread_yield +ptsname NXptsname +ptsname_r NXptsname_r puts NXputs read NXread readdir NXreaddir realloc NXrealloc recv NXrecv recvfrom NXrecvfrom +rename NXrename rewinddir NXrewinddir rmdir NXrmdir sched_yield NXsched_yield seekdir NXseekdir select NXselect +sem_getvalue NXsem_getvalue sem_init NXsem_init sem_post NXsem_post sem_wait NXsem_wait send NXsend sendto NXsendto +setenv NXsetenv +setlogmask NXsetlogmask setsockopt NXsetsockopt sigaction NXsigaction +sigaddset NXsigaddset +sigdelset NXsigdelset +sigemptyset NXsigemptyset +sigfillset NXsigfillset sighold NXsighold +sigismember NXsigismember sigprocmask NXsigprocmask sigtimedwait NXsigtimedwait sigrelse NXsigrelse sleep NXsleep +snprintf NXsnprintf socket NXsocket +sprintf NXsprintf stat NXstat statfs NXstatfs +strcat NXstrcat +strchr NXstrchr +strcmp NXstrcmp +strcpy NXstrcpy +strcspn NXstrcspn +strdup NXstrdup +strftime NXstrftime +strlen NXstrlen +strncasecmp NXstrncasecmp +strncmp NXstrncmp +strncpy NXstrncpy +strrchr NXstrrchr +strtok_r NXstrtok_r +strtol NXstrtol +strtoul NXstrtoul +syslog NXsyslog system NXsystem tcgetattr NXtcgetattr tcsetattr NXtcsetattr umount2 NXumount2 unlink NXunlink +unlockpt NXunlockpt +uname NXuname +unsetenv NXunsetenv usleep NXusleep +vasprintf NXvasprintf vfork NXvfork +vfprintf NXvfprintf write NXwrite zmalloc NXzmalloc diff --git a/arch/sim/src/up_blockdevice.c b/arch/sim/src/up_blockdevice.c index 066df0a1dfe..b74480ecc06 100644 --- a/arch/sim/src/up_blockdevice.c +++ b/arch/sim/src/up_blockdevice.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "up_internal.h" diff --git a/arch/sim/src/up_hostfs.c b/arch/sim/src/up_hostfs.c index f0928ed0dac..5e1e1f79cb4 100644 --- a/arch/sim/src/up_hostfs.c +++ b/arch/sim/src/up_hostfs.c @@ -36,6 +36,7 @@ /**************************************************************************** * Included Files ****************************************************************************/ + #define _BSD_SOURCE #include @@ -50,6 +51,7 @@ #include #include +#define __SIM__ 1 #include "hostfs.h" /**************************************************************************** @@ -62,40 +64,44 @@ int host_open(const char *pathname, int flags, int mode) /* Perform flag mapping */ - if ((flags & (HOSTFS_FLAG_RDOK | HOSTFS_FLAG_WROK)) == - (HOSTFS_FLAG_RDOK | HOSTFS_FLAG_WROK)) + if ((flags & NUTTX_O_RDWR) == NUTTX_O_RDWR) { mapflags = O_RDWR; } - else if (flags & HOSTFS_FLAG_RDOK) + else if (flags & NUTTX_O_RDONLY) { mapflags = O_RDONLY; } - else if (flags & HOSTFS_FLAG_WROK) + else if (flags & NUTTX_O_WRONLY) { mapflags = O_WRONLY; } - if (flags & HOSTFS_FLAG_APPEND) + if (flags & NUTTX_O_APPEND) { mapflags |= O_APPEND; } - if (flags & HOSTFS_FLAG_CREAT) + if (flags & NUTTX_O_CREAT) { mapflags |= O_CREAT; } - if (flags & HOSTFS_FLAG_EXCL) + if (flags & NUTTX_O_EXCL) { mapflags |= O_EXCL; } - if (flags & HOSTFS_FLAG_TRUNC) + if (flags & NUTTX_O_TRUNC) { mapflags |= O_TRUNC; } + if (flags & NUTTX_O_NONBLOCK) + { + mapflags |= O_NONBLOCK; + } + return open(pathname, mapflags, mode); } @@ -180,21 +186,22 @@ int host_dup(int fd) void *host_opendir(const char *name) { - return (void *) opendir(name); + /* Return the host DIR pointer */ + + return (void *)opendir(name); } /**************************************************************************** * Public Functions ****************************************************************************/ -int host_readdir(void* dirp, struct host_dirent_s* entry) +int host_readdir(void* dirp, struct nuttx_dirent_s* entry) { - struct dirent *ent; + struct dirent *ent; /* Call the host's readdir routine */ ent = readdir(dirp); - if (ent != NULL) { /* Copy the entry name */ @@ -206,24 +213,21 @@ int host_readdir(void* dirp, struct host_dirent_s* entry) entry->d_type = 0; if (ent->d_type == DT_REG) { - entry->d_type = HOSTFS_DTYPE_FILE; + entry->d_type = NUTTX_DTYPE_FILE; } else if (ent->d_type == DT_CHR) { - entry->d_type = HOSTFS_DTYPE_CHR; + entry->d_type = NUTTX_DTYPE_CHR; } else if (ent->d_type == DT_BLK) { - entry->d_type = HOSTFS_DTYPE_BLK; + entry->d_type = NUTTX_DTYPE_BLK; } else if (ent->d_type == DT_DIR) { - entry->d_type = HOSTFS_DTYPE_DIRECTORY; + entry->d_type = NUTTX_DTYPE_DIRECTORY; } - } - if (ent) - { return 0; } @@ -234,7 +238,7 @@ int host_readdir(void* dirp, struct host_dirent_s* entry) * Public Functions ****************************************************************************/ -void host_rewinddir(void* dirp) +void host_rewinddir(void *dirp) { /* Just call the rewinddir routine */ @@ -245,7 +249,7 @@ void host_rewinddir(void* dirp) * Public Functions ****************************************************************************/ -int host_closedir(void* dirp) +int host_closedir(void *dirp) { return closedir(dirp); } @@ -254,7 +258,7 @@ int host_closedir(void* dirp) * Public Functions ****************************************************************************/ -int host_statfs(const char *path, struct host_statfs_s *buf) +int host_statfs(const char *path, struct nuttx_statfs_s *buf) { int ret; struct statfs host_buf; @@ -263,18 +267,16 @@ int host_statfs(const char *path, struct host_statfs_s *buf) ret = statfs(path, &host_buf); - /* Map the return values */ + /* Map the struct statfs value */ buf->f_type = host_buf.f_type; + buf->f_namelen = host_buf.f_namelen; buf->f_bsize = host_buf.f_bsize; buf->f_blocks = host_buf.f_blocks; buf->f_bfree = host_buf.f_bfree; buf->f_bavail = host_buf.f_bavail; buf->f_files = host_buf.f_files; buf->f_ffree = host_buf.f_ffree; - buf->f_fsid = 0; - buf->f_namelen = host_buf.f_namelen; - buf->f_frsize = host_buf.f_frsize; return ret; } @@ -321,62 +323,50 @@ int host_rename(const char *oldpath, const char *newpath) * Public Functions ****************************************************************************/ -int host_stat(const char *path, struct host_stat_s *buf) +int host_stat(const char *path, struct nuttx_stat_s *buf) { - struct stat host_buf; - int ret; + struct stat host_buf; + int ret; /* Call the host's stat routine */ ret = stat(path, &host_buf); - /* Now map the return values to the common struct */ + /* Map the return values */ - buf->st_dev = host_buf.st_dev; /* ID of the device containing file */ - buf->st_ino = host_buf.st_ino;; /* inode number */ - buf->st_nlink = host_buf.st_nlink; /* number of hard links */ - buf->st_uid = host_buf.st_uid; /* user ID of owner */ - buf->st_gid = host_buf.st_gid; /* group ID of owner */ - buf->st_rdev = host_buf.st_rdev; /* device ID */ - buf->st_size = host_buf.st_size; /* total size, in bytes */ - buf->st_blksize = host_buf.st_blksize; /* blocksize for file system I/O */ - buf->st_blocks = host_buf.st_blocks; /* number of 512B blocks allocated */ - buf->st_atim = host_buf.st_atime; /* time of last access */ - buf->st_mtim = host_buf.st_mtime; /* time of last modification */ - buf->st_ctim = host_buf.st_ctime; /* time of last status change */ + buf->st_mode = host_buf.st_mode & 0777; - /* Map the mode bits */ - - buf->st_mode = host_buf.st_mode & 0xFFF; - if (S_ISREG(host_buf.st_mode)) + if (host_buf.st_mode & S_IFDIR) { - buf->st_mode |= HOST_ST_MODE_REG; + buf->st_mode |= NUTTX_S_IFDIR; + } + else if (host_buf.st_mode & S_IFREG) + { + buf->st_mode |= NUTTX_S_IFREG; + } + else if (host_buf.st_mode & S_IFCHR) + { + buf->st_mode |= NUTTX_S_IFCHR; + } + else if (host_buf.st_mode & S_IFBLK) + { + buf->st_mode |= NUTTX_S_IFBLK; + } + else if (host_buf.st_mode & S_IFLNK) + { + buf->st_mode |= NUTTX_S_IFLNK; + } + else /* if (host_buf.st_mode & S_IFIFO) */ + { + buf->st_mode |= NUTTX_S_IFIFO; } - if (S_ISDIR(host_buf.st_mode)) - { - buf->st_mode |= HOST_ST_MODE_DIR; - } - - if (S_ISCHR(host_buf.st_mode)) - { - buf->st_mode |= HOST_ST_MODE_CHR; - } - - if (S_ISBLK(host_buf.st_mode)) - { - buf->st_mode |= HOST_ST_MODE_BLK; - } - - if (S_ISFIFO(host_buf.st_mode)) - { - buf->st_mode |= HOST_ST_MODE_PIPE; - } - - if (S_ISLNK(host_buf.st_mode)) - { - buf->st_mode |= HOST_ST_MODE_LINK; - } + buf->st_size = host_buf.st_size; + buf->st_blksize = host_buf.st_blksize; + buf->st_blocks = host_buf.st_blocks; + buf->st_atim = host_buf.st_atim.tv_sec; + buf->st_mtim = host_buf.st_mtim.tv_sec; + buf->st_ctim = host_buf.st_ctim.tv_sec; return ret; } diff --git a/arch/sim/src/up_initialize.c b/arch/sim/src/up_initialize.c index cb07619eabd..ada5bb33ba0 100644 --- a/arch/sim/src/up_initialize.c +++ b/arch/sim/src/up_initialize.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include #include #include @@ -52,6 +52,9 @@ #include #include #include +#include +#include +#include #include "up_internal.h" @@ -68,32 +71,86 @@ * ****************************************************************************/ -#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_SIM_SPIFLASH) +#if defined(CONFIG_FS_SMARTFS) && (defined(CONFIG_SIM_SPIFLASH) || defined(CONFIG_SIM_QSPIFLASH)) static void up_init_smartfs(void) { FAR struct mtd_dev_s *mtd; + int minor = 0; +#if defined(CONFIG_MTD_M25P) || defined(CONFIG_MTD_W25) || defined(CONFIG_MTD_SST26) FAR struct spi_dev_s *spi; +#endif +#ifdef CONFIG_MTD_N25QXXX + FAR struct qspi_dev_s *qspi; +#endif +#ifdef CONFIG_SIM_SPIFLASH #ifdef CONFIG_MTD_M25P /* Initialize a simulated SPI FLASH block device m25p MTD driver */ - spi = up_spiflashinitialize(); - mtd = m25p_initialize(spi); + spi = up_spiflashinitialize("m25p"); + if (spi != NULL) + { + mtd = m25p_initialize(spi); - /* Now initialize a SMART Flash block device and bind it to the MTD device */ + /* Now initialize a SMART Flash block device and bind it to the MTD device */ - smart_initialize(0, mtd, NULL); + if (mtd != NULL) + { + smart_initialize(minor++, mtd, "_m25p"); + } + } +#endif + +#ifdef CONFIG_MTD_SST26 + /* Initialize a simulated SPI FLASH block device sst26 MTD driver */ + + spi = up_spiflashinitialize("sst26"); + if (spi != NULL) + { + mtd = sst26_initialize_spi(spi); + + /* Now initialize a SMART Flash block device and bind it to the MTD device */ + + if (mtd != NULL) + { + smart_initialize(minor++, mtd, "_sst26"); + } + } #endif #ifdef CONFIG_MTD_W25 - /* Initialize a simulated SPI FLASH block device m25p MTD driver */ + /* Initialize a simulated SPI FLASH block device w25 MTD driver */ - spi = up_spiflashinitialize(); - mtd = w25_initialize(spi); + spi = up_spiflashinitialize("w25"); + if (spi != NULL) + { + mtd = w25_initialize(spi); - /* Now initialize a SMART Flash block device and bind it to the MTD device */ + /* Now initialize a SMART Flash block device and bind it to the MTD device */ - smart_initialize(0, mtd, NULL); + if (mtd != NULL) + { + smart_initialize(minor++, mtd, "_w25"); + } + } +#endif +#endif /* CONFIG_SIM_SPIFLASH */ + +#if defined(CONFIG_MTD_N25QXXX) && defined(CONFIG_SIM_QSPIFLASH) + /* Initialize a simulated SPI FLASH block device n25qxxx MTD driver */ + + qspi = up_qspiflashinitialize(); + if (qspi != NULL) + { + mtd = n25qxxx_initialize(qspi, 0); + + /* Now initialize a SMART Flash block device and bind it to the MTD device */ + + if (mtd != NULL) + { + smart_initialize(minor++, mtd, "_n25q"); + } + } #endif } #endif @@ -124,15 +181,25 @@ static void up_init_smartfs(void) void up_initialize(void) { +#ifdef CONFIG_NET /* The real purpose of the following is to make sure that syslog * is drawn into the link. It is needed by up_tapdev which is linked * separately. */ -#ifdef CONFIG_NET syslog(LOG_INFO, "SIM: Initializing"); #endif +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif + #if CONFIG_NFILE_DESCRIPTORS > 0 /* Register devices */ @@ -140,6 +207,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -168,6 +243,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on only minimal OS initialization. @@ -175,6 +256,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #if defined(CONFIG_FS_FAT) && !defined(CONFIG_DISABLE_MOUNTPOINT) up_registerblockdevice(); /* Our FAT ramdisk at /dev/ram0 */ #endif @@ -201,7 +292,7 @@ void up_initialize(void) (void)telnet_initialize(); #endif -#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_SIM_SPIFLASH) +#if defined(CONFIG_FS_SMARTFS) && (defined(CONFIG_SIM_SPIFLASH) || defined(CONFIG_SIM_QSPIFLASH)) up_init_smartfs(); #endif } diff --git a/arch/sim/src/up_internal.h b/arch/sim/src/up_internal.h index f163e67a254..658ec0539bc 100644 --- a/arch/sim/src/up_internal.h +++ b/arch/sim/src/up_internal.h @@ -296,6 +296,13 @@ int up_buttonevent(int x, int y, int buttons); int sim_ajoy_initialize(void); #endif +/* up_ioexpander.c ********************************************************/ + +#ifdef CONFIG_SIM_IOEXPANDER +struct ioexpander_dev_s; +FAR struct ioexpander_dev_s *sim_ioexpander_initialize(void); +#endif + /* up_tapdev.c ************************************************************/ #if defined(CONFIG_NET_ETHERNET) && !defined(__CYGWIN__) @@ -336,7 +343,12 @@ void netdriver_loop(void); #ifdef CONFIG_SIM_SPIFLASH struct spi_dev_s; -struct spi_dev_s *up_spiflashinitialize(void); +struct spi_dev_s *up_spiflashinitialize(FAR const char *name); +#endif + +#ifdef CONFIG_SIM_QSPIFLASH +struct qspi_dev_s; +struct qspi_dev_s *up_qspiflashinitialize(void); #endif #endif /* __ASSEMBLY__ */ diff --git a/arch/sim/src/up_ioexpander.c b/arch/sim/src/up_ioexpander.c new file mode 100644 index 00000000000..ca2a3349100 --- /dev/null +++ b/arch/sim/src/up_ioexpander.c @@ -0,0 +1,866 @@ +/**************************************************************************** + * include/nuttx/ioexpander/up_ioexpander.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "up_internal.h" + +#ifdef CONFIG_SIM_IOEXPANDER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define SIM_POLLDELAY (CONFIG_SIM_INT_POLLDELAY / USEC_PER_TICK) + +#define SIM_INT_ENABLED(d,p) \ + (((d)->intenab & ((ioe_pinset_t)1 << (p))) != 0) +#define SIM_INT_DISABLED(d,p) \ + (((d)->intenab & ((ioe_pinset_t)1 << (p))) == 0) + +#define SIM_LEVEL_SENSITIVE(d,p) \ + (((d)->trigger & ((ioe_pinset_t)1 << (p))) == 0) +#define SIM_LEVEL_HIGH(d,p) \ + (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0) +#define SIM_LEVEL_LOW(d,p) \ + (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0) + +#define SIM_EDGE_SENSITIVE(d,p) \ + (((d)->trigger & ((ioe_pinset_t)1 << (p))) != 0) +#define SIM_EDGE_RISING(d,p) \ + (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0) +#define SIM_EDGE_FALLING(d,p) \ + (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0) +#define SIM_EDGE_BOTH(d,p) \ + (SIM_LEVEL_RISING(d,p) && SIM_LEVEL_FALLING(d,p)) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This type represents on registered pin interrupt callback */ + +struct sim_callback_s +{ + ioe_pinset_t pinset; /* Set of pin interrupts that will generate + * the callback. */ + ioe_callback_t cbfunc; /* The saved callback function pointer */ + FAR void *cbarg; /* Callback argument */ +}; + +/* This structure represents the state of the I/O Expander driver */ + +struct sim_dev_s +{ + struct ioexpander_dev_s dev; /* Nested structure to allow casting as public gpio + * expander. */ + ioe_pinset_t inpins; /* Pins select as inputs */ + ioe_pinset_t invert; /* Pin value inversion */ + ioe_pinset_t outval; /* Value of output pins */ + ioe_pinset_t inval; /* Simulated input register */ + ioe_pinset_t intenab; /* Interrupt enable */ + ioe_pinset_t last; /* Last pin inputs (for detection of changes) */ + ioe_pinset_t trigger; /* Bit encoded: 0=level 1=edge */ + ioe_pinset_t level[2]; /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */ + + WDOG_ID wdog; /* Timer used to poll for interrupt simulation */ + struct work_s work; /* Supports the interrupt handling "bottom half" */ + + /* Saved callback information for each I/O expander client */ + + struct sim_callback_s cb[CONFIG_SIM_INT_NCALLBACKS]; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* I/O Expander Methods */ + +static int sim_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int dir); +static int sim_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, void *regval); +static int sim_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value); +static int sim_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value); +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int sim_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +static int sim_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +#endif +static FAR void *sim_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg); +static int sim_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle); + +static ioe_pinset_t sim_int_update(FAR struct sim_dev_s *priv); +static void sim_interrupt_work(void *arg); +static void sim_interrupt(int argc, wdparm_t arg1, ...); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Since only single device is supported, the driver state structure may as + * well be pre-allocated. + */ + +static struct sim_dev_s g_ioexpander; + +/* I/O expander vtable */ + +static const struct ioexpander_ops_s g_sim_ops = +{ + sim_direction, + sim_option, + sim_writepin, + sim_readpin, + sim_readpin +#ifdef CONFIG_IOEXPANDER_MULTIPIN + , sim_multiwritepin + , sim_multireadpin + , sim_multireadpin +#endif + , sim_attach + , sim_detach +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sim_direction + * + * Description: + * Set the direction of an ioexpander pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * dir - One of the IOEXPANDER_DIRECTION_ macros + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int sim_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int direction) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + + DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS && + (direction == IOEXPANDER_DIRECTION_IN || + direction == IOEXPANDER_DIRECTION_OUT)); + + gpioinfo("pin=%u direction=%s\n", + pin, (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT"); + + /* Set the pin direction */ + + if (direction == IOEXPANDER_DIRECTION_IN) + { + /* Configure pin as input. */ + + priv->inpins |= (1 << pin); + } + else /* if (direction == IOEXPANDER_DIRECTION_OUT) */ + { + /* Configure pin as output. If a bit in this register is cleared to + * 0, the corresponding port pin is enabled as an output. + * + * REVISIT: The value of output has not been selected! This might + * put a glitch on the output. + */ + + priv->inpins &= ~(1 << pin); + } + + return OK; +} + +/**************************************************************************** + * Name: sim_option + * + * Description: + * Set pin options. Required. + * Since all IO expanders have various pin options, this API allows setting + * pin options in a flexible way. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * opt - One of the IOEXPANDER_OPTION_ macros + * val - The option's value + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int sim_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, FAR void *value) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + int ret = -ENOSYS; + + DEBUGASSERT(priv != NULL); + + gpioinfo("pin=%u option=%u\n", pin, opt); + + /* Check for pin polarity inversion. The Polarity Inversion Register + * allows polarity inversion of pins defined as inputs by the + * Configuration Register. If a bit in this register is set, the + * corresponding port pin's polarity is inverted. If a bit in this + * register is cleared, the corresponding port pin's original polarity + * is retained. + */ + + if (opt == IOEXPANDER_OPTION_INVERT) + { + if ((uintptr_t)value == IOEXPANDER_OPTION_INVERT) + { + priv->invert |= (1 << pin); + } + else + { + priv->invert &= ~(1 << pin); + } + } + + /* Interrupt configuration */ + + else if (opt == IOEXPANDER_OPTION_INTCFG) + { + ioe_pinset_t bit = ((ioe_pinset_t)1 << pin); + + ret = OK; + switch ((uintptr_t)value) + { + case IOEXPANDER_VAL_HIGH: /* Interrupt on high level */ + priv->intenab |= bit; + priv->trigger &= ~bit; + priv->level[0] |= bit; + priv->level[1] &= ~bit; + break; + + case IOEXPANDER_VAL_LOW: /* Interrupt on low level */ + priv->intenab |= bit; + priv->trigger &= ~bit; + priv->level[0] &= ~bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_RISING: /* Interrupt on rising edge */ + priv->intenab |= bit; + priv->trigger |= bit; + priv->level[0] |= bit; + priv->level[1] &= ~bit; + break; + + case IOEXPANDER_VAL_FALLING: /* Interrupt on falling edge */ + priv->intenab |= bit; + priv->trigger |= bit; + priv->level[0] &= ~bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_BOTH: /* Interrupt on both edges */ + priv->intenab |= bit; + priv->trigger |= bit; + priv->level[0] |= bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_DISABLE: + priv->trigger &= ~bit; + break; + + default: + ret = -EINVAL; + break; + } + } + + return ret; +} + +/**************************************************************************** + * Name: sim_writepin + * + * Description: + * Set the pin level. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * val - The pin level. Usually TRUE will set the pin high, + * except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int sim_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + + DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS); + + gpioinfo("pin=%u value=%u\n", pin, (unsigned int)value); + + /* Set output pins default value (before configuring it as output) The + * Output Port Register shows the outgoing logic levels of the pins + * defined as outputs by the Configuration Register. + */ + + if (value && (priv->invert & (1 << pin)) == 0) + { + priv->outval |= (1 << pin); + } + else + { + priv->outval &= ~(1 << pin); + } + + return OK; +} + +/**************************************************************************** + * Name: sim_readpin + * + * Description: + * Read the actual PIN level. This can be different from the last value written + * to this pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the pin level is stored. Usually TRUE + * if the pin is high, except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int sim_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + ioe_pinset_t inval; + bool retval; + + DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS && value != NULL); + + gpioinfo("pin=%u\n", pin); + + /* Is this an output pin? */ + + if ((priv->inpins & (1 << pin)) != 0) + { + inval = priv->inval; + } + else + { + inval = priv->outval; + } + + /* Return 0 or 1 to indicate the state of pin */ + + retval = (((inval >> pin) & 1) != 0); + *value = ((priv->invert & (1 << pin)) != 0) ? !retval : retval; + return OK; +} + +/**************************************************************************** + * Name: sim_multiwritepin + * + * Description: + * Set the pin level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pins - The list of pin indexes to alter in this call + * val - The list of pin levels. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int sim_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + uint8_t pin; + int i; + + gpioinfo("count=%d\n", count); + DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0); + + /* Apply the user defined changes */ + + for (i = 0; i < count; i++) + { + pin = pins[i]; + DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS); + + if (values[i] && (priv->invert & (1 << pin)) == 0) + { + priv->outval |= (1 << pin); + } + else + { + priv->outval &= ~(1 << pin); + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: sim_multireadpin + * + * Description: + * Read the actual level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The list of pin indexes to read + * valptr - Pointer to a buffer where the pin levels are stored. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int sim_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + ioe_pinset_t inval; + uint8_t pin; + bool pinval; + int i; + + gpioinfo("count=%d\n", count); + DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0); + + /* Update the input status with the 8 bits read from the expander */ + + for (i = 0; i < count; i++) + { + pin = pins[i]; + DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS); + + /* Is this an output pin? */ + + if ((priv->inpins & (1 << pin)) != 0) + { + inval = priv->inval; + } + else + { + inval = priv->outval; + } + + pinval = ((inval & (1 << pin)) != 0); + values[i] = ((priv->invert & (1 << pin)) != 0) ? !pinval : pinval; + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: sim_attach + * + * Description: + * Attach and enable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * pinset - The set of pin events that will generate the callback + * callback - The pointer to callback function. NULL will detach the + * callback. + * arg - User-provided callback argument + * + * Returned Value: + * A non-NULL handle value is returned on success. This handle may be + * used later to detach and disable the pin interrupt. + * + ****************************************************************************/ + +static FAR void *sim_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, + FAR void *arg) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + FAR void *handle = NULL; + int i; + + gpioinfo("pinset=%lx callback=%p arg=%p\n", + (unsigned long)pinset, callback, arg); + + /* Find and available in entry in the callback table */ + + for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++) + { + /* Is this entry available (i.e., no callback attached) */ + + if (priv->cb[i].cbfunc == NULL) + { + /* Yes.. use this entry */ + + priv->cb[i].pinset = pinset; + priv->cb[i].cbfunc = callback; + priv->cb[i].cbarg = arg; + handle = &priv->cb[i]; + break; + } + } + + return handle; +} + +/**************************************************************************** + * Name: sim_detach + * + * Description: + * Detach and disable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * handle - The non-NULL opaque value return by sim_attch() + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int sim_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)dev; + FAR struct sim_callback_s *cb = (FAR struct sim_callback_s *)handle; + + gpioinfo("handle=%p\n", handle); + + DEBUGASSERT(priv != NULL && cb != NULL); + DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&priv->cb[0] && + (uintptr_t)cb <= (uintptr_t)&priv->cb[CONFIG_SIM_INT_NCALLBACKS-1]); + UNUSED(priv); + + cb->pinset = 0; + cb->cbfunc = NULL; + cb->cbarg = NULL; + return OK; +} + +/**************************************************************************** + * Name: sim_int_update + * + * Description: + * Check for pending interrupts. + * + ****************************************************************************/ + +static ioe_pinset_t sim_int_update(FAR struct sim_dev_s *priv) +{ + ioe_pinset_t toggles; + ioe_pinset_t diff; + ioe_pinset_t input; + ioe_pinset_t intstat; + bool pinval; + int pin; + int i; + + /* First, toggle all input bits that have associated, attached interrupt + * handler. This is a crude simulation for toggle interrupt inputs. + */ + + toggles = 0; + for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++) + { + /* Is there a callback attached? */ + + if (priv->cb[i].cbfunc != NULL) + { + /* Yes, add the input pins to set of pins to toggle */ + + toggles |= (priv->cb[i].pinset & priv->inpins); + } + } + + priv->inval = (priv->inval & ~toggles) | (~priv->inval & toggles); + + /* Check the changed bits from last read (Only applies to input pins) */ + + input = priv->inval; + diff = priv->last ^ input; + if (diff != 0) + { + gpioinfo("toggles=%lx inval=%lx last=%lx diff=%lx\n", + (unsigned long)toggles, (unsigned long)priv->inval, + (unsigned long)priv->last, (unsigned long)diff); + } + + priv->last = input; + intstat = 0; + + /* Check for changes in pins that could generate an interrupt. */ + + for (pin = 0; pin < CONFIG_IOEXPANDER_NPINS; pin++) + { + /* Get the value of the pin (accounting for inversion) */ + + pinval = ((input & 1) != 0); + if ((priv->invert & (1 << pin)) != 0) + { + pinval = !pinval; + } + + if (SIM_INT_DISABLED(priv, pin)) + { + /* Interrupts disabled on this pin. Do nothing.. just skip to the + * next pin. + */ + } + else if (SIM_EDGE_SENSITIVE(priv, pin)) + { + /* Edge triggered. Was there a change in the level? */ + + if ((diff & 1) != 0) + { + /* Set interrupt as a function of edge type */ + + if ((!pinval && SIM_EDGE_FALLING(priv, pin)) || + ( pinval && SIM_EDGE_RISING(priv, pin))) + { + intstat |= 1 << pin; + } + } + } + else /* if (SIM_LEVEL_SENSITIVE(priv, pin)) */ + { + /* Level triggered. Set intstat if imatch in level type. */ + + if ((pinval && SIM_LEVEL_HIGH(priv, pin)) || + (!pinval && SIM_LEVEL_LOW(priv, pin))) + { + intstat |= 1 << pin; + } + } + + diff >>= 1; + input >>= 1; + } + + return intstat; +} + +/**************************************************************************** + * Name: sim_interrupt_work + * + * Description: + * Handle GPIO interrupt events (this function actually executes in the + * context of the worker thread). + * + ****************************************************************************/ + +static void sim_interrupt_work(void *arg) +{ + FAR struct sim_dev_s *priv = (FAR struct sim_dev_s *)arg; + ioe_pinset_t intstat; + int ret; + int i; + + DEBUGASSERT(priv != NULL); + + /* Update the input status with the 32 bits read from the expander */ + + intstat = sim_int_update(priv); + if (intstat != 0) + { + gpioinfo("intstat=%lx\n", (unsigned long)intstat); + + /* Perform pin interrupt callbacks */ + + for (i = 0; i < CONFIG_SIM_INT_NCALLBACKS; i++) + { + /* Is this entry valid (i.e., callback attached)? */ + + if (priv->cb[i].cbfunc != NULL) + { + /* Did any of the requested pin interrupts occur? */ + + ioe_pinset_t match = intstat & priv->cb[i].pinset; + if (match != 0) + { + /* Yes.. perform the callback */ + + (void)priv->cb[i].cbfunc(&priv->dev, match, + priv->cb[i].cbarg); + } + } + } + } + + /* Re-start the poll timer */ + + ret = wd_start(priv->wdog, SIM_POLLDELAY, (wdentry_t)sim_interrupt, + 1, (wdparm_t)priv); + if (ret < 0) + { + gpioerr("ERROR: Failed to start poll timer\n"); + } +} + +/**************************************************************************** + * Name: sim_interrupt + * + * Description: + * The poll timer has expired; check for missed interrupts + * + * Input Parameters: + * Standard wdog expiration arguments. + * + ****************************************************************************/ + +static void sim_interrupt(int argc, wdparm_t arg1, ...) +{ + FAR struct sim_dev_s *priv; + + DEBUGASSERT(argc == 1); + priv = (FAR struct sim_dev_s *)arg1; + DEBUGASSERT(priv != NULL); + + /* Defer interrupt processing to the worker thread. This is not only + * much kinder in the use of system resources but is probably necessary + * to access the I/O expander device. + * + * Notice that further GPIO interrupts are disabled until the work is + * actually performed. This is to prevent overrun of the worker thread. + * Interrupts are re-enabled in sim_interrupt_work() when the work is + * completed. + */ + + if (work_available(&priv->work)) + { + /* Schedule interrupt related work on the high priority worker thread. */ + + work_queue(HPWORK, &priv->work, sim_interrupt_work, + (FAR void *)priv, 0); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sim_ioexpander_initialize + * + * Description: + * Instantiate and configure the I/O Expander device driver to use the provided + * I2C device instance. + * + * Input Parameters: + * i2c - An I2C driver instance + * minor - The device i2c address + * config - Persistent board configuration data + * + * Returned Value: + * an ioexpander_dev_s instance on success, NULL on failure. + * + ****************************************************************************/ + +FAR struct ioexpander_dev_s *sim_ioexpander_initialize(void) +{ + FAR struct sim_dev_s *priv = &g_ioexpander; + int ret; + + /* Initialize the device state structure */ + + priv->dev.ops = &g_sim_ops; + + /* Initial interrupt state: Edge triggered on both edges */ + + priv->trigger = PINSET_ALL; /* All edge triggered */ + priv->level[0] = PINSET_ALL; /* All rising edge */ + priv->level[1] = PINSET_ALL; /* All falling edge */ + + /* Set up a timer to poll for simulated interrupts */ + + priv->wdog = wd_create(); + DEBUGASSERT(priv->wdog != NULL); + + ret = wd_start(priv->wdog, SIM_POLLDELAY, (wdentry_t)sim_interrupt, + 1, (wdparm_t)priv); + if (ret < 0) + { + gpioerr("ERROR: Failed to start poll timer\n"); + } + + return &priv->dev; +} + +#endif /* CONFIG_SIM_IOEXPANDER */ diff --git a/arch/sim/src/up_qspiflash.c b/arch/sim/src/up_qspiflash.c new file mode 100644 index 00000000000..f2cafe608bb --- /dev/null +++ b/arch/sim/src/up_qspiflash.c @@ -0,0 +1,607 @@ +/************************************************************************************ + * arch/sim/src/up_qspiflash.c + * + * Copyright (C) 2014, 2016 Ken Pettit. All rights reserved. + * Author: Ken Pettit + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_internal.h" + +#if defined(CONFIG_SIM_QSPIFLASH) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +/* Define the FLASH SIZE in bytes */ + +#ifdef CONFIG_SIM_QSPIFLASH_1M +# define CONFIG_QSPIFLASH_SIZE (128 * 1024) +# define CONFIG_QSPIFLASH_CAPACITY 0x11 + +#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE +# define CONFIG_SIM_QSPIFLASH_SECTORSIZE 2048 +#endif + +#endif + +#ifdef CONFIG_SIM_QSPIFLASH_8M +# define CONFIG_QSPIFLASH_SIZE (1024 * 1024) +# define CONFIG_QSPIFLASH_CAPACITY 0x14 +#endif + +#ifdef CONFIG_SIM_QSPIFLASH_32M +# define CONFIG_QSPIFLASH_SIZE (4 * 1024 * 1024) +# define CONFIG_QSPIFLASH_CAPACITY 0x16 +#endif + +#ifdef CONFIG_SIM_QSPIFLASH_64M +# define CONFIG_QSPIFLASH_SIZE (8 * 1024 * 1024) +# define CONFIG_QSPIFLASH_CAPACITY 0x17 +#endif + +#ifdef CONFIG_SIM_QSPIFLASH_128M +# define CONFIG_QSPIFLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_QSPIFLASH_CAPACITY 0x18 +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_MANUFACTURER +# define CONFIG_SIM_QSPIFLASH_MANUFACTURER 0x20 +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_MEMORY_TYPE +# define CONFIG_SIM_QSPIFLASH_MEMORY_TYPE 0xba +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE +# define CONFIG_SIM_QSPIFLASH_SECTORSIZE 65536 +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE +# define CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE 4096 +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK +# define CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK (~(CONFIG_SIM_QSPIFLASH_SECTORSIZE-1)) +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK +# define CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK (~(CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE-1)) +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_PAGESIZE +# define CONFIG_SIM_QSPIFLASH_PAGESIZE 256 +#endif + +#ifndef CONFIG_SIM_QSPIFLASH_PAGESIZE_MASK +# define CONFIG_SIM_QSPIFLASH_PAGESIZE_MASK (CONFIG_SIM_QSPIFLASH_PAGESIZE-1) +#endif + +/* Define FLASH States */ + +#define QSPIFLASH_STATE_IDLE 0 +#define QSPIFLASH_STATE_RDID1 1 +#define QSPIFLASH_STATE_RDID2 2 +#define QSPIFLASH_STATE_RDID3 3 +#define QSPIFLASH_STATE_WREN 4 +#define QSPIFLASH_STATE_RDSR 5 +#define QSPIFLASH_STATE_SE1 6 +#define QSPIFLASH_STATE_SE2 7 +#define QSPIFLASH_STATE_SE3 8 +#define QSPIFLASH_STATE_PP1 9 +#define QSPIFLASH_STATE_PP2 10 +#define QSPIFLASH_STATE_PP3 11 +#define QSPIFLASH_STATE_PP4 12 +#define QSPIFLASH_STATE_READ1 13 +#define QSPIFLASH_STATE_READ2 14 +#define QSPIFLASH_STATE_READ3 15 +#define QSPIFLASH_STATE_READ4 16 +#define QSPIFLASH_STATE_FREAD_WAIT 17 + +/* Instructions */ +/* Command Value N Description Addr Dummy Data */ +#define QSPIFLASH_WREN 0x06 /* 1 Write Enable 0 0 0 */ +#define QSPIFLASH_WRDI 0x04 /* 1 Write Disable 0 0 0 */ +#define QSPIFLASH_RDID 0x9f /* 1 Read Identification 0 0 1-3 */ +#define QSPIFLASH_RDSR 0x05 /* 1 Read Status Register 0 0 >=1 */ +#define QSPIFLASH_WRSR 0x01 /* 1 Write Status Register 0 0 1 */ +#define QSPIFLASH_READ 0x03 /* 1 Read Data Bytes 3 0 >=1 */ +#define QSPIFLASH_FAST_READ 0x0b /* 1 Higher speed read 3 1 >=1 */ +#define QSPIFLASH_PP 0x02 /* 1 Page Program 3 0 1-256 */ +#define QSPIFLASH_SE 0xd8 /* 1 Sector Erase 3 0 0 */ +#define QSPIFLASH_BE 0xc7 /* 1 Bulk Erase 0 0 0 */ +#define QSPIFLASH_DP 0xb9 /* 2 Deep power down 0 0 0 */ +#define QSPIFLASH_RES 0xab /* 2 Read Electronic Signature 0 3 >=1 */ +#define QSPIFLASH_SSE 0x20 /* 3 Sub-Sector Erase 0 0 0 */ + +#define QSPIFLASH_ID 0x9f /* JEDEC ID */ +#define QSPIFLASH_READ_QUAD 0xeb + +#define QSPIFLASH_DUMMY 0xa5 + +#define QSPIFLASH_WREN_SET 0x02 + +/************************************************************************************ + * Private Types + ************************************************************************************/ + +struct sim_qspiflashdev_s +{ + struct qspi_dev_s spidev; /* Externally visible part of the SPI interface */ + uint32_t selected; /* SPIn base address */ + int wren; + int state; + uint16_t read_data; + uint8_t last_cmd; + unsigned long address; + unsigned char data[CONFIG_QSPIFLASH_SIZE]; +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +/* QSPI methods */ + +static int qspiflash_lock(FAR struct qspi_dev_s *dev, bool lock); +static uint32_t qspiflash_setfrequency(FAR struct qspi_dev_s *dev, + uint32_t frequency); +static void qspiflash_setmode(FAR struct qspi_dev_s *dev, + enum qspi_mode_e mode); +static void qspiflash_setbits(FAR struct qspi_dev_s *dev, int nbits); +static int qspiflash_command(FAR struct qspi_dev_s *dev, + FAR struct qspi_cmdinfo_s *cmd); +static int qspiflash_memory(FAR struct qspi_dev_s *dev, + FAR struct qspi_meminfo_s *mem); +static FAR void * qspiflash_alloc(FAR struct qspi_dev_s *dev, size_t buflen); +static void qspiflash_free(FAR struct qspi_dev_s *dev, FAR void *buffer); + +static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv, + uint16_t data, FAR struct qspi_cmdinfo_s *cmdinfo); + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static const struct qspi_ops_s g_qspiops = +{ + .lock = qspiflash_lock, + .setfrequency = qspiflash_setfrequency, + .setmode = qspiflash_setmode, + .setbits = qspiflash_setbits, + .command = qspiflash_command, + .memory = qspiflash_memory, + .alloc = qspiflash_alloc, + .free = qspiflash_free +}; + +struct sim_qspiflashdev_s g_qspidev = +{ + .spidev = { &g_qspiops }, +}; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: qspiflash_lock + * + * Description: + * On SPI buses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the buses for a sequence of + * transfers. The bus should be locked before the chip is selected. After + * locking the SPI bus, the caller should then also call the setfrequency, + * setbits, and setmode methods to make sure that the SPI is properly + * configured for the device. If the SPI buss is being shared, then it + * may have been left in an incompatible state. + * + * Input Parameters: + * dev - Device-specific state data + * lock - true: Lock spi bus, false: unlock SPI bus + * + * Returned Value: + * None + * + ************************************************************************************/ + +static int qspiflash_lock(FAR struct qspi_dev_s *dev, bool lock) +{ + return OK; +} + +/************************************************************************************ + * Name: qspiflash_memory + * + * Description: + * Perform QSPI Memory transaction operations + * + * Returned Value: + * Always returns zero + * + ************************************************************************************/ + +int qspiflash_memory(FAR struct qspi_dev_s *dev, FAR struct qspi_meminfo_s *mem) +{ + FAR struct sim_qspiflashdev_s *priv = (FAR struct sim_qspiflashdev_s *)dev; + + switch (mem->cmd) + { + case QSPIFLASH_READ_QUAD: + priv->wren = 0; + memcpy(mem->buffer, &priv->data[mem->addr], mem->buflen); + priv->address += mem->addr + mem->buflen; + priv->state = QSPIFLASH_STATE_IDLE; + break; + + case QSPIFLASH_PP: + if (priv->wren) + { + memcpy(&priv->data[mem->addr], mem->buffer, mem->buflen); + } + break; + + default: + return -EINVAL; + } + + return 0; +} + +/************************************************************************************ + * Name: qspiflash_setfrequency + * + * Description: + * Set the SPI frequency. + * + * Input Parameters: + * dev - Device-specific state data + * frequency - The SPI frequency requested + * + * Returned Value: + * Returns the actual frequency selected + * + ************************************************************************************/ + +static uint32_t qspiflash_setfrequency(FAR struct qspi_dev_s *dev, uint32_t frequency) +{ + return frequency; +} + +/************************************************************************************ + * Name: qspiflash_setmode + * + * Description: + * Set the SPI mode. see enum spi_mode_e for mode definitions + * + * Input Parameters: + * dev - Device-specific state data + * mode - The SPI mode requested + * + * Returned Value: + * Returns the actual frequency selected + * + ************************************************************************************/ + +static void qspiflash_setmode(FAR struct qspi_dev_s *dev, enum qspi_mode_e mode) +{ +} + +/************************************************************************************ + * Name: qspiflash_setbits + * + * Description: + * Set the number of bits per word. + * + * Input Parameters: + * dev - Device-specific state data + * nbits - The number of bits requested + * + * Returned Value: + * None + * + ************************************************************************************/ + +static void qspiflash_setbits(FAR struct qspi_dev_s *dev, int nbits) +{ +} + +/************************************************************************************ + * Name: qspiflash_alloc + * + * Description: + * Allocate a buffer and associate it with the QSPI device + * + * Input Parameters: + * dev - Device-specific state data + * buflen - Length of buffer to allocate + * + * Returned Value: + * None + * + ************************************************************************************/ + +static FAR void *qspiflash_alloc(FAR struct qspi_dev_s *dev, size_t buflen) +{ + return kmm_malloc(buflen); +} + +/************************************************************************************ + * Name: qspiflash_free + * + * Description: + * Allocate a buffer and associate it with the QSPI device + * + * Input Parameters: + * dev - Device-specific state data + * buflen - Length of buffer to allocate + * + * Returned Value: + * None + * + ************************************************************************************/ + +static void qspiflash_free(FAR struct qspi_dev_s *dev, FAR void *buffer) +{ + kmm_free(buffer); +} + +/************************************************************************************ + * Name: qspiflash_sectorerase + * + * Description: + * Erase one sector + * + * Input Parameters: + * priv - Device-specific state data + * + * Returned Value: + * None + * + ************************************************************************************/ + +static void qspiflash_sectorerase(FAR struct sim_qspiflashdev_s *priv) +{ + uint32_t address; + uint32_t len; + + /* Ensure the WREN bit is set before any erase operation */ + + if (priv->wren) + { + address = priv->address; + if (priv->last_cmd == QSPIFLASH_SE) + { + address &= CONFIG_SIM_QSPIFLASH_SECTORSIZE_MASK; + len = CONFIG_SIM_QSPIFLASH_SECTORSIZE; + } + else if (priv->last_cmd == QSPIFLASH_SSE) + { + address &= CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE_MASK; + len = CONFIG_SIM_QSPIFLASH_SUBSECTORSIZE; + } + + /* Now perform the erase */ + + memset(&priv->data[address], 0xFF, len); + } +} + +/************************************************************************************ + * Name: qspiflash_writeword + * + * Description: + * Write a word (byte in our case) to the FLASH state machine. + * + * Input Parameters: + * dev - Device-specific state data + * data - the data to send to the simulated FLASH + * + * Returned Value: + * None + * + ************************************************************************************/ + +static void qspiflash_writeword(FAR struct sim_qspiflashdev_s *priv, uint16_t data, + FAR struct qspi_cmdinfo_s *cmdinfo) +{ + switch (priv->state) + { + case QSPIFLASH_STATE_IDLE: + priv->last_cmd = data; + priv->read_data = 0xff; + switch (data) + { + case QSPIFLASH_WREN: + priv->wren = 1; + break; + + case QSPIFLASH_WRDI: + priv->wren = 0; + break; + + /* Sector / Subsector erase */ + + case QSPIFLASH_SE: + case QSPIFLASH_SSE: + priv->address = cmdinfo->addr; + + /* Now perform the sector or sub-sector erase. Really this should + * be done during the deselect, but this is just a simulation . + */ + + qspiflash_sectorerase(priv); + break; + + /* Bulk Erase */ + + case QSPIFLASH_BE: + priv->state = QSPIFLASH_STATE_IDLE; + if (priv->wren) + { + memset(priv->data, 0xff, CONFIG_QSPIFLASH_SIZE); + } + break; + + default: + break; + } + break; + + default: + priv->state = QSPIFLASH_STATE_IDLE; + priv->read_data = 0xFF; + break; + } +} + +/************************************************************************************ + * Name: qspiflash_command + * + * Description: + * Perform QSPI Command operations + * + * Returned Value: + * Always returns zero + * + ************************************************************************************/ + +static int qspiflash_command(FAR struct qspi_dev_s *dev, FAR struct qspi_cmdinfo_s *cmdinfo) +{ + uint8_t *pBuf; + FAR struct sim_qspiflashdev_s *priv = (FAR struct sim_qspiflashdev_s *)dev; + + DEBUGASSERT(cmdinfo->cmd < 256); + + /* Does data accompany the command? */ + + if (QSPICMD_ISDATA(cmdinfo->flags)) + { + DEBUGASSERT(cmdinfo->buffer != NULL && cmdinfo->buflen > 0); + pBuf = (uint8_t *) cmdinfo->buffer; + + /* Read or write operation? */ + + if (QSPICMD_ISWRITE(cmdinfo->flags)) + { + /* Write data operation */ + + qspiflash_writeword(priv, cmdinfo->cmd, cmdinfo); + } + else + { + /* Read data operation */ + + switch (cmdinfo->cmd) + { + case QSPIFLASH_ID: + pBuf[0] = CONFIG_SIM_QSPIFLASH_MANUFACTURER; + pBuf[1] = CONFIG_SIM_QSPIFLASH_MEMORY_TYPE; + pBuf[2] = CONFIG_QSPIFLASH_CAPACITY; + break; + + case QSPIFLASH_RDSR: + if (priv->wren == 1) + pBuf[0] = QSPIFLASH_WREN_SET; + else + pBuf[0] = 0; + break; + } + } + } + else + { + /* Write data operation */ + + qspiflash_writeword(priv, cmdinfo->cmd, cmdinfo); + } + + return 0; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: up_qspiflashinitialize + * + * Description: + * Initialize the selected SPI port + * + * Input Parameter: + * Port number (for hardware that has multiple SPI interfaces) + * + * Returned Value: + * Valid SPI device structure reference on success; a NULL on failure + * + ************************************************************************************/ + +FAR struct qspi_dev_s *up_qspiflashinitialize() +{ + FAR struct sim_qspiflashdev_s *priv = NULL; + + irqstate_t flags = enter_critical_section(); + + priv = &g_qspidev; + priv->selected = 0; + priv->wren = 0; + priv->address = 0; + priv->state = QSPIFLASH_STATE_IDLE; + priv->read_data = 0xFF; + priv->last_cmd = 0xFF; + memset(&priv->data[0], 0xFF, sizeof(priv->data)); + + leave_critical_section(flags); + return (FAR struct qspi_dev_s *)priv; +} + +#endif /* CONFIG_SIM_QSPIFLASH */ diff --git a/arch/sim/src/up_spiflash.c b/arch/sim/src/up_spiflash.c index fa3862727e3..ad367890697 100644 --- a/arch/sim/src/up_spiflash.c +++ b/arch/sim/src/up_spiflash.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/sim/src/up_spiflash.c * - * Copyright (C) 2014 Ken Pettit. All rights reserved. + * Copyright (C) 2014, 2016 Ken Pettit. All rights reserved. * Author: Ken Pettit * * Redistribution and use in source and binary forms, with or without @@ -63,33 +63,37 @@ /* Define the FLASH SIZE in bytes */ #ifdef CONFIG_SIM_SPIFLASH_1M -# define CONFIG_SPIFLASH_SIZE (128 * 1024) -# define CONFIG_SPIFLASH_CAPACITY 0x11 +# define CONFIG_SPIFLASH_SIZE (128 * 1024) +# define CONFIG_SPIFLASH_CAPACITY 0x11 #ifndef CONFIG_SIM_SPIFLASH_SECTORSIZE -# define CONFIG_SIM_SPIFLASH_SECTORSIZE 2048 +# define CONFIG_SIM_SPIFLASH_SECTORSIZE 2048 #endif #endif #ifdef CONFIG_SIM_SPIFLASH_8M -# define CONFIG_SPIFLASH_SIZE (1024 * 1024) -# define CONFIG_SPIFLASH_CAPACITY 0x14 +# define CONFIG_SPIFLASH_SIZE (1024 * 1024) +# define CONFIG_SPIFLASH_CAPACITY_SST26 0x3F +# define CONFIG_SPIFLASH_CAPACITY 0x14 #endif #ifdef CONFIG_SIM_SPIFLASH_32M -# define CONFIG_SPIFLASH_SIZE (4 * 1024 * 1024) -# define CONFIG_SPIFLASH_CAPACITY 0x16 +# define CONFIG_SPIFLASH_SIZE (4 * 1024 * 1024) +# define CONFIG_SPIFLASH_CAPACITY_SST26 0x42 +# define CONFIG_SPIFLASH_CAPACITY 0x16 #endif #ifdef CONFIG_SIM_SPIFLASH_64M -# define CONFIG_SPIFLASH_SIZE (8 * 1024 * 1024) -# define CONFIG_SPIFLASH_CAPACITY 0x17 +# define CONFIG_SPIFLASH_SIZE (8 * 1024 * 1024) +# define CONFIG_SPIFLASH_CAPACITY_SST26 0x43 +# define CONFIG_SPIFLASH_CAPACITY 0x17 #endif #ifdef CONFIG_SIM_SPIFLASH_128M -# define CONFIG_SPIFLASH_SIZE (16 * 1024 * 1024) -# define CONFIG_SPIFLASH_CAPACITY 0x18 +# define CONFIG_SPIFLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_SPIFLASH_CAPACITY_SST26 0x44 +# define CONFIG_SPIFLASH_CAPACITY 0x18 #endif #ifndef CONFIG_SIM_SPIFLASH_MANUFACTURER @@ -169,14 +173,18 @@ struct sim_spiflashdev_s { - struct spi_dev_s spidev; /* Externally visible part of the SPI interface */ - uint32_t selected; /* SPIn base address */ - int wren; - int state; - uint16_t read_data; - uint8_t last_cmd; - unsigned long address; - unsigned char data[CONFIG_SPIFLASH_SIZE]; + struct spi_dev_s spidev; /* Externally visible part of the SPI interface */ + uint32_t selected; /* SPIn base address */ + FAR char * name; /* Name of the flash type (m25p, w25, etc.) */ + int wren; + int state; + uint16_t read_data; + uint8_t last_cmd; + uint8_t capacity; + uint8_t manuf; + uint8_t type; + unsigned long address; + unsigned char data[CONFIG_SPIFLASH_SIZE]; }; /************************************************************************************ @@ -236,9 +244,72 @@ static const struct spi_ops_s g_spiops = .registercallback = 0, }; -struct sim_spiflashdev_s g_spidev = +#ifdef CONFIG_SIM_SPIFLASH_M25P +struct sim_spiflashdev_s g_spidev_m25p = { .spidev = { &g_spiops }, + .name = "m25p", + .manuf = 0x20, + .type = 0x20, + .capacity = CONFIG_SPIFLASH_CAPACITY +}; +#endif + +#ifdef CONFIG_SIM_SPIFLASH_SST26 +struct sim_spiflashdev_s g_spidev_sst26 = +{ + .spidev = { &g_spiops }, + .name = "sst26", + .manuf = 0xBF, +#ifdef CONFIG_SST26_MEMORY_TYPE + .type = CONFIG_SST26_MEMORY_TYPE, +#else + .type = 0x25, +#endif + .capacity = CONFIG_SPIFLASH_CAPACITY_SST26 +}; +#endif + +#ifdef CONFIG_SIM_SPIFLASH_W25 +struct sim_spiflashdev_s g_spidev_w25 = +{ + .spidev = { &g_spiops }, + .name = "w25", + .manuf = 0xef, + .type = 0x30, + .capacity = CONFIG_SPIFLASH_CAPACITY +}; +#endif + +#ifdef CONFIG_SIM_SPIFLASH_CUSTOM +struct sim_spiflashdev_s g_spidev_custom = +{ + .spidev = { &g_spiops }, + .name = "custom", + .manuf = CONFIG_SIM_SPIFLASH_MANUFACTURER, + .type = CONFIG_SIM_SPIFLASH_MEMORY_TYPE, + .capacity = CONFIG_SIM_SPIFLASH_CAPACITY +}; +#endif + +struct sim_spiflashdev_s *gp_spidev[] = +{ +#ifdef CONFIG_SIM_SPIFLASH_M25P + &g_spidev_m25p, +#endif +#ifdef CONFIG_SIM_SPIFLASH_SST26 + &g_spidev_sst26, +#endif +#ifdef CONFIG_SIM_SPIFLASH_W25 + &g_spidev_w25, +#endif +#ifdef CONFIG_SIM_SPIFLASH_CUSTOM + &g_spidev_custom, +#endif + + /* Null termination pointer at end of list */ + + NULL }; /************************************************************************************ @@ -662,17 +733,17 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data /* Read ID States */ case SPIFLASH_STATE_RDID1: - priv->read_data = CONFIG_SIM_SPIFLASH_MANUFACTURER; + priv->read_data = priv->manuf; /* CONFIG_SIM_SPIFLASH_MANUFACTURER; */ priv->state = SPIFLASH_STATE_RDID2; break; case SPIFLASH_STATE_RDID2: - priv->read_data = CONFIG_SIM_SPIFLASH_MEMORY_TYPE; + priv->read_data = priv->type; /* CONFIG_SIM_SPIFLASH_MEMORY_TYPE; */ priv->state = SPIFLASH_STATE_RDID3; break; case SPIFLASH_STATE_RDID3: - priv->read_data = CONFIG_SPIFLASH_CAPACITY; + priv->read_data = priv->capacity; /* CONFIG_SPIFLASH_CAPACITY; */ priv->state = SPIFLASH_STATE_IDLE; break; @@ -834,13 +905,44 @@ static uint16_t spiflash_readword(FAR struct sim_spiflashdev_s *priv) * ************************************************************************************/ -FAR struct spi_dev_s *up_spiflashinitialize() +FAR struct spi_dev_s *up_spiflashinitialize(FAR const char *name) { FAR struct sim_spiflashdev_s *priv = NULL; + int x; irqstate_t flags = enter_critical_section(); - priv = &g_spidev; + /* Loop through all supported flash devices */ + + /* Default to custom FLASH if not specified */ + + if (name == NULL) + { + name = "custom"; + } + + for (x = 0; gp_spidev[x] != NULL; x++) + { + /* Search for the specified flash by name */ + + if (strcmp(name, gp_spidev[x]->name) == 0) + { + break; + } + } + + /* Test if flash device found */ + + if (gp_spidev[x] == NULL) + { + /* Specified device not supported */ + + return NULL; + } + + /* Configure the selected flash device */ + + priv = gp_spidev[x]; priv->selected = 0; priv->wren = 0; priv->address = 0; diff --git a/arch/x86/src/Makefile b/arch/x86/src/Makefile index 16fbc8206c1..a2d07ac0359 100644 --- a/arch/x86/src/Makefile +++ b/arch/x86/src/Makefile @@ -148,10 +148,10 @@ board/libboard$(LIBEXT): nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT) @echo "LD: nuttx$(EXEEXT)" - $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX)$(EXEEXT) $(HEAD_OBJ) $(EXTRA_OBJS) \ + $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP) ifneq ($(CONFIG_WINDOWS_NATIVE),y) - $(Q) $(NM) $(NUTTX)$(EXEEXT) | \ + $(Q) $(NM) $(NUTTX) | \ grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ sort > $(TOPDIR)/System.map endif diff --git a/arch/x86/src/common/up_initialize.c b/arch/x86/src/common/up_initialize.c index 853304038bd..a089d5a7746 100644 --- a/arch/x86/src/common/up_initialize.c +++ b/arch/x86/src/common/up_initialize.c @@ -44,13 +44,16 @@ #include #include #include -#include +#include #include #include #include #include #include #include +#include +#include +#include #include @@ -127,11 +130,21 @@ void up_initialize(void) up_irqinitialize(); +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif + +#ifdef CONFIG_ARCH_DMA /* Initialize the DMA subsystem if the weak function up_dmainitialize has been * brought into the build */ -#ifdef CONFIG_ARCH_DMA #ifdef CONFIG_HAVE_WEAKFUNCTIONS if (up_dmainitialize) #endif @@ -154,6 +167,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -186,6 +207,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on only minimal OS initialization. @@ -193,6 +220,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/arch/x86/src/qemu/Kconfig b/arch/x86/src/qemu/Kconfig index d4bd2e071ba..79cd889fbfc 100644 --- a/arch/x86/src/qemu/Kconfig +++ b/arch/x86/src/qemu/Kconfig @@ -25,4 +25,11 @@ config QEMU_VGA graphics subsystem. Such a conversion to the standard NuttX framebuffer interface would, however, not be a big job. +config QEMU_GPIOIRQ + bool "GPIO interrupt support" + default n + depends on EXPERIMENTAL + ---help--- + Enable support for GPIO interrupts (not implemented) + endif diff --git a/arch/x86/src/qemu/qemu.h b/arch/x86/src/qemu/qemu.h index 85ea4bde354..a42fd0a3285 100644 --- a/arch/x86/src/qemu/qemu.h +++ b/arch/x86/src/qemu/qemu.h @@ -115,7 +115,7 @@ void i486_lowsetup(void); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_QEMU_GPIOIRQ void i486_gpioirqinitialize(void); #else # define i486_gpioirqinitialize() @@ -159,7 +159,7 @@ bool i486_gpioread(uint16_t pinset); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_QEMU_GPIOIRQ void i486_gpioirqenable(int irq); #else # define i486_gpioirqenable(irq) @@ -173,7 +173,7 @@ void i486_gpioirqenable(int irq); * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_QEMU_GPIOIRQ void i486_gpioirqdisable(int irq); #else # define i486_gpioirqdisable(irq) diff --git a/arch/z16/src/common/up_initialize.c b/arch/z16/src/common/up_initialize.c index f6a020203aa..cb423278b32 100644 --- a/arch/z16/src/common/up_initialize.c +++ b/arch/z16/src/common/up_initialize.c @@ -44,13 +44,16 @@ #include #include #include -#include +#include #include #include #include #include #include #include +#include +#include +#include #include @@ -130,9 +133,9 @@ void up_initialize(void) up_calibratedelay(); +#if CONFIG_MM_REGIONS > 1 /* Add any extra memory fragments to the memory manager */ -#if CONFIG_MM_REGIONS > 1 up_addregion(); #endif @@ -140,9 +143,19 @@ void up_initialize(void) up_irqinitialize(); - /* Initialize the system timer interrupt */ +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS) + /* Initialize the system timer interrupt */ + up_timer_initialize(); #endif @@ -154,6 +167,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -186,6 +207,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on only minimal OS initialization. @@ -193,6 +220,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/arch/z80/src/common/up_initialize.c b/arch/z80/src/common/up_initialize.c index 9684998ff36..b74368979d3 100644 --- a/arch/z80/src/common/up_initialize.c +++ b/arch/z80/src/common/up_initialize.c @@ -44,12 +44,15 @@ #include #include #include -#include +#include #include #include #include #include #include +#include +#include +#include #include @@ -119,9 +122,9 @@ void up_initialize(void) up_calibratedelay(); +#if CONFIG_MM_REGIONS > 1 /* Add any extra memory fragments to the memory manager */ -#if CONFIG_MM_REGIONS > 1 up_addregion(); #endif @@ -129,9 +132,19 @@ void up_initialize(void) up_irqinitialize(); - /* Initialize the system timer interrupt */ +#ifdef CONFIG_PM + /* Initialize the power management subsystem. This MCU-specific function + * must be called *very* early in the initialization sequence *before* any + * other device drivers are initialized (since they may attempt to register + * with the power management subsystem). + */ + + up_pminitialize(); +#endif #if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS) + /* Initialize the system timer interrupt */ + up_timer_initialize(); #endif @@ -151,6 +164,14 @@ void up_initialize(void) devnull_register(); /* Standard /dev/null */ #endif +#if defined(CONFIG_DEV_RANDOM) + devrandom_register(); /* Standard /dev/random */ +#endif + +#if defined(CONFIG_DEV_URANDOM) + devurandom_register(); /* Standard /dev/urandom */ +#endif + #if defined(CONFIG_DEV_ZERO) devzero_register(); /* Standard /dev/zero */ #endif @@ -183,6 +204,12 @@ void up_initialize(void) ramlog_consoleinit(); #endif +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1) + /* Register the master pseudo-terminal multiplexor device */ + + (void)ptmx_register(); +#endif + /* Early initialization of the system logging device. Some SYSLOG channel * can be initialized early in the initialization sequence because they * depend on minimal OS initialization. @@ -190,6 +217,16 @@ void up_initialize(void) syslog_initialize(SYSLOG_INIT_EARLY); +#if defined(CONFIG_CRYPTO) + /* Initialize the HW crypto and /dev/crypto */ + + up_cryptoinitialize(); +#endif + +#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV) + devcrypto_register(); +#endif + #ifndef CONFIG_NETDEV_LATEINIT /* Initialize the network */ diff --git a/binfmt/pcode.c b/binfmt/pcode.c index f295e1291c2..7215a944570 100644 --- a/binfmt/pcode.c +++ b/binfmt/pcode.c @@ -49,7 +49,7 @@ #include #include -#include +#include #include #include diff --git a/configs/Makefile b/configs/Makefile index 4ae15b8777a..9a04b131bb6 100644 --- a/configs/Makefile +++ b/configs/Makefile @@ -103,6 +103,8 @@ $(DUMMY_KCONFIG): $(BOARD_KCONFIG) $(call DELFILE, $(DUMMY_KCONFIG)) $(Q) cp -f $(BOARD_KCONFIG) $(DUMMY_KCONFIG) +dirlinks: $(DUMMY_KCONFIG) + context: $(DUMMY_KCONFIG) clean_context: diff --git a/configs/cc3200-launchpad/include/board.h b/configs/cc3200-launchpad/include/board.h index b55819d0b28..53e0a80f399 100644 --- a/configs/cc3200-launchpad/include/board.h +++ b/configs/cc3200-launchpad/include/board.h @@ -242,7 +242,7 @@ uint8_t up_buttons(void); * ************************************************************************************/ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_TIVA_GPIO_IRQS) xcpt_t up_irqbutton(int id, xcpt_t irqhandler); #endif #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/demo9s12ne64/README.txt b/configs/demo9s12ne64/README.txt index 7ec1b55471e..48080bed70f 100644 --- a/configs/demo9s12ne64/README.txt +++ b/configs/demo9s12ne64/README.txt @@ -315,7 +315,7 @@ HCS12/DEMO9S12NEC64-specific Configuration Options GPIO Interrupts - CONFIG_GPIO_IRQ - Enable general support for GPIO IRQs + CONFIG_HCS12_GPIOIRQ - Enable general support for GPIO IRQs CONFIG_HCS12_PORTG_INTS - Enable PortG IRQs CONFIG_HCS12_PORTH_INTS - Enable PortH IRQs CONFIG_HCS12_PORTJ_INTS - Enable PortJ IRQs diff --git a/configs/ea3131/src/lpc31_usbmsc.c b/configs/ea3131/src/lpc31_usbmsc.c index 0d9736d4d6b..0965cf6a57a 100644 --- a/configs/ea3131/src/lpc31_usbmsc.c +++ b/configs/ea3131/src/lpc31_usbmsc.c @@ -50,7 +50,7 @@ #include #include #include -#include +#include /**************************************************************************** * Pre-processor Definitions diff --git a/configs/ea3152/src/lpc31_usbmsc.c b/configs/ea3152/src/lpc31_usbmsc.c index b3e431eeba8..7e4909c838d 100644 --- a/configs/ea3152/src/lpc31_usbmsc.c +++ b/configs/ea3152/src/lpc31_usbmsc.c @@ -50,7 +50,7 @@ #include #include #include -#include +#include /**************************************************************************** * Pre-processor Definitions diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig index da9c32d88ca..509f67357f7 100644 --- a/configs/eagle100/thttpd/defconfig +++ b/configs/eagle100/thttpd/defconfig @@ -331,6 +331,7 @@ CONFIG_ARCH_LEDS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -428,6 +429,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -456,7 +458,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -496,7 +503,10 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y # CONFIG_NET_SLIP is not set # CONFIG_NET_FTMAC100 is not set # CONFIG_NET_VNET is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -549,8 +559,10 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -565,6 +577,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -779,6 +792,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -954,7 +968,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/ez80f910200zco/poll/defconfig b/configs/ez80f910200zco/poll/defconfig index 1c2faa9bce2..f6ed6625456 100644 --- a/configs/ez80f910200zco/poll/defconfig +++ b/configs/ez80f910200zco/poll/defconfig @@ -325,6 +325,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1024 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -417,7 +418,10 @@ CONFIG_ETH0_PHY_AM79C874=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -470,6 +474,7 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_HAVE_USBTRACE is not set @@ -732,10 +737,10 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_EXAMPLES_NRF24L01TERM is not set # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set diff --git a/configs/freedom-k64f/README.txt b/configs/freedom-k64f/README.txt index 8814e0cb9a7..0b80b603d18 100644 --- a/configs/freedom-k64f/README.txt +++ b/configs/freedom-k64f/README.txt @@ -445,7 +445,7 @@ SD Card Support CONFIG_KINETIS_SDHC=y : To enable SDHC0 support System Type - CONFIG_GPIO_IRQ=y : GPIO interrupts needed + CONFIG_KINETIS_GPIOIRQ=y : GPIO interrupts needed CONFIG_KINETIS_PORTEINTS=y : Card detect pin is on PTE6 Device Drivers -> MMC/SD Driver Support @@ -784,7 +784,7 @@ Freedom K64F Configuration Options PIN Interrupt Support - CONFIG_GPIO_IRQ -- Enable pin interrupt support. Also needs + CONFIG_KINETIS_GPIOIRQ -- Enable pin interrupt support. Also needs one or more of the following: CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts @@ -855,13 +855,16 @@ Where is one of the following: 4. SDHC support is not enabled in this configuration. Refer to the configuration settings listed above under "SD Card Support". - 5. No external pullup is available on MDIO signal when MK64FN1M0VLL12 MCU + 5. Support for NSH built-in applications is enabled, but no built-in + applications have been configured in. + + 6. No external pullup is available on MDIO signal when MK64FN1M0VLL12 MCU is requests status of the Ethernet link connection. Internal pullup is required when port configuration for MDIO signal is enabled: CONFIG_KINETIS_ENET_MDIOPULLUP=y - 6. Configured to use a fixed IPv4 address: + 7. Configured to use a fixed IPv4 address: CONFIG_NSH_IPADDR=0x0a000002 CONFIG_NSH_DRIPADDR=0x0a000001 @@ -891,15 +894,45 @@ Where is one of the following: 2. Default platform/toolchain: - CONFIG_HOST_WINDOWS=y : Cygwin under Windows - CONFIG_WINDOWS_CYGWIN=y - CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc) - CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary + CONFIG_HOST_WINDOWS=y : Cygwin under Windows + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc) + CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary - 3. The Serial Console is provided on UART3 with the correct pin - configuration for use with an Arduino Serial Shield. + 3. The Serial Console is provided on UART0 with the correct pin + configuration for use with the OpenSDAv2 VCOM. This can be switched + to use a RS-232 shield on UART3 by reconfiguring the serial console. - 4. An SDHC driver is enabled in this configuration but does not yet work. + -CONFIG_KINETIS_UART0=y + +CONFIG_KINETIS_UART3=y + -CONFIG_UART0_SERIALDRIVER=y + +CONFIG_UART3_SERIALDRIVER=y + -CONFIG_UART0_SERIAL_CONSOLE=y + +CONFIG_UART3_SERIAL_CONSOLE=y + -CONFIG_UART0_RXBUFSIZE=256 + +CONFIG_UART3_RXBUFSIZE=256 + -CONFIG_UART0_TXBUFSIZE=256 + +CONFIG_UART3_TXBUFSIZE=256 + -CONFIG_UART0_BAUD=115200 + +CONFIG_UART3_BAUD=115200 + -CONFIG_UART0_BITS=8 + +CONFIG_UART3_BITS=8 + -CONFIG_UART0_PARITY=0 + +CONFIG_UART3_PARITY=0 + -CONFIG_UART0_2STOP=0 + +CONFIG_UART3_2STOP=0 + + NOTE: On my Windows 10 / Cygwin64 system, the OpenSDAv2 VCOM is not + recognized. I probably need to install a driver? + + There is a serial USB driver on the mbed web site. However, this + driver would not install on Windows 10 for me. I understand that + it installs OK on Windows 7. + + 4. Support for NSH built-in applications is enabled, but no built-in + applications have been configured in. + + 5. An SDHC driver is enabled in this configuration but does not yet work. The basic problem seems to be that it does not sense the presence of the SD card on PTE6. No interrupts are generated when the SD card is inserted or removed. You might want to disable SDHC and MMC/SD if @@ -940,4 +973,4 @@ Status USB device, however, has not yet been tested. I have not yet looked into 48MHz clocking requirements. - \ No newline at end of file + diff --git a/configs/freedom-k64f/include/board.h b/configs/freedom-k64f/include/board.h index 198915caa9e..4bc7ac9ffcd 100644 --- a/configs/freedom-k64f/include/board.h +++ b/configs/freedom-k64f/include/board.h @@ -134,6 +134,17 @@ # define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3) #endif +/* PWM Configuration */ +/* FTM0 Channels */ +/* Channels can be modified using kinetis_k64pinmux.h */ + +#define GPIO_FTM0_CH0OUT PIN_FTM0_CH0_1 +#define GPIO_FTM0_CH1OUT PIN_FTM0_CH1_1 +#define GPIO_FTM0_CH2OUT PIN_FTM0_CH2_2 +#define GPIO_FTM0_CH3OUT PIN_FTM0_CH3_1 +#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_1 +#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_1 + /* LED definitions ******************************************************************/ /* The Freedom K64F has a single RGB LED driven by the K64F as follows: * diff --git a/configs/freedom-k64f/netnsh/defconfig b/configs/freedom-k64f/netnsh/defconfig index bb0ee7a5817..5dc3f9d2d37 100644 --- a/configs/freedom-k64f/netnsh/defconfig +++ b/configs/freedom-k64f/netnsh/defconfig @@ -236,7 +236,7 @@ CONFIG_KINETIS_ENET=y # # Kinetis GPIO Interrupt Configuration # -# CONFIG_GPIO_IRQ is not set +# CONFIG_KINETIS_GPIOIRQ is not set # # Kinetis Ethernet Configuration @@ -454,6 +454,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -603,6 +604,7 @@ CONFIG_UART3_2STOP=0 # CONFIG_UART3_IFLOWCONTROL is not set # CONFIG_UART3_OFLOWCONTROL is not set # CONFIG_UART3_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_HAVE_USBTRACE is not set @@ -772,6 +774,7 @@ CONFIG_FS_FAT=y # CONFIG_FS_ROMFS is not set # CONFIG_FS_TMPFS is not set # CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS_REGISTER=y @@ -813,7 +816,7 @@ CONFIG_MM_REGIONS=1 # CONFIG_BINFMT_EXEPATH is not set # CONFIG_NXFLAT is not set # CONFIG_ELF is not set -# CONFIG_BUILTIN is not set +CONFIG_BUILTIN=y # CONFIG_PIC is not set # CONFIG_SYMTAB_ORDEREDBYNAME is not set @@ -883,6 +886,11 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 # Application Configuration # +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + # # CAN Utilities # @@ -892,7 +900,6 @@ CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 # # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set @@ -921,8 +928,6 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_POLL is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set @@ -933,6 +938,7 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -944,7 +950,6 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_WGET is not set # # File System Utilities @@ -1016,6 +1021,7 @@ CONFIG_NSH_MAXARGUMENTS=6 CONFIG_NSH_ARGCAT=y CONFIG_NSH_NESTDEPTH=3 # CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y # # Disable Individual commands @@ -1048,7 +1054,6 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set # CONFIG_NSH_DISABLE_MKFATFS is not set -# CONFIG_NSH_DISABLE_MKFIFO is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set diff --git a/configs/freedom-k64f/nsh/defconfig b/configs/freedom-k64f/nsh/defconfig index 347552c2ed8..ff3b0eff9cf 100644 --- a/configs/freedom-k64f/nsh/defconfig +++ b/configs/freedom-k64f/nsh/defconfig @@ -8,14 +8,10 @@ # # CONFIG_EXPERIMENTAL is not set # CONFIG_DEFAULT_SMALL is not set -# CONFIG_HOST_LINUX is not set +CONFIG_HOST_LINUX=y # CONFIG_HOST_OSX is not set -CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_WINDOWS is not set # CONFIG_HOST_OTHER is not set -# CONFIG_WINDOWS_NATIVE is not set -CONFIG_WINDOWS_CYGWIN=y -# CONFIG_WINDOWS_MSYS is not set -# CONFIG_WINDOWS_OTHER is not set # # Build Configuration @@ -139,15 +135,11 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set -# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set -# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set -# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set -# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set -CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y -# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set @@ -193,10 +185,10 @@ CONFIG_ARCH_FAMILY_K64=y # # CONFIG_KINETIS_TRACE is not set # CONFIG_KINETIS_FLEXBUS is not set -# CONFIG_KINETIS_UART0 is not set +CONFIG_KINETIS_UART0=y # CONFIG_KINETIS_UART1 is not set # CONFIG_KINETIS_UART2 is not set -CONFIG_KINETIS_UART3=y +# CONFIG_KINETIS_UART3 is not set # CONFIG_KINETIS_UART4 is not set # CONFIG_KINETIS_UART5 is not set # CONFIG_KINETIS_ENET is not set @@ -216,7 +208,7 @@ CONFIG_KINETIS_UART3=y # CONFIG_KINETIS_CMP is not set # CONFIG_KINETIS_VREF is not set CONFIG_KINETIS_SDHC=y -# CONFIG_KINETIS_FTM0 is not set +CONFIG_KINETIS_FTM0=y # CONFIG_KINETIS_FTM1 is not set # CONFIG_KINETIS_FTM2 is not set # CONFIG_KINETIS_LPTIMER is not set @@ -233,10 +225,16 @@ CONFIG_KINETIS_SDHC=y # CONFIG_KINETIS_PDB is not set # CONFIG_KINETIS_PIT is not set +# +# Kinetis FTM PWM Configuration +# +CONFIG_KINETIS_FTM0_PWM=y +CONFIG_KINETIS_FTM0_CHANNEL=2 + # # Kinetis GPIO Interrupt Configuration # -CONFIG_GPIO_IRQ=y +CONFIG_KINETIS_GPIOIRQ=y # CONFIG_KINETIS_PORTAINTS is not set # CONFIG_KINETIS_PORTBINTS is not set # CONFIG_KINETIS_PORTCINTS is not set @@ -251,6 +249,7 @@ CONFIG_KINETIS_PORTEINTS=y # # Kinetis UART Configuration # +# CONFIG_KINETIS_UARTFIFOS is not set CONFIG_SDIO_DMA=y # CONFIG_SDIO_WIDTH_D1_ONLY is not set @@ -338,7 +337,7 @@ CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_UNIQUEID is not set # CONFIG_BOARDCTL_TSCTEST is not set # CONFIG_BOARDCTL_ADCTEST is not set -# CONFIG_BOARDCTL_PWMTEST is not set +CONFIG_BOARDCTL_PWMTEST=y # CONFIG_BOARDCTL_GRAPHICS is not set # CONFIG_BOARDCTL_IOCTL is not set @@ -346,11 +345,11 @@ CONFIG_LIB_BOARDCTL=y # RTOS Features # CONFIG_DISABLE_OS_API=y -# CONFIG_DISABLE_POSIX_TIMERS is not set +CONFIG_DISABLE_POSIX_TIMERS=y # CONFIG_DISABLE_PTHREAD is not set # CONFIG_DISABLE_SIGNALS is not set -# CONFIG_DISABLE_MQUEUE is not set -# CONFIG_DISABLE_ENVIRON is not set +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y # # Clocks and Timers @@ -422,12 +421,6 @@ CONFIG_SIG_SIGUSR2=2 CONFIG_SIG_SIGALARM=3 CONFIG_SIG_SIGCONDTIMEDOUT=16 CONFIG_SIG_SIGWORK=17 - -# -# POSIX Message Queue Options -# -CONFIG_PREALLOC_MQ_MSGS=4 -CONFIG_MQ_MAXMSGSIZE=32 # CONFIG_MODULE is not set # @@ -455,6 +448,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -466,7 +460,7 @@ CONFIG_DEV_NULL=y # CONFIG_CAN is not set # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set # CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set -# CONFIG_PWM is not set +CONFIG_PWM=y # CONFIG_ARCH_HAVE_I2CRESET is not set # CONFIG_I2C is not set # CONFIG_SPI is not set @@ -529,10 +523,10 @@ CONFIG_SERIAL=y CONFIG_SERIAL_CONSOLE=y # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set -# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y # CONFIG_UART1_SERIALDRIVER is not set # CONFIG_UART2_SERIALDRIVER is not set -CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART3_SERIALDRIVER is not set # CONFIG_UART4_SERIALDRIVER is not set # CONFIG_UART5_SERIALDRIVER is not set # CONFIG_UART6_SERIALDRIVER is not set @@ -556,22 +550,23 @@ CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_DMA is not set # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set -CONFIG_UART3_SERIAL_CONSOLE=y +CONFIG_UART0_SERIAL_CONSOLE=y # CONFIG_OTHER_SERIAL_CONSOLE is not set # CONFIG_NO_SERIAL_CONSOLE is not set # -# UART3 Configuration +# UART0 Configuration # -CONFIG_UART3_RXBUFSIZE=256 -CONFIG_UART3_TXBUFSIZE=256 -CONFIG_UART3_BAUD=115200 -CONFIG_UART3_BITS=8 -CONFIG_UART3_PARITY=0 -CONFIG_UART3_2STOP=0 -# CONFIG_UART3_IFLOWCONTROL is not set -# CONFIG_UART3_OFLOWCONTROL is not set -# CONFIG_UART3_DMA is not set +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_HAVE_USBTRACE is not set @@ -616,7 +611,6 @@ CONFIG_SYSLOG_CONSOLE=y CONFIG_FS_READABLE=y CONFIG_FS_WRITABLE=y # CONFIG_FS_NAMED_SEMAPHORES is not set -CONFIG_FS_MQUEUE_MPATH="/var/mqueue" # CONFIG_FS_RAMMAP is not set CONFIG_FS_FAT=y CONFIG_FAT_LCNAMES=y @@ -630,6 +624,7 @@ CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_ROMFS is not set # CONFIG_FS_TMPFS is not set # CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS_REGISTER=y @@ -667,10 +662,9 @@ CONFIG_MM_REGIONS=1 # Binary Loader # # CONFIG_BINFMT_DISABLE is not set -# CONFIG_BINFMT_EXEPATH is not set # CONFIG_NXFLAT is not set # CONFIG_ELF is not set -# CONFIG_BUILTIN is not set +CONFIG_BUILTIN=y # CONFIG_PIC is not set # CONFIG_SYMTAB_ORDEREDBYNAME is not set @@ -684,7 +678,6 @@ CONFIG_MM_REGIONS=1 CONFIG_STDIO_BUFFER_SIZE=64 CONFIG_STDIO_LINEBUFFER=y CONFIG_NUNGET_CHARS=2 -CONFIG_LIB_HOMEDIR="/" # CONFIG_LIBM is not set # CONFIG_NOPRINTF_FIELDWIDTH is not set # CONFIG_LIBC_FLOATINGPOINT is not set @@ -703,7 +696,6 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 CONFIG_LIBC_TMPDIR="/tmp" CONFIG_LIBC_MAX_TMPFILE=32 CONFIG_ARCH_LOWPUTC=y -# CONFIG_LIBC_LOCALTIME is not set # CONFIG_TIME_EXTENDED is not set CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set @@ -731,6 +723,11 @@ CONFIG_ARCH_HAVE_TLS=y # Application Configuration # +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + # # CAN Utilities # @@ -740,7 +737,6 @@ CONFIG_ARCH_HAVE_TLS=y # # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set @@ -767,10 +763,13 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_POLL is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_PPPD is not set +CONFIG_EXAMPLES_PWM=y +CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm0" +CONFIG_EXAMPLES_PWM_FREQUENCY=100 +CONFIG_EXAMPLES_PWM_DURATION=5 +CONFIG_EXAMPLES_PWM_DUTYPCT=50 # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -779,6 +778,7 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -846,6 +846,7 @@ CONFIG_NSH_MAXARGUMENTS=6 CONFIG_NSH_ARGCAT=y CONFIG_NSH_NESTDEPTH=3 # CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y # # Disable Individual commands @@ -877,7 +878,6 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set # CONFIG_NSH_DISABLE_MKFATFS is not set -# CONFIG_NSH_DISABLE_MKFIFO is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set diff --git a/configs/freedom-k64f/src/Makefile b/configs/freedom-k64f/src/Makefile index 3538dc384be..8c533ec8494 100644 --- a/configs/freedom-k64f/src/Makefile +++ b/configs/freedom-k64f/src/Makefile @@ -69,4 +69,8 @@ ifeq ($(CONFIG_USBMSC),y) CSRCS += k64_usbmsc.c endif +ifeq ($(CONFIG_PWM),y) +CSRCS += k64_pwm.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/freedom-k64f/src/freedom-k64f.h b/configs/freedom-k64f/src/freedom-k64f.h index aac232930bd..0e0af54f967 100644 --- a/configs/freedom-k64f/src/freedom-k64f.h +++ b/configs/freedom-k64f/src/freedom-k64f.h @@ -100,8 +100,8 @@ /* We expect to receive GPIO interrupts for card insertion events */ -# ifndef CONFIG_GPIO_IRQ -# error "CONFIG_GPIO_IRQ required for card detect interrupt" +# ifndef CONFIG_KINETIS_GPIOIRQ +# error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt" # endif # ifndef CONFIG_KINETIS_PORTEINTS diff --git a/configs/freedom-k64f/src/k64_pwm.c b/configs/freedom-k64f/src/k64_pwm.c new file mode 100644 index 00000000000..2434974122a --- /dev/null +++ b/configs/freedom-k64f/src/k64_pwm.c @@ -0,0 +1,107 @@ +/************************************************************************************ + * configs/freedom-k64f/src/k64_pwm.c + * + * Copyright (C) 2013, 2015, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Jordan MacIntyre + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include + +#include "chip.h" +#include "up_arch.h" +#include "kinetis_pwm.h" + +#ifdef CONFIG_PWM + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: board_pwm_setup + * + * Description: + * All Kinetis K architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int board_pwm_setup(void) +{ + FAR struct pwm_lowerhalf_s *pwm; + static bool initialized = false; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call k64_pwminitialize() to get an instance of the PWM interface */ + + pwm = kinetis_pwminitialize(0); + if (!pwm) + { + aerr("ERROR: Failed to get the K64 PWM lower half\n"); + return -ENODEV; + } + + /* Register the PWM driver at "/dev/pwm0" */ + + ret = pwm_register("/dev/pwm0", pwm); + if (ret < 0) + { + aerr("ERROR: pwm_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif /* CONFIG_PWM */ diff --git a/configs/freedom-kl25z/minnsh/defconfig b/configs/freedom-kl25z/minnsh/defconfig index 8a7b3f90623..bf20f0e90f5 100644 --- a/configs/freedom-kl25z/minnsh/defconfig +++ b/configs/freedom-kl25z/minnsh/defconfig @@ -135,7 +135,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_GPIO_IRQ is not set +# CONFIG_KL_GPIOIRQ is not set # # Kinetis Configuration Options diff --git a/configs/freedom-kl25z/nsh/defconfig b/configs/freedom-kl25z/nsh/defconfig index 639cc13063e..1096d821ef5 100644 --- a/configs/freedom-kl25z/nsh/defconfig +++ b/configs/freedom-kl25z/nsh/defconfig @@ -135,7 +135,6 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_GPIO_IRQ is not set # # Kinetis Configuration Options @@ -191,6 +190,7 @@ CONFIG_KL_TPM0_CHANNEL=0 # # Kinetis GPIO Interrupt Configuration # +# CONFIG_KL_GPIOIRQ is not set # # Architecture Options @@ -259,11 +259,11 @@ CONFIG_ARCH_BOARD="freedom-kl25z" # CONFIG_ARCH_HAVE_LEDS=y CONFIG_ARCH_LEDS=y -CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set @@ -375,6 +375,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=1536 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -403,7 +404,12 @@ CONFIG_PWM=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -476,8 +482,10 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -492,6 +500,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -594,6 +603,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -619,7 +629,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set @@ -645,7 +654,6 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_PPPD is not set CONFIG_EXAMPLES_PWM=y @@ -757,7 +765,6 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set CONFIG_NSH_DISABLE_MKDIR=y -# CONFIG_NSH_DISABLE_MKFIFO is not set CONFIG_NSH_DISABLE_MKRD=y # CONFIG_NSH_DISABLE_MH is not set CONFIG_NSH_DISABLE_MOUNT=y @@ -779,6 +786,7 @@ CONFIG_NSH_DISABLE_UNAME=y # CONFIG_NSH_DISABLE_USLEEP is not set CONFIG_NSH_DISABLE_WGET=y # CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 # # Configure Command Options @@ -816,7 +824,7 @@ CONFIG_NSH_CONSOLE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/freedom-kl25z/src/kl_pwm.c b/configs/freedom-kl25z/src/kl_pwm.c index e00d1ca52b9..1db53f5a267 100644 --- a/configs/freedom-kl25z/src/kl_pwm.c +++ b/configs/freedom-kl25z/src/kl_pwm.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include diff --git a/configs/freedom-kl26z/minnsh/defconfig b/configs/freedom-kl26z/minnsh/defconfig index 3356a639659..3fba07ddfa9 100644 --- a/configs/freedom-kl26z/minnsh/defconfig +++ b/configs/freedom-kl26z/minnsh/defconfig @@ -135,7 +135,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_GPIO_IRQ is not set +# CONFIG_KL_GPIOIRQ is not set # # Kinetis Configuration Options diff --git a/configs/freedom-kl26z/nsh/defconfig b/configs/freedom-kl26z/nsh/defconfig index 4e8d2b0f702..32f0bdf6be2 100644 --- a/configs/freedom-kl26z/nsh/defconfig +++ b/configs/freedom-kl26z/nsh/defconfig @@ -135,7 +135,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_GPIO_IRQ is not set +# CONFIG_KL_GPIOIRQ is not set # # Kinetis Configuration Options diff --git a/configs/freedom-kl26z/src/kl_pwm.c b/configs/freedom-kl26z/src/kl_pwm.c index 672d49e70e8..cb5b6af3f8a 100644 --- a/configs/freedom-kl26z/src/kl_pwm.c +++ b/configs/freedom-kl26z/src/kl_pwm.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include diff --git a/configs/hymini-stm32v/nsh2/defconfig b/configs/hymini-stm32v/nsh2/defconfig index 826bd059a21..eb218c373ec 100644 --- a/configs/hymini-stm32v/nsh2/defconfig +++ b/configs/hymini-stm32v/nsh2/defconfig @@ -424,6 +424,8 @@ CONFIG_STM32_JTAG_DISABLE=y # # Timer Configuration # +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set # CONFIG_STM32_TIM3_PWM is not set # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -464,9 +466,6 @@ CONFIG_STM32_USART1_SERIALDRIVER=y CONFIG_SDIO_DMAPRIO=0x00001000 CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set -CONFIG_RTC_LSECLOCK=y -# CONFIG_RTC_LSICLOCK is not set -# CONFIG_RTC_HSECLOCK is not set # # USB FS Host Configuration @@ -560,13 +559,11 @@ CONFIG_ARCH_HAVE_BUTTONS=y CONFIG_ARCH_BUTTONS=y CONFIG_ARCH_HAVE_IRQBUTTONS=y CONFIG_ARCH_IRQBUTTONS=y -CONFIG_NSH_MMCSDMINOR=0 -CONFIG_NSH_MMCSDSLOTNO=0 -CONFIG_NSH_MMCSDSPIPORTNO=0 # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set @@ -590,10 +587,16 @@ CONFIG_DISABLE_OS_API=y # # Clocks and Timers # +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set # CONFIG_CLOCK_MONOTONIC is not set +CONFIG_ARCH_HAVE_TIMEKEEPING=y # CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2016 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=28 CONFIG_MAX_WDOGPARMS=2 CONFIG_PREALLOC_WDOGS=8 CONFIG_WDOG_INTRESERVE=1 @@ -687,6 +690,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -717,12 +721,7 @@ CONFIG_SPI_EXCHANGE=y # Timer Driver Support # # CONFIG_TIMER is not set -CONFIG_RTC=y -# CONFIG_RTC_DATETIME is not set -# CONFIG_RTC_HIRES is not set -# CONFIG_RTC_ALARM is not set -# CONFIG_RTC_DRIVER is not set -# CONFIG_RTC_EXTERNAL is not set +# CONFIG_RTC is not set # CONFIG_WATCHDOG is not set # CONFIG_ANALOG is not set # CONFIG_AUDIO_DEVICES is not set @@ -746,7 +745,12 @@ CONFIG_ADS7843E_THRESHY=12 # CONFIG_BUTTONS is not set # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -868,6 +872,7 @@ CONFIG_USART1_2STOP=0 # CONFIG_USART1_IFLOWCONTROL is not set # CONFIG_USART1_OFLOWCONTROL is not set # CONFIG_USART1_DMA is not set +# CONFIG_PSEUDOTERM is not set CONFIG_USBDEV=y # @@ -907,6 +912,8 @@ CONFIG_USBMSC_REMOVABLE=y CONFIG_USBMSC_SCSI_PRIO=128 CONFIG_USBMSC_SCSI_STACKSIZE=2048 # CONFIG_USBHOST is not set +CONFIG_HAVE_USBTRACE=y +# CONFIG_USBMONITOR is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -921,6 +928,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -1129,6 +1137,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -1167,7 +1176,6 @@ CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set @@ -1229,7 +1237,6 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set @@ -1347,7 +1354,6 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set # CONFIG_NSH_DISABLE_MKFATFS is not set -# CONFIG_NSH_DISABLE_MKFIFO is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set @@ -1369,6 +1375,9 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 # # Configure Command Options @@ -1415,7 +1424,7 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set @@ -1426,7 +1435,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set # CONFIG_SYSTEM_UBLOXMODEM is not set -# CONFIG_USBMONITOR is not set CONFIG_SYSTEM_USBMSC=y CONFIG_SYSTEM_USBMSC_NLUNS=1 CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 diff --git a/configs/kwikstik-k40/README.txt b/configs/kwikstik-k40/README.txt index 5d31bb232f5..9586a43c90c 100644 --- a/configs/kwikstik-k40/README.txt +++ b/configs/kwikstik-k40/README.txt @@ -461,7 +461,7 @@ KwikStik-K40-specific Configuration Options PIN Interrupt Support - CONFIG_GPIO_IRQ -- Enable pin interrupt support. Also needs + CONFIG_KINETIS_GPIOIRQ -- Enable pin interrupt support. Also needs one or more of the following: CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig index befa76725dd..2582f887cd3 100644 --- a/configs/kwikstik-k40/ostest/defconfig +++ b/configs/kwikstik-k40/ostest/defconfig @@ -220,7 +220,7 @@ CONFIG_KINETIS_UART5=y # # Kinetis GPIO Interrupt Configuration # -# CONFIG_GPIO_IRQ is not set +# CONFIG_KINETIS_GPIOIRQ is not set # # Kinetis UART Configuration diff --git a/configs/kwikstik-k40/src/k40_appinit.c b/configs/kwikstik-k40/src/k40_appinit.c index 43694bce935..befe905af92 100644 --- a/configs/kwikstik-k40/src/k40_appinit.c +++ b/configs/kwikstik-k40/src/k40_appinit.c @@ -98,8 +98,8 @@ /* We expect to receive GPIO interrupts for card insertion events */ -#ifndef CONFIG_GPIO_IRQ -# error "CONFIG_GPIO_IRQ required for card detect interrupt" +#ifndef CONFIG_KINETIS_GPIOIRQ +# error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt" #endif #ifndef CONFIG_KINETIS_PORTEINTS diff --git a/configs/lincoln60/include/board.h b/configs/lincoln60/include/board.h index 3ac74c0659a..b22aa4de6d3 100644 --- a/configs/lincoln60/include/board.h +++ b/configs/lincoln60/include/board.h @@ -44,7 +44,7 @@ #include #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) # include #endif diff --git a/configs/lincoln60/netnsh/defconfig b/configs/lincoln60/netnsh/defconfig index eb4939104ca..4d5cabba012 100644 --- a/configs/lincoln60/netnsh/defconfig +++ b/configs/lincoln60/netnsh/defconfig @@ -152,7 +152,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/lincoln60/nsh/defconfig b/configs/lincoln60/nsh/defconfig index 2b99c9a39e8..4b9b3f2e1bb 100644 --- a/configs/lincoln60/nsh/defconfig +++ b/configs/lincoln60/nsh/defconfig @@ -144,7 +144,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/lincoln60/src/lpc17_buttons.c b/configs/lincoln60/src/lpc17_buttons.c index 9018c2ea36c..ebcfc385c67 100644 --- a/configs/lincoln60/src/lpc17_buttons.c +++ b/configs/lincoln60/src/lpc17_buttons.c @@ -73,7 +73,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = * button events. */ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; /* This array provides the mapping from button ID numbers to button IRQ @@ -178,7 +178,7 @@ uint8_t board_buttons(void) * ****************************************************************************/ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) xcpt_t board_button_irq(int id, xcpt_t irqhandler) { xcpt_t oldhandler = NULL; diff --git a/configs/lincoln60/thttpd-binfs/defconfig b/configs/lincoln60/thttpd-binfs/defconfig index 41f2b819096..babe05b6f3b 100644 --- a/configs/lincoln60/thttpd-binfs/defconfig +++ b/configs/lincoln60/thttpd-binfs/defconfig @@ -152,7 +152,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # @@ -316,6 +316,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -418,6 +419,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -446,7 +448,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -505,7 +512,10 @@ CONFIG_ETH0_PHY_KSZ8041=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -558,8 +568,10 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -574,6 +586,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -792,6 +805,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -971,7 +985,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/lpc4330-xplorer/include/board.h b/configs/lpc4330-xplorer/include/board.h index 8e4e531b256..0a7c7d5f8c5 100644 --- a/configs/lpc4330-xplorer/include/board.h +++ b/configs/lpc4330-xplorer/include/board.h @@ -43,7 +43,7 @@ #include #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) # include #endif diff --git a/configs/lpc4330-xplorer/src/lpc43_buttons.c b/configs/lpc4330-xplorer/src/lpc43_buttons.c index 03d27d84899..a277bfc8689 100644 --- a/configs/lpc4330-xplorer/src/lpc43_buttons.c +++ b/configs/lpc4330-xplorer/src/lpc43_buttons.c @@ -72,7 +72,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = * button events. */ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; /* This array provides the mapping from button ID numbers to button IRQ @@ -177,7 +177,7 @@ uint8_t board_buttons(void) * ****************************************************************************/ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) xcpt_t board_button_irq(int id, xcpt_t irqhandler) { xcpt_t oldhandler = NULL; diff --git a/configs/lpc4337-ws/include/board.h b/configs/lpc4337-ws/include/board.h index 76da5ef7477..0fe485ad71e 100644 --- a/configs/lpc4337-ws/include/board.h +++ b/configs/lpc4337-ws/include/board.h @@ -43,7 +43,7 @@ #include #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) # include #endif diff --git a/configs/lpc4357-evb/include/board.h b/configs/lpc4357-evb/include/board.h index a1667e66dae..91f0e458b4b 100644 --- a/configs/lpc4357-evb/include/board.h +++ b/configs/lpc4357-evb/include/board.h @@ -43,7 +43,7 @@ #include #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) # include #endif diff --git a/configs/lpc4357-evb/src/lpc43_buttons.c b/configs/lpc4357-evb/src/lpc43_buttons.c index df7f32aef66..37ac652cdfc 100644 --- a/configs/lpc4357-evb/src/lpc43_buttons.c +++ b/configs/lpc4357-evb/src/lpc43_buttons.c @@ -72,7 +72,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = * button events. */ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; /* This array provides the mapping from button ID numbers to button IRQ @@ -183,7 +183,7 @@ uint8_t board_buttons(void) * ****************************************************************************/ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) xcpt_t board_button_irq(int id, xcpt_t irqhandler) { #if 0 /* Not yet implemented */ diff --git a/configs/lpc4370-link2/include/board.h b/configs/lpc4370-link2/include/board.h index 7bbbd861053..c177c6d4616 100644 --- a/configs/lpc4370-link2/include/board.h +++ b/configs/lpc4370-link2/include/board.h @@ -43,7 +43,7 @@ #include #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC43_GPIO_IRQ) # include #endif diff --git a/configs/lpcxpresso-lpc1115/minnsh/defconfig b/configs/lpcxpresso-lpc1115/minnsh/defconfig index ea60c5f721e..edc83097727 100644 --- a/configs/lpcxpresso-lpc1115/minnsh/defconfig +++ b/configs/lpcxpresso-lpc1115/minnsh/defconfig @@ -135,7 +135,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC11_GPIOIRQ is not set # # LPC11xx Configuration Options diff --git a/configs/lpcxpresso-lpc1115/nsh/defconfig b/configs/lpcxpresso-lpc1115/nsh/defconfig index 22a4a0c7dc9..c8b7d4b11c3 100644 --- a/configs/lpcxpresso-lpc1115/nsh/defconfig +++ b/configs/lpcxpresso-lpc1115/nsh/defconfig @@ -135,7 +135,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC11_GPIOIRQ is not set # # LPC11xx Configuration Options diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c b/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c index 6f303e5f5e4..9ecbfcf85e8 100644 --- a/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c +++ b/configs/lpcxpresso-lpc1115/src/lpc11_pwm.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h b/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h index 5f3db65ba63..4f523e26b29 100644 --- a/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h +++ b/configs/lpcxpresso-lpc1115/src/lpcxpresso_lpc1115.h @@ -147,7 +147,7 @@ */ #define LPCXPRESSO_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2) -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ # define LPCXPRESSO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) #else # define LPCXPRESSO_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) @@ -183,7 +183,7 @@ */ #define LPCXPRESSO_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21) -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC11_GPIOIRQ # define LPCXPRESSO_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) #else # define LPCXPRESSO_USB_VBUSSENSE (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) diff --git a/configs/lpcxpresso-lpc1768/dhcpd/defconfig b/configs/lpcxpresso-lpc1768/dhcpd/defconfig index 5cb3db6d551..1bd6f34549b 100644 --- a/configs/lpcxpresso-lpc1768/dhcpd/defconfig +++ b/configs/lpcxpresso-lpc1768/dhcpd/defconfig @@ -144,7 +144,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/lpcxpresso-lpc1768/nsh/defconfig b/configs/lpcxpresso-lpc1768/nsh/defconfig index 873e93ae077..e28399a97a6 100644 --- a/configs/lpcxpresso-lpc1768/nsh/defconfig +++ b/configs/lpcxpresso-lpc1768/nsh/defconfig @@ -144,7 +144,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/lpcxpresso-lpc1768/nx/defconfig b/configs/lpcxpresso-lpc1768/nx/defconfig index b1e82a5645b..ad93523748a 100644 --- a/configs/lpcxpresso-lpc1768/nx/defconfig +++ b/configs/lpcxpresso-lpc1768/nx/defconfig @@ -144,7 +144,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c b/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c index 4b261555cb6..5aec1613c14 100644 --- a/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c +++ b/configs/lpcxpresso-lpc1768/src/lpc17_pwm.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include diff --git a/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h b/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h index 6f31162233d..8b853a5df3c 100644 --- a/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h +++ b/configs/lpcxpresso-lpc1768/src/lpcxpresso-lpc1768.h @@ -147,7 +147,7 @@ */ #define LPCXPRESSO_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2) -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ # define LPCXPRESSO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) #else # define LPCXPRESSO_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) @@ -183,7 +183,7 @@ */ #define LPCXPRESSO_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN21) -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ # define LPCXPRESSO_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) #else # define LPCXPRESSO_USB_VBUSSENSE (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN5) diff --git a/configs/lpcxpresso-lpc1768/thttpd/defconfig b/configs/lpcxpresso-lpc1768/thttpd/defconfig index dc17b59f8ba..0fbcd2047d9 100644 --- a/configs/lpcxpresso-lpc1768/thttpd/defconfig +++ b/configs/lpcxpresso-lpc1768/thttpd/defconfig @@ -144,7 +144,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # @@ -308,6 +308,7 @@ CONFIG_ARCH_LEDS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -410,6 +411,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -438,7 +440,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -497,7 +504,10 @@ CONFIG_ETH0_PHY_LAN8720=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -550,8 +560,10 @@ CONFIG_UART3_2STOP=0 # CONFIG_UART3_IFLOWCONTROL is not set # CONFIG_UART3_OFLOWCONTROL is not set # CONFIG_UART3_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -566,6 +578,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -780,6 +793,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -955,7 +969,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/lpcxpresso-lpc1768/usbmsc/defconfig b/configs/lpcxpresso-lpc1768/usbmsc/defconfig index ed1b761bcb6..e553a9db14c 100644 --- a/configs/lpcxpresso-lpc1768/usbmsc/defconfig +++ b/configs/lpcxpresso-lpc1768/usbmsc/defconfig @@ -144,7 +144,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/mbed/hidkbd/defconfig b/configs/mbed/hidkbd/defconfig index 78b35bd634b..a45e4315cbb 100644 --- a/configs/mbed/hidkbd/defconfig +++ b/configs/mbed/hidkbd/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/mbed/nsh/defconfig b/configs/mbed/nsh/defconfig index 617dbe793bd..d5c241c67a8 100644 --- a/configs/mbed/nsh/defconfig +++ b/configs/mbed/nsh/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/mbed/src/lpc17_pwm.c b/configs/mbed/src/lpc17_pwm.c index c8b6881dc9b..5b312bd71b3 100644 --- a/configs/mbed/src/lpc17_pwm.c +++ b/configs/mbed/src/lpc17_pwm.c @@ -46,7 +46,7 @@ #include #include -#include +#include #include diff --git a/configs/mikroe-stm32f4/src/stm32_appinit.c b/configs/mikroe-stm32f4/src/stm32_appinit.c index 7d43cf72ed2..5cb5d176651 100644 --- a/configs/mikroe-stm32f4/src/stm32_appinit.c +++ b/configs/mikroe-stm32f4/src/stm32_appinit.c @@ -61,7 +61,7 @@ #ifdef CONFIG_MIKROE_FLASH_CONFIG_PART #ifdef CONFIG_PLATFORM_CONFIGDATA -# include +# include #endif #endif diff --git a/configs/mikroe-stm32f4/src/stm32_pwm.c b/configs/mikroe-stm32f4/src/stm32_pwm.c index 0710d42f8b2..39ac1f2b6ce 100644 --- a/configs/mikroe-stm32f4/src/stm32_pwm.c +++ b/configs/mikroe-stm32f4/src/stm32_pwm.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include diff --git a/configs/ne64badge/README.txt b/configs/ne64badge/README.txt index fd5933f81aa..5eb2bc7d820 100644 --- a/configs/ne64badge/README.txt +++ b/configs/ne64badge/README.txt @@ -422,7 +422,7 @@ HCS12/NE64BADGE-specific Configuration Options GPIO Interrupts - CONFIG_GPIO_IRQ - Enable general support for GPIO IRQs + CONFIG_HCS12_GPIOIRQ - Enable general support for GPIO IRQs CONFIG_HCS12_PORTG_INTS - Enable PortG IRQs CONFIG_HCS12_PORTH_INTS - Enable PortH IRQs CONFIG_HCS12_PORTJ_INTS - Enable PortJ IRQs diff --git a/configs/ntosd-dm320/poll/defconfig b/configs/ntosd-dm320/poll/defconfig index 45e393b8e1f..83e3ba302ba 100644 --- a/configs/ntosd-dm320/poll/defconfig +++ b/configs/ntosd-dm320/poll/defconfig @@ -219,6 +219,7 @@ CONFIG_ARCH_HAVE_LEDS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -323,6 +324,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -351,7 +353,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -403,7 +410,10 @@ CONFIG_DM9X_MODE_AUTO=y # CONFIG_NET_SLIP is not set # CONFIG_NET_FTMAC100 is not set # CONFIG_NET_VNET is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -472,8 +482,10 @@ CONFIG_UART1_2STOP=0 # CONFIG_UART1_IFLOWCONTROL is not set # CONFIG_UART1_OFLOWCONTROL is not set # CONFIG_UART1_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -488,6 +500,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -693,6 +706,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -732,10 +746,10 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_EXAMPLES_NRF24L01TERM is not set # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set @@ -832,7 +846,7 @@ CONFIG_NETUTILS_NETLIB=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/ntosd-dm320/thttpd/defconfig b/configs/ntosd-dm320/thttpd/defconfig index e17efe6802f..456f6d2a370 100644 --- a/configs/ntosd-dm320/thttpd/defconfig +++ b/configs/ntosd-dm320/thttpd/defconfig @@ -219,6 +219,7 @@ CONFIG_ARCH_HAVE_LEDS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -316,6 +317,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -344,7 +346,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -396,7 +403,10 @@ CONFIG_DM9X_MODE_AUTO=y # CONFIG_NET_SLIP is not set # CONFIG_NET_FTMAC100 is not set # CONFIG_NET_VNET is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -465,8 +475,10 @@ CONFIG_UART1_2STOP=0 # CONFIG_UART1_IFLOWCONTROL is not set # CONFIG_UART1_OFLOWCONTROL is not set # CONFIG_UART1_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -481,6 +493,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -696,6 +709,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -872,7 +886,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/nucleo-f303re/src/stm32_can.c b/configs/nucleo-f303re/src/stm32_can.c index 41eae2ff92b..ec689b3e917 100644 --- a/configs/nucleo-f303re/src/stm32_can.c +++ b/configs/nucleo-f303re/src/stm32_can.c @@ -46,7 +46,7 @@ #include #include -#include +#include #include "stm32.h" diff --git a/configs/nucleo-f303re/src/stm32_pwm.c b/configs/nucleo-f303re/src/stm32_pwm.c index 6b940e8879f..7ab25eac4d9 100644 --- a/configs/nucleo-f303re/src/stm32_pwm.c +++ b/configs/nucleo-f303re/src/stm32_pwm.c @@ -46,7 +46,7 @@ #include #include -#include +#include #include "stm32_pwm.h" #include "nucleo-f303re.h" diff --git a/configs/olimex-lpc1766stk/ftpc/defconfig b/configs/olimex-lpc1766stk/ftpc/defconfig index 8fc1fe60108..337a9869c49 100644 --- a/configs/olimex-lpc1766stk/ftpc/defconfig +++ b/configs/olimex-lpc1766stk/ftpc/defconfig @@ -144,7 +144,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/hidkbd/defconfig b/configs/olimex-lpc1766stk/hidkbd/defconfig index f4dd6913b94..5142080c160 100644 --- a/configs/olimex-lpc1766stk/hidkbd/defconfig +++ b/configs/olimex-lpc1766stk/hidkbd/defconfig @@ -152,7 +152,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/hidmouse/defconfig b/configs/olimex-lpc1766stk/hidmouse/defconfig index 77d8930168f..bf6af4f1bb5 100644 --- a/configs/olimex-lpc1766stk/hidmouse/defconfig +++ b/configs/olimex-lpc1766stk/hidmouse/defconfig @@ -152,7 +152,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/include/board.h b/configs/olimex-lpc1766stk/include/board.h index c522b051dfc..e147bc7377b 100644 --- a/configs/olimex-lpc1766stk/include/board.h +++ b/configs/olimex-lpc1766stk/include/board.h @@ -45,7 +45,7 @@ #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) # include #endif diff --git a/configs/olimex-lpc1766stk/nettest/defconfig b/configs/olimex-lpc1766stk/nettest/defconfig index f53218ac1ca..9f0ac48d3c8 100644 --- a/configs/olimex-lpc1766stk/nettest/defconfig +++ b/configs/olimex-lpc1766stk/nettest/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/nsh/defconfig b/configs/olimex-lpc1766stk/nsh/defconfig index 7b565ed90cc..3138fafdd3a 100644 --- a/configs/olimex-lpc1766stk/nsh/defconfig +++ b/configs/olimex-lpc1766stk/nsh/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/nx/defconfig b/configs/olimex-lpc1766stk/nx/defconfig index f774a4d7cab..500331c8bcf 100644 --- a/configs/olimex-lpc1766stk/nx/defconfig +++ b/configs/olimex-lpc1766stk/nx/defconfig @@ -153,7 +153,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/slip-httpd/defconfig b/configs/olimex-lpc1766stk/slip-httpd/defconfig index 6033db7243b..eaf0a647f7e 100644 --- a/configs/olimex-lpc1766stk/slip-httpd/defconfig +++ b/configs/olimex-lpc1766stk/slip-httpd/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # @@ -299,6 +299,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -396,6 +397,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -424,7 +426,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -445,7 +452,10 @@ CONFIG_DEV_NULL=y # CONFIG_EEPROM is not set # CONFIG_NETDEVICES is not set CONFIG_NET_SLIP=y -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -514,8 +524,10 @@ CONFIG_UART1_2STOP=0 # CONFIG_UART1_IFLOWCONTROL is not set # CONFIG_UART1_OFLOWCONTROL is not set # CONFIG_UART1_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -530,6 +542,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -742,6 +755,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -917,7 +931,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/olimex-lpc1766stk/src/lpc17_buttons.c b/configs/olimex-lpc1766stk/src/lpc17_buttons.c index b2f2d811ca3..888335f46bc 100644 --- a/configs/olimex-lpc1766stk/src/lpc17_buttons.c +++ b/configs/olimex-lpc1766stk/src/lpc17_buttons.c @@ -74,7 +74,7 @@ static const uint16_t g_buttoncfg[BOARD_NUM_BUTTONS] = * button events. */ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; /* This array provides the mapping from button ID numbers to button IRQ @@ -181,7 +181,7 @@ uint8_t board_buttons(void) * ****************************************************************************/ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) xcpt_t board_button_irq(int id, xcpt_t irqhandler) { xcpt_t oldhandler = NULL; diff --git a/configs/olimex-lpc1766stk/src/lpc17_can.c b/configs/olimex-lpc1766stk/src/lpc17_can.c index 3282587dd42..afb1ff47a0c 100644 --- a/configs/olimex-lpc1766stk/src/lpc17_can.c +++ b/configs/olimex-lpc1766stk/src/lpc17_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/olimex-lpc1766stk/src/lpc17_ssp.c b/configs/olimex-lpc1766stk/src/lpc17_ssp.c index 9bb9b563bb9..17df5733e0e 100644 --- a/configs/olimex-lpc1766stk/src/lpc17_ssp.c +++ b/configs/olimex-lpc1766stk/src/lpc17_ssp.c @@ -66,8 +66,8 @@ #undef HAVE_SPI_CALLBACK #ifdef CONFIG_SPI_CALLBACK -# ifndef CONFIG_GPIO_IRQ -# warning "CONFIG_GPIO_IRQ is required to support CONFIG_SPI_CALLBACK" +# ifndef CONFIG_LPC17_GPIOIRQ +# warning "CONFIG_LPC17_GPIOIRQ is required to support CONFIG_SPI_CALLBACK" # else # define HAVE_SPI_CALLBACK 1 # endif diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig index bf7ea997727..1f91e8ad669 100644 --- a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig +++ b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig @@ -152,7 +152,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # @@ -316,6 +316,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -418,6 +419,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -446,7 +448,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -505,7 +512,10 @@ CONFIG_ETH0_PHY_KS8721=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -558,8 +568,10 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -574,6 +586,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -789,6 +802,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -968,7 +982,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig index f53e7d5f4a8..bb5f704d060 100644 --- a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig +++ b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # @@ -309,6 +309,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -411,6 +412,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -439,7 +441,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -498,7 +505,10 @@ CONFIG_ETH0_PHY_KS8721=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -551,8 +561,10 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -567,6 +579,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -781,6 +794,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -956,7 +970,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/olimex-lpc1766stk/usbmsc/defconfig b/configs/olimex-lpc1766stk/usbmsc/defconfig index 2ddcb5ccbdf..00bd628aa85 100644 --- a/configs/olimex-lpc1766stk/usbmsc/defconfig +++ b/configs/olimex-lpc1766stk/usbmsc/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_OABI_TOOLCHAIN is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/usbserial/defconfig b/configs/olimex-lpc1766stk/usbserial/defconfig index 7010288b625..6ae07cce441 100644 --- a/configs/olimex-lpc1766stk/usbserial/defconfig +++ b/configs/olimex-lpc1766stk/usbserial/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-lpc1766stk/zmodem/defconfig b/configs/olimex-lpc1766stk/zmodem/defconfig index 3ea8b1c6471..14e768128ba 100644 --- a/configs/olimex-lpc1766stk/zmodem/defconfig +++ b/configs/olimex-lpc1766stk/zmodem/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/olimex-stm32-e407/src/stm32_can.c b/configs/olimex-stm32-e407/src/stm32_can.c index d4fa00aa4c9..42def42a81b 100644 --- a/configs/olimex-stm32-e407/src/stm32_can.c +++ b/configs/olimex-stm32-e407/src/stm32_can.c @@ -41,7 +41,7 @@ #include #include -#include +#include #include #include "stm32.h" #include "stm32_can.h" diff --git a/configs/olimex-stm32-h405/src/stm32_can.c b/configs/olimex-stm32-h405/src/stm32_can.c index ed2ee4a069d..62c94a0b19b 100644 --- a/configs/olimex-stm32-h405/src/stm32_can.c +++ b/configs/olimex-stm32-h405/src/stm32_can.c @@ -41,7 +41,7 @@ #include #include -#include +#include #include #include "stm32.h" #include "stm32_can.h" diff --git a/configs/olimex-stm32-h407/src/stm32_can.c b/configs/olimex-stm32-h407/src/stm32_can.c index c401e0c4111..ec7f2d39ab3 100644 --- a/configs/olimex-stm32-h407/src/stm32_can.c +++ b/configs/olimex-stm32-h407/src/stm32_can.c @@ -41,7 +41,7 @@ #include #include -#include +#include #include #include "stm32.h" #include "stm32_can.h" diff --git a/configs/olimex-stm32-p107/src/stm32_can.c b/configs/olimex-stm32-p107/src/stm32_can.c index b292036f14f..2687c08f9c3 100644 --- a/configs/olimex-stm32-p107/src/stm32_can.c +++ b/configs/olimex-stm32-p107/src/stm32_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/olimex-stm32-p207/src/stm32_can.c b/configs/olimex-stm32-p207/src/stm32_can.c index 16c71ae43e7..b05dcb24461 100644 --- a/configs/olimex-stm32-p207/src/stm32_can.c +++ b/configs/olimex-stm32-p207/src/stm32_can.c @@ -41,7 +41,7 @@ #include #include -#include +#include #include #include "stm32.h" #include "stm32_can.h" diff --git a/configs/olimexino-stm32/src/stm32_can.c b/configs/olimexino-stm32/src/stm32_can.c index 483d561f9f1..c03a1c8d266 100644 --- a/configs/olimexino-stm32/src/stm32_can.c +++ b/configs/olimexino-stm32/src/stm32_can.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/open1788/README.txt b/configs/open1788/README.txt index 8edd78ab132..b7419b33aad 100644 --- a/configs/open1788/README.txt +++ b/configs/open1788/README.txt @@ -422,7 +422,7 @@ CONFIGURATION CONFIG_SPI_EXCHANGE=n : exchange() method is not supported System Type: - CONFIG_GPIO_IRQ=y : GPIO interrupt support + CONFIG_LPC17_GPIOIRQ=y : GPIO interrupt support CONFIG_LPC17_SSP1=y : Enable support for SSP1 RTOS Features: @@ -472,7 +472,7 @@ CONFIGURATION information about the button test. System Type: - CONFIG_GPIO_IRQ=y + CONFIG_LPC17_GPIOIRQ=y Board Selection: CONFIG_ARCH_BUTTONS=y diff --git a/configs/open1788/include/board.h b/configs/open1788/include/board.h index c811ad4f660..11f47847cb0 100644 --- a/configs/open1788/include/board.h +++ b/configs/open1788/include/board.h @@ -45,7 +45,7 @@ #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) # include #endif diff --git a/configs/open1788/knsh/defconfig b/configs/open1788/knsh/defconfig index 73ef473d546..6adfc646868 100644 --- a/configs/open1788/knsh/defconfig +++ b/configs/open1788/knsh/defconfig @@ -151,7 +151,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/open1788/nsh/defconfig b/configs/open1788/nsh/defconfig index c7da461f8b2..82536e3b2f8 100644 --- a/configs/open1788/nsh/defconfig +++ b/configs/open1788/nsh/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/open1788/nxlines/defconfig b/configs/open1788/nxlines/defconfig index 3ba4b262f95..55a85e14f88 100644 --- a/configs/open1788/nxlines/defconfig +++ b/configs/open1788/nxlines/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/open1788/src/lpc17_appinit.c b/configs/open1788/src/lpc17_appinit.c index d1ccc94df21..d25f9bc2d18 100644 --- a/configs/open1788/src/lpc17_appinit.c +++ b/configs/open1788/src/lpc17_appinit.c @@ -104,7 +104,7 @@ #ifdef NSH_HAVE_MMCSD # ifdef CONFIG_MMCSD_HAVECARDDETECT # define NSH_HAVE_MMCSD_CD 1 -# ifdef CONFIG_GPIO_IRQ +# ifdef CONFIG_LPC17_GPIOIRQ # define NSH_HAVE_MMCSD_CDINT 1 # endif # endif diff --git a/configs/open1788/src/lpc17_buttons.c b/configs/open1788/src/lpc17_buttons.c index 4509e2fe598..5ad2814f1ac 100644 --- a/configs/open1788/src/lpc17_buttons.c +++ b/configs/open1788/src/lpc17_buttons.c @@ -93,7 +93,7 @@ static const lpc17_pinset_t g_buttoncfg[BOARD_NUM_BUTTONS] = * button events. */ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) static xcpt_t g_buttonisr[BOARD_NUM_BUTTONS]; /* This array provides the mapping from button ID numbers to button IRQ @@ -199,7 +199,7 @@ uint8_t board_buttons(void) * ****************************************************************************/ -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) xcpt_t board_button_irq(int id, xcpt_t irqhandler) { xcpt_t oldhandler = NULL; diff --git a/configs/open1788/src/lpc17_touchscreen.c b/configs/open1788/src/lpc17_touchscreen.c index 1d1af3ff8bc..008abc0660d 100644 --- a/configs/open1788/src/lpc17_touchscreen.c +++ b/configs/open1788/src/lpc17_touchscreen.c @@ -71,8 +71,8 @@ # error "Touchscreen support requires CONFIG_LPC17_SSP1" #endif -#ifndef CONFIG_GPIO_IRQ -# error "Touchscreen support requires CONFIG_GPIO_IRQ" +#ifndef CONFIG_LPC17_GPIOIRQ +# error "Touchscreen support requires CONFIG_LPC17_GPIOIRQ" #endif #ifndef CONFIG_ADS7843E_FREQUENCY diff --git a/configs/qemu-i486/nsh/Make.defs b/configs/qemu-i486/nsh/Make.defs index 0d16a608b0d..4f857d81dec 100644 --- a/configs/qemu-i486/nsh/Make.defs +++ b/configs/qemu-i486/nsh/Make.defs @@ -63,8 +63,7 @@ else ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/ld.script endif -ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -#ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector +ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHDEFINES = @@ -73,6 +72,7 @@ ARCHDEFINES = ifeq ($(CONFIG_ARCH_X86_M32),y) ARCHCPUFLAGS += -m32 +LDFLAGS += -m elf_i386 endif # We have to use a cross-development toolchain under Cygwin because the native @@ -109,5 +109,5 @@ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) HOSTCC = gcc HOSTINCLUDESv = -I. -HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe HOSTLDFLAGS = diff --git a/configs/qemu-i486/ostest/Make.defs b/configs/qemu-i486/ostest/Make.defs index e2ac40b09f2..5075731826a 100644 --- a/configs/qemu-i486/ostest/Make.defs +++ b/configs/qemu-i486/ostest/Make.defs @@ -63,8 +63,7 @@ else ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script endif -ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -#ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector +ARCHCPUFLAGS = -march=i486 -mtune=i486 -fno-builtin -fno-stack-protector ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHDEFINES = @@ -73,6 +72,7 @@ ARCHDEFINES = ifeq ($(CONFIG_ARCH_X86_M32),y) ARCHCPUFLAGS += -m32 +LDFLAGS += -m elf_i386 endif # We have to use a cross-development toolchain under Cygwin because the native @@ -109,5 +109,5 @@ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) HOSTCC = gcc HOSTINCLUDESv = -I. -HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe HOSTLDFLAGS = diff --git a/configs/sam3u-ek/README.txt b/configs/sam3u-ek/README.txt index c4dadfe8097..4c7f5137575 100644 --- a/configs/sam3u-ek/README.txt +++ b/configs/sam3u-ek/README.txt @@ -24,24 +24,16 @@ Development Environment ^^^^^^^^^^^^^^^^^^^^^^^ Either Linux or Cygwin on Windows can be used for the development environment. - The source has been built only using the GNU toolchain (see below). Other - toolchains will likely cause problems. Testing was performed using the Cygwin - environment. + The source has been built only using the GNU toolchain. Testing was performed + using the Cygwin environment. GNU Toolchain Options ^^^^^^^^^^^^^^^^^^^^^ - The NuttX make system has been modified to support the following different - toolchain options. - - 1. The CodeSourcery GNU toolchain, - 2. The devkitARM GNU toolchain, ok - 4. The NuttX buildroot Toolchain (see below). - All testing has been conducted using the NuttX buildroot toolchain. To use - the CodeSourcery, devkitARM, Atollic, or AtmelStudio GNU toolchain, you simply - need to add one of the following configuration options to your .config (or - defconfig) file: + other toolchains, such as the CodeSourcery, devkitARM, Atollic, or AtmelStudio + GNU toolchain, you simply need to add one of the following configuration options + to your .config (or defconfig) file: CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux @@ -51,8 +43,8 @@ GNU Toolchain Options CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows - If you are not using CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT, then you may also have to modify - the PATH in the setenv.h file if your make cannot find the tools. + You may also have to modify the PATH in the setenv.h file if your make cannot + find the tools. NOTE about Windows native toolchains ------------------------------------ @@ -157,11 +149,11 @@ NuttX EABI "buildroot" Toolchain details PLUS some special instructions that you will need to follow if you are building a Cortex-M3 toolchain for Cygwin under Windows. - NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the - the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for - more information about this problem. If you plan to use NXFLAT, please do not - use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain. - See instructions below. + NOTE: Unfortunately, the 4.6.3 (and later) GCC toolchain is not compatible + with the the NXFLAT tools. See the top-level TODO file (under "Binary loaders") + for more information about this problem. If you plan to use NXFLAT, please do + not use the GCC 4.6.3 toochain; instead use an older toolchain (such as the GCC + 4.3.3 OABI toolchain discussed below). NuttX OABI "buildroot" Toolchain ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/configs/sam4s-xplained-pro/include/board.h b/configs/sam4s-xplained-pro/include/board.h index 58380480a9d..0ef923c7e3b 100644 --- a/configs/sam4s-xplained-pro/include/board.h +++ b/configs/sam4s-xplained-pro/include/board.h @@ -46,7 +46,7 @@ #ifndef __ASSEMBLY__ # include -# ifdef CONFIG_GPIO_IRQ +# ifdef CONFIG_SAM34_GPIO_IRQ # include # endif #endif diff --git a/configs/sam4s-xplained-pro/nsh/defconfig b/configs/sam4s-xplained-pro/nsh/defconfig index 9e87745c51b..f46df931273 100644 --- a/configs/sam4s-xplained-pro/nsh/defconfig +++ b/configs/sam4s-xplained-pro/nsh/defconfig @@ -364,8 +364,6 @@ CONFIG_ARCH_LEDS=y CONFIG_ARCH_HAVE_BUTTONS=y # CONFIG_ARCH_BUTTONS is not set CONFIG_ARCH_HAVE_IRQBUTTONS=y -CONFIG_NSH_MMCSDMINOR=0 -CONFIG_NSH_MMCSDSLOTNO=0 # # Board-Specific Options @@ -373,6 +371,7 @@ CONFIG_NSH_MMCSDSLOTNO=0 CONFIG_SAM4S_XPLAINED_PRO_CDCACM_DEVMINOR=0 CONFIG_SAM4S_XPLAINED_PRO_SCHED_TIMER_DEVPATH="/dev/rtt0" CONFIG_SAM4S_XPLAINED_PRO_CPULOAD_TIMER_DEVPATH="/dev/tc0" +# CONFIG_BOARD_CRASHDUMP is not set CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set @@ -498,6 +497,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=4096 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y CONFIG_DEV_ZERO=y +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -534,7 +534,12 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -565,6 +570,9 @@ CONFIG_SDIO_BLOCKSETUP=y # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -646,6 +654,7 @@ CONFIG_USART1_2STOP=0 # CONFIG_USART1_IFLOWCONTROL is not set # CONFIG_USART1_OFLOWCONTROL is not set # CONFIG_USART1_DMA is not set +# CONFIG_PSEUDOTERM is not set CONFIG_USBDEV=y # @@ -688,6 +697,7 @@ CONFIG_CDCACM_VENDORSTR="NuttX" CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" # CONFIG_USBMSC is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -702,6 +712,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -830,6 +841,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -885,10 +897,10 @@ CONFIG_EXAMPLES_CPUHOG_PRIORITY=50 CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set @@ -1038,6 +1050,8 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 # # Configure Command Options @@ -1082,7 +1096,7 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/sam4s-xplained/include/board.h b/configs/sam4s-xplained/include/board.h index 7fc97d5ccc6..3457a08bd78 100644 --- a/configs/sam4s-xplained/include/board.h +++ b/configs/sam4s-xplained/include/board.h @@ -49,23 +49,6 @@ # endif #endif -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#ifndef __ASSEMBLY__ -# include -# ifdef CONFIG_SAM34_GPIO_IRQ -# include -# endif -#endif - /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ diff --git a/configs/sama5d3-xplained/src/sam_can.c b/configs/sama5d3-xplained/src/sam_can.c index 7befbcee65f..76b12f3b145 100644 --- a/configs/sama5d3-xplained/src/sam_can.c +++ b/configs/sama5d3-xplained/src/sam_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/sama5d3-xplained/src/sam_pwm.c b/configs/sama5d3-xplained/src/sam_pwm.c index 91664c1d210..a6acea54d85 100644 --- a/configs/sama5d3-xplained/src/sam_pwm.c +++ b/configs/sama5d3-xplained/src/sam_pwm.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include diff --git a/configs/sama5d3x-ek/src/sam_can.c b/configs/sama5d3x-ek/src/sam_can.c index dae9f4e61e7..f483e30dd0c 100644 --- a/configs/sama5d3x-ek/src/sam_can.c +++ b/configs/sama5d3x-ek/src/sam_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/sama5d3x-ek/src/sam_pwm.c b/configs/sama5d3x-ek/src/sam_pwm.c index ef908554516..8cc1642e71a 100644 --- a/configs/sama5d3x-ek/src/sam_pwm.c +++ b/configs/sama5d3x-ek/src/sam_pwm.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include diff --git a/configs/sama5d4-ek/src/sam_at25.c b/configs/sama5d4-ek/src/sam_at25.c index 4df4e631e57..d2d8824b9a9 100644 --- a/configs/sama5d4-ek/src/sam_at25.c +++ b/configs/sama5d4-ek/src/sam_at25.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sama5d4-ek/src/sam_at25.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -46,10 +46,10 @@ #include #include -#include #include #include #include +#include #include "sam_spi.h" #include "sama5d4-ek.h" diff --git a/configs/sama5d4-ek/src/sam_bringup.c b/configs/sama5d4-ek/src/sam_bringup.c index 831dc06da75..3aaccd3244a 100644 --- a/configs/sama5d4-ek/src/sam_bringup.c +++ b/configs/sama5d4-ek/src/sam_bringup.c @@ -50,7 +50,7 @@ # include #endif -#include +#include #include #include diff --git a/configs/sama5d4-ek/src/sam_pwm.c b/configs/sama5d4-ek/src/sam_pwm.c index b69d8f5e5a8..ebae4ce11b8 100644 --- a/configs/sama5d4-ek/src/sam_pwm.c +++ b/configs/sama5d4-ek/src/sam_pwm.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include diff --git a/configs/samd20-xplained/include/board.h b/configs/samd20-xplained/include/board.h index 0ca6fab1e83..580b5366a24 100644 --- a/configs/samd20-xplained/include/board.h +++ b/configs/samd20-xplained/include/board.h @@ -44,7 +44,7 @@ #ifndef __ASSEMBLY__ # include -# ifdef CONFIG_GPIO_IRQ +# ifdef CONFIG_SAMDL_GPIOIRQ # include # endif #endif diff --git a/configs/samd21-xplained/include/board.h b/configs/samd21-xplained/include/board.h index 7f68514e3d7..40b19e775fc 100644 --- a/configs/samd21-xplained/include/board.h +++ b/configs/samd21-xplained/include/board.h @@ -44,7 +44,7 @@ #ifndef __ASSEMBLY__ # include -# ifdef CONFIG_GPIO_IRQ +# ifdef CONFIG_SAMDL_GPIOIRQ # include # endif #endif diff --git a/configs/same70-xplained/src/sam_at24config.c b/configs/same70-xplained/src/sam_at24config.c index 69d27a02ced..74eea58ee4c 100644 --- a/configs/same70-xplained/src/sam_at24config.c +++ b/configs/same70-xplained/src/sam_at24config.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include diff --git a/configs/same70-xplained/src/sam_bringup.c b/configs/same70-xplained/src/sam_bringup.c index 3ac5d205858..7cc5fed0c00 100644 --- a/configs/same70-xplained/src/sam_bringup.c +++ b/configs/same70-xplained/src/sam_bringup.c @@ -50,8 +50,8 @@ # include #endif -#include -#include +#include +#include #include #include #include diff --git a/configs/same70-xplained/src/sam_mcan.c b/configs/same70-xplained/src/sam_mcan.c index 722e83c3613..2c5301c3a1c 100644 --- a/configs/same70-xplained/src/sam_mcan.c +++ b/configs/same70-xplained/src/sam_mcan.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include #include "sam_mcan.h" diff --git a/configs/same70-xplained/src/same70-xplained.h b/configs/same70-xplained/src/same70-xplained.h index 838e0668c11..0859c0f450b 100644 --- a/configs/same70-xplained/src/same70-xplained.h +++ b/configs/same70-xplained/src/same70-xplained.h @@ -91,12 +91,12 @@ # define CONFIG_NSH_MMCSDMINOR 0 #endif -#ifndef CONFIG_NSH_MMCSDMINOR +#ifndef CONFIG_NSH_MMCSDSLOTNO # define CONFIG_NSH_MMCSDSLOTNO 0 #endif -#if CONFIG_NSH_MMCSDMINOR != 0 -# error SAME70 has only one MMC/SD slot (CONFIG_NSH_MMCSDMINOR) +#if CONFIG_NSH_MMCSDSLOTNO != 0 +# error SAME70 has only one MMC/SD slot (CONFIG_NSH_MMCSDSLOTNO) # undef CONFIG_NSH_MMCSDSLOTNO # define CONFIG_NSH_MMCSDSLOTNO 0 #endif diff --git a/configs/saml21-xplained/include/board.h b/configs/saml21-xplained/include/board.h index 7decc79f168..ec93296ec80 100644 --- a/configs/saml21-xplained/include/board.h +++ b/configs/saml21-xplained/include/board.h @@ -44,7 +44,7 @@ #ifndef __ASSEMBLY__ # include -# ifdef CONFIG_GPIO_IRQ +# ifdef CONFIG_SAMDL_GPIOIRQ # include # endif #endif diff --git a/configs/samv71-xult/src/sam_at24config.c b/configs/samv71-xult/src/sam_at24config.c index 4a324ac07be..af13bf34fa5 100644 --- a/configs/samv71-xult/src/sam_at24config.c +++ b/configs/samv71-xult/src/sam_at24config.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include diff --git a/configs/samv71-xult/src/sam_bringup.c b/configs/samv71-xult/src/sam_bringup.c index 845e00df9a2..3999c0ab24a 100644 --- a/configs/samv71-xult/src/sam_bringup.c +++ b/configs/samv71-xult/src/sam_bringup.c @@ -50,8 +50,8 @@ # include #endif -#include -#include +#include +#include #include #include #include diff --git a/configs/samv71-xult/src/sam_mcan.c b/configs/samv71-xult/src/sam_mcan.c index e692eb40133..bb28cbb9b01 100644 --- a/configs/samv71-xult/src/sam_mcan.c +++ b/configs/samv71-xult/src/sam_mcan.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include #include "sam_mcan.h" diff --git a/configs/samv71-xult/src/samv71-xult.h b/configs/samv71-xult/src/samv71-xult.h index 3ce8ed26731..21884b7191f 100644 --- a/configs/samv71-xult/src/samv71-xult.h +++ b/configs/samv71-xult/src/samv71-xult.h @@ -100,12 +100,12 @@ # define CONFIG_NSH_MMCSDMINOR 0 #endif -#ifndef CONFIG_NSH_MMCSDMINOR +#ifndef CONFIG_NSH_MMCSDSLOTNO # define CONFIG_NSH_MMCSDSLOTNO 0 #endif -#if CONFIG_NSH_MMCSDMINOR != 0 -# error SAMV71 has only one MMC/SD slot (CONFIG_NSH_MMCSDMINOR) +#if CONFIG_NSH_MMCSDSLOTNO != 0 +# error SAMV71 has only one MMC/SD slot (CONFIG_NSH_MMCSDSLOTNO) # undef CONFIG_NSH_MMCSDSLOTNO # define CONFIG_NSH_MMCSDSLOTNO 0 #endif diff --git a/configs/shenzhou/src/stm32_can.c b/configs/shenzhou/src/stm32_can.c index 8bfe95ac098..bc6472bef78 100644 --- a/configs/shenzhou/src/stm32_can.c +++ b/configs/shenzhou/src/stm32_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/shenzhou/thttpd/defconfig b/configs/shenzhou/thttpd/defconfig index 4c36758aa3d..7bfc514586d 100644 --- a/configs/shenzhou/thttpd/defconfig +++ b/configs/shenzhou/thttpd/defconfig @@ -333,7 +333,7 @@ CONFIG_STM32_HAVE_TIM4=y CONFIG_STM32_HAVE_TIM5=y CONFIG_STM32_HAVE_TIM6=y CONFIG_STM32_HAVE_TIM7=y -CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM8 is not set # CONFIG_STM32_HAVE_TIM9 is not set # CONFIG_STM32_HAVE_TIM10 is not set # CONFIG_STM32_HAVE_TIM11 is not set @@ -389,7 +389,6 @@ CONFIG_STM32_SPI1=y # CONFIG_STM32_TIM5 is not set # CONFIG_STM32_TIM6 is not set # CONFIG_STM32_TIM7 is not set -# CONFIG_STM32_TIM8 is not set # CONFIG_STM32_USART1 is not set CONFIG_STM32_USART2=y # CONFIG_STM32_USART3 is not set @@ -423,7 +422,6 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set -# CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y CONFIG_STM32_SERIALDRIVER=y @@ -689,6 +687,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -832,7 +831,10 @@ CONFIG_TELNET_TXBUFFER_SIZE=256 # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set CONFIG_ETH0_PHY_DM9161=y -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -887,6 +889,7 @@ CONFIG_USART2_2STOP=0 # CONFIG_USART2_IFLOWCONTROL is not set # CONFIG_USART2_OFLOWCONTROL is not set # CONFIG_USART2_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_HAVE_USBTRACE is not set diff --git a/configs/sim/src/Makefile b/configs/sim/src/Makefile index 1ab3f04975f..e56c82ae364 100644 --- a/configs/sim/src/Makefile +++ b/configs/sim/src/Makefile @@ -64,4 +64,13 @@ ifeq ($(CONFIG_SIM_TOUCHSCREEN),y) endif endif +ifeq ($(CONFIG_EXAMPLES_GPIO),y) +ifeq ($(CONFIG_GPIO_LOWER_HALF),y) + CSRCS += sim_ioexpander.c +else + CSRCS += sim_gpio.c +endif +endif + + include $(TOPDIR)/configs/Board.mk diff --git a/configs/sim/src/sim.h b/configs/sim/src/sim.h index 0e1f27937d3..f851b339cca 100644 --- a/configs/sim/src/sim.h +++ b/configs/sim/src/sim.h @@ -1,7 +1,7 @@ /**************************************************************************** * config/sim/src/sim.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -90,7 +90,7 @@ int sim_bringup(void); * * - First, a ROM disk device must be created. This is done by calling * the function romdisk_register() as described in - * nuttx/include/nuttx/fs/ramdisk.h. This is an OS level operation + * nuttx/include/nuttx/drivers/ramdisk.h. This is an OS level operation * and must be done in the board-level logic before your appliction * starts. * @@ -111,4 +111,16 @@ int sim_bringup(void); int sim_zoneinfo(int minor); #endif +/**************************************************************************** + * Name: sim_gpio_initialize + * + * Description: + * Initialize GPIO drivers for use with /apps/examples/gpio + * + ****************************************************************************/ + +#ifdef CONFIG_EXAMPLES_GPIO +int sim_gpio_initialize(void); +#endif + #endif /* __CONFIGS_SIM_SRC_SIM_H */ \ No newline at end of file diff --git a/configs/sim/src/sim_bringup.c b/configs/sim/src/sim_bringup.c index 86790206dd3..fa8ac5aec23 100644 --- a/configs/sim/src/sim_bringup.c +++ b/configs/sim/src/sim_bringup.c @@ -77,6 +77,12 @@ int sim_bringup(void) (void)sim_zoneinfo(3); #endif +#ifdef CONFIG_EXAMPLES_GPIO + /* Initialize simulated GPIO drivers */ + + (void)sim_gpio_initialize(); +#endif + #ifdef CONFIG_AJOYSTICK /* Initialize the simulated analog joystick input device */ diff --git a/configs/sim/src/sim_gpio.c b/configs/sim/src/sim_gpio.c new file mode 100644 index 00000000000..bd9c4994575 --- /dev/null +++ b/configs/sim/src/sim_gpio.c @@ -0,0 +1,234 @@ +/**************************************************************************** + * configs/sim/src/sim_gpio.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "sim.h" + +#if defined(CONFIG_EXAMPLES_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct simgpio_dev_s +{ + struct gpio_dev_s gpio; + bool value; +}; + +struct simgpint_dev_s +{ + struct simgpio_dev_s simgpio; + WDOG_ID wdog; + pin_interrupt_t callback; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpout_write(FAR struct gpio_dev_s *dev, bool value); +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback); +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct gpio_operations_s gpin_ops = +{ + .go_read = gpin_read, + .go_write = NULL, + .go_attach = NULL, + .go_enable = NULL, +}; + +static const struct gpio_operations_s gpout_ops = +{ + .go_read = gpin_read, + .go_write = gpout_write, + .go_attach = NULL, + .go_enable = NULL, +}; + +static const struct gpio_operations_s gpint_ops = +{ + .go_read = gpin_read, + .go_write = NULL, + .go_attach = gpint_attach, + .go_enable = gpint_enable, +}; + +static struct simgpio_dev_s g_gpin = +{ + .gpio = + { + .gp_pintype = GPIO_INPUT_PIN, + .gp_ops = &gpin_ops, + }, +}; + +static struct simgpio_dev_s g_gpout = +{ + .gpio = + { + .gp_pintype = GPIO_OUTPUT_PIN, + .gp_ops = &gpout_ops, + }, +}; + +static struct simgpint_dev_s g_gpint = +{ + .simgpio = + { + .gpio = + { + .gp_pintype = GPIO_INTERRUPT_PIN, + .gp_ops = &gpint_ops, + }, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int sim_interrupt(int argc, wdparm_t arg1, ...) +{ + FAR struct simgpint_dev_s *simgpint = (FAR struct simgpint_dev_s *)arg1; + + DEBUGASSERT(simgpint != NULL && simgpint->callback != NULL); + gpioinfo("Interrupt! callback=%p\n", simgpint->callback); + + simgpint->callback(&simgpint->simgpio.gpio); + return OK; +} + +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct simgpio_dev_s *simgpio = (FAR struct simgpio_dev_s *)dev; + + DEBUGASSERT(simgpio != NULL && value != NULL); + gpioinfo("Reading %d (next=%d)\n", (int)simgpio->value, (int)!simgpio->value); + + *value = simgpio->value; + simgpio->value = !simgpio->value; + return OK; +} + +static int gpout_write(FAR struct gpio_dev_s *dev, bool value) +{ + FAR struct simgpio_dev_s *simgpio = (FAR struct simgpio_dev_s *)dev; + + DEBUGASSERT(simgpio != NULL); + gpioinfo("Writing %d\n", (int)value); + + simgpio->value = value; + return OK; +} + +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback) +{ + FAR struct simgpint_dev_s *simgpint = (FAR struct simgpint_dev_s *)dev; + + gpioinfo("Cancel 1 second timer\n"); + wd_cancel(simgpint->wdog); + + gpioinfo("Attach %p\n", callback); + simgpint->callback = callback; + return OK; +} + +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) +{ + FAR struct simgpint_dev_s *simgpint = (FAR struct simgpint_dev_s *)dev; + + if (enable) + { + if (simgpint->callback != NULL) + { + gpioinfo("Start 1 second timer\n"); + (void)wd_start(simgpint->wdog, SEC2TICK(1), + (wdentry_t)sim_interrupt, 1, (wdparm_t)dev); + } + } + else + { + gpioinfo("Cancel 1 second timer\n"); + (void)wd_cancel(simgpint->wdog); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sim_gpio_initialize + * + * Description: + * Initialize GPIO drivers for use with /apps/examples/gpio + * + ****************************************************************************/ + +int sim_gpio_initialize(void) +{ + g_gpint.wdog = wd_create(); + DEBUGASSERT(g_gpint.wdog != NULL); + + (void)gpio_pin_register(&g_gpin.gpio, 0); + (void)gpio_pin_register(&g_gpout.gpio, 1); + (void)gpio_pin_register(&g_gpint.simgpio.gpio, 2); + return 0; +} +#endif /* CONFIG_EXAMPLES_GPIO && !CONFIG_GPIO_LOWER_HALF */ diff --git a/configs/sim/src/sim_ioexpander.c b/configs/sim/src/sim_ioexpander.c new file mode 100644 index 00000000000..c369c69af3c --- /dev/null +++ b/configs/sim/src/sim_ioexpander.c @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/sim/src/sim_ioexpander.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "up_internal.h" +#include "sim.h" + +#if defined(CONFIG_EXAMPLES_GPIO) && defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sim_gpio_initialize + * + * Description: + * Initialize simulated GPIO expander for use with /apps/examples/gpio + * + ****************************************************************************/ + +int sim_gpio_initialize(void) +{ + /* Get an instance of the simulated I/O expander */ + + FAR struct ioexpander_dev_s *ioe = sim_ioexpander_initialize(); + if (ioe == NULL) + { + gpioerr("ERROR: sim_ioexpander_initialize failed\n"); + return -ENOMEM; + } + + /* Register four pin drivers */ + + /* Pin 0: an non-inverted, input pin */ + + (void)IOEXP_SETDIRECTION(ioe, 0, IOEXPANDER_DIRECTION_IN); + (void)IOEXP_SETOPTION(ioe, 0, IOEXPANDER_OPTION_INVERT, + (FAR void *)IOEXPANDER_VAL_NORMAL); + (void)IOEXP_SETOPTION(ioe, 0, IOEXPANDER_OPTION_INTCFG, + (FAR void *)IOEXPANDER_VAL_DISABLE); + (void)gpio_lower_half(ioe, 0, GPIO_INPUT_PIN, 0); + + /* Pin 1: an non-inverted, output pin */ + + (void)IOEXP_SETDIRECTION(ioe, 1, IOEXPANDER_DIRECTION_OUT); + (void)IOEXP_SETOPTION(ioe, 1, IOEXPANDER_OPTION_INVERT, + (FAR void *)IOEXPANDER_VAL_NORMAL); + (void)IOEXP_SETOPTION(ioe, 2, IOEXPANDER_OPTION_INTCFG, + (FAR void *)IOEXPANDER_VAL_DISABLE); + (void)gpio_lower_half(ioe, 1, GPIO_OUTPUT_PIN, 1); + + /* Pin 2: an non-inverted, edge interrupting pin */ + + (void)IOEXP_SETDIRECTION(ioe, 2, IOEXPANDER_DIRECTION_IN); + (void)IOEXP_SETOPTION(ioe, 2, IOEXPANDER_OPTION_INVERT, + (FAR void *)IOEXPANDER_VAL_NORMAL); + (void)IOEXP_SETOPTION(ioe, 2, IOEXPANDER_OPTION_INTCFG, + (FAR void *)IOEXPANDER_VAL_BOTH); + (void)gpio_lower_half(ioe, 2, GPIO_INTERRUPT_PIN, 2); + + /* Pin 3: a non-inverted, level interrupting pin */ + + (void)IOEXP_SETDIRECTION(ioe, 3, IOEXPANDER_DIRECTION_IN); + (void)IOEXP_SETOPTION(ioe, 3, IOEXPANDER_OPTION_INVERT, + (FAR void *)IOEXPANDER_VAL_NORMAL); + (void)IOEXP_SETOPTION(ioe, 3, IOEXPANDER_OPTION_INTCFG, + (FAR void *)IOEXPANDER_VAL_HIGH); + (void)gpio_lower_half(ioe, 3, GPIO_INTERRUPT_PIN, 3); + + return 0; +} +#endif /* CONFIG_EXAMPLES_GPIO && CONFIG_GPIO_LOWER_HALF */ diff --git a/configs/sim/src/sim_zoneinfo.c b/configs/sim/src/sim_zoneinfo.c index dbb85025e79..6dd056152c2 100644 --- a/configs/sim/src/sim_zoneinfo.c +++ b/configs/sim/src/sim_zoneinfo.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include #ifdef CONFIG_LIB_ZONEINFO_ROMFS @@ -97,7 +97,7 @@ * * - First, a ROM disk device must be created. This is done by calling * the function romdisk_register() as described in - * nuttx/include/nuttx/fs/ramdisk.h. This is an OS level operation + * nuttx/include/nuttx/drivers/ramdisk.h. This is an OS level operation * and must be done in the board-level logic before your appliction * starts. * diff --git a/configs/sim/udgram/defconfig b/configs/sim/udgram/defconfig index 7ed422934d7..51558d5c523 100644 --- a/configs/sim/udgram/defconfig +++ b/configs/sim/udgram/defconfig @@ -42,9 +42,10 @@ CONFIG_BUILD_FLAT=y # # Debug Options # +# CONFIG_DEBUG_ALERT is not set # CONFIG_DEBUG_FEATURES is not set -# CONFIG_ARCH_HAVE_HEAPCHECK is not set # CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set CONFIG_DEBUG_SYMBOLS=y # CONFIG_ARCH_HAVE_CUSTOMOPT is not set CONFIG_DEBUG_NOOPT=y @@ -78,6 +79,7 @@ CONFIG_SIM_NET_HOST_ROUTE=y # CONFIG_SIM_NET_BRIDGE is not set # CONFIG_SIM_FRAMEBUFFER is not set # CONFIG_SIM_SPIFLASH is not set +# CONFIG_SIM_QSPIFLASH is not set # # Architecture Options @@ -142,11 +144,11 @@ CONFIG_ARCH_BOARD="sim" # # Common Board Options # -CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_POWEROFF is not set # CONFIG_BOARDCTL_UNIQUEID is not set @@ -270,6 +272,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -298,7 +301,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -311,19 +319,25 @@ CONFIG_DEV_NULL=y # # CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set # CONFIG_MMCSD is not set # CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set # CONFIG_NETDEVICES is not set # CONFIG_NET_SLIP is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set # CONFIG_UART0_SERIALDRIVER is not set @@ -353,19 +367,25 @@ CONFIG_SERIAL=y # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_DMA is not set # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set -# -# System Logging Device Options -# - # # System Logging # +# CONFIG_ARCH_SYSLOG is not set # CONFIG_RAMLOG is not set -# CONFIG_CONSOLE_SYSLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -499,11 +519,6 @@ CONFIG_FS_PROCFS=y # CONFIG_FS_UNIONFS is not set # CONFIG_FS_HOSTFS is not set -# -# System Logging -# -# CONFIG_SYSLOG_TIMESTAMP is not set - # # Graphics Support # @@ -583,8 +598,10 @@ CONFIG_LIBC_NETDB=y # # Non-standard Library Support # +# CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -786,6 +803,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 # # Configure Command Options @@ -852,7 +870,7 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set diff --git a/configs/sim/ustream/defconfig b/configs/sim/ustream/defconfig index 38338722ee7..1e339f236e2 100644 --- a/configs/sim/ustream/defconfig +++ b/configs/sim/ustream/defconfig @@ -42,9 +42,10 @@ CONFIG_BUILD_FLAT=y # # Debug Options # +# CONFIG_DEBUG_ALERT is not set # CONFIG_DEBUG_FEATURES is not set -# CONFIG_ARCH_HAVE_HEAPCHECK is not set # CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set CONFIG_DEBUG_SYMBOLS=y # CONFIG_ARCH_HAVE_CUSTOMOPT is not set CONFIG_DEBUG_NOOPT=y @@ -78,6 +79,7 @@ CONFIG_SIM_NET_HOST_ROUTE=y # CONFIG_SIM_NET_BRIDGE is not set # CONFIG_SIM_FRAMEBUFFER is not set # CONFIG_SIM_SPIFLASH is not set +# CONFIG_SIM_QSPIFLASH is not set # # Architecture Options @@ -142,11 +144,11 @@ CONFIG_ARCH_BOARD="sim" # # Common Board Options # -CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_POWEROFF is not set # CONFIG_BOARDCTL_UNIQUEID is not set @@ -270,6 +272,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=8192 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -298,7 +301,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -311,19 +319,25 @@ CONFIG_DEV_NULL=y # # CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set # CONFIG_MMCSD is not set # CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set # CONFIG_NETDEVICES is not set # CONFIG_NET_SLIP is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set # CONFIG_UART0_SERIALDRIVER is not set @@ -353,19 +367,25 @@ CONFIG_SERIAL=y # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_DMA is not set # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set -# -# System Logging Device Options -# - # # System Logging # +# CONFIG_ARCH_SYSLOG is not set # CONFIG_RAMLOG is not set -# CONFIG_CONSOLE_SYSLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -499,11 +519,6 @@ CONFIG_FS_PROCFS=y # CONFIG_FS_UNIONFS is not set # CONFIG_FS_HOSTFS is not set -# -# System Logging -# -# CONFIG_SYSLOG_TIMESTAMP is not set - # # Graphics Support # @@ -583,8 +598,10 @@ CONFIG_LIBC_NETDB=y # # Non-standard Library Support # +# CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -781,6 +798,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 # # Configure Command Options @@ -847,7 +865,7 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set diff --git a/configs/stm3210e-eval/src/stm32_can.c b/configs/stm3210e-eval/src/stm32_can.c index 1d296be81c6..284e6098c0c 100644 --- a/configs/stm3210e-eval/src/stm32_can.c +++ b/configs/stm3210e-eval/src/stm32_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/stm3220g-eval/src/stm32_can.c b/configs/stm3220g-eval/src/stm32_can.c index a7a7bf2e177..5115a7b7d9a 100644 --- a/configs/stm3220g-eval/src/stm32_can.c +++ b/configs/stm3220g-eval/src/stm32_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/stm3220g-eval/src/stm32_pwm.c b/configs/stm3220g-eval/src/stm32_pwm.c index b934120856c..e689794d576 100644 --- a/configs/stm3220g-eval/src/stm32_pwm.c +++ b/configs/stm3220g-eval/src/stm32_pwm.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include diff --git a/configs/stm3240g-eval/src/stm32_appinit.c b/configs/stm3240g-eval/src/stm32_appinit.c index 58938c9c2e0..7523030be25 100644 --- a/configs/stm3240g-eval/src/stm32_appinit.c +++ b/configs/stm3240g-eval/src/stm32_appinit.c @@ -254,7 +254,8 @@ int board_app_initialize(uintptr_t arg) lower = stm32_rtc_lowerhalf(); if (!lower) { - serr("ERROR: Failed to instantiate the RTC lower-half driver\n"); + syslog(LOG_ERR, + "ERROR: Failed to instantiate the RTC lower-half driver\n"); return -ENOMEM; } else @@ -266,7 +267,9 @@ int board_app_initialize(uintptr_t arg) ret = rtc_initialize(0, lower); if (ret < 0) { - serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + syslog(LOG_ERR, + "ERROR: Failed to bind/register the RTC driver: %d\n", + ret); return ret; } } @@ -289,7 +292,8 @@ int board_app_initialize(uintptr_t arg) mtd = m25p_initialize(spi); if (!mtd) { - syslog(LOG_ERR, "ERROR: Failed to bind SPI port 0 to the SPI FLASH driver\n"); + syslog(LOG_ERR, + "ERROR: Failed to bind SPI port 0 to the SPI FLASH driver\n"); return -ENODEV; } #warning "Now what are we going to do with this SPI FLASH driver?" @@ -303,7 +307,8 @@ int board_app_initialize(uintptr_t arg) sdio = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); if (!sdio) { - syslog(LOG_ERR, "ERROR: Failed to initialize SDIO slot %d\n", + syslog(LOG_ERR, + "ERROR: Failed to initialize SDIO slot %d\n", CONFIG_NSH_MMCSDSLOTNO); return -ENODEV; } @@ -313,7 +318,9 @@ int board_app_initialize(uintptr_t arg) ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdio); if (ret != OK) { - syslog(LOG_ERR, "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + syslog(LOG_ERR, + "ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", + ret); return ret; } diff --git a/configs/stm3240g-eval/src/stm32_can.c b/configs/stm3240g-eval/src/stm32_can.c index e5350615d23..75e138fd206 100644 --- a/configs/stm3240g-eval/src/stm32_can.c +++ b/configs/stm3240g-eval/src/stm32_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/stm3240g-eval/src/stm32_pwm.c b/configs/stm3240g-eval/src/stm32_pwm.c index 4ccf6dad9c4..a565995d429 100644 --- a/configs/stm3240g-eval/src/stm32_pwm.c +++ b/configs/stm3240g-eval/src/stm32_pwm.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include diff --git a/configs/stm32_tiny/src/stm32_pwm.c b/configs/stm32_tiny/src/stm32_pwm.c index 8efec614b60..675e9d0c150 100644 --- a/configs/stm32_tiny/src/stm32_pwm.c +++ b/configs/stm32_tiny/src/stm32_pwm.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include diff --git a/configs/stm32f3discovery/src/stm32_pwm.c b/configs/stm32f3discovery/src/stm32_pwm.c index 1cdfb8c9c40..a11d2a464aa 100644 --- a/configs/stm32f3discovery/src/stm32_pwm.c +++ b/configs/stm32f3discovery/src/stm32_pwm.c @@ -43,7 +43,7 @@ #include #include -#include +#include #include diff --git a/configs/stm32f429i-disco/src/stm32_appinit.c b/configs/stm32f429i-disco/src/stm32_appinit.c index 415884fa5bf..26b92f3e4cc 100644 --- a/configs/stm32f429i-disco/src/stm32_appinit.c +++ b/configs/stm32f429i-disco/src/stm32_appinit.c @@ -65,7 +65,7 @@ #ifdef CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART #ifdef CONFIG_PLATFORM_CONFIGDATA -# include +# include #endif #endif diff --git a/configs/stm32f4discovery/README.txt b/configs/stm32f4discovery/README.txt index 430f78c9134..2b1bb2501fa 100644 --- a/configs/stm32f4discovery/README.txt +++ b/configs/stm32f4discovery/README.txt @@ -1934,6 +1934,18 @@ Where is one of the following: 3. By default, this project assumes that you are *NOT* using the DFU bootloader. + pseudoterm: + ----------- + + This is a configuration to test the Pseudo Terminal support for NuttX. + + To test it you will need two USB/Serial dongles. The first dongle as + usual will be used to main NSH console port in UART2 (PA2 and PA3) and + the second dongle you will connect to UART3 (PB10 and PB11). + + In the main NSH console (in UART2) type: "pts_test &". It will create a + new console in UART3. Just press ENTER and start typing commands on it. + rgbled: ------- diff --git a/configs/stm32f4discovery/canard/defconfig b/configs/stm32f4discovery/canard/defconfig index 0c49de3a101..631e039585e 100644 --- a/configs/stm32f4discovery/canard/defconfig +++ b/configs/stm32f4discovery/canard/defconfig @@ -997,7 +997,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_CANUTILS_CANLIB is not set CONFIG_CANUTILS_LIBCANARD=y CONFIG_LIBCANARD_URL="https://github.com/UAVCAN/libcanard/archive" -CONFIG_LIBCANARD_VERSION="b28bf6ac337e55d49037fd9904d4b951760c4690" +CONFIG_LIBCANARD_VERSION="e4a1d52be862b03e5872add75890e67bf1d9187c" # # Examples diff --git a/configs/stm32f4discovery/include/board.h b/configs/stm32f4discovery/include/board.h index 10cc583ab01..805d5f6ce12 100644 --- a/configs/stm32f4discovery/include/board.h +++ b/configs/stm32f4discovery/include/board.h @@ -267,6 +267,11 @@ # define GPIO_USART2_TX GPIO_USART2_TX_1 #endif +/* UART3: (Used in pseudoterm configuration) */ + +#define GPIO_USART3_TX GPIO_USART3_TX_1 +#define GPIO_USART3_RX GPIO_USART3_RX_1 + /* UART6: * * The STM32F4DIS-BB base board provides RS-232 drivers and a DB9 connector diff --git a/configs/stm32f4discovery/pseudoterm/Make.defs b/configs/stm32f4discovery/pseudoterm/Make.defs new file mode 100644 index 00000000000..d1dd82ebf0b --- /dev/null +++ b/configs/stm32f4discovery/pseudoterm/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f4discovery/pseudoterm/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f4discovery/pseudoterm/defconfig b/configs/stm32f4discovery/pseudoterm/defconfig new file mode 100644 index 00000000000..f599aadadec --- /dev/null +++ b/configs/stm32f4discovery/pseudoterm/defconfig @@ -0,0 +1,1223 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +CONFIG_ARCH_CHIP_STM32F407VG=y +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +CONFIG_STM32_STM32F40XX=y +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +CONFIG_STM32_STM32F407=y +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32_HAVE_CCM=y +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +CONFIG_STM32_HAVE_FSMC=y +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +CONFIG_STM32_HAVE_TIM2=y +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +CONFIG_STM32_HAVE_ETHMAC=y +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKPSRAM is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CCMDATARAM is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_CRYP is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_DCMI is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_FSMC is not set +# CONFIG_STM32_HASH is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +CONFIG_STM32_OTGFS=y +# CONFIG_STM32_OTGHS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_FLASH_PREFETCH is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCMEXCLUDE is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM2_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set +# CONFIG_USART2_RS485 is not set +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set +# CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y +# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f4discovery" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_STM32F4DISBB is not set +# CONFIG_BOARD_CRASHDUMP is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_SPI_CS_CONTROL is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_USART3_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=128 +CONFIG_USART2_TXBUFSIZE=128 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +CONFIG_PSEUDOTERM=y +# CONFIG_PSEUDOTERM_BSD is not set +CONFIG_PSEUDOTERM_SUSV1=y +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +CONFIG_EXAMPLES_PTYTEST=y +CONFIG_EXAMPLES_PTYTEST_POLL=y +CONFIG_EXAMPLES_PTYTEST_SERIALDEV="/dev/ttyS1" +CONFIG_EXAMPLES_PTYTEST_PRIORITY=100 +CONFIG_EXAMPLES_PTYTEST_STACKSIZE=2048 +CONFIG_EXAMPLES_PTYTEST_DAEMONPRIO=100 +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/pseudoterm/setenv.sh b/configs/stm32f4discovery/pseudoterm/setenv.sh new file mode 100644 index 00000000000..d67e6fdc7df --- /dev/null +++ b/configs/stm32f4discovery/pseudoterm/setenv.sh @@ -0,0 +1,80 @@ +#!/bin/bash +# configs/stm32f4discovery/nsh/setenv.sh +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f4discovery/src/stm32_can.c b/configs/stm32f4discovery/src/stm32_can.c index bbc0f3e093e..beafd449d9c 100644 --- a/configs/stm32f4discovery/src/stm32_can.c +++ b/configs/stm32f4discovery/src/stm32_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/stm32f4discovery/src/stm32_pwm.c b/configs/stm32f4discovery/src/stm32_pwm.c index 9e80b06c7ea..5d7d8ee7fd1 100644 --- a/configs/stm32f4discovery/src/stm32_pwm.c +++ b/configs/stm32f4discovery/src/stm32_pwm.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/stm32f4discovery/src/stm32_rgbled.c b/configs/stm32f4discovery/src/stm32_rgbled.c index 66dc4fd0f15..c1d320a05a7 100644 --- a/configs/stm32f4discovery/src/stm32_rgbled.c +++ b/configs/stm32f4discovery/src/stm32_rgbled.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include diff --git a/configs/stm32l476vg-disco/src/stm32_appinit.c b/configs/stm32l476vg-disco/src/stm32_appinit.c index e242acc67e8..4cccfd50392 100644 --- a/configs/stm32l476vg-disco/src/stm32_appinit.c +++ b/configs/stm32l476vg-disco/src/stm32_appinit.c @@ -58,8 +58,8 @@ #include #include -#include -#include +#include +#include #include #include #include diff --git a/configs/stm32ldiscovery/src/stm32_pwm.c b/configs/stm32ldiscovery/src/stm32_pwm.c index 8da1601b715..1aeca320fcb 100644 --- a/configs/stm32ldiscovery/src/stm32_pwm.c +++ b/configs/stm32ldiscovery/src/stm32_pwm.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include diff --git a/configs/teensy-3.x/nsh/defconfig b/configs/teensy-3.x/nsh/defconfig index 7698ce06960..5fa77642ca7 100644 --- a/configs/teensy-3.x/nsh/defconfig +++ b/configs/teensy-3.x/nsh/defconfig @@ -226,7 +226,7 @@ CONFIG_KINETIS_UART0=y # # Kinetis GPIO Interrupt Configuration # -# CONFIG_GPIO_IRQ is not set +# CONFIG_KINETIS_GPIOIRQ is not set # # Kinetis UART Configuration diff --git a/configs/teensy-3.x/src/k20_pwm.c b/configs/teensy-3.x/src/k20_pwm.c index 97658c9e2b1..5fc7652f161 100644 --- a/configs/teensy-3.x/src/k20_pwm.c +++ b/configs/teensy-3.x/src/k20_pwm.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include diff --git a/configs/teensy-3.x/usbnsh/defconfig b/configs/teensy-3.x/usbnsh/defconfig index d214df33c5b..8918783e5d9 100644 --- a/configs/teensy-3.x/usbnsh/defconfig +++ b/configs/teensy-3.x/usbnsh/defconfig @@ -218,7 +218,7 @@ CONFIG_KINETIS_USBOTG=y # # Kinetis GPIO Interrupt Configuration # -# CONFIG_GPIO_IRQ is not set +# CONFIG_KINETIS_GPIOIRQ is not set # # Kinetis UART Configuration diff --git a/configs/teensy-lc/nsh/defconfig b/configs/teensy-lc/nsh/defconfig index cab0683d92a..a9e30375cf5 100644 --- a/configs/teensy-lc/nsh/defconfig +++ b/configs/teensy-lc/nsh/defconfig @@ -136,7 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV6M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_GPIO_IRQ is not set +# CONFIG_KL_GPIOIRQ is not set # # Kinetis Configuration Options diff --git a/configs/teensy-lc/src/kl_pwm.c b/configs/teensy-lc/src/kl_pwm.c index 91623d9e98b..13d58804db5 100644 --- a/configs/teensy-lc/src/kl_pwm.c +++ b/configs/teensy-lc/src/kl_pwm.c @@ -45,7 +45,7 @@ #include #include -#include +#include #include diff --git a/configs/twr-k60n512/README.txt b/configs/twr-k60n512/README.txt index e3c827f9875..9c64cae46db 100644 --- a/configs/twr-k60n512/README.txt +++ b/configs/twr-k60n512/README.txt @@ -605,7 +605,7 @@ TWR-K60N512-specific Configuration Options PIN Interrupt Support - CONFIG_GPIO_IRQ -- Enable pin interrupt support. Also needs + CONFIG_KINETIS_GPIOIRQ -- Enable pin interrupt support. Also needs one or more of the following: CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts @@ -687,7 +687,7 @@ Where is one of the following: CONFIG_FAT_LFN=y : FAT long file name support CONFIG_FAT_MAXFNAME=32 : Maximum lenght of a long file name - CONFIG_GPIO_IRQ=y : Enable GPIO interrupts + CONFIG_KINETIS_GPIOIRQ=y : Enable GPIO interrupts CONFIG_KINETIS_PORTEINTS=y : Enable PortE GPIO interrupts CONFIG_SCHED_WORKQUEUE=y : Enable the NuttX workqueue diff --git a/configs/twr-k60n512/nsh/defconfig b/configs/twr-k60n512/nsh/defconfig index 7a495c00e60..05df6f831e8 100644 --- a/configs/twr-k60n512/nsh/defconfig +++ b/configs/twr-k60n512/nsh/defconfig @@ -221,7 +221,7 @@ CONFIG_KINETIS_UART3=y # # Kinetis GPIO Interrupt Configuration # -# CONFIG_GPIO_IRQ is not set +# CONFIG_KINETIS_GPIOIRQ is not set # # Kinetis UART Configuration diff --git a/configs/twr-k60n512/src/k60_appinit.c b/configs/twr-k60n512/src/k60_appinit.c index ffcb0b7f9f3..fde0ef30139 100644 --- a/configs/twr-k60n512/src/k60_appinit.c +++ b/configs/twr-k60n512/src/k60_appinit.c @@ -98,8 +98,8 @@ /* We expect to receive GPIO interrupts for card insertion events */ -#ifndef CONFIG_GPIO_IRQ -# error "CONFIG_GPIO_IRQ required for card detect interrupt" +#ifndef CONFIG_KINETIS_GPIOIRQ +# error "CONFIG_KINETIS_GPIOIRQ required for card detect interrupt" #endif #ifndef CONFIG_KINETIS_PORTEINTS diff --git a/configs/u-blox-c027/nsh/defconfig b/configs/u-blox-c027/nsh/defconfig index 644c1fc7b13..79f246bc6f8 100644 --- a/configs/u-blox-c027/nsh/defconfig +++ b/configs/u-blox-c027/nsh/defconfig @@ -144,7 +144,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/u-blox-c027/src/lpc17_pwm.c b/configs/u-blox-c027/src/lpc17_pwm.c index 435acf34737..03569cc11dd 100644 --- a/configs/u-blox-c027/src/lpc17_pwm.c +++ b/configs/u-blox-c027/src/lpc17_pwm.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include diff --git a/configs/u-blox-c027/src/u-blox-c027.h b/configs/u-blox-c027/src/u-blox-c027.h index 577bf417905..6f2b8da990c 100644 --- a/configs/u-blox-c027/src/u-blox-c027.h +++ b/configs/u-blox-c027/src/u-blox-c027.h @@ -50,7 +50,7 @@ #define C027_LED (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORT3 | GPIO_PIN25) #define C027_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2) -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ # define C027_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) #else # define C027_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11) diff --git a/configs/viewtool-stm32f107/src/stm32_can.c b/configs/viewtool-stm32f107/src/stm32_can.c index 2aad6dfdf21..ce2b5912f5d 100644 --- a/configs/viewtool-stm32f107/src/stm32_can.c +++ b/configs/viewtool-stm32f107/src/stm32_can.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/zkit-arm-1769/hello/defconfig b/configs/zkit-arm-1769/hello/defconfig index 60e67adb456..a1607725f37 100644 --- a/configs/zkit-arm-1769/hello/defconfig +++ b/configs/zkit-arm-1769/hello/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/zkit-arm-1769/include/board.h b/configs/zkit-arm-1769/include/board.h index 544ce3d133e..5003145d522 100644 --- a/configs/zkit-arm-1769/include/board.h +++ b/configs/zkit-arm-1769/include/board.h @@ -50,7 +50,7 @@ #include -#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_GPIO_IRQ) +#if defined(CONFIG_ARCH_IRQBUTTONS) && defined(CONFIG_LPC17_GPIOIRQ) # include #endif diff --git a/configs/zkit-arm-1769/nsh/defconfig b/configs/zkit-arm-1769/nsh/defconfig index dd6372c82cb..49c46598bbf 100644 --- a/configs/zkit-arm-1769/nsh/defconfig +++ b/configs/zkit-arm-1769/nsh/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/zkit-arm-1769/nxhello/defconfig b/configs/zkit-arm-1769/nxhello/defconfig index 4e3a8d38a1d..9e98eedc88d 100644 --- a/configs/zkit-arm-1769/nxhello/defconfig +++ b/configs/zkit-arm-1769/nxhello/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # diff --git a/configs/zkit-arm-1769/src/lpc17_buttons.c b/configs/zkit-arm-1769/src/lpc17_buttons.c index d33219c98d2..205473b2132 100644 --- a/configs/zkit-arm-1769/src/lpc17_buttons.c +++ b/configs/zkit-arm-1769/src/lpc17_buttons.c @@ -159,7 +159,7 @@ uint8_t board_buttons(void) * ************************************************************************************/ -#if defined CONFIG_ARCH_IRQBUTTONS && CONFIG_GPIO_IRQ +#if defined CONFIG_ARCH_IRQBUTTONS && CONFIG_LPC17_GPIOIRQ xcpt_t board_button_irq(int id, xcpt_t irqhandler) { xcpt_t rethandler = NULL; diff --git a/configs/zkit-arm-1769/src/lpc17_can.c b/configs/zkit-arm-1769/src/lpc17_can.c index 0bdba844465..03176894a9a 100644 --- a/configs/zkit-arm-1769/src/lpc17_can.c +++ b/configs/zkit-arm-1769/src/lpc17_can.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "chip.h" diff --git a/configs/zkit-arm-1769/src/zkit-arm-1769.h b/configs/zkit-arm-1769/src/zkit-arm-1769.h index 0b51e1f685c..84de2d3cb24 100644 --- a/configs/zkit-arm-1769/src/zkit-arm-1769.h +++ b/configs/zkit-arm-1769/src/zkit-arm-1769.h @@ -160,7 +160,7 @@ */ #define ZKITARM_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT0 | GPIO_PIN16) -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ # define ZKITARM_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN12) #else # define ZKITARM_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN12) @@ -182,7 +182,7 @@ */ #define ZKITARM_USB_CONNECT (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN9) -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC17_GPIOIRQ # define ZKITARM_USB_VBUSSENSE (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30) #else # define ZKITARM_USB_VBUSSENSE (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30) diff --git a/configs/zkit-arm-1769/thttpd/defconfig b/configs/zkit-arm-1769/thttpd/defconfig index 21283879063..b9829c43fee 100644 --- a/configs/zkit-arm-1769/thttpd/defconfig +++ b/configs/zkit-arm-1769/thttpd/defconfig @@ -145,7 +145,7 @@ CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y CONFIG_ARMV7M_OABI_TOOLCHAIN=y # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_GPIO_IRQ is not set +# CONFIG_LPC17_GPIOIRQ is not set # CONFIG_SERIAL_TERMIOS is not set # @@ -309,6 +309,7 @@ CONFIG_ARCH_LEDS=y # # Board-Specific Options # +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -411,6 +412,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -439,7 +441,12 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -498,7 +505,10 @@ CONFIG_ETH0_PHY_DP83848C=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set -# CONFIG_PIPES is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -551,8 +561,10 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -567,6 +579,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -781,6 +794,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -956,7 +970,7 @@ CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/crypto/cryptodev.c b/crypto/cryptodev.c index 9710acf0281..97099227421 100644 --- a/crypto/cryptodev.c +++ b/crypto/cryptodev.c @@ -46,6 +46,7 @@ #include #include +#include #include #include diff --git a/drivers/Kconfig b/drivers/Kconfig index bc506ee1e00..c3ef7aa49af 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -29,6 +29,61 @@ config DEV_RANDOM bool "Enable /dev/random" default y depends on ARCH_HAVE_RNG + ---help--- + Enable support for /dev/urandom provided by a hardware TRNG. + +config DEV_URANDOM + bool "Enable /dev/urandom" + default n + ---help--- + Enable support for /dev/urandom provided by either a hardware TRNG or + by a software PRNG implementation. + + NOTE: This option may not be cryptographially secure and should not + be enabled if you are concerned about cyptographically secure + pseudo-random numbers (CPRNG) and do not know the characteristics + of the software PRNG impelementation! + +if DEV_URANDOM + +choice + prompt "/dev/urandom algorithm" + default DEV_URANDOM_ARCH if ARCH_HAVE_RNG + default DEV_URANDOM_XORSHIFT128 if !ARCH_HAVE_RNG + +config DEV_URANDOM_XORSHIFT128 + bool "xorshift128" + ---help--- + xorshift128 is a pseudorandom number generator that is simple, + portable, and can also be used on 8-bit and 16-bit MCUs. + + NOTE: Not cyptographically secure + +config DEV_URANDOM_CONGRUENTIAL + bool "Conguential" + ---help--- + Use the same congruential general used with srand(). This algorithm + is computationally more intense and uses double precision floating + point. NOTE: Good randomness from the congruential generator also + requires that you also select CONFIG_LIB_RAND_ORDER > 2 + + NOTE: Not cyptographically secure + +config DEV_URANDOM_ARCH + bool "Architecture-specific" + depends on ARCH_HAVE_RNG + ---help--- + The implementation of /dev/urandom is provided in archtecture- + specific logic using hardware TRNG logic. architecture-specific + logic must provide the whole implementation in this case, including + the function devurandom_register(). In this case, /dev/urandom may + refer to the same driver as /dev/random. + + NOTE: May or may not be cyptographically secure, depending upon the + implementation. + +endchoice # /dev/urandom algorithm +endif # DEV_URANDOM source drivers/loop/Kconfig @@ -86,14 +141,14 @@ config RAMDISK ---help--- Can be used to set up a block of memory or (read-only) FLASH as a block driver that can be mounted as a files system. See - include/nuttx/fs/ramdisk.h. + include/nuttx/drivers/ramdisk.h. menuconfig CAN bool "CAN Driver Support" default n ---help--- This selection enables building of the "upper-half" CAN driver. - See include/nuttx/can.h for further CAN driver information. + See include/nuttx/drivers/can.h for further CAN driver information. if CAN @@ -231,7 +286,7 @@ menuconfig PWM default n ---help--- This selection enables building of the "upper-half" PWM driver. - See include/nuttx/pwm.h for further PWM driver information. + See include/nuttx/drivers/pwm.h for further PWM driver information. if PWM @@ -351,8 +406,8 @@ menuconfig BCH ---help--- Contains logic that may be used to convert a block driver into a character driver. This is the complementary conversion as that - performed by loop.c. See include/nuttx/fs/fs.h for registration - information. + performed by loop.c. See include/nuttx/drivers/drivers.h for + registration information. if BCH source drivers/bch/Kconfig diff --git a/drivers/Makefile b/drivers/Makefile index ff0a00b5b5a..fefb6a718b5 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -98,7 +98,13 @@ endif ifeq ($(CONFIG_PWM),y) CSRCS += pwm.c endif + +ifeq ($(CONFIG_DEV_URANDOM),y) +ifneq ($(CONFIG_DEV_URANDOM_ARCH),y) + CSRCS += dev_urandom.c endif +endif +endif # CONFIG_NFILE_DESCRIPTORS != 0 AOBJS = $(ASRCS:.S=$(OBJEXT)) COBJS = $(CSRCS:.c=$(OBJEXT)) diff --git a/drivers/README.txt b/drivers/README.txt index 420988ccd48..a76c0e3434f 100644 --- a/drivers/README.txt +++ b/drivers/README.txt @@ -13,7 +13,8 @@ Files in this directory ^^^^^^^^^^^^^^^^^^^^^^^ can.c - This is a CAN driver. See include/nuttx/can.h for usage information. + This is a CAN driver. See include/nuttx/drivers/can.h for usage + information. dev_null.c and dev_zero.c These files provide the standard /dev/null and /dev/zero devices. @@ -24,12 +25,12 @@ dev_null.c and dev_zero.c pwm.c Provides the "upper half" of a pulse width modulation (PWM) driver. The "lower half" of the PWM driver is provided by device-specific - logic. See include/nuttx/pwm.h for usage information. + logic. See include/nuttx/drivers/pwm.h for usage information. ramdisk.c Can be used to set up a block of memory or (read-only) FLASH as a block driver that can be mounted as a files system. See - include/nuttx/fs/ramdisk.h. + include/nuttx/drivers/ramdisk.h. rwbuffer.c A facility that can be use by any block driver in-order to add diff --git a/drivers/audio/vs1053.c b/drivers/audio/vs1053.c index fd00b37444c..aa4eb861a79 100644 --- a/drivers/audio/vs1053.c +++ b/drivers/audio/vs1053.c @@ -58,7 +58,7 @@ #include #include #include -#include +#include #include "vs1053.h" diff --git a/drivers/audio/wm8904.c b/drivers/audio/wm8904.c index 2bd2502b8df..4489ae0f221 100644 --- a/drivers/audio/wm8904.c +++ b/drivers/audio/wm8904.c @@ -69,7 +69,7 @@ #include #include #include -#include +#include #include "wm8904.h" diff --git a/drivers/bch/bchdev_driver.c b/drivers/bch/bchdev_driver.c index 198cd334b38..556709e8b83 100644 --- a/drivers/bch/bchdev_driver.c +++ b/drivers/bch/bchdev_driver.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchdev_driver.c * - * Copyright (C) 2008-2009, 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -57,6 +57,7 @@ #include #include +#include #include "bch.h" diff --git a/drivers/bch/bchdev_register.c b/drivers/bch/bchdev_register.c index 2efb0e53381..b199dd4a4c2 100644 --- a/drivers/bch/bchdev_register.c +++ b/drivers/bch/bchdev_register.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchdev_register.c * - * Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,24 +44,11 @@ #include #include +#include +#include + #include "bch.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/drivers/bch/bchdev_unregister.c b/drivers/bch/bchdev_unregister.c index cf7d681de82..1b4e1e138e4 100644 --- a/drivers/bch/bchdev_unregister.c +++ b/drivers/bch/bchdev_unregister.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchdev_unregister.c * - * Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -51,25 +51,10 @@ #include #include +#include #include "bch.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/drivers/bch/bchlib_cache.c b/drivers/bch/bchlib_cache.c index aa54fb3213e..82090981cd1 100644 --- a/drivers/bch/bchlib_cache.c +++ b/drivers/bch/bchlib_cache.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchlib_cache.c * - * Copyright (C) 2008-2009, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,26 +45,12 @@ #include #include -#include - #include "bch.h" #if defined(CONFIG_BCH_ENCRYPTION) # include #endif -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ diff --git a/drivers/bch/bchlib_read.c b/drivers/bch/bchlib_read.c index 45804d3560b..5fe680acb49 100644 --- a/drivers/bch/bchlib_read.c +++ b/drivers/bch/bchlib_read.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchlib_read.c * - * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -46,8 +46,6 @@ #include #include -#include - #include "bch.h" /**************************************************************************** diff --git a/drivers/bch/bchlib_setup.c b/drivers/bch/bchlib_setup.c index 803c5058ce8..be20613fdcf 100644 --- a/drivers/bch/bchlib_setup.c +++ b/drivers/bch/bchlib_setup.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchlib_setup.c * - * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -54,22 +54,6 @@ #include "bch.h" -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/drivers/bch/bchlib_teardown.c b/drivers/bch/bchlib_teardown.c index d97d3b8ffcd..aa20b4b4ad3 100644 --- a/drivers/bch/bchlib_teardown.c +++ b/drivers/bch/bchlib_teardown.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchlib_teardown.c * - * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -49,22 +49,6 @@ #include "bch.h" -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/drivers/bch/bchlib_write.c b/drivers/bch/bchlib_write.c index 712839ef06e..f5fa2996572 100644 --- a/drivers/bch/bchlib_write.c +++ b/drivers/bch/bchlib_write.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/bch/bchlib_write.c * - * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -51,22 +51,6 @@ #include "bch.h" -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -80,7 +64,8 @@ * ****************************************************************************/ -ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, size_t len) +ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, + size_t len) { FAR struct bchlib_s *bch = (FAR struct bchlib_s *)handle; size_t nsectors; diff --git a/drivers/can.c b/drivers/can.c index 8dc67601a7e..483769d7db5 100644 --- a/drivers/can.c +++ b/drivers/can.c @@ -56,7 +56,7 @@ #include #include -#include +#include #ifdef CONFIG_CAN_TXREADY # include diff --git a/drivers/dev_null.c b/drivers/dev_null.c index ff535df3444..2f2b6f2a755 100644 --- a/drivers/dev_null.c +++ b/drivers/dev_null.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/dev_null.c * - * Copyright (C) 2007, 2008, 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2008, 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,7 +44,9 @@ #include #include #include + #include +#include /**************************************************************************** * Private Function Prototypes diff --git a/drivers/dev_urandom.c b/drivers/dev_urandom.c new file mode 100644 index 00000000000..4923544eae2 --- /dev/null +++ b/drivers/dev_urandom.c @@ -0,0 +1,304 @@ +/**************************************************************************** + * drivers/dev_urandom.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: David S. Alessio + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This random number generator is simple, fast and portable. + * Ref: https://en.wikipedia.org/wiki/Xorshift + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#if defined(CONFIG_DEV_URANDOM) && !defined(CONFIG_DEV_URANDOM_ARCH) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if !defined(CONFIG_DEV_URANDOM_CONGRUENTIAL) && \ + !defined(CONFIG_DEV_URANDOM_XORSHIFT128) +# define CONFIG_DEV_URANDOM_XORSHIFT128 1 +#endif + +#ifdef CONFIG_DEV_URANDOM_XORSHIFT128 +# define PRNG() xorshift128() +#else /* CONFIG_DEV_URANDOM_CONGRUENTIAL */ +# define PRNG() congruential() +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +typedef union +{ + struct + { + uint32_t x; + uint32_t y; + uint32_t z; + uint32_t w; + }; + uint8_t u[16]; +} xorshift128_state_t; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#define min(a, b) (((a) < (b)) ? (a) : (b)) + +static ssize_t devurand_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static ssize_t devurand_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +#ifndef CONFIG_DISABLE_POLL +static int devurand_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations devurand_fops = +{ + NULL, /* open */ + NULL, /* close */ + devurand_read, /* read */ + devurand_write, /* write */ + NULL, /* seek */ + NULL /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , devurand_poll /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ +#endif +}; + +#ifdef CONFIG_DEV_URANDOM_XORSHIFT128 +static xorshift128_state_t prng; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: xorshift128 + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_XORSHIFT128 +static uint32_t xorshift128(void) +{ + uint32_t t = prng.x; + + t ^= t << 11; + t ^= t >> 8; + + prng.x = prng.y; + prng.y = prng.z; + prng.z = prng.w; + + prng.w ^= prng.w >> 19; + prng.w ^= t; + + return prng.w; +} +#endif + +/**************************************************************************** + * Name: congruential + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL +static uint32_t congruential(void) +{ + /* REVISIT: We could probably generate a 32-bit value with a single + * call to nrand(). + */ + + return (uint32_t)nrand(65536L) << (uint32_t)nrand(65536L); +} +#endif + +/**************************************************************************** + * Name: devurand_read + ****************************************************************************/ + +static ssize_t devurand_read(FAR struct file *filep, FAR char *buffer, + size_t len) +{ + size_t n; + uint32_t rnd; + + n = len; + + /* Align buffer pointer to 4-byte boundry */ + + if (((uintptr_t)buffer & 0x03) != 0) + { + /* Generate a pseudo random number */ + + rnd = PRNG(); + + while (((uintptr_t)buffer & 0x03) != 0) + { + if (n <= 0) + { + return len; + } + + *buffer++ = rnd & 0xff; + rnd >>= 8; + --n; + } + } + + /* Stuff buffer with PRNGs 4 bytes at a time */ + + while (n >= 4) + { + *(uint32_t *)buffer = PRNG(); + buffer += 4; + n -= 4; + } + + /* Stuff remaining 1, 2, or 3 bytes */ + + if (n > 0) + { + /* Generate a pseudo random number */ + + rnd = PRNG(); + + do + { + *buffer++ = rnd & 0xFF; + rnd >>= 8; + } + while (--n > 0); + } + + return len; +} + +/**************************************************************************** + * Name: devurand_write + ****************************************************************************/ + +static ssize_t devurand_write(FAR struct file *filep, FAR const char *buffer, + size_t len) +{ + /* Write can be used to re-seed the PRNG state. */ + +#ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL + unsigned int seed = 0; + + len = min(len, sizeof(unsigned int)); + memcpy(&seed, buffer, len); + srand(seed); + return len; +#else + len = min(len, sizeof(prng.u)); + memcpy(&prng.u, buffer, len); + return len; +#endif +} + +/**************************************************************************** + * Name: devurand_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int devurand_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + if (setup) + { + fds->revents |= (fds->events & (POLLIN | POLLOUT)); + if (fds->revents != 0) + { + sem_post(fds->sem); + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: devurandom_register + * + * Description: + * Register /dev/urandom + * + ****************************************************************************/ + +void devurandom_register(void) +{ +#ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL + srand(10197); +#else + /* Seed the PRNG */ + + prng.w = 97; + prng.x = 101; + prng.y = prng.w << 17; + prng.z = prng.x << 25; +#endif + + (void)register_driver("/dev/urandom", &devurand_fops, 0666, NULL); +} + +#endif /* CONFIG_DEV_URANDOM && CONFIG_DEV_URANDOM_ARCH */ diff --git a/drivers/dev_zero.c b/drivers/dev_zero.c index 5a0ce669252..93b14c31693 100644 --- a/drivers/dev_zero.c +++ b/drivers/dev_zero.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/dev_zero.c * - * Copyright (C) 2008-2009, 2012-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2012-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,7 +44,9 @@ #include #include #include + #include +#include /**************************************************************************** * Private Function Prototypes diff --git a/drivers/ioexpander/Kconfig b/drivers/ioexpander/Kconfig index de3b5d09a14..2b801e86dce 100644 --- a/drivers/ioexpander/Kconfig +++ b/drivers/ioexpander/Kconfig @@ -17,7 +17,7 @@ if IOEXPANDER config IOEXPANDER_PCA9555 bool "PCA9555 I2C IO expander" default n - select I2C + depends on I2C ---help--- Enable support for the NXP PCA9555 IO Expander @@ -37,22 +37,14 @@ config PCA9555_INT_ENABLE ---help--- Enable driver interrupt functionality -endif # IOEXPANDER_PCA9555 - -config IOEXPANDER_INT_ENABLE - bool - default y if PCA9555_INT_ENABLE +config PCA9555_INT_NCALLBACKS + int "Max number of interrupt callbacks" + default 4 + depends on PCA9555_INT_ENABLE ---help--- - This is the global INT supported flag for io expanders + This is the maximum number of interrupt callbacks supported -config IOEXPANDER_MULTIPIN - bool "Support multi-pin access routines" - default n - ---help--- - This settings enable the definition of routines for - optimized simultaneous access to multiple pins. - -config IOEXPANDER_SHADOW_MODE +config PCA9555_SHADOW_MODE bool "Use Shadow Mode instead of Read-Modify-Write Operations" default n ---help--- @@ -65,13 +57,122 @@ config IOEXPANDER_SHADOW_MODE This reduces bus traffic and eliminates the problem of EMC-caused toggling of output pins. -config IOEXPANDER_RETRY +config PCA9555_RETRY bool "Retry to send commands and data at I2C communication errors" default n ---help--- Retry to send commands and data if a I2C-communication error occurs (eg. caused by EMC). +endif # IOEXPANDER_PCA9555 + +config IOEXPANDER_TCA64XX + bool "TCA64XX I2C IO expander" + default n + depends on I2C && EXPERIMENTAL + ---help--- + Enable support for the TCA64XX IO Expander + +if IOEXPANDER_TCA64XX + +config TCA64XX_MULTIPLE + bool "Multiple TCA64XX Devices" + default n + ---help--- + Can be defined to support multiple TCA64XX devices on board. + +config TCA64XX_INT_ENABLE + bool "Enable TCA64XX Interrupt Support" + default n + select IOEXPANDER_INT_ENABLE + ---help--- + Enable driver interrupt functionality + +config TCA64XX_INT_NCALLBACKS + int "Max number of interrupt callbacks" + default 4 + depends on TCA64XX_INT_ENABLE + ---help--- + This is the maximum number of interrupt callbacks supported + +config TCA64XX_INT_POLL + bool "Enable interrupt poll" + default n + ---help--- + Enable polling for missed interrupts. + +config TCA64XX_INT_POLLDELAY + int "Interrupt poll delay (used)" + default 500000 + depends on TCA64XX_INT_POLL + ---help--- + This microsecond delay defines the polling rate for missed interrupts. + +endif # IOEXPANDER_TCA64XX + +config IOEXPANDER_PCF8574 + bool "PCF8574 I2C IO expander" + default n + depends on I2C && EXPERIMENTAL + ---help--- + Enable support for the PCF8574 IO Expander + +if IOEXPANDER_PCF8574 + +config PCF8574_MULTIPLE + bool "Multiple PCF8574 Devices" + default n + ---help--- + Can be defined to support multiple PCF8574 devices on board. + +config PCF8574_INT_ENABLE + bool "Enable PCF8574 Interrupt Support" + default n + select IOEXPANDER_INT_ENABLE + ---help--- + Enable driver interrupt functionality + +config PCF8574_INT_NCALLBACKS + int "Max number of interrupt callbacks" + default 4 + depends on PCF8574_INT_ENABLE + ---help--- + This is the maximum number of interrupt callbacks supported + +config PCF8574_INT_POLL + bool "Enable interrupt poll" + default n + ---help--- + Enable polling for missed interrupts. + +config PCF8574_INT_POLLDELAY + int "Interrupt poll delay (used)" + default 500000 + depends on PCF8574_INT_POLL + ---help--- + This microsecond delay defines the polling rate for missed interrupts. + +endif # IOEXPANDER_PCF8574 + +config IOEXPANDER_INT_ENABLE + bool + default n + ---help--- + This is the global INT supported flag for io expanders + +config IOEXPANDER_NPINS + int "Number of pins" + default 16 + ---help--- + Maximum number of pins supported per driver. + +config IOEXPANDER_MULTIPIN + bool "Support multi-pin access routines" + default n + ---help--- + This settings enable the definition of routines for + optimized simultaneous access to multiple pins. + endif # IOEXPANDER config DEV_GPIO @@ -81,4 +182,12 @@ config DEV_GPIO Enables a simple GPIO input/output driver to support application- space testing of hardware. +config GPIO_LOWER_HALF + bool "GPIO Lower Half" + default n + depends on DEV_GPIO && IOEXPANDER + ---help--- + Enable support for a lower half driver that provides GPIO driver + support for I/O expander pins. + endmenu # IO Expander/GPIO Support diff --git a/drivers/ioexpander/Make.defs b/drivers/ioexpander/Make.defs index 37e669fe943..8c3107993e6 100644 --- a/drivers/ioexpander/Make.defs +++ b/drivers/ioexpander/Make.defs @@ -1,8 +1,9 @@ ############################################################################ # drivers/ioexpander/Make.defs # -# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. # Author: Sebastien Lorquet +# Gregory Nutt # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -43,12 +44,23 @@ ifeq ($(CONFIG_IOEXPANDER_PCA9555),y) CSRCS += pca9555.c endif +ifeq ($(CONFIG_IOEXPANDER_TCA64XX),y) + CSRCS += tca64xx.c +endif + +ifeq ($(CONFIG_IOEXPANDER_PCF8574),y) + CSRCS += pcf8574.c +endif + endif # CONFIG_IOEXPANDER # GPIO test device driver (independent of IOEXPANDERS) ifeq ($(CONFIG_DEV_GPIO),y) CSRCS += gpio.c +ifeq ($(CONFIG_GPIO_LOWER_HALF),y) + CSRCS += gpio_lower_half.c +endif endif # The folling implements an awkward OR diff --git a/drivers/ioexpander/gpio.c b/drivers/ioexpander/gpio.c index 291652eb4df..bf256e8a0ad 100644 --- a/drivers/ioexpander/gpio.c +++ b/drivers/ioexpander/gpio.c @@ -41,6 +41,7 @@ #include #include +#include #include #include @@ -53,6 +54,7 @@ * Private Function Prototypes ****************************************************************************/ +static int gpio_handler(FAR struct gpio_dev_s *dev); static int gpio_open(FAR struct file *filep); static int gpio_close(FAR struct file *filep); static ssize_t gpio_read(FAR struct file *filep, FAR char *buffer, @@ -66,23 +68,7 @@ static int gpio_ioctl(FAR struct file *filep, int cmd, * Private Data ****************************************************************************/ -static const struct file_operations g_gpio_input_ops = -{ - gpio_open, /* open */ - gpio_close, /* close */ - gpio_read, /* read */ - NULL, /* write */ - NULL, /* seek */ - gpio_ioctl /* ioctl */ -#ifndef CONFIG_DISABLE_POLL - , NULL /* poll */ -#endif -#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS - , NULL /* unlink */ -#endif -}; - -static const struct file_operations g_gpio_output_ops = +static const struct file_operations g_gpio_drvrops = { gpio_open, /* open */ gpio_close, /* close */ @@ -102,6 +88,21 @@ static const struct file_operations g_gpio_output_ops = * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: gpio_handler + * + * Description: + * GPIO interrupt callback function. + * + ****************************************************************************/ + +static int gpio_handler(FAR struct gpio_dev_s *dev) +{ + DEBUGASSERT(dev != NULL); + (void)kill(dev->gp_pid, dev->gp_signo); + return OK; +} + /**************************************************************************** * Name: gpio_open * @@ -167,7 +168,7 @@ static ssize_t gpio_write(FAR struct file *filep, FAR const char *buffer, static int gpio_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode; - FAR struct gpio_common_dev_s *dev; + FAR struct gpio_dev_s *dev; int ret; DEBUGASSERT(filep != NULL && filep->f_inode != NULL); @@ -177,20 +178,16 @@ static int gpio_ioctl(FAR struct file *filep, int cmd, unsigned long arg) switch (cmd) { - /* Command: GPIO_WRITE + /* Command: GPIOC_WRITE * Description: Set the value of an output GPIO * Argument: 0=output a low value; 1=outut a high value */ - case GPIO_WRITE: - if (dev->gp_output) + case GPIOC_WRITE: + if (dev->gp_pintype == GPIO_OUTPUT_PIN) { - FAR struct gpio_output_dev_s *outdev = - (FAR struct gpio_output_dev_s *)dev; - - DEBUGASSERT(outdev->gpout_write != NULL && - ((arg == 0UL) || (arg == 1UL))); - ret = outdev->gpout_write(outdev, (int)arg); + DEBUGASSERT(arg == 0ul || arg == 1ul); + ret = dev->gp_ops->go_write(dev, (bool)arg); } else { @@ -198,38 +195,106 @@ static int gpio_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - /* Command: GPIO_READ + /* Command: GPIOC_READ * Description: Read the value of an input or output GPIO - * Argument: A pointer to an integer value to receive the result: - * 0=low value; 1=high value. + * Argument: A pointer to an bool value to receive the result: + * false=low value; true=high value. */ - case GPIO_READ: + case GPIOC_READ: { - FAR int *ptr = (FAR int *)((uintptr_t)arg); + FAR bool *ptr = (FAR bool *)((uintptr_t)arg); DEBUGASSERT(ptr != NULL); - if (dev->gp_output) - { - FAR struct gpio_output_dev_s *outdev = - (FAR struct gpio_output_dev_s *)dev; - - DEBUGASSERT(outdev->gpout_read != NULL); - ret = outdev->gpout_read(outdev, ptr); - } - else - { - FAR struct gpio_input_dev_s *indev = - (FAR struct gpio_input_dev_s *)dev; - - DEBUGASSERT(indev->gpin_read != NULL); - ret = indev->gpin_read(indev, ptr); - } - + ret = dev->gp_ops->go_read(dev, ptr); DEBUGASSERT(ret < 0 || *ptr == 0 || *ptr == 1); } break; + /* Command: GPIOC_PINTYPE + * Description: Return the GPIO pin type. + * Argument: A pointer to an instance of type enum gpio_pintype_e + */ + + case GPIOC_PINTYPE: + { + FAR enum gpio_pintype_e *ptr = (FAR enum gpio_pintype_e *)((uintptr_t)arg); + DEBUGASSERT(ptr != NULL); + + *ptr = dev->gp_pintype; + ret = OK; + } + break; + + /* Command: GPIOC_REGISTER + * Description: Register to receive a signal whenever there an + * interrupt is received on an input gpio pin. This + * feature, of course, depends upon interrupt GPIO + * support from the platform. + * Argument: The number of signal to be generated when the + * interrupt occurs. + */ + + case GPIOC_REGISTER: + if (dev->gp_pintype == GPIO_INTERRUPT_PIN) + { + /* Make sure that the pin interrupt is disabled */ + + ret = dev->gp_ops->go_enable(dev, false); + if (ret >= 0) + { + /* Save signal information */ + + DEBUGASSERT(GOOD_SIGNO(arg)); + + dev->gp_pid = getpid(); + dev->gp_signo = (uint8_t)arg; + + /* Register our handler */ + + ret = dev->gp_ops->go_attach(dev, + (pin_interrupt_t)gpio_handler); + if (ret >= 0) + { + /* Enable pin interrupts */ + + ret = dev->gp_ops->go_enable(dev, true); + } + } + } + else + { + ret = -EACCES; + } + break; + + /* Command: GPIOC_UNREGISTER + * Description: Stop receiving signals for pin interrupts. + * Argument: None. + */ + + case GPIOC_UNREGISTER: + if (dev->gp_pintype == GPIO_INTERRUPT_PIN) + { + /* Make sure that the pin interrupt is disabled */ + + ret = dev->gp_ops->go_enable(dev, false); + if (ret >= 0) + { + /* Detach the handler */ + + ret = dev->gp_ops->go_attach(dev, NULL); + + dev->gp_pid = 0; + dev->gp_signo = 0; + } + } + else + { + ret = -EACCES; + } + break; + /* Unrecognized command */ default: @@ -245,41 +310,69 @@ static int gpio_ioctl(FAR struct file *filep, int cmd, unsigned long arg) ****************************************************************************/ /**************************************************************************** - * Name: gpio_input_register + * Name: gpio_pin_register * * Description: - * Register GPIO input pin device driver. + * Register GPIO pin device driver. + * + * - Input pin types will be registered at /dev/gpinN + * - Output pin types will be registered at /dev/gpoutN + * - Interrupt pin types will be registered at /dev/gpintN + * + * Where N is the provided minor number in the range of 0-99. * ****************************************************************************/ -int gpio_input_register(FAR struct gpio_input_dev_s *dev, int minor) +int gpio_pin_register(FAR struct gpio_dev_s *dev, int minor) { + FAR const char *fmt; char devname[16]; + int ret; - DEBUGASSERT(dev != NULL && !dev->gpin_output && dev->gpin_read != NULL && - (unsigned int)minor < 100); + DEBUGASSERT(dev != NULL && dev->gp_ops != NULL && (unsigned int)minor < 100); - snprintf(devname, 16, "/dev/gpin%u", (unsigned int)minor); - return register_driver(devname, &g_gpio_input_ops, 0444, dev); -} + switch (dev->gp_pintype) + { + case GPIO_INPUT_PIN: + { + DEBUGASSERT(dev->gp_ops->go_read != NULL); + fmt = "/dev/gpin%u"; + } + break; -/**************************************************************************** - * Name: gpio_output_register - * - * Description: - * Register GPIO output pin device driver. - * - ****************************************************************************/ + case GPIO_OUTPUT_PIN: + { + DEBUGASSERT(dev->gp_ops->go_read != NULL && + dev->gp_ops->go_write != NULL); + fmt = "/dev/gpout%u"; -int gpio_output_register(FAR struct gpio_output_dev_s *dev, int minor) -{ - char devname[16]; + } + break; - DEBUGASSERT(dev != NULL && dev->gpout_output && dev->gpout_read != NULL && - dev->gpout_write != NULL &&(unsigned int)minor < 100); + case GPIO_INTERRUPT_PIN: + { + DEBUGASSERT(dev->gp_ops->go_read != NULL && + dev->gp_ops->go_attach != NULL && + dev->gp_ops->go_enable != NULL); - snprintf(devname, 16, "/dev/gpout%u", (unsigned int)minor); - return register_driver(devname, &g_gpio_output_ops, 0222, dev); + /* Make sure that the pin interrupt is disabled */ + + ret = dev->gp_ops->go_enable(dev, false); + if (ret < 0) + { + return ret; + } + + fmt = "/dev/gpint%u"; + } + break; + + default: + return -EINVAL; + } + + snprintf(devname, 16, fmt, (unsigned int)minor); + return register_driver(devname, &g_gpio_drvrops, 0666, dev); } #endif /* CONFIG_DEV_GPIO */ diff --git a/drivers/ioexpander/gpio_lower_half.c b/drivers/ioexpander/gpio_lower_half.c new file mode 100644 index 00000000000..a18d946e853 --- /dev/null +++ b/drivers/ioexpander/gpio_lower_half.c @@ -0,0 +1,375 @@ +/**************************************************************************** + * drivers/ioexpander/gpio_lower_half.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_GPIO_LOWER_HALF + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* GPIO lower half driver state */ + +struct gplh_dev_s +{ + /* Publically visible lower-half state */ + + struct gpio_dev_s gpio; + + /* Private lower half data follows */ + + uint8_t pin; /* I/O expander pin ID */ + FAR struct ioexpander_dev_s *ioe; /* Contain I/O expander interface */ +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + FAR void *handle; /* Interrupt attach handle */ + pin_interrupt_t callback; /* Interrupt callback */ +#endif +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static int gplh_handler(FAR struct ioexpander_dev_s *ioe, + ioe_pinset_t pinset, FAR void *arg); +#endif + +/* GPIO lower half interface methods */ + +static int gplh_read(FAR struct gpio_dev_s *gpio, FAR bool *value); +static int gplh_write(FAR struct gpio_dev_s *gpio, bool value); +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static int gplh_attach(FAR struct gpio_dev_s *gpio, pin_interrupt_t callback); +static int gplh_enable(FAR struct gpio_dev_s *gpio, bool enable); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* GPIO Lower Half interface operations */ + +static const struct gpio_operations_s g_gplh_ops = +{ + gplh_read, /* read */ + gplh_write, /* write */ +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + gplh_attach, /* attach */ + gplh_enable, /* enable */ +#else + NULL, /* attach */ + NULL, /* enable */ +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gplh_handler + * + * Description: + * I/O expander interrupt callback function. + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static int gplh_handler(FAR struct ioexpander_dev_s *ioe, + ioe_pinset_t pinset, FAR void *arg) +{ + FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)arg; + + DEBUGASSERT(priv != NULL && priv->callback != NULL); + + gpioinfo("pin%u: pinset: %lx callback=%p\n", + priv->pin, (unsigned long)pinset, priv->callback); + + /* We received the callback from the I/O expander, forward this to the + * upper half GPIO driver via its callback. + */ + + return priv->callback(&priv->gpio); +} +#endif + +/**************************************************************************** + * Name: gplh_read + * + * Description: + * Read the value of the I/O expander pin. + * + ****************************************************************************/ + +static int gplh_read(FAR struct gpio_dev_s *gpio, FAR bool *value) +{ + FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio; + + DEBUGASSERT(priv != NULL && priv->ioe != NULL && value != NULL); + + gpioinfo("pin%u: value=%p\n", priv->pin, value); + + /* Return the value from the I/O expander */ + + return IOEXP_READPIN(priv->ioe, priv->pin, value); +} + +/**************************************************************************** + * Name: gplh_write + * + * Description: + * Set the value of an I/O expander output pin + * + ****************************************************************************/ + +static int gplh_write(FAR struct gpio_dev_s *gpio, bool value) +{ + FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio; + + DEBUGASSERT(priv != NULL && priv->ioe != NULL); + + gpioinfo("pin%u: value=%u\n", priv->pin, value); + + /* Write the value using the I/O expander */ + + return IOEXP_WRITEPIN(priv->ioe, priv->pin, value); +} + +/**************************************************************************** + * Name: gplh_attach + * + * Description: + * Detach and disable any current interrupt on the pin. Save the callback + * information for use when the pin interrupt is enabled. + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static int gplh_attach(FAR struct gpio_dev_s *gpio, pin_interrupt_t callback) +{ + FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio; + + DEBUGASSERT(priv != NULL && priv->ioe != NULL); + + gpioinfo("pin%u: callback=%p\n", priv->pin, callback); + + /* Detach and disable any current interrupt on the pin. */ + + if (priv->handle != NULL) + { + gpioinfo("pin%u: Detaching handle %p\n", priv->pin, priv->handle); + (void)IOEP_DETACH(priv->ioe, priv->handle); + priv->handle = NULL; + } + + /* Save the callback function pointer for use when the pin interrupt + * is enabled. + */ + + priv->callback = callback; + return OK; +} +#endif + +/**************************************************************************** + * Name: gplh_enable + * + * Description: + * Enable or disable the I/O expander pin interrupt + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static int gplh_enable(FAR struct gpio_dev_s *gpio, bool enable) +{ + FAR struct gplh_dev_s *priv = (FAR struct gplh_dev_s *)gpio; + int ret = OK; + + DEBUGASSERT(priv != NULL && priv->ioe != NULL); + + gpioinfo("pin%u: %s callback=%p handle=%p\n", + priv->pin, enable ? "Enabling" : "Disabling", + priv->callback, priv->handle); + + /* Are we enabling or disabling the pin interrupt? */ + + if (enable) + { + /* We are enabling the pin interrupt. Make certain that there is + * an interrupt handler already attached. + */ + + if (priv->callback == NULL) + { + /* No callback has been attached */ + + gpiowarn("WARNING: pin%u: Attempt to enable before attaching\n", + priv->pin); + ret = -EPERM; + } + + /* Check if the interrupt is already attached and enabled */ + + else if (priv->handle == NULL) + { + ioe_pinset_t pinset = ((ioe_pinset_t)1 << priv->pin); + + /* We have a callback and the callback is not yet attached. + * do it now. + */ + + gpioinfo("pin%u: Attaching %p\n", priv->pin, priv->callback); + + priv->handle = IOEP_ATTACH(priv->ioe, pinset, gplh_handler, priv); + if (priv->handle == NULL) + { + gpioerr("ERROR: pin%u: IOEP_ATTACH() failed\n", priv->pin); + ret = -EIO; + } + } + } + else + { + /* Check if we are already detached */ + + if (priv->handle == NULL) + { + gpiowarn("WARNING: pin%u: Already detached\n", priv->pin); + } + else + { + gpioinfo("pin%u: Detaching handle=%p\n", priv->pin, priv->handle); + ret = IOEP_DETACH(priv->ioe, priv->handle); + if (ret < 0) + { + gpioerr("ERROR: pin%u: IOEP_DETACH() failed\n", + priv->pin, ret); + } + + /* We are no longer attached */ + + priv->handle = NULL; + } + } + + return ret; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gpio_lower_half + * + * Description: + * Create a GPIO pin device driver instance for an I/O expander pin. + * The I/O expander pin must have already been configured by the caller + * for the particular pintype. + * + * Input Parameters: + * ioe - An instance of the I/O expander interface + * pin - The I/O expander pin number for the driver + * pintype - See enum gpio_pintype_e + * minor - The minor device number to use when registering the device + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int gpio_lower_half(FAR struct ioexpander_dev_s *ioe, unsigned int pin, + enum gpio_pintype_e pintype, int minor) +{ + FAR struct gplh_dev_s *priv; + FAR struct gpio_dev_s *gpio; + int ret; + + DEBUGASSERT(ioe != NULL && pin < CONFIG_IOEXPANDER_NPINS && + (unsigned int)pintype < GPIO_NPINTYPES); + +#ifndef CONFIG_IOEXPANDER_INT_ENABLE + /* If there is no I/O expander interrupt support, then we cannot handle + * interrupting pin types. + */ + + DEBUGASSERT(pintype != GPIO_INTERRUPT_PIN); +#endif + + /* Allocate an new instance of the GPIO lower half driver */ + + priv = (FAR struct gplh_dev_s *)kmm_zalloc(sizeof(struct gplh_dev_s)); + if (priv == NULL) + { + gpioerr("ERROR: Failed to allocate driver state\n"); + return -ENOMEM; + } + + /* Initialize the non-zero elements of the newly allocated instance */ + + priv->pin = (uint8_t)pin; + priv->ioe = ioe; + gpio = &priv->gpio; + gpio->gp_pintype = (uint8_t)pintype; + gpio->gp_ops = &g_gplh_ops; + + /* Register the GPIO driver */ + + ret = gpio_pin_register(gpio, minor); + if (ret < 0) + { + gpioerr("ERROR: gpio_pin_register() failed: %d\n", ret); + kmm_free(priv); + } + + return ret; +} + +#endif /* CONFIG_GPIO_LOWER_HALF */ diff --git a/drivers/ioexpander/pca9555.c b/drivers/ioexpander/pca9555.c index 34000d07eb3..3da9849dc35 100644 --- a/drivers/ioexpander/pca9555.c +++ b/drivers/ioexpander/pca9555.c @@ -92,6 +92,12 @@ static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev, static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev, FAR uint8_t *pins, FAR bool *values, int count); #endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static FAR void *pca9555_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg); +static int pca9555_detach(FAR struct ioexpander_dev_s *dev, + FAR void *handle); +#endif /**************************************************************************** * Private Data @@ -110,17 +116,23 @@ static struct pca9555_dev_s g_pca9555; static struct pca9555_dev_s *g_pca9555list; #endif +/* I/O expander vtable */ + static const struct ioexpander_ops_s g_pca9555_ops = { pca9555_direction, pca9555_option, pca9555_writepin, pca9555_readpin, - pca9555_readbuf, + pca9555_readbuf #ifdef CONFIG_IOEXPANDER_MULTIPIN - pca9555_multiwritepin, - pca9555_multireadpin, - pca9555_multireadbuf, + , pca9555_multiwritepin + , pca9555_multireadpin + , pca9555_multireadbuf +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + , pca9555_attach + , pca9555_detach #endif }; @@ -223,7 +235,7 @@ static int pca9555_setbit(FAR struct pca9555_dev_s *pca, uint8_t addr, buf[0] = addr; -#ifdef CONFIG_IOEXPANDER_SHADOW_MODE +#ifdef CONFIG_PCA9555_SHADOW_MODE /* Get the shadowed register value */ buf[1] = pca->sreg[addr]; @@ -247,14 +259,14 @@ static int pca9555_setbit(FAR struct pca9555_dev_s *pca, uint8_t addr, buf[1] &= ~(1 << pin); } -#ifdef CONFIG_IOEXPANDER_SHADOW_MODE +#ifdef CONFIG_PCA9555_SHADOW_MODE /* Save the new register value in the shadow register */ pca->sreg[addr] = buf[1]; #endif ret = pca9555_write(pca, buf, 2); -#ifdef CONFIG_IOEXPANDER_RETRY +#ifdef CONFIG_PCA9555_RETRY if (ret != OK) { /* Try again (only once) */ @@ -296,7 +308,7 @@ static int pca9555_getbit(FAR struct pca9555_dev_s *pca, uint8_t addr, return ret; } -#ifdef CONFIG_IOEXPANDER_SHADOW_MODE +#ifdef CONFIG_PCA9555_SHADOW_MODE /* Save the new register value in the shadow register */ pca->sreg[addr] = buf; @@ -310,7 +322,15 @@ static int pca9555_getbit(FAR struct pca9555_dev_s *pca, uint8_t addr, * Name: pca9555_direction * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Set the direction of an ioexpander pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * dir - One of the IOEXPANDER_DIRECTION_ macros + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -333,7 +353,18 @@ static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, * Name: pca9555_option * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Set pin options. Required. + * Since all IO expanders have various pin options, this API allows setting + * pin options in a flexible way. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * opt - One of the IOEXPANDER_OPTION_ macros + * val - The option's value + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -341,11 +372,12 @@ static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, int opt, FAR void *val) { FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev; - int ival = (int)val; int ret = -EINVAL; if (opt == IOEXPANDER_OPTION_INVERT) { + int ival = (int)((intptr_t)val); + /* Get exclusive access to the PCA555 */ pca9555_lock(pca); @@ -360,7 +392,16 @@ static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, * Name: pca9555_writepin * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Set the pin level. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * val - The pin level. Usually TRUE will set the pin high, + * except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -382,7 +423,17 @@ static int pca9555_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, * Name: pca9555_readpin * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Read the actual PIN level. This can be different from the last value written + * to this pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the pin level is stored. Usually TRUE + * if the pin is high, except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -404,7 +455,16 @@ static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, * Name: pca9555_readbuf * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Read the buffered pin level. + * This can be different from the actual pin state. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the level is stored. + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -448,7 +508,7 @@ static int pca9555_getmultibits(FAR struct pca9555_dev_s *pca, uint8_t addr, return ret; } -#ifdef CONFIG_IOEXPANDER_SHADOW_MODE +#ifdef CONFIG_PCA9555_SHADOW_MODE /* Save the new register value in the shadow register */ pca->sreg[addr] = buf[0]; @@ -481,7 +541,16 @@ static int pca9555_getmultibits(FAR struct pca9555_dev_s *pca, uint8_t addr, * Name: pca9555_multiwritepin * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Set the pin level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pins - The list of pin indexes to alter in this call + * val - The list of pin levels. + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -506,7 +575,7 @@ static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev, * this would not save much. */ -#ifndef CONFIG_IOEXPANDER_SHADOW_MODE +#ifndef CONFIG_PCA9555_SHADOW_MODE ret = pca9555_writeread(pca, &addr, 1, &buf[1], 2); if (ret < 0) { @@ -550,7 +619,7 @@ static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev, /* Now write back the new pins states */ buf[0] = addr; -#ifdef CONFIG_IOEXPANDER_SHADOW_MODE +#ifdef CONFIG_PCA9555_SHADOW_MODE /* Save the new register values in the shadow register */ pca->sreg[addr] = buf[1]; pca->sreg[addr+1] = buf[2]; @@ -565,7 +634,16 @@ static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev, * Name: pca9555_multireadpin * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Read the actual level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The list of pin indexes to read + * valptr - Pointer to a buffer where the pin levels are stored. + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -589,7 +667,16 @@ static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev, * Name: pca9555_multireadbuf * * Description: - * See include/nuttx/ioexpander/ioexpander.h + * Read the buffered level of multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the buffered levels are stored. + * + * Returned Value: + * 0 on success, else a negative error code * ****************************************************************************/ @@ -613,6 +700,92 @@ static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev, #ifdef CONFIG_PCA9555_INT_ENABLE +/**************************************************************************** + * Name: pca9555_attach + * + * Description: + * Attach and enable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * pinset - The set of pin events that will generate the callback + * callback - The pointer to callback function. NULL will detach the + * callback. + * arg - User-provided callback argument + * + * Returned Value: + * A non-NULL handle value is returned on success. This handle may be + * used later to detach and disable the pin interrupt. + * + ****************************************************************************/ + +static FAR void *pca9555_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, + FAR void *arg) +{ + FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev; + FAR void *handle = NULL; + int i; + + /* Get exclusive access to the PCA555 */ + + pca9555_lock(pca); + + /* Find and available in entry in the callback table */ + + for (i = 0; i < CONFIG_PCA9555_INT_NCALLBACKS; i++) + { + /* Is this entry available (i.e., no callback attached) */ + + if (pca->cb[i].cbfunc == NULL) + { + /* Yes.. use this entry */ + + pca->cb[i].pinset = pinset; + pca->cb[i].cbfunc = callback; + pca->cb[i].cbarg = arg; + handle = &pca->cb[i]; + break; + } + } + + /* Add this callback to the table */ + + pca9555_unlock(pca); + return handle; +} + +/**************************************************************************** + * Name: pca9555_detach + * + * Description: + * Detach and disable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * handle - The non-NULL opaque value return by pca9555_attch() + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int pca9555_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle) +{ + FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev; + FAR struct pca9555_callback_s *cb = (FAR struct pca9555_callback_s *)handle; + + DEBUGASSERT(pca != NULL && cb != NULL); + DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&pca->cb[0] && + (uintptr_t)cb <= (uintptr_t)&pca->cb[CONFIG_TCA64XX_INT_NCALLBACKS-1]); + UNUSED(pca); + + cb->pinset = 0; + cb->cbfunc = NULL; + cb->cbarg = NULL; + return OK; +} + /**************************************************************************** * Name: pca9555_irqworker * @@ -627,33 +800,46 @@ static void pca9555_irqworker(void *arg) FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)arg; uint8_t addr = PCA9555_REG_INPUT; uint8_t buf[2]; - unsigned int bits; + ioe_pinset_t pinset; int ret; + int i; /* Read inputs */ ret = pca9555_writeread(pca, &addr, 1, buf, 2); if (ret == OK) { -#ifdef CONFIG_IOEXPANDER_SHADOW_MODE +#ifdef CONFIG_PCA9555_SHADOW_MODE /* Don't forget to update the shadow registers at this point */ - pca->sreg[addr] = buf; + pca->sreg[addr] = buf[0]; + pca->sreg[addr+1] = buf[1]; #endif - bits = ((unsigned int)buf[0] << 8) | buf[1]; + /* Create a 16-bit pinset */ - /* If signal PID is registered, enqueue signal. */ + pinset = ((unsigned int)buf[0] << 8) | buf[1]; - if (pca->dev.sigpid) + /* Perform pin interrupt callbacks */ + + for (i = 0; i < CONFIG_PCA9555_INT_NCALLBACKS; i++) { -#ifdef CONFIG_CAN_PASS_STRUCTS - union sigval value; - value.sival_int = (int)bits; - ret = sigqueue(pca->dev.sigpid, pca->dev.sigval, value); -#else - ret = sigqueue(pca->dev.sigpid, pca->dev.sigval, - (FAR void *)bits); -#endif + /* Is this entry valid (i.e., callback attached)? If so, did + * any of the requested pin interrupts occur? + */ + + if (pca->cb[i].cbfunc != NULL) + { + /* Did any of the requested pin interrupts occur? */ + + ioe_pinset_t match = pinset & pca->cb[i].pinset; + if (match != 0) + { + /* Yes.. perform the callback */ + + (void)pca->cb[i].cbfunc(&pca->dev, match, + pca->cb[i].cbarg); + } + } } } @@ -697,10 +883,10 @@ static int pca9555_interrupt(int irq, FAR void *context) * completed. */ - if (work_available(&pca->dev.work)) + if (work_available(&pca->work)) { pca->config->enable(pca->config, FALSE); - work_queue(HPWORK, &pca->dev.work, pca9555_irqworker, + work_queue(HPWORK, &pca->work, pca9555_irqworker, (FAR void *)pca, 0); } diff --git a/drivers/ioexpander/pca9555.h b/drivers/ioexpander/pca9555.h index 7152a58bb13..815d92de237 100644 --- a/drivers/ioexpander/pca9555.h +++ b/drivers/ioexpander/pca9555.h @@ -50,6 +50,8 @@ #include #include + +#include #include #include @@ -75,11 +77,22 @@ * Enables support for the PCA9555 driver (Needs CONFIG_INPUT) * CONFIG_PCA9555_MULTIPLE * Can be defined to support multiple PCA9555 devices on board. - * CONFIG_PCA9555_INT_DISABLE - * Disable driver GPIO interrupt functionality (ignored if GPIO functionality is - * disabled). + * CONFIG_PCA9555_INT_NCALLBACKS + * Maximum number of supported pin interrupt callbacks. */ +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +# ifndef CONFIG_PCA9555_INT_NCALLBACKS +# define CONFIG_PCA9555_INT_NCALLBACKS 4 +# endif +#endif + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +# ifndef CONFIG_SCHED_WORKQUEUE +# error Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected. +# endif +#endif + #undef CONFIG_PCA9555_REFCNT /* Driver support ***************************************************************************/ @@ -113,13 +126,25 @@ * Public Types ********************************************************************************************/ +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +/* This type represents on registered pin interrupt callback */ + +struct pca9555_callback_s +{ + ioe_pinset_t pinset; /* Set of pin interrupts that will generate + * the callback. */ + ioe_callback_t cbfunc; /* The saved callback function pointer */ + FAR void *cbarg; /* Callback argument */ +}; +#endif + /* This structure represents the state of the PCA9555 driver */ struct pca9555_dev_s { struct ioexpander_dev_s dev; /* Nested structure to allow casting as public gpio * expander. */ -#ifdef CONFIG_IOEXPANDER_SHADOW_MODE +#ifdef CONFIG_PCA9555_SHADOW_MODE uint8_t sreg[8]; /* Shadowed registers of the PCA9555 */ #endif #ifdef CONFIG_PCA9555_MULTIPLE @@ -128,6 +153,14 @@ struct pca9555_dev_s FAR struct pca9555_config_s *config; /* Board configuration data */ FAR struct i2c_master_s *i2c; /* Saved I2C driver instance */ sem_t exclsem; /* Mutual exclusion */ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + struct work_s work; /* Supports the interrupt handling "bottom half" */ + + /* Saved callback information for each I/O expander client */ + + struct pca9555_callback_s cb[CONFIG_PCA9555_INT_NCALLBACKS]; +#endif }; #endif /* CONFIG_IOEXPANDER && CONFIG_IOEXPANDER_PCA9555 */ diff --git a/drivers/ioexpander/pcf8574.c b/drivers/ioexpander/pcf8574.c new file mode 100644 index 00000000000..4751ae69918 --- /dev/null +++ b/drivers/ioexpander/pcf8574.c @@ -0,0 +1,1133 @@ +/**************************************************************************** + * include/nuttx/ioexpander/pcf8574.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "pcf8574.h" + +#ifdef CONFIG_IOEXPANDER_PCF8574 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef MAX +# define MAX(a,b) (((a) > (b)) ? (a) : (b)) +#endif + +#ifndef MIN +# define MIN(a,b) (((a) < (b)) ? (a) : (b)) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* PCF8574xx Helpers */ + +static void pcf8574_lock(FAR struct pcf8574_dev_s *priv); +static int pcf8574_read(FAR struct pcf8574_dev_s *priv, FAR uint8_t *portval); +static int pcf8574_write(struct pcf8574_dev_s *priv, uint8_t portval); + +/* I/O Expander Methods */ + +static int pcf8574_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int dir); +static int pcf8574_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, void *regval); +static int pcf8574_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value); +static int pcf8574_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value); +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int pcf8574_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +static int pcf8574_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static FAR void *pcf8574_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg); +static int pcf8574_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle); +#endif + +#ifdef CONFIG_PCF8574_INT_ENABLE +static void pcf8574_int_update(void *handle, uint8_t input); +static void pcf8574_register_update(FAR struct pcf8574_dev_s *priv); +static void pcf8574_irqworker(void *arg); +static void pcf8574_interrupt(FAR void *arg); +#ifdef CONFIG_PCF8574_INT_POLL +static void pcf8574_poll_expiry(int argc, wdparm_t arg1, ...); +#endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifndef CONFIG_PCF8574_MULTIPLE +/* If only a single device is supported, then the driver state structure may + * as well be pre-allocated. + */ + +static struct pcf8574_dev_s g_pcf8574; +#endif + +/* I/O expander vtable */ + +static const struct ioexpander_ops_s g_pcf8574_ops = +{ + pcf8574_direction, + pcf8574_option, + pcf8574_writepin, + pcf8574_readpin, + pcf8574_readpin +#ifdef CONFIG_IOEXPANDER_MULTIPIN + , pcf8574_multiwritepin + , pcf8574_multireadpin + , pcf8574_multireadpin +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + , pcf8574_attach + , pcf8574_detach +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pcf8574_lock + * + * Description: + * Get exclusive access to the I/O Expander + * + ****************************************************************************/ + +static void pcf8574_lock(FAR struct pcf8574_dev_s *priv) +{ + while (sem_wait(&priv->exclsem) < 0) + { + /* EINTR is the only expected error from sem_wait() */ + + DEBUGASSERT(errno == EINTR); + } +} + +#define pcf8574_unlock(p) sem_post(&(p)->exclsem) + +/**************************************************************************** + * Name: pcf8574_read + * + * Description: + * Read the PCF8574 8-bit value from a PCF8574xx port + * + * Primitive I2C read operation for the PCA8574. The PCF8574 is + * 'interesting' in that it doesn't really have a data direction register, + * but instead the outputs are current-limited when high, so by setting an + * IO line high, you are also making it an input. Consequently, before + * using this method, you'll need to perform a pca8574_write() setting the + * bits you are interested in reading to 1's, then call this method. + * + ****************************************************************************/ + +static int pcf8574_read(FAR struct pcf8574_dev_s *priv, FAR uint8_t *portval) +{ + struct i2c_msg_s msg; + + DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL); + + /* Setup for the transfer */ + + msg.frequency = priv->config->frequency, + msg.addr = priv->config->address, + msg.flags = I2C_M_READ; + msg.buffer = portval; + msg.length = 1; + + /* Then perform the transfer. */ + + return I2C_TRANSFER(priv->i2c, &msg, 1); +} + +/**************************************************************************** + * Name: pcf8574_write + * + * Description: + * Write an 8-bit value to a PCF8574xx port + * + * Primitive I2C write operation for the PCA8574. The I2C interface + * simply sets the state of the 8 IO lines in the PCA8574 port. + * + ****************************************************************************/ + +static int pcf8574_write(struct pcf8574_dev_s *priv, uint8_t portval) +{ + struct i2c_msg_s msg; + + DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL); + + /* Setup for the transfer */ + + msg.frequency = priv->config->frequency, + msg.addr = priv->config->address; + msg.flags = 0; + msg.buffer = (FAR uint8_t *)&portval; + msg.length = 1; + + /* Then perform the transfer. */ + + return I2C_TRANSFER(priv->i2c, &msg, 1); +} + +/**************************************************************************** + * Name: pcf8574_direction + * + * Description: + * Set the direction of an ioexpander pin. Required. + * + * The PCF8574 is 'interesting' in that it doesn't really have a data + * direction register, but instead the outputs are current-limited when + * high, so by setting an IO line high, you are also making it an input. + * Consequently, before using this method, you'll need to perform a + * pca8574_write() setting the bits you are interested in reading to 1's, + * before calling pca8574_read(). + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * dir - One of the IOEXPANDER_DIRECTION_ macros + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int pcf8574_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int direction) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + int ret; + + DEBUGASSERT(priv != NULL && priv->config != NULL && pin < 8 && + (direction == IOEXPANDER_DIRECTION_IN || + direction == IOEXPANDER_DIRECTION_OUT)); + + gpioinfo("I2C addr=%02x pin=%u direction=%s\n", + priv->config->address, pin, + (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT"); + + /* Get exclusive access to the I/O Expander */ + + pcf8574_lock(priv); + + /* Set a bit in inpins if the pin is an input. Clear the bit in + * inpins if the pin is an output. + */ + + if (direction == IOEXPANDER_DIRECTION_IN) + { + priv->inpins |= (1 << pin); + priv->outstate &= ~(1 << pin); + } + else + { + priv->inpins &= ~(1 << pin); + } + + /* Write the OR of the set of input pins and the set of output pins. + * In order to read input pins, we have to write a '1' to putt he + * pin in the current limiting state. + */ + + ret = pcf8574_write(priv, priv->inpins | priv->outstate); + + pcf8574_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: pcf8574_option + * + * Description: + * Set pin options. Required. + * Since all IO expanders have various pin options, this API allows setting + * pin options in a flexible way. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * opt - One of the IOEXPANDER_OPTION_ macros + * val - The option's value + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int pcf8574_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, FAR void *value) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + int ret = -ENOSYS; + + DEBUGASSERT(priv != NULL && priv->config != NULL); + + gpioinfo("I2C addr=%02x pin=%u option=%u\n", + priv->config->address, pin, opt); + +#ifdef CONFIG_PCF8574_INT_ENABLE + /* Interrupt configuration */ + + if (opt == IOEXPANDER_OPTION_INTCFG) + { + unsigned int ival = (unsigned int)((uintptr_t)value); + ioe_pinset_t bit = ((ioe_pinset_t)1 << pin); + + ret = OK; + pcf8574_lock(priv); + switch (ival) + { + case IOEXPANDER_VAL_HIGH: /* Interrupt on high level */ + priv->trigger &= ~bit; + priv->level[0] |= bit; + priv->level[1] &= ~bit; + break; + + case IOEXPANDER_VAL_LOW: /* Interrupt on low level */ + priv->trigger &= ~bit; + priv->level[0] &= ~bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_RISING: /* Interrupt on rising edge */ + priv->trigger |= bit; + priv->level[0] |= bit; + priv->level[1] &= ~bit; + break; + + case IOEXPANDER_VAL_FALLING: /* Interrupt on falling edge */ + priv->trigger |= bit; + priv->level[0] &= ~bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_BOTH: /* Interrupt on both edges */ + priv->trigger |= bit; + priv->level[0] |= bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_DISABLE: + break; + + default: + ret = -EINVAL; + } + + pcf8574_unlock(priv); + } +#endif + + return ret; +} + +/**************************************************************************** + * Name: pcf8574_writepin + * + * Description: + * Set the pin level. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * val - The pin level. Usually TRUE will set the pin high, + * except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int pcf8574_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + int ret; + + DEBUGASSERT(priv != NULL && priv->config != NULL && pin < 8); + + gpioinfo("I2C addr=%02x pin=%u value=%u\n", + priv->config->address, pin, value); + + /* Get exclusive access to the I/O Expander */ + + pcf8574_lock(priv); + + /* Make sure that this is an output pin */ + + if ((priv->inpins & (1 << pin)) != 0) + { + gpioerr("ERROR: pin%u is an input\n", pin); + pcf8574_unlock(priv); + return -EINVAL; + } + + /* Set/clear a bit in outstate. */ + + if (value) + { + priv->outstate |= (1 << pin); + } + else + { + priv->outstate &= ~(1 << pin); + } + + /* Write the OR of the set of input pins and the set of output pins. + * In order to set the new output value. + */ + + ret = pcf8574_write(priv, priv->inpins | priv->outstate); + + pcf8574_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: pcf8574_readpin + * + * Description: + * Read the actual PIN level. This can be different from the last value written + * to this pin. Required. + * + * The PCF8574 is 'interesting' in that it doesn't really have a data + * direction register, but instead the outputs are current-limited when + * high, so by setting an IO line high, you are also making it an input. + * Consequently, before using this method, you'll need to perform a + * pca8574_write() setting the bits you are interested in reading to 1's, + * before calling pca8574_read(). + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the pin level is stored. Usually TRUE + * if the pin is high, except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int pcf8574_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + uint8_t regval; + int ret; + + DEBUGASSERT(priv != NULL && priv->config != NULL && pin < 8 && value != NULL); + + gpioinfo("I2C addr=%02x, pin=%u\n", priv->config->address, pin); + + /* Get exclusive access to the I/O Expander */ + + pcf8574_lock(priv); + + /* Is the pin an output? */ + + if ((priv->inpins & (1 << pin)) == 0) + { + /* We cannot read the value on pin directly. Just Return the last + * value that we wrote to the pin. + */ + + *value = ((priv->outstate & (1 << pin)) != 0); + pcf8574_unlock(priv); + return OK; + } + + /* It is an input pin. Read the input register for this pin + * + * The Input Port Register reflects the incoming logic levels of the pins, + * regardless of whether the pin is defined as an input or an output by + * the Configuration Register. They act only on read operation. + */ + + ret = pcf8574_read(priv, ®val); + if (ret < 0) + { + gpioerr("ERROR: Failed to read port register: %d\n", ret); + + goto errout_with_lock; + } + +#ifdef CONFIG_PCF8574_INT_ENABLE + /* Update the input status with the 8 bits read from the expander */ + + pcf8574_int_update(priv, regval); +#endif + + /* Return 0 or 1 to indicate the state of pin */ + + *value = (bool)((regval >> (pin & 7)) & 1); + ret = OK; + +errout_with_lock: + pcf8574_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: pcf8574_multiwritepin + * + * Description: + * Set the pin level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pins - The list of pin indexes to alter in this call + * val - The list of pin levels. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int pcf8574_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + uint8_t pin; + int ret; + int i; + + DEBUGASSERT(priv != NULL && priv->config != NULL && + pins != NULL && values != NULL); + + gpioinfo("I2C addr=%02x count=%d\n", priv->config->address, count); + + /* Get exclusive access to the I/O Expander */ + + pcf8574_lock(priv); + + /* Process each pin setting */ + + for (i = 0; i < count; i++) + { + /* Make sure that this is an output pin */ + + pin = pins[i]; + DEBUGASSERT(pin < 8); + + gpioinfo("%d. pin=%u value=%u\n", pin, values[i]); + + if ((priv->inpins & (1 << pin)) != 0) + { + gpioerr("ERROR: pin%u is an input\n", pin); + continue; + } + + /* Set/clear a bit in outstate. */ + + if (values[i]) + { + priv->outstate |= (1 << pin); + } + else + { + priv->outstate &= ~(1 << pin); + } + } + + /* Write the OR of the set of input pins and the set of output pins. + * In order to set the new output value. + */ + + ret = pcf8574_write(priv, priv->inpins | priv->outstate); + + pcf8574_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: pcf8574_multireadpin + * + * Description: + * Read the actual level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The list of pin indexes to read + * valptr - Pointer to a buffer where the pin levels are stored. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int pcf8574_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + uint8_t regval; + uint8_t pin; + int ret; + int i; + + DEBUGASSERT(priv != NULL && priv->config != NULL && + pins != NULL && values != NULL); + + gpioinfo("I2C addr=%02x, count=%d\n", priv->config->address, count); + + /* Get exclusive access to the I/O Expander */ + + pcf8574_lock(priv); + + /* Read the input register for this pin + * + * The Input Port Register reflects the incoming logic levels of the pins, + * regardless of whether the pin is defined as an input or an output by + * the Configuration Register. They act only on read operation. + */ + + ret = pcf8574_read(priv, ®val); + if (ret < 0) + { + gpioerr("ERROR: Failed to read port register: %d\n", ret); + goto errout_with_lock; + } + +#ifdef CONFIG_PCF8574_INT_ENABLE + /* Update the input status with the 8 bits read from the expander */ + + pcf8574_int_update(priv, regval); +#endif + + /* Return the requested pin values */ + + for (i = 0; i < count; i++) + { + /* Make sure that this is an output pin */ + + pin = pins[i]; + DEBUGASSERT(pin < 8); + + /* Is the pin an output? */ + + if ((priv->inpins & (1 << pin)) == 0) + { + /* We cannot read the value on pin directly. Just Return the last + * value that we wrote to the pin. + */ + + values[i] = ((priv->outstate & (1 << pin)) != 0); + } + else + { + values[i] = ((regval & (1 << pin)) != 0); + } + + gpioinfo("%d. pin=%u value=%u\n", pin, values[i]); + } + + ret = OK; + +errout_with_lock: + pcf8574_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: pcf8574_attach + * + * Description: + * Attach and enable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * pinset - The set of pin events that will generate the callback + * callback - The pointer to callback function. NULL will detach the + * callback. + * arg - User-provided callback argument + * + * Returned Value: + * A non-NULL handle value is returned on success. This handle may be + * used later to detach and disable the pin interrupt. + * + ****************************************************************************/ + +#ifdef CONFIG_PCF8574_INT_ENABLE +static FAR void *pcf8574_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, + FAR void *arg) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + FAR void *handle = NULL; + int i; + + /* Get exclusive access to the I/O Expander */ + + pcf8574_lock(priv); + + /* Find and available in entry in the callback table */ + + for (i = 0; i < CONFIG_PCF8574_INT_NCALLBACKS; i++) + { + /* Is this entry available (i.e., no callback attached) */ + + if (priv->cb[i].cbfunc == NULL) + { + /* Yes.. use this entry */ + + priv->cb[i].pinset = pinset; + priv->cb[i].cbfunc = callback; + priv->cb[i].cbarg = arg; + handle = &priv->cb[i]; + break; + } + } + + pcf8574_unlock(priv); + return handle; +} +#endif + +/**************************************************************************** + * Name: pcf8574_detach + * + * Description: + * Detach and disable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * handle - The non-NULL opaque value return by pcf8574_attch() + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int pcf8574_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)dev; + FAR struct pcf8574_callback_s *cb = (FAR struct pcf8574_callback_s *)handle; + + DEBUGASSERT(priv != NULL && cb != NULL); + DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&priv->cb[0] && + (uintptr_t)cb <= (uintptr_t)&priv->cb[CONFIG_PCF8574_INT_NCALLBACKS-1]); + UNUSED(priv); + + cb->pinset = 0; + cb->cbfunc = NULL; + cb->cbarg = NULL; + return OK; +} + +/**************************************************************************** + * Name: pcf8574_int_update + * + * Description: + * Check for pending interrupts. + * + ****************************************************************************/ + +#ifdef CONFIG_PCF8574_INT_ENABLE +static void pcf8574_int_update(void *handle, uint8_t input) +{ + struct pcf8574_dev_s *priv = handle; + irqstate_t flags; + uint8_t diff; + int pin; + + flags = enter_critical_section(); + + /* Check the changed bits from last read */ + + diff = priv->input ^ input; + priv->input = input; + + /* PCF8574 doesn't support irq trigger, we have to do this in software. */ + + for (pin = 0; pin < 8; pin++) + { + if (PCF8574_EDGE_SENSITIVE(priv, pin)) + { + /* Edge triggered. Was there a change in the level? */ + + if ((diff & 1) != 0) + { + /* Set interrupt as a function of edge type */ + + if (((input & 1) == 0 && PCF8574_EDGE_FALLING(priv, pin)) || + ((input & 1) != 0 && PCF8574_EDGE_RISING(priv, pin))) + { + priv->intstat |= 1 << pin; + } + } + } + else /* if (PCF8574_LEVEL_SENSITIVE(priv, pin)) */ + { + /* Level triggered. Set intstat if match in level type. */ + + if (((input & 1) != 0 && PCF8574_LEVEL_HIGH(priv, pin)) || + ((input & 1) == 0 && PCF8574_LEVEL_LOW(priv, pin))) + { + priv->intstat |= 1 << pin; + } + } + + diff >>= 1; + input >>= 1; + } + + leave_critical_section(flags); +} +#endif + +/**************************************************************************** + * Name: tc64_update_registers + * + * Description: + * Read all pin states and update pending interrupts. + * + * Input Parameters: + * dev - Device-specific state data + * pins - The list of pin indexes to alter in this call + * val - The list of pin levels. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_PCF8574_INT_ENABLE +static void pcf8574_register_update(FAR struct pcf8574_dev_s *priv) +{ + uint8_t regval; + int ret; + + /* Read from the PCF8574 port. + * + * The Input Port Register reflects the incoming logic levels of the pins, + * regardless of whether the pin is defined as an input or an output by + * the Configuration Register. They act only on read operation. + */ + + ret = pcf8574_read(priv, ®val); + if (ret < 0) + { + gpioerr("ERROR: Failed to read port register: %d\n", ret); + } + else + { + /* Update the input status with the 8 bits read from the expander */ + + pcf8574_int_update(priv, regval); + } +} +#endif + +/**************************************************************************** + * Name: pcf8574_irqworker + * + * Description: + * Handle GPIO interrupt events (this function actually executes in the + * context of the worker thread). + * + ****************************************************************************/ + +#ifdef CONFIG_PCF8574_INT_ENABLE +static void pcf8574_irqworker(void *arg) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)arg; + uint8_t pinset; + int ret; + int i; + + DEBUGASSERT(priv != NULL && priv->config != NULL); + + /* Check for pending interrupts */ + + pcf8574_lock(priv); + pcf8574_register_update(priv); + + /* Sample and clear the pending interrupts. */ + + pinset = priv->intstat; + priv->intstat = 0; + pcf8574_unlock(priv); + + /* Perform pin interrupt callbacks */ + + for (i = 0; i < CONFIG_PCF8574_INT_NCALLBACKS; i++) + { + /* Is this entry valid (i.e., callback attached)? */ + + if (priv->cb[i].cbfunc != NULL) + { + /* Did any of the requested pin interrupts occur? */ + + ioe_pinset_t match = pinset & priv->cb[i].pinset; + if (match != 0) + { + /* Yes.. perform the callback */ + + (void)priv->cb[i].cbfunc(&priv->dev, match, + priv->cb[i].cbarg); + } + } + } + +#ifdef CONFIG_PCF8574_INT_POLL + /* Check for pending interrupts */ + + pcf8574_register_update(priv); + + /* Re-start the poll timer */ + + sched_lock(); + ret = wd_start(priv->wdog, PCF8574_POLLDELAY, (wdentry_t)pcf8574_poll_expiry, + 1, (wdparm_t)priv); + if (ret < 0) + { + gpioerr("ERROR: Failed to start poll timer\n"); + } +#endif + + /* Re-enable interrupts */ + + priv->config->enable(priv->config, true); + +#ifdef CONFIG_PCF8574_INT_POLL + sched_unlock(); +#endif +} +#endif + +/**************************************************************************** + * Name: pcf8574_interrupt + * + * Description: + * Handle GPIO interrupt events (this function executes in the + * context of the interrupt). + * + ****************************************************************************/ + +#ifdef CONFIG_PCF8574_INT_ENABLE +static void pcf8574_interrupt(FAR void *arg) +{ + FAR struct pcf8574_dev_s *priv = (FAR struct pcf8574_dev_s *)arg; + + DEBUGASSERT(priv != NULL && priv->config != NULL); + + /* Defer interrupt processing to the worker thread. This is not only + * much kinder in the use of system resources but is probably necessary + * to access the I/O expander device. + * + * Notice that further GPIO interrupts are disabled until the work is + * actually performed. This is to prevent overrun of the worker thread. + * Interrupts are re-enabled in pcf8574_irqworker() when the work is + * completed. + */ + + if (work_available(&priv->work)) + { +#ifdef CONFIG_PCF8574_INT_POLL + /* Cancel the poll timer */ + + (void)wd_cancel(priv->wdog); +#endif + + /* Disable interrupts */ + + priv->config->enable(priv->config, false); + + /* Schedule interrupt related work on the high priority worker thread. */ + + work_queue(HPWORK, &priv->work, pcf8574_irqworker, + (FAR void *)priv, 0); + } +} +#endif + +/**************************************************************************** + * Name: pcf8574_poll_expiry + * + * Description: + * The poll timer has expired; check for missed interrupts + * + * Input Parameters: + * Standard wdog expiration arguments. + * + ****************************************************************************/ + +#if defined(CONFIG_PCF8574_INT_ENABLE) && defined(CONFIG_PCF8574_INT_POLL) +static void pcf8574_poll_expiry(int argc, wdparm_t arg1, ...) +{ + FAR struct pcf8574_dev_s *priv; + + DEBUGASSERT(argc == 1); + priv = (FAR struct pcf8574_dev_s *)arg1; + DEBUGASSERT(priv != NULL && priv->config != NULL); + + /* Defer interrupt processing to the worker thread. This is not only + * much kinder in the use of system resources but is probably necessary + * to access the I/O expander device. + * + * Notice that further GPIO interrupts are disabled until the work is + * actually performed. This is to prevent overrun of the worker thread. + * Interrupts are re-enabled in pcf8574_irqworker() when the work is + * completed. + */ + + if (work_available(&priv->work)) + { + /* Disable interrupts */ + + priv->config->enable(priv->config, false); + + /* Schedule interrupt related work on the high priority worker thread. */ + + work_queue(HPWORK, &priv->work, pcf8574_irqworker, + (FAR void *)priv, 0); + } +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pcf8574_initialize + * + * Description: + * Instantiate and configure the PCF8574xx device driver to use the provided + * I2C device instance. + * + * Input Parameters: + * i2c - An I2C driver instance + * minor - The device i2c address + * config - Persistent board configuration data + * + * Returned Value: + * an ioexpander_dev_s instance on success, NULL on failure. + * + ****************************************************************************/ + +FAR struct ioexpander_dev_s *pcf8574_initialize(FAR struct i2c_master_s *i2c, + FAR struct pcf8574_config_s *config) +{ + FAR struct pcf8574_dev_s *priv; + int ret; + +#ifdef CONFIG_PCF8574_MULTIPLE + /* Allocate the device state structure */ + + priv = (FAR struct pcf8574_dev_s *)kmm_zalloc(sizeof(struct pcf8574_dev_s)); + if (!priv) + { + gpioerr("ERROR: Failed to allocate driver instance\n"); + return NULL; + } +#else + /* Use the one-and-only I/O Expander driver instance */ + + priv = &g_pcf8574; +#endif + + /* Initialize the device state structure */ + + priv->dev.ops = &g_pcf8574_ops; + priv->i2c = i2c; + priv->config = config; + +#ifdef CONFIG_PCF8574_INT_ENABLE + /* Initial interrupt state: Edge triggered on both edges */ + + priv->trigger = 0xff; /* All edge triggered */ + priv->level[0] = 0xff; /* All rising edge */ + priv->level[1] = 0xff; /* All falling edge */ + +#ifdef CONFIG_PCF8574_INT_POLL + /* Set up a timer to poll for missed interrupts */ + + priv->wdog = wd_create(); + DEBUGASSERT(priv->wdog != NULL); + + ret = wd_start(priv->wdog, PCF8574_POLLDELAY, (wdentry_t)pcf8574_poll_expiry, + 1, (wdparm_t)priv); + if (ret < 0) + { + gpioerr("ERROR: Failed to start poll timer\n"); + } +#endif + + /* Attach the I/O expander interrupt handler and enable interrupts */ + + priv->config->attach(config, pcf8574_interrupt, priv); + priv->config->enable(config, true); +#endif + + sem_init(&priv->exclsem, 0, 1); + return &priv->dev; +} + +#endif /* CONFIG_IOEXPANDER_PCF8574 */ diff --git a/drivers/ioexpander/pcf8574.h b/drivers/ioexpander/pcf8574.h new file mode 100644 index 00000000000..ec164908073 --- /dev/null +++ b/drivers/ioexpander/pcf8574.h @@ -0,0 +1,172 @@ +/******************************************************************************************** + * drivers/ioexpander/pcf8574.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __DRIVERS_IOEXPANDER_PCF8574_H +#define __DRIVERS_IOEXPANDER_PCF8574_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include + +#include + +#include +#include + +#include +#include +#include + +#include +#include + +#if defined(CONFIG_IOEXPANDER) && defined(CONFIG_IOEXPANDER_PCF8574) + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +/* Configuration ****************************************************************************/ +/* Prerequisites: + * CONFIG_I2C + * I2C support is required + * CONFIG_IOEXPANDER + * Enables I/O expander support + * + * Other settings that effect the driver: CONFIG_DISABLE_POLL + * + * CONFIG_IOEXPANDER_PCF8574 + * Enables support for the PCF8574 driver (Needs CONFIG_INPUT) + * CONFIG_PCF8574_MULTIPLE + * Can be defined to support multiple PCF8574 devices on board. + * CONFIG_PCF8574_INT_NCALLBACKS + * Maximum number of supported pin interrupt callbacks. + * CONFIG_PCF8574_INT_POLL + * Enables a poll for missed interrupts + * CONFIG_PCF8574_INT_POLLDELAY + * If CONFIG_PCF8574_INT_POLL=y, then this is the delay in microseconds + * between polls for missed interrupts. + */ + +#ifndef CONFIG_I2C +# error "CONFIG_I2C is required by PCF8574" +#endif + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +# ifndef CONFIG_PCF8574_INT_NCALLBACKS +# define CONFIG_PCF8574_INT_NCALLBACKS 4 +# endif +#endif + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +# ifndef CONFIG_SCHED_WORKQUEUE +# error Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected. +# endif +#endif + +#ifndef CONFIG_PCF8574_INT_POLLDELAY +# define CONFIG_PCF8574_INT_POLLDELAY 500000 +#endif + +/* PCF8574 Definitions **********************************************************************/ + +#define PCF8574_I2C_MAXFREQUENCY 400000 /* 400KHz */ +#define PCF8574_POLLDELAY (CONFIG_PCF8574_INT_POLLDELAY / USEC_PER_TICK) + +#define PCF8574_LEVEL_SENSITIVE(d,p) \ + (((d)->trigger & ((ioe_pinset_t)1 << (p))) == 0) +#define PCF8574_LEVEL_HIGH(d,p) \ + (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0) +#define PCF8574_LEVEL_LOW(d,p) \ + (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0) + +#define PCF8574_EDGE_SENSITIVE(d,p) \ + (((d)->trigger & ((ioe_pinset_t)1 << (p))) != 0) +#define PCF8574_EDGE_RISING(d,p) \ + (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0) +#define PCF8574_EDGE_FALLING(d,p) \ + (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0) +#define PCF8574_EDGE_BOTH(d,p) \ + (PCF8574_LEVEL_RISING(d,p) && PCF8574_LEVEL_FALLING(d,p)) + +/******************************************************************************************** + * Public Types + ********************************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +/* This type represents on registered pin interrupt callback */ + +struct pcf8574_callback_s +{ + ioe_pinset_t pinset; /* Set of pin interrupts that will generate + * the callback. */ + ioe_callback_t cbfunc; /* The saved callback function pointer */ + FAR void *cbarg; /* Callback argument */ +}; +#endif + +/* This structure represents the state of the PCF8574 driver */ + +struct pcf8574_dev_s +{ + struct ioexpander_dev_s dev; /* Nested structure to allow casting as public gpio + * expander. */ + FAR struct pcf8574_config_s *config; /* Board configuration data */ + FAR struct i2c_master_s *i2c; /* Saved I2C driver instance */ + sem_t exclsem; /* Mutual exclusion */ + uint8_t inpins; /* Set of input pins */ + uint8_t outstate; /* State of all output pins */ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +#ifdef CONFIG_PCF8574_INT_POLL + WDOG_ID wdog; /* Timer used to poll for missed interrupts */ +#endif + + uint8_t input; /* Last input registeres */ + uint8_t intstat; /* Pending interrupts */ + uint8_t trigger; /* Bit encoded: 0=level 1=edge */ + uint8_t level[2]; /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */ + struct work_s work; /* Supports the interrupt handling "bottom half" */ + + /* Saved callback information for each I/O expander client */ + + struct pcf8574_callback_s cb[CONFIG_PCF8574_INT_NCALLBACKS]; +#endif +}; + +#endif /* CONFIG_IOEXPANDER && CONFIG_IOEXPANDER_PCF8574 */ +#endif /* __DRIVERS_IOEXPANDER_PCF8574_H */ diff --git a/drivers/ioexpander/skeleton.c b/drivers/ioexpander/skeleton.c new file mode 100644 index 00000000000..03f15f8cffb --- /dev/null +++ b/drivers/ioexpander/skeleton.c @@ -0,0 +1,767 @@ +/**************************************************************************** + * drivers/ioexpander/skeleton.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + +#include +#include +#include +#include + +#include +#include +#include + +#include "skeleton.h" + +#if defined(CONFIG_IOEXPANDER_skeleton) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +/* This type represents on registered pin interrupt callback */ + +struct skel_callback_s +{ + ioe_pinset_t pinset; /* Set of pin interrupts that will generate + * the callback. */ + ioe_callback_t cbfunc; /* The saved callback function pointer */ +}; +#endif + +/* This structure represents the state of the I/O Expander driver */ + +struct skel_dev_s +{ + struct ioexpander_dev_s dev; /* Nested structure to allow casting as public gpio + * expander. */ +#ifdef CONFIG_skeleton_MULTIPLE + FAR struct skel_dev_s *flink; /* Supports a singly linked list of drivers */ +#endif + sem_t exclsem; /* Mutual exclusion */ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + struct work_s work; /* Supports the interrupt handling "bottom half" */ + + /* Saved callback information for each I/O expander client */ + + struct skel_callback_s cb[CONFIG_skeleton_INT_NCALLBACKS]; +#endif +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void skel_lock(FAR struct skel_dev_s *priv); + +static int skel_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int dir); +static int skel_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, void *val); +static int skel_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value); +static int skel_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value); +static int skel_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value); +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int skel_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +static int skel_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +static int skel_multireadbuf(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static int skel_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback); +#endif + +static void skel_irqworker(void *arg); +static void skel_interrupt(FAR void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifndef CONFIG_skeleton_MULTIPLE +/* If only a single device is supported, then the driver state structure may + * as well be pre-allocated. + */ + +static struct skel_dev_s g_skel; +#endif + +/* I/O expander vtable */ + +static const struct ioexpander_ops_s g_skel_ops = +{ + skel_direction, + skel_option, + skel_writepin, + skel_readpin, + skel_readbuf +#ifdef CONFIG_IOEXPANDER_MULTIPIN + , skel_multiwritepin + , skel_multireadpin + , skel_multireadbuf +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + , skel_attach +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: skel_lock + * + * Description: + * Get exclusive access to the I/O Expander + * + ****************************************************************************/ + +static void skel_lock(FAR struct skel_dev_s *priv) +{ + while (sem_wait(&priv->exclsem) < 0) + { + /* EINTR is the only expected error from sem_wait() */ + + DEBUGASSERT(errno == EINTR); + } +} + +#define skel_unlock(p) sem_post(&(p)->exclsem) + +/**************************************************************************** + * Name: skel_direction + * + * Description: + * Set the direction of an ioexpander pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * dir - One of the IOEXPANDER_DIRECTION_ macros + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int skel_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int direction) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret; + + gpioinfo("pin=%u direction=%s\n", + pin, (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT"); + + DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS && + (direction == IOEXPANDER_DIRECTION_IN || + direction == IOEXPANDER_DIRECTION_IN)); + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + + /* Set the pin direction in the I/O Expander */ +#warning Missing logic + + skel_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: skel_option + * + * Description: + * Set pin options. Required. + * Since all IO expanders have various pin options, this API allows setting + * pin options in a flexible way. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * opt - One of the IOEXPANDER_OPTION_ macros + * val - The option's value + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int skel_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, FAR void *val) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret = -ENOSYS; + + gpioinfo("addr=%02x pin=%u option=%u\n", priv->addr, pin, opt); + + DEBUGASSERT(priv != NULL); + + /* Check for pin polarity inversion. */ + + if (opt == IOEXPANDER_OPTION_INVERT) + { + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + + /* Set the pin option */ +#warning Missing logic + + skel_unlock(priv); + } + + return ret; +} + +/**************************************************************************** + * Name: skel_writepin + * + * Description: + * Set the pin level. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * val - The pin level. Usually TRUE will set the pin high, + * except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int skel_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret; + + gpioinfo("pin=%u value=%u\n", pin, value); + + DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS); + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + + /* Write the pin value */ +#warning Missing logic + + skel_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: skel_readpin + * + * Description: + * Read the actual PIN level. This can be different from the last value written + * to this pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the pin level is stored. Usually TRUE + * if the pin is high, except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int skel_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret; + + gpioinfo("pin=%u\n", priv->addr); + + DEBUGASSERT(priv != NULL && pin < CONFIG_IOEXPANDER_NPINS && value != NULL); + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + + /* Read the pin value */ +#warning Missing logic + + /* Return the pin value via the value pointer */ +#warning Missing logic + + skel_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: skel_readbuf + * + * Description: + * Read the buffered pin level. + * This can be different from the actual pin state. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the level is stored. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int skel_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret; + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + + /* Read the buffered pin level */ +#warning Missing logic + + skel_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: skel_getmultibits + * + * Description: + * Read multiple bits from I/O Expander registers. + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int skel_getmultibits(FAR struct skel_dev_s *priv, FAR uint8_t *pins, + FAR bool *values, int count) +{ + ioe_pinset_t pinset; + int pin; + int ret = OK; + int i; + + /* Read the pinset from the IO-Expander hardware */ +#warning Missing logic + + /* Read the requested bits */ + + for (i = 0; i < count; i++) + { + pin = pins[i]; + if (pin >= CONFIG_IOEXPANDER_NPINS) + { + return -ENXIO; + } + + values[i] = ((pinset & (1 << pin) != 0); + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: skel_multiwritepin + * + * Description: + * Set the pin level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pins - The list of pin indexes to alter in this call + * val - The list of pin levels. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int skel_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + ioe_pinset_t pinset; + int pin; + int ret; + int i; + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + + /* Read the pinset from the IO-Expander hardware */ +#warning Missing logic + + /* Apply the user defined changes */ + + for (i = 0; i < count; i++) + { + pin = pins[i]; + if (pin >= CONFIG_IOEXPANDER_NPINS) + { + skel_unlock(priv); + return -ENXIO; + } + + if (values[i]) + { + pinset |= (1 << pin); + } + else + { + pinset &= ~(1 << pin); + } + } + + /* Now write back the new pins states */ +#warning Missing logic + + skel_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: skel_multireadpin + * + * Description: + * Read the actual level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The list of pin indexes to read + * valptr - Pointer to a buffer where the pin levels are stored. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int skel_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret; + + gpioinfo("count=%u\n", count); + + DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0); + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + ret = skel_getmultibits(priv, pins, values, count); + skel_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: skel_multireadbuf + * + * Description: + * Read the buffered level of multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the buffered levels are stored. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int skel_multireadbuf(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret; + + gpioinfo("count=%u\n", count); + + DEBUGASSERT(priv != NULL && pins != NULL && values != NULL && count > 0); + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + ret = skel_getmultibits(priv, pins, values, count); + skel_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: skel_attach + * + * Description: + * Attach a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * pinset - The set of pin events that will generate the callback + * callback - The pointer to callback function. NULL will detach the + * callback. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_skeleton_INT_ENABLE +static int skel_attach(FAR struct ioexpander_dev_s *dev, ioe_pinset_t pinset, + ioe_callback_t callback) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)dev; + int ret; + int i; + + /* Get exclusive access to the I/O Expander */ + + skel_lock(priv); + + /* Find and available in entry in the callback table */ + + ret = -ENOSPC; + for (i = 0; i < CONFIG_skeleton_INT_NCALLBACKS; i++) + { + /* Is this entry available (i.e., no callback attached) */ + + if (priv->cb[i].cbfunc == NULL) + { + /* Yes.. use this entry */ + + priv->cb[i].pinset = pinset; + priv->cb[i].cbfunc = callback; + ret = OK; + } + } + + /* Add this callback to the table */ + + skel_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: skel_irqworker + * + * Description: + * Handle GPIO interrupt events (this function actually executes in the + * context of the worker thread). + * + ****************************************************************************/ + +#ifdef CONFIG_skeleton_INT_ENABLE +static void skel_irqworker(void *arg) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s *)arg; + ioe_pinset_t pinset; + int ret; + int i; + + /* Read the pinset from the IO-Expander hardware */ +#warning Missing logic + + /* Perform pin interrupt callbacks */ + + for (i = 0; i < CONFIG_skeleton_INT_NCALLBACKS; i++) + { + /* Is this entry valid (i.e., callback attached)? If so, did andy of + * the requested pin interrupts occur? + */ + + if (priv->cb[i].cbfunc != NULL) + { + /* Did any of the requested pin interrupts occur? */ + + ioe_pinset_t match = pinset & priv->cb[i].pinset; + if (match != 0) + { + /* Yes.. perform the callback */ + + (void)priv->cb[i].cbfunc(&priv->dev, match); + } + } + } + + /* Re-enable interrupts */ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: skel_interrupt + * + * Description: + * Handle GPIO interrupt events (this function executes in the + * context of the interrupt). + * + * NOTE: A more typical prototype for an interrupt handler would be: + * + * int skel_interrupt(int irq, FAR void *context) + * + * However, it is assume that the lower half, board specific interface + * can provide intercept the actual interrupt, and call this function with + * the arg that can be mapped to the provide driver structure instance. + * + * Presumably the lower level interface provides an attach() method that + * provides both the address of skel_interrupt() as well as the arg value. + * + ****************************************************************************/ + +#ifdef CONFIG_skeleton_INT_ENABLE +static void skel_interrupt(FAR void *arg) +{ + FAR struct skel_dev_s *priv = (FAR struct skel_dev_s )arg; + + DEBUGASSERT(priv != NULL); + + /* Defer interrupt processing to the worker thread. This is not only + * much kinder in the use of system resources but is probably necessary + * to access the I/O expander device. + * + * Notice that further GPIO interrupts are disabled until the work is + * actually performed. This is to prevent overrun of the worker thread. + * Interrupts are re-enabled in skel_irqworker() when the work is + * completed. + */ + + if (work_available(&priv->work)) + { + /* Disable interrupts */ +#warning Missing logic + + /* Schedule interrupt related work on the high priority worker thread. */ + + work_queue(HPWORK, &priv->work, skel_irqworker, + (FAR void *)priv, 0); + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: skel_initialize + * + * Description: + * Initialize a I/O Expander device. + * + * NOTE: There are no arguments to the initialization function this + * skelton example. Typical implementations take two arguments: + * + * 1) A reference to an I2C or SPI interface used to interace with the + * device, and + * 2) A read-only configuration structure that provides things like: I2C + * or SPI characteristics and callbacks to attache, enable, and disable + * interrupts. + * + ****************************************************************************/ + +FAR struct ioexpander_dev_s *skel_initialize(void) +{ + FAR struct skel_dev_s *priv; + +#ifdef CONFIG_skeleton_MULTIPLE + /* Allocate the device state structure */ + + priv = (FAR struct skel_dev_s *)kmm_zalloc(sizeof(struct skel_dev_s)); + if (!priv) + { + gpioerr("ERROR: Failed to allocate driver instance\n"); + return NULL; + } +#else + /* Use the one-and-only I/O Expander driver instance */ + + priv = &g_skel; +#endif + + /* Initialize the device state structure */ + /* NOTE: Normally you would also save the I2C/SPI device interface and + * any configuration information here as well. + */ + + priv->dev.ops = &g_skel_ops; + +#ifdef CONFIG_skeleton_INT_ENABLE + /* Attach the I/O expander interrupt handler and enable interrupts */ +#warning Missing logic + +#endif + + sem_init(&priv->exclsem, 0, 1); + return &priv->dev; +} + +#endif /* CONFIG_IOEXPANDER_skeleton */ diff --git a/drivers/ioexpander/tca64xx.c b/drivers/ioexpander/tca64xx.c new file mode 100644 index 00000000000..b7eeb51119d --- /dev/null +++ b/drivers/ioexpander/tca64xx.c @@ -0,0 +1,1412 @@ +/**************************************************************************** + * include/nuttx/ioexpander/tca64xx.h + * Supports the following parts: TCA6408, TCA6416, TCA6424 + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * This header file derives, in part, from the Project Ara TCA64xx driver + * which has this copyright: + * + * Copyright (c) 2014-2015 Google Inc. + * All rights reserved. + * Author: Patrick Titiano, Jean Pihet + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "tca64xx.h" + +#ifdef CONFIG_IOEXPANDER_TCA64XX + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef MAX +# define MAX(a,b) (((a) > (b)) ? (a) : (b)) +#endif + +#ifndef MIN +# define MIN(a,b) (((a) < (b)) ? (a) : (b)) +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* TCA64xx Helpers */ + +static void tca64_lock(FAR struct tca64_dev_s *priv); +static FAR const struct tca64_part_s *tca64_getpart(FAR struct tca64_dev_s *priv); +static uint8_t tca64_ngpios(FAR struct tca64_dev_s *priv); +static uint8_t tca64_input_reg(FAR struct tca64_dev_s *priv, uint8_t pin); +static uint8_t tca64_output_reg(FAR struct tca64_dev_s *priv, uint8_t pin); +static uint8_t tca64_polarity_reg(FAR struct tca64_dev_s *priv, uint8_t pin); +static uint8_t tca64_config_reg(FAR struct tca64_dev_s *priv, uint8_t pin); +static int tca64_getreg(FAR struct tca64_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval, unsigned int count); +static int tca64_putreg(struct tca64_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval, unsigned int count); + +/* I/O Expander Methods */ + +static int tca64_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int dir); +static int tca64_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, void *regval); +static int tca64_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value); +static int tca64_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value); +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int tca64_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +static int tca64_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, int count); +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +static FAR void *tca64_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg); +static int tca64_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle); +#endif + +#ifdef CONFIG_TCA64XX_INT_ENABLE +static void tca64_int_update(FAR struct tca64_dev_s *priv, + ioe_pinset_t input, ioe_pinset_t mask); +static void tca64_register_update(FAR struct tca64_dev_s *priv); +static void tca64_irqworker(void *arg); +static void tca64_interrupt(FAR void *arg); +#ifdef CONFIG_TCA64XX_INT_POLL +static void tca64_poll_expiry(int argc, wdparm_t arg1, ...); +#endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifndef CONFIG_TCA64XX_MULTIPLE +/* If only a single device is supported, then the driver state structure may + * as well be pre-allocated. + */ + +static struct tca64_dev_s g_tca64; +#endif + +/* I/O expander vtable */ + +static const struct ioexpander_ops_s g_tca64_ops = +{ + tca64_direction, + tca64_option, + tca64_writepin, + tca64_readpin, + tca64_readpin +#ifdef CONFIG_IOEXPANDER_MULTIPIN + , tca64_multiwritepin + , tca64_multireadpin + , tca64_multireadpin +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + , tca64_attach + , tca64_detach +#endif +}; + +/* TCA64 part data */ + +static const struct tca64_part_s g_tca64_parts[TCA64_NPARTS] = +{ + { + TCA6408_PART, + MIN(TCA6408_NR_GPIOS, CONFIG_IOEXPANDER_NPINS), + TCA6408_INPUT_REG, + TCA6408_OUTPUT_REG, + TCA6408_POLARITY_REG, + TCA6408_CONFIG_REG, + }, + { + TCA6416_PART, + MIN(TCA6416_NR_GPIOS, CONFIG_IOEXPANDER_NPINS), + TCA6416_INPUT0_REG, + TCA6416_OUTPUT0_REG, + TCA6416_POLARITY0_REG, + TCA6416_CONFIG0_REG, + }, + { + TCA6424_PART, + MIN(TCA6424_NR_GPIOS, CONFIG_IOEXPANDER_NPINS), + TCA6424_INPUT0_REG, + TCA6424_OUTPUT0_REG, + TCA6424_POLARITY0_REG, + TCA6424_CONFIG0_REG, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tca64_lock + * + * Description: + * Get exclusive access to the I/O Expander + * + ****************************************************************************/ + +static void tca64_lock(FAR struct tca64_dev_s *priv) +{ + while (sem_wait(&priv->exclsem) < 0) + { + /* EINTR is the only expected error from sem_wait() */ + + DEBUGASSERT(errno == EINTR); + } +} + +#define tca64_unlock(p) sem_post(&(p)->exclsem) + +/**************************************************************************** + * Name: tca64_getpart + * + * Description: + * Look up information for the selected part + * + ****************************************************************************/ + +static FAR const struct tca64_part_s *tca64_getpart(FAR struct tca64_dev_s *priv) +{ + DEBUGASSERT(priv != NULL && priv->config != NULL && + priv->config->part < TCA64_NPARTS); + + return &g_tca64_parts[priv->config->part]; +} + +/**************************************************************************** + * Name: tca64_ngpios + * + * Description: + * Return the number of GPIOs supported by the selected part + * + ****************************************************************************/ + +static uint8_t tca64_ngpios(FAR struct tca64_dev_s *priv) +{ + FAR const struct tca64_part_s *part = tca64_getpart(priv); + return part->tp_ngpios; +} + +/**************************************************************************** + * Name: tca64_input_reg + * + * Description: + * Return the address of the input register for the specified pin. + * + ****************************************************************************/ + +static uint8_t tca64_input_reg(FAR struct tca64_dev_s *priv, uint8_t pin) +{ + FAR const struct tca64_part_s *part = tca64_getpart(priv); + uint8_t reg = part->tp_output; + + DEBUGASSERT(pin <= part->tp_ngpios); + return reg + (pin >> 3); +} + +/**************************************************************************** + * Name: tca64_output_reg + * + * Description: + * Return the address of the output register for the specified pin. + * + ****************************************************************************/ + +static uint8_t tca64_output_reg(FAR struct tca64_dev_s *priv, uint8_t pin) +{ + FAR const struct tca64_part_s *part = tca64_getpart(priv); + uint8_t reg = part->tp_output; + + DEBUGASSERT(pin <= part->tp_ngpios); + return reg + (pin >> 3); +} + +/**************************************************************************** + * Name: tca64_polarity_reg + * + * Description: + * Return the address of the polarity register for the specified pin. + * + ****************************************************************************/ + +static uint8_t tca64_polarity_reg(FAR struct tca64_dev_s *priv, uint8_t pin) +{ + FAR const struct tca64_part_s *part = tca64_getpart(priv); + uint8_t reg = part->tp_output; + + DEBUGASSERT(pin <= part->tp_ngpios); + return reg + (pin >> 3); +} + +/**************************************************************************** + * Name: tca64_config_reg + * + * Description: + * Return the address of the configuration register for the specified pin. + * + ****************************************************************************/ + +static uint8_t tca64_config_reg(FAR struct tca64_dev_s *priv, uint8_t pin) +{ + FAR const struct tca64_part_s *part = tca64_getpart(priv); + uint8_t reg = part->tp_config; + + DEBUGASSERT(pin <= part->tp_ngpios); + return reg + (pin >> 3); +} + +/**************************************************************************** + * Name: tca64_getreg + * + * Description: + * Read an 8-bit value from a TCA64xx register + * + ****************************************************************************/ + +static int tca64_getreg(FAR struct tca64_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval, unsigned int count) +{ + struct i2c_msg_s msg[2]; + int ret; + + DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL); + + /* Set up for the transfer */ + + msg[0].frequency = TCA64XX_I2C_MAXFREQUENCY, + msg[0].addr = priv->config->address, + msg[0].flags = 0, + msg[0].buffer = ®addr, + msg[0].length = 1, + + msg[1].frequency = TCA64XX_I2C_MAXFREQUENCY, + msg[1].addr = priv->config->address, + msg[1].flags = I2C_M_READ, + msg[1].buffer = regval, + msg[1].length = count, + + /* Perform the transfer */ + + ret = I2C_TRANSFER(priv->i2c, msg, 2); + if (ret < 0) + { + gpioerr("ERROR: I2C addr=%02x regaddr=%02x: failed, ret=%d!\n", + priv->config->address, regaddr, ret); + } + else + { + gpioinfo("I2C addr=%02x regaddr=%02x: read %02x\n", + priv->config->address, regaddr, *regval); + } + + return ret; +} + +/**************************************************************************** + * Name: tca64_putreg + * + * Description: + * Write an 8-bit value to a TCA64xx register + * + ****************************************************************************/ + +static int tca64_putreg(struct tca64_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval, unsigned int count) +{ + struct i2c_msg_s msg[1]; + uint8_t cmd[2]; + int ret; + int i; + + DEBUGASSERT(priv != NULL && priv->i2c != NULL && priv->config != NULL); + + /* Set up for the transfer */ + + cmd[0] = regaddr; + + for (i = 0; i < count; i++) + { + cmd[i+1] = regval[i]; + } + + msg[0].frequency = TCA64XX_I2C_MAXFREQUENCY, + msg[0].addr = priv->config->address, + msg[0].flags = 0, + msg[0].buffer = cmd, + msg[0].length = count + 1, + + ret = I2C_TRANSFER(priv->i2c, msg, 1); + if (ret < 0) + { + gpioerr("ERROR: claddr=%02x, regaddr=%02x: failed, ret=%d!\n", + priv->config->address, regaddr, ret); + } + else + { + gpioinfo("claddr=%02x, regaddr=%02x, regval=%02x\n", + priv->config->address, regaddr, regval); + } + + return ret; +} + +/**************************************************************************** + * Name: tca64_direction + * + * Description: + * Set the direction of an ioexpander pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * dir - One of the IOEXPANDER_DIRECTION_ macros + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int tca64_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int direction) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + uint8_t regaddr; + uint8_t regval; + int ret; + + DEBUGASSERT(priv != NULL && priv->config != NULL && + pin < CONFIG_IOEXPANDER_NPINS && + (direction == IOEXPANDER_DIRECTION_IN || + direction == IOEXPANDER_DIRECTION_OUT)); + + gpioinfo("I2C addr=%02x pin=%u direction=%s\n", + priv->config->address, pin, + (direction == IOEXPANDER_DIRECTION_IN) ? "IN" : "OUT"); + + /* Get exclusive access to the I/O Expander */ + + tca64_lock(priv); + + /* Read the Configuration Register associated with this pin. The + * Configuration Register configures the direction of the I/O pins. + */ + + regaddr = tca64_config_reg(priv, pin); + ret = tca64_getreg(priv, regaddr, ®val, 1); + if (ret < 0) + { + gpioerr("ERROR: Failed to read config register at %u: %d\n", + regaddr, ret); + goto errout_with_lock; + } + + /* Set the pin direction in the I/O Expander */ + + if (direction == IOEXPANDER_DIRECTION_IN) + { + /* Configure pin as input. If a bit in the configuration register is + * set to 1, the corresponding port pin is enabled as an input with a + * high-impedance output driver. + */ + + regval |= (1 << (pin & 7)); + } + else /* if (direction == IOEXPANDER_DIRECTION_OUT) */ + { + /* Configure pin as output. If a bit in this register is cleared to + * 0, the corresponding port pin is enabled as an output. + * + * REVISIT: The value of output has not been selected! This might + * put a glitch on the output. + */ + + regval &= ~(1 << (pin & 7)); + } + + /* Write back the modified register content */ + + ret = tca64_putreg(priv, regaddr, ®val, 1); + if (ret < 0) + { + gpioerr("ERROR: Failed to write config register at %u: %d\n", + regaddr, ret); + } + +errout_with_lock: + tca64_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: tca64_option + * + * Description: + * Set pin options. Required. + * Since all IO expanders have various pin options, this API allows setting + * pin options in a flexible way. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * opt - One of the IOEXPANDER_OPTION_ macros + * val - The option's value + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int tca64_option(FAR struct ioexpander_dev_s *dev, uint8_t pin, + int opt, FAR void *value) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + int ret = -ENOSYS; + + DEBUGASSERT(priv != NULL && priv->config != NULL); + + gpioinfo("I2C addr=%02x pin=%u option=%u\n", + priv->config->address, pin, opt); + + /* Check for pin polarity inversion. The Polarity Inversion Register + * allows polarity inversion of pins defined as inputs by the + * Configuration Register. If a bit in this register is set, the + * corresponding port pin's polarity is inverted. If a bit in this + * register is cleared, the corresponding port pin's original polarity + * is retained. + */ + + if (opt == IOEXPANDER_OPTION_INVERT) + { + unsigned int ival = (unsigned int)((uintptr_t)value); + uint8_t regaddr; + uint8_t polarity; + + /* Get exclusive access to the I/O Expander */ + + tca64_lock(priv); + + /* Read the polarity register */ + + regaddr = tca64_polarity_reg(priv, pin); + ret = tca64_getreg(priv, regaddr, &polarity, 1); + if (ret < 0) + { + gpioerr("ERROR: Failed to read polarity register at %u: %d\n", + regaddr, ret); + tca64_unlock(priv); + return ret; + } + + /* Set/clear the pin option */ + + if (ival == IOEXPANDER_OPTION_INVERT) + { + polarity |= (1 << (pin & 7)); + } + else + { + polarity &= ~(1 << (pin & 7)); + } + + /* Write back the modified register */ + + ret = tca64_putreg(priv, regaddr, &polarity, 1); + if (ret < 0) + { + gpioerr("ERROR: Failed to read polarity register at %u: %d\n", + regaddr, ret); + } + + tca64_unlock(priv); + } + +#ifdef CONFIG_TCA64XX_INT_ENABLE + /* Interrupt configuration */ + + else if (opt == IOEXPANDER_OPTION_INTCFG) + { + unsigned int ival = (unsigned int)((uintptr_t)value); + ioe_pinset_t bit = ((ioe_pinset_t)1 << pin); + + ret = OK; + tca64_lock(priv); + switch (ival) + { + case IOEXPANDER_VAL_HIGH: /* Interrupt on high level */ + priv->trigger &= ~bit; + priv->level[0] |= bit; + priv->level[1] &= ~bit; + break; + + case IOEXPANDER_VAL_LOW: /* Interrupt on low level */ + priv->trigger &= ~bit; + priv->level[0] &= ~bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_RISING: /* Interrupt on rising edge */ + priv->trigger |= bit; + priv->level[0] |= bit; + priv->level[1] &= ~bit; + break; + + case IOEXPANDER_VAL_FALLING: /* Interrupt on falling edge */ + priv->trigger |= bit; + priv->level[0] &= ~bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_BOTH: /* Interrupt on both edges */ + priv->trigger |= bit; + priv->level[0] |= bit; + priv->level[1] |= bit; + break; + + case IOEXPANDER_VAL_DISABLE: + break; + + default: + ret = -EINVAL; + } + + tca64_unlock(priv); + } +#endif + + return ret; +} + +/**************************************************************************** + * Name: tca64_writepin + * + * Description: + * Set the pin level. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin to alter in this call + * val - The pin level. Usually TRUE will set the pin high, + * except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int tca64_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + bool value) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + uint8_t regaddr; + uint8_t regval; + int ret; + + DEBUGASSERT(priv != NULL && priv->config != NULL && + pin < CONFIG_IOEXPANDER_NPINS); + + gpioinfo("I2C addr=%02x pin=%u value=%u\n", + priv->config->address, pin, value); + + /* Get exclusive access to the I/O Expander */ + + tca64_lock(priv); + + /* Read the output register. */ + + regaddr = tca64_output_reg(priv, pin); + ret = tca64_getreg(priv, regaddr, ®val, 1); + if (ret < 0) + { + gpioerr("ERROR: Failed to read output register at %u: %d\n", + regaddr, ret); + goto errout_with_lock; + } + + /* Set output pins default value (before configuring it as output) The + * Output Port Register shows the outgoing logic levels of the pins + * defined as outputs by the Configuration Register. + */ + + if (value != 0) + { + regval |= (1 << (pin & 7)); + } + else + { + regval &= ~(1 << (pin & 7)); + } + + /* Write the modified output register value */ + + ret = tca64_putreg(priv, regaddr, ®val, 1); + if (ret < 0) + { + gpioerr("ERROR: Failed to write output register at %u: %d\n", + regaddr, ret); + } + +errout_with_lock: + tca64_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: tca64_readpin + * + * Description: + * Read the actual PIN level. This can be different from the last value written + * to this pin. Required. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The index of the pin + * valptr - Pointer to a buffer where the pin level is stored. Usually TRUE + * if the pin is high, except if OPTION_INVERT has been set on this pin. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int tca64_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin, + FAR bool *value) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + uint8_t regaddr; + uint8_t regval; + int ret; + + DEBUGASSERT(priv != NULL && priv->config != NULL && + pin < CONFIG_IOEXPANDER_NPINS && value != NULL); + + gpioinfo("I2C addr=%02x, pin=%u\n", priv->config->address, pin); + + /* Get exclusive access to the I/O Expander */ + + tca64_lock(priv); + + /* Read the input register for this pin + * + * The Input Port Register reflects the incoming logic levels of the pins, + * regardless of whether the pin is defined as an input or an output by + * the Configuration Register. They act only on read operation. + */ + + regaddr = tca64_input_reg(priv, pin); + ret = tca64_getreg(priv, regaddr, ®val, 1); + if (ret < 0) + { + gpioerr("ERROR: Failed to read input register at %u: %d\n", + regaddr, ret); + goto errout_with_lock; + } + +#ifdef CONFIG_TCA64XX_INT_ENABLE + /* Update the input status with the 8 bits read from the expander */ + + tca64_int_update(priv, (ioe_pinset_t)regval << (pin & ~7), + (ioe_pinset_t)0xff << (pin & ~7)); +#endif + + /* Return 0 or 1 to indicate the state of pin */ + + *value = (bool)((regval >> (pin & 7)) & 1); + ret = OK; + +errout_with_lock: + tca64_unlock(priv); + return ret; +} + +/**************************************************************************** + * Name: tca64_multiwritepin + * + * Description: + * Set the pin level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pins - The list of pin indexes to alter in this call + * val - The list of pin levels. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int tca64_multiwritepin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + ioe_pinset_t pinset; + uint8_t regaddr; + uint8_t ngpios; + uint8_t nregs; + uint8_t pin; + int ret; + int i; + + /* Get exclusive access to the I/O Expander */ + + tca64_lock(priv); + + /* Read the output registers for pin 0 through the number of supported + * pins. + */ + + ngpios = tca64_ngpios(priv); + nregs = (ngpios + 7) >> 3; + pinset = 0; + regaddr = tca64_output_reg(priv, 0); + + ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs); + if (ret < 0) + { + gpioerr("ERROR: Failed to read %u ouput registers at %u: %d\n", + nregs, regaddr, ret); + goto errout_with_lock; + } + + /* Apply the user defined changes */ + + for (i = 0; i < count; i++) + { + pin = pins[i]; + DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS); + + if (values[i]) + { + pinset |= (1 << pin); + } + else + { + pinset &= ~(1 << pin); + } + } + + /* Now write back the new pins states */ + + ret = tca64_putreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs); + if (ret < 0) + { + gpioerr("ERROR: Failed to write %u output registers at %u: %d\n", + nregs, regaddr, ret); + } + +errout_with_lock: + tca64_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: tca64_multireadpin + * + * Description: + * Read the actual level for multiple pins. This routine may be faster than + * individual pin accesses. Optional. + * + * Input Parameters: + * dev - Device-specific state data + * pin - The list of pin indexes to read + * valptr - Pointer to a buffer where the pin levels are stored. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_MULTIPIN +static int tca64_multireadpin(FAR struct ioexpander_dev_s *dev, + FAR uint8_t *pins, FAR bool *values, + int count) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + ioe_pinset_t pinset; + uint8_t regaddr; + uint8_t ngpios; + uint8_t nregs; + uint8_t pin; + int ret; + int i; + + DEBUGASSERT(priv != NULL && priv->config != NULL && pins != NULL && + values != NULL && count > 0); + + gpioinfo("I2C addr=%02x, count=%u\n", priv->config->address, count); + + /* Get exclusive access to the I/O Expander */ + + tca64_lock(priv); + + /* Read the input register for pin 0 through the number of supported pins. + * + * The Input Port Register reflects the incoming logic levels of the pins, + * regardless of whether the pin is defined as an input or an output by + * the Configuration Register. They act only on read operation. + */ + + ngpios = tca64_ngpios(priv); + nregs = (ngpios + 7) >> 3; + pinset = 0; + regaddr = tca64_input_reg(priv, 0); + + ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs); + if (ret < 0) + { + gpioerr("ERROR: Failed to read input %u registers at %u: %d\n", + nregs, regaddr, ret); + goto errout_with_lock; + } + + /* Update the input status with the 8 bits read from the expander */ + + for (i = 0; i < count; i++) + { + pin = pins[i]; + DEBUGASSERT(pin < CONFIG_IOEXPANDER_NPINS); + + values[i] = ((pinset & (1 << pin)) != 0); + } + +#ifdef CONFIG_TCA64XX_INT_ENABLE + /* Update the input status with the 32 bits read from the expander */ + + tca64_int_update(priv, pinset, PINSET_ALL); +#endif + +errout_with_lock: + tca64_unlock(priv); + return ret; +} +#endif + +/**************************************************************************** + * Name: tca64_attach + * + * Description: + * Attach and enable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * pinset - The set of pin events that will generate the callback + * callback - The pointer to callback function. NULL will detach the + * callback. + * arg - User-provided callback argument + * + * Returned Value: + * A non-NULL handle value is returned on success. This handle may be + * used later to detach and disable the pin interrupt. + * + ****************************************************************************/ + +#ifdef CONFIG_TCA64XX_INT_ENABLE +static FAR void *tca64_attach(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, ioe_callback_t callback, + FAR void *arg) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + FAR void *handle = NULL; + int i; + + /* Get exclusive access to the I/O Expander */ + + tca64_lock(priv); + + /* Find and available in entry in the callback table */ + + for (i = 0; i < CONFIG_TCA64XX_INT_NCALLBACKS; i++) + { + /* Is this entry available (i.e., no callback attached) */ + + if (priv->cb[i].cbfunc == NULL) + { + /* Yes.. use this entry */ + + priv->cb[i].pinset = pinset; + priv->cb[i].cbfunc = callback; + priv->cb[i].cbarg = arg; + handle = &priv->cb[i]; + break; + } + } + + tca64_unlock(priv); + return handle; +} +#endif + +/**************************************************************************** + * Name: tca64_detach + * + * Description: + * Detach and disable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * handle - The non-NULL opaque value return by tca64_attch() + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +static int tca64_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)dev; + FAR struct tca64_callback_s *cb = (FAR struct tca64_callback_s *)handle; + + DEBUGASSERT(priv != NULL && cb != NULL); + DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&priv->cb[0] && + (uintptr_t)cb <= (uintptr_t)&priv->cb[CONFIG_TCA64XX_INT_NCALLBACKS-1]); + UNUSED(priv); + + cb->pinset = 0; + cb->cbfunc = NULL; + cb->cbarg = NULL; + return OK; +} + +/**************************************************************************** + * Name: tca64_int_update + * + * Description: + * Check for pending interrupts. + * + ****************************************************************************/ + +#ifdef CONFIG_TCA64XX_INT_ENABLE +static void tca64_int_update(FAR struct tca64_dev_s *priv, ioe_pinset_t input, + ioe_pinset_t mask) +{ + ioe_pinset_t diff; + irqstate_t flags; + int ngios = tca64_ngpios(priv); + int pin; + + flags = enter_critical_section(); + + /* Check the changed bits from last read */ + + input = (priv->input & ~mask) | (input & mask); + diff = priv->input ^ input; + priv->input = input; + + /* TCA64XX doesn't support irq trigger, we have to do this in software. */ + + for (pin = 0; pin < ngios; pin++) + { + if (TCA64_EDGE_SENSITIVE(priv, pin)) + { + /* Edge triggered. Was there a change in the level? */ + + if ((diff & 1) != 0) + { + /* Set interrupt as a function of edge type */ + + if (((input & 1) == 0 && TCA64_EDGE_FALLING(priv, pin)) || + ((input & 1) != 0 && TCA64_EDGE_RISING(priv, pin))) + { + priv->intstat |= 1 << pin; + } + } + } + else /* if (TCA64_LEVEL_SENSITIVE(priv, pin)) */ + { + /* Level triggered. Set intstat bit if match in level type. */ + + if (((input & 1) != 0 && TCA64_LEVEL_HIGH(priv, pin)) || + ((input & 1) == 0 && TCA64_LEVEL_LOW(priv, pin))) + { + priv->intstat |= 1 << pin; + } + } + + diff >>= 1; + input >>= 1; + } + + leave_critical_section(flags); +} +#endif + +/**************************************************************************** + * Name: tc64_update_registers + * + * Description: + * Read all pin states and update pending interrupts. + * + * Input Parameters: + * dev - Device-specific state data + * pins - The list of pin indexes to alter in this call + * val - The list of pin levels. + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_TCA64XX_INT_ENABLE +static void tca64_register_update(FAR struct tca64_dev_s *priv) +{ + ioe_pinset_t pinset; + uint8_t regaddr; + uint8_t ngpios; + uint8_t nregs; + int ret; + + /* Read the input register for pin 0 through the number of supported pins. + * + * The Input Port Register reflects the incoming logic levels of the pins, + * regardless of whether the pin is defined as an input or an output by + * the Configuration Register. They act only on read operation. + */ + + ngpios = tca64_ngpios(priv); + nregs = (ngpios + 7) >> 3; + pinset = 0; + regaddr = tca64_input_reg(priv, 0); + + ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs); + if (ret < 0) + { + gpioerr("ERROR: Failed to read input %u registers at %u: %d\n", + nregs, regaddr, ret); + return; + } + + /* Update the input status with the 32 bits read from the expander */ + + tca64_int_update(priv, pinset, PINSET_ALL); +} +#endif + +/**************************************************************************** + * Name: tca64_irqworker + * + * Description: + * Handle GPIO interrupt events (this function actually executes in the + * context of the worker thread). + * + ****************************************************************************/ + +#ifdef CONFIG_TCA64XX_INT_ENABLE +static void tca64_irqworker(void *arg) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)arg; + ioe_pinset_t pinset; + uint8_t regaddr; + uint8_t ngpios; + uint8_t nregs; + int ret; + int i; + + DEBUGASSERT(priv != NULL && priv->config != NULL); + + /* Get exclusive access to read inputs and assess pending interrupts. */ + + tca64_lock(priv); + + /* Read the input register for pin 0 through the number of supported pins. + * + * The Input Port Register reflects the incoming logic levels of the pins, + * regardless of whether the pin is defined as an input or an output by + * the Configuration Register. They act only on read operation. + */ + + ngpios = tca64_ngpios(priv); + nregs = (ngpios + 7) >> 3; + pinset = 0; + regaddr = tca64_input_reg(priv, 0); + + ret = tca64_getreg(priv, regaddr, (FAR uint8_t *)&pinset, nregs); + if (ret < 0) + { + gpioerr("ERROR: Failed to read input %u registers at %u: %d\n", + nregs, regaddr, ret); + tca64_unlock(priv); + goto errout_with_restart; + } + + /* Update the input status with the 32 bits read from the expander */ + + tca64_int_update(priv, pinset, PINSET_ALL); + + /* Sample and clear the pending interrupts. */ + + pinset = priv->intstat; + priv->intstat = 0; + tca64_unlock(priv); + + /* Perform pin interrupt callbacks */ + + for (i = 0; i < CONFIG_TCA64XX_INT_NCALLBACKS; i++) + { + /* Is this entry valid (i.e., callback attached)? */ + + if (priv->cb[i].cbfunc != NULL) + { + /* Did any of the requested pin interrupts occur? */ + + ioe_pinset_t match = pinset & priv->cb[i].pinset; + if (match != 0) + { + /* Yes.. perform the callback */ + + (void)priv->cb[i].cbfunc(&priv->dev, match, + priv->cb[i].cbarg); + } + } + } + +errout_with_restart: + +#ifdef CONFIG_TCA64XX_INT_POLL + /* Check for pending interrupts */ + + tca64_register_update(priv); + + /* Re-start the poll timer */ + + sched_lock(); + ret = wd_start(priv->wdog, TCA64XX_POLLDELAY, (wdentry_t)tca64_poll_expiry, + 1, (wdparm_t)priv); + if (ret < 0) + { + gpioerr("ERROR: Failed to start poll timer\n"); + } +#endif + + /* Re-enable interrupts */ + + priv->config->enable(priv->config, true); + +#ifdef CONFIG_TCA64XX_INT_POLL + sched_unlock(); +#endif +} +#endif + +/**************************************************************************** + * Name: tca64_interrupt + * + * Description: + * Handle GPIO interrupt events (this function executes in the + * context of the interrupt). + * + ****************************************************************************/ + +#ifdef CONFIG_TCA64XX_INT_ENABLE +static void tca64_interrupt(FAR void *arg) +{ + FAR struct tca64_dev_s *priv = (FAR struct tca64_dev_s *)arg; + + DEBUGASSERT(priv != NULL && priv->config != NULL); + + /* Defer interrupt processing to the worker thread. This is not only + * much kinder in the use of system resources but is probably necessary + * to access the I/O expander device. + * + * Notice that further GPIO interrupts are disabled until the work is + * actually performed. This is to prevent overrun of the worker thread. + * Interrupts are re-enabled in tca64_irqworker() when the work is + * completed. + */ + + if (work_available(&priv->work)) + { +#ifdef CONFIG_TCA64XX_INT_POLL + /* Cancel the poll timer */ + + (void)wd_cancel(priv->wdog); +#endif + + /* Disable interrupts */ + + priv->config->enable(priv->config, false); + + /* Schedule interrupt related work on the high priority worker thread. */ + + work_queue(HPWORK, &priv->work, tca64_irqworker, + (FAR void *)priv, 0); + } +} +#endif + +/**************************************************************************** + * Name: tca64_poll_expiry + * + * Description: + * The poll timer has expired; check for missed interrupts + * + * Input Parameters: + * Standard wdog expiration arguments. + * + ****************************************************************************/ + +#if defined(CONFIG_TCA64XX_INT_ENABLE) && defined(CONFIG_TCA64XX_INT_POLL) +static void tca64_poll_expiry(int argc, wdparm_t arg1, ...) +{ + FAR struct tca64_dev_s *priv; + + DEBUGASSERT(argc == 1); + priv = (FAR struct tca64_dev_s *)arg1; + DEBUGASSERT(priv != NULL && priv->config != NULL); + + /* Defer interrupt processing to the worker thread. This is not only + * much kinder in the use of system resources but is probably necessary + * to access the I/O expander device. + * + * Notice that further GPIO interrupts are disabled until the work is + * actually performed. This is to prevent overrun of the worker thread. + * Interrupts are re-enabled in tca64_irqworker() when the work is + * completed. + */ + + if (work_available(&priv->work)) + { + /* Disable interrupts */ + + priv->config->enable(priv->config, false); + + /* Schedule interrupt related work on the high priority worker thread. */ + + work_queue(HPWORK, &priv->work, tca64_irqworker, + (FAR void *)priv, 0); + } +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tca64_initialize + * + * Description: + * Instantiate and configure the TCA64xx device driver to use the provided + * I2C device instance. + * + * Input Parameters: + * i2c - An I2C driver instance + * minor - The device i2c address + * config - Persistent board configuration data + * + * Returned Value: + * an ioexpander_dev_s instance on success, NULL on failure. + * + ****************************************************************************/ + +FAR struct ioexpander_dev_s *tca64_initialize(FAR struct i2c_master_s *i2c, + FAR struct tca64_config_s *config) +{ + FAR struct tca64_dev_s *priv; + int ret; + +#ifdef CONFIG_TCA64XX_MULTIPLE + /* Allocate the device state structure */ + + priv = (FAR struct tca64_dev_s *)kmm_zalloc(sizeof(struct tca64_dev_s)); + if (!priv) + { + gpioerr("ERROR: Failed to allocate driver instance\n"); + return NULL; + } +#else + /* Use the one-and-only I/O Expander driver instance */ + + priv = &g_tca64; +#endif + + /* Initialize the device state structure */ + + priv->dev.ops = &g_tca64_ops; + priv->i2c = i2c; + priv->config = config; + +#ifdef CONFIG_TCA64XX_INT_ENABLE + /* Initial interrupt state: Edge triggered on both edges */ + + priv->trigger = PINSET_ALL; /* All edge triggered */ + priv->level[0] = PINSET_ALL; /* All rising edge */ + priv->level[1] = PINSET_ALL; /* All falling edge */ + +#ifdef CONFIG_TCA64XX_INT_POLL + /* Set up a timer to poll for missed interrupts */ + + priv->wdog = wd_create(); + DEBUGASSERT(priv->wdog != NULL); + + ret = wd_start(priv->wdog, TCA64XX_POLLDELAY, (wdentry_t)tca64_poll_expiry, + 1, (wdparm_t)priv); + if (ret < 0) + { + gpioerr("ERROR: Failed to start poll timer\n"); + } +#endif + + /* Attach the I/O expander interrupt handler and enable interrupts */ + + priv->config->attach(config, tca64_interrupt, priv); + priv->config->enable(config, true); +#endif + + sem_init(&priv->exclsem, 0, 1); + return &priv->dev; +} + +#endif /* CONFIG_IOEXPANDER_TCA64XX */ diff --git a/drivers/ioexpander/tca64xx.h b/drivers/ioexpander/tca64xx.h new file mode 100644 index 00000000000..dbe9557b455 --- /dev/null +++ b/drivers/ioexpander/tca64xx.h @@ -0,0 +1,244 @@ +/******************************************************************************************** + * drivers/ioexpander/tca64.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Sebastien Lorquet + * + * References: + * "16-bit I2C-bus and SMBus I/O port with interrupt product datasheet", + * Rev. 08 - 22 October 2009, NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __DRIVERS_IOEXPANDER_TCA64XX_H +#define __DRIVERS_IOEXPANDER_TCA64XX_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include + +#include + +#include +#include + +#include +#include +#include + +#include +#include + +#if defined(CONFIG_IOEXPANDER) && defined(CONFIG_IOEXPANDER_TCA64XX) + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +/* Configuration ****************************************************************************/ +/* Prerequisites: + * CONFIG_I2C + * I2C support is required + * CONFIG_IOEXPANDER + * Enables I/O expander support + * + * Other settings that effect the driver: CONFIG_DISABLE_POLL + * + * CONFIG_IOEXPANDER_TCA64XX + * Enables support for the TCA64XX driver (Needs CONFIG_INPUT) + * CONFIG_TCA64XX_MULTIPLE + * Can be defined to support multiple TCA64XX devices on board. + * CONFIG_TCA64XX_INT_NCALLBACKS + * Maximum number of supported pin interrupt callbacks. + * CONFIG_TCA64XX_INT_POLL + * Enables a poll for missed interrupts + * CONFIG_TCA64XX_INT_POLLDELAY + * If CONFIG_TCA64XX_INT_POLL=y, then this is the delay in microseconds + * between polls for missed interrupts. + */ + +#ifndef CONFIG_I2C +# error "CONFIG_I2C is required by TCA64XX" +#endif + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +# ifndef CONFIG_TCA64XX_INT_NCALLBACKS +# define CONFIG_TCA64XX_INT_NCALLBACKS 4 +# endif +#endif + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +# ifndef CONFIG_SCHED_WORKQUEUE +# error Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected. +# endif +#endif + +#ifndef CONFIG_TCA64XX_INT_POLLDELAY +# define CONFIG_TCA64XX_INT_POLLDELAY 500000 +#endif + +/* TCA64XX Definitions **********************************************************************/ + +/* I2C frequency */ + +#define TCA64XX_I2C_MAXFREQUENCY 400000 /* 400KHz */ + +/* TCA64XX Parts ****************************************************************************/ + +#define TCA6408_INPUT_REG 0x00 +#define TCA6408_OUTPUT_REG 0x01 +#define TCA6408_POLARITY_REG 0x02 +#define TCA6408_CONFIG_REG 0x03 + +#define TCA6408_NR_GPIOS 8 + +#define TCA6416_INPUT0_REG 0x00 +#define TCA6416_INPUT1_REG 0x01 +#define TCA6416_OUTPUT0_REG 0x02 +#define TCA6416_OUTPUT1_REG 0x03 +#define TCA6416_POLARITY0_REG 0x04 +#define TCA6416_POLARITY1_REG 0x05 +#define TCA6416_CONFIG0_REG 0x06 +#define TCA6416_CONFIG1_REG 0x07 + +#define TCA6416_NR_GPIOS 16 + +#define TCA6424_INPUT0_REG 0x00 +#define TCA6424_INPUT1_REG 0x01 +#define TCA6424_INPUT2_REG 0x02 +#define TCA6424_OUTPUT0_REG 0x04 +#define TCA6424_OUTPUT1_REG 0x05 +#define TCA6424_OUTPUT2_REG 0x06 +#define TCA6424_POLARITY0_REG 0x08 +#define TCA6424_POLARITY1_REG 0x09 +#define TCA6424_POLARITY2_REG 0x0A +#define TCA6424_CONFIG0_REG 0x0C +#define TCA6424_CONFIG1_REG 0x0D +#define TCA6424_CONFIG2_REG 0x0E + +#define TCA6424_NR_GPIOS 24 + +#define TCA64XX_NR_GPIO_MAX TCA6424_NR_GPIOS + +/* 1us (datasheet: reset pulse duration (Tw) is 4ns */ + +#define TCA64XX_TW 1 + +/* 1us (datasheet: time to reset (Treset) is 600ns */ + +#define TCA64XX_TRESET 1 + +#define TCA64XX_IRQ_TYPE_EDGE_BOTH 0x00000000 +#define TCA64XX_IRQ_TYPE_EDGE_RISING 0x00000001 +#define TCA64XX_IRQ_TYPE_EDGE_FALLING 0x00000002 +#define TCA64XX_IRQ_TYPE_LEVEL_HIGH 0x00000001 +#define TCA64XX_IRQ_TYPE_LEVEL_LOW 0x00000002 + +#define TCA64XX_IRQ_TYPE_EDGE 0x00000000 +#define TCA64XX_IRQ_TYPE_LEVEL 0x00000001 + +#define TCA64XX_POLLDELAY (CONFIG_TCA64XX_INT_POLLDELAY / USEC_PER_TICK) + +#define TCA64_LEVEL_SENSITIVE(d,p) \ + (((d)->trigger & ((ioe_pinset_t)1 << (p))) == 0) +#define TCA64_LEVEL_HIGH(d,p) \ + (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0) +#define TCA64_LEVEL_LOW(d,p) \ + (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0) + +#define TCA64_EDGE_SENSITIVE(d,p) \ + (((d)->trigger & ((ioe_pinset_t)1 << (p))) != 0) +#define TCA64_EDGE_RISING(d,p) \ + (((d)->level[0] & ((ioe_pinset_t)1 << (p))) != 0) +#define TCA64_EDGE_FALLING(d,p) \ + (((d)->level[1] & ((ioe_pinset_t)1 << (p))) != 0) +#define TCA64_EDGE_BOTH(d,p) \ + (TCA64_LEVEL_RISING(d,p) && TCA64_LEVEL_FALLING(d,p)) + +/******************************************************************************************** + * Public Types + ********************************************************************************************/ + +/* This structure represents the configuration of one part */ + +struct tca64_part_s +{ + uint8_t tp_id; /* Part ID (see enum tca64xx_part_e) */ + uint8_t tp_ngpios; /* Number of supported GPIOs */ + uint8_t tp_input; /* Address of first input register */ + uint8_t tp_output; /* Address of first output register */ + uint8_t tp_polarity; /* Address of first polarity register */ + uint8_t tp_config; /* Address of first configuration register */ +}; + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +/* This type represents on registered pin interrupt callback */ + +struct tca64_callback_s +{ + ioe_pinset_t pinset; /* Set of pin interrupts that will generate + * the callback. */ + ioe_callback_t cbfunc; /* The saved callback function pointer */ + FAR void *cbarg; /* Callback argument */ +}; +#endif + +/* This structure represents the state of the TCA64XX driver */ + +struct tca64_dev_s +{ + struct ioexpander_dev_s dev; /* Nested structure to allow casting as public gpio + * expander. */ + FAR struct tca64_config_s *config; /* Board configuration data */ + FAR struct i2c_master_s *i2c; /* Saved I2C driver instance */ + uint8_t part; /* TCA64xx part ID (see enum tca64xx_part_e) */ + sem_t exclsem; /* Mutual exclusion */ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +#ifdef CONFIG_TCA64XX_INT_POLL + WDOG_ID wdog; /* Timer used to poll for missed interrupts */ +#endif + + ioe_pinset_t input; /* Last input registeres */ + ioe_pinset_t intstat; /* Pending interrupts */ + ioe_pinset_t trigger; /* Bit encoded: 0=level 1=edge */ + ioe_pinset_t level[2]; /* Bit encoded: 01=high/rising, 10 low/falling, 11 both */ + struct work_s work; /* Supports the interrupt handling "bottom half" */ + + /* Saved callback information for each I/O expander client */ + + struct tca64_callback_s cb[CONFIG_TCA64XX_INT_NCALLBACKS]; +#endif +}; + +#endif /* CONFIG_IOEXPANDER && CONFIG_IOEXPANDER_TCA64XX */ +#endif /* __DRIVERS_IOEXPANDER_TCA64XX_H */ diff --git a/drivers/leds/rgbled.c b/drivers/leds/rgbled.c index 88eb2f62233..81b2ff55916 100644 --- a/drivers/leds/rgbled.c +++ b/drivers/leds/rgbled.c @@ -55,7 +55,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/mmcsd/mmcsd_sdio.c b/drivers/mmcsd/mmcsd_sdio.c index 46ee65a9d54..dbdf4e98ca8 100644 --- a/drivers/mmcsd/mmcsd_sdio.c +++ b/drivers/mmcsd/mmcsd_sdio.c @@ -61,7 +61,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/mtd/filemtd.c b/drivers/mtd/filemtd.c index 57c4f3d8349..6154de1d2d9 100644 --- a/drivers/mtd/filemtd.c +++ b/drivers/mtd/filemtd.c @@ -115,19 +115,19 @@ static ssize_t filemtd_write(FAR struct file_dev_s *priv, size_t offset, /* MTD driver methods */ -static int file_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int filemtd_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks); -static ssize_t file_bread(FAR struct mtd_dev_s *dev, off_t startblock, +static ssize_t filemtd_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, FAR uint8_t *buf); -static ssize_t file_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, +static ssize_t filemtd_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, FAR const uint8_t *buf); -static ssize_t file_byteread(FAR struct mtd_dev_s *dev, off_t offset, +static ssize_t filemtd_byteread(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, FAR uint8_t *buf); #ifdef CONFIG_MTD_BYTE_WRITE static ssize_t file_bytewrite(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, FAR const uint8_t *buf); #endif -static int file_ioctl(FAR struct mtd_dev_s *dev, int cmd, +static int filemtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); /**************************************************************************** @@ -236,10 +236,10 @@ static ssize_t filemtd_read(FAR struct file_dev_s *priv, } /**************************************************************************** - * Name: file_erase + * Name: filemtd_erase ****************************************************************************/ -static int file_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int filemtd_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks) { FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev; @@ -289,10 +289,10 @@ static int file_erase(FAR struct mtd_dev_s *dev, off_t startblock, } /**************************************************************************** - * Name: file_bread + * Name: filemtd_bread ****************************************************************************/ -static ssize_t file_bread(FAR struct mtd_dev_s *dev, off_t startblock, +static ssize_t filemtd_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, FAR uint8_t *buf) { FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev; @@ -329,10 +329,10 @@ static ssize_t file_bread(FAR struct mtd_dev_s *dev, off_t startblock, } /**************************************************************************** - * Name: file_bwrite + * Name: filemtd_bwrite ****************************************************************************/ -static ssize_t file_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, +static ssize_t filemtd_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, FAR const uint8_t *buf) { FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev; @@ -369,10 +369,10 @@ static ssize_t file_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, } /**************************************************************************** - * Name: file_byteread + * Name: filemtd_byteread ****************************************************************************/ -static ssize_t file_byteread(FAR struct mtd_dev_s *dev, off_t offset, +static ssize_t filemtd_byteread(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, FAR uint8_t *buf) { FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev; @@ -419,10 +419,10 @@ static ssize_t file_bytewrite(FAR struct mtd_dev_s *dev, off_t offset, #endif /**************************************************************************** - * Name: file_ioctl + * Name: filemtd_ioctl ****************************************************************************/ -static int file_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) +static int filemtd_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) { FAR struct file_dev_s *priv = (FAR struct file_dev_s *)dev; int ret = -EINVAL; /* Assume good command with bad parameters */ @@ -456,7 +456,7 @@ static int file_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) { /* Erase the entire device */ - file_erase(dev, 0, priv->nblocks); + filemtd_erase(dev, 0, priv->nblocks); ret = OK; } break; @@ -566,14 +566,14 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset, * nullified by kmm_zalloc). */ - priv->mtd.erase = file_erase; - priv->mtd.bread = file_bread; - priv->mtd.bwrite = file_bwrite; - priv->mtd.read = file_byteread; + priv->mtd.erase = filemtd_erase; + priv->mtd.bread = filemtd_bread; + priv->mtd.bwrite = filemtd_bwrite; + priv->mtd.read = filemtd_byteread; #ifdef CONFIG_MTD_BYTE_WRITE priv->mtd.write = file_bytewrite; #endif - priv->mtd.ioctl = file_ioctl; + priv->mtd.ioctl = filemtd_ioctl; priv->offset = offset; priv->nblocks = nblocks; @@ -632,7 +632,7 @@ bool filemtd_isfilemtd(FAR struct mtd_dev_s *dev) { FAR struct file_dev_s *priv = (FAR struct file_dev_s *) dev; - if (priv->mtd.erase == file_erase) + if (priv->mtd.erase == filemtd_erase) return 1; return 0; diff --git a/drivers/mtd/ftl.c b/drivers/mtd/ftl.c index 7fa0c5f4a0f..13f832c3515 100644 --- a/drivers/mtd/ftl.c +++ b/drivers/mtd/ftl.c @@ -53,7 +53,7 @@ #include #include #include -#include +#include /**************************************************************************** * Pre-processor Definitions diff --git a/drivers/mtd/mtd_config.c b/drivers/mtd/mtd_config.c index 6bfe0d7fc6f..35131461c65 100644 --- a/drivers/mtd/mtd_config.c +++ b/drivers/mtd/mtd_config.c @@ -61,7 +61,7 @@ #include #include #include -#include +#include #ifdef CONFIG_MTD_CONFIG diff --git a/drivers/mtd/mtd_rwbuffer.c b/drivers/mtd/mtd_rwbuffer.c index c152bc5f754..8d2ffc2d47e 100644 --- a/drivers/mtd/mtd_rwbuffer.c +++ b/drivers/mtd/mtd_rwbuffer.c @@ -52,7 +52,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/pipes/Kconfig b/drivers/pipes/Kconfig index 64a3fb720b3..760f9384dda 100644 --- a/drivers/pipes/Kconfig +++ b/drivers/pipes/Kconfig @@ -3,8 +3,22 @@ # see the file kconfig-language.txt in the NuttX tools repository. # -config DEV_PIPE_SIZE - int "Pipe Size" +config DEV_PIPE_MAXSIZE + int "Maximum pipe/FIFO size" default 1024 ---help--- - Sets the size of the pipe ringbuffer in bytes. + Maximum configurable size of a pipe or FIFO at runtime. + +config DEV_PIPE_SIZE + int "Default pipe size" + default 1024 + ---help--- + Sets the default size of the pipe ringbuffer in bytes. A value of + zero disables pipe support. + +config DEV_FIFO_SIZE + int "Default FIFO size" + default 1024 + ---help--- + Sets the default size of the FIFO ringbuffer in bytes. A value of + zero disables FIFO support. diff --git a/drivers/pipes/fifo.c b/drivers/pipes/fifo.c index b63f9a18561..43afa5556f9 100644 --- a/drivers/pipes/fifo.c +++ b/drivers/pipes/fifo.c @@ -41,14 +41,15 @@ #include #include - #include -#include #include +#include +#include + #include "pipe_common.h" -#if CONFIG_DEV_PIPE_SIZE > 0 +#if CONFIG_DEV_FIFO_SIZE > 0 /**************************************************************************** * Private Data @@ -75,7 +76,7 @@ static const struct file_operations fifo_fops = ****************************************************************************/ /**************************************************************************** - * Name: mkfifo + * Name: mkfifo2 * * Description: * mkfifo() makes a FIFO device driver file with name 'pathname.' Unlike @@ -92,10 +93,15 @@ static const struct file_operations fifo_fops = * If all threads that write to the FIFO have closed, subsequent calls to * read() on the FIFO will return 0 (end-of-file). * + * NOTE: mkfifo2 is a special, non-standard, NuttX-only interface. Since + * the NuttX FIFOs are based in in-memory, circular buffers, the ability + * to control the size of those buffers is critical for system tuning. + * * Inputs: * pathname - The full path to the FIFO instance to attach to or to create * (if not already created). * mode - Ignored for now + * bufsize - The size of the in-memory, circular buffer in bytes. * * Return: * 0 is returned on success; otherwise, -1 is returned with errno set @@ -103,14 +109,14 @@ static const struct file_operations fifo_fops = * ****************************************************************************/ -int mkfifo(FAR const char *pathname, mode_t mode) +int mkfifo2(FAR const char *pathname, mode_t mode, size_t bufsize) { FAR struct pipe_dev_s *dev; int ret; /* Allocate and initialize a new device structure instance */ - dev = pipecommon_allocdev(); + dev = pipecommon_allocdev(bufsize); if (!dev) { return -ENOMEM; @@ -125,4 +131,4 @@ int mkfifo(FAR const char *pathname, mode_t mode) return ret; } -#endif /* CONFIG_DEV_PIPE_SIZE > 0 */ +#endif /* CONFIG_DEV_FIFO_SIZE > 0 */ diff --git a/drivers/pipes/pipe.c b/drivers/pipes/pipe.c index 715639d21c1..b54f051cf56 100644 --- a/drivers/pipes/pipe.c +++ b/drivers/pipes/pipe.c @@ -44,13 +44,16 @@ #include #include -#include + #include #include #include #include #include +#include +#include + #include "pipe_common.h" #if CONFIG_DEV_PIPE_SIZE > 0 @@ -167,16 +170,21 @@ static int pipe_close(FAR struct file *filep) ****************************************************************************/ /**************************************************************************** - * Name: pipe + * Name: pipe2 * * Description: * pipe() creates a pair of file descriptors, pointing to a pipe inode, * and places them in the array pointed to by 'fd'. fd[0] is for reading, * fd[1] is for writing. * + * NOTE: mkfifo2 is a special, non-standard, NuttX-only interface. Since + * the NuttX FIFOs are based in in-memory, circular buffers, the ability + * to control the size of those buffers is critical for system tuning. + * * Inputs: * fd[2] - The user provided array in which to catch the pipe file * descriptors + * bufsize - The size of the in-memory, circular buffer in bytes. * * Return: * 0 is returned on success; otherwise, -1 is returned with errno set @@ -184,7 +192,7 @@ static int pipe_close(FAR struct file *filep) * ****************************************************************************/ -int pipe(int fd[2]) +int pipe2(int fd[2], size_t bufsize) { FAR struct pipe_dev_s *dev = NULL; char devname[16]; @@ -222,7 +230,7 @@ int pipe(int fd[2]) { /* No.. Allocate and initialize a new device structure instance */ - dev = pipecommon_allocdev(); + dev = pipecommon_allocdev(bufsize); if (!dev) { (void)sem_post(&g_pipesem); diff --git a/drivers/pipes/pipe_common.c b/drivers/pipes/pipe_common.c index 759b7e474bc..730e0228dee 100644 --- a/drivers/pipes/pipe_common.c +++ b/drivers/pipes/pipe_common.c @@ -62,7 +62,7 @@ #include "pipe_common.h" -#if CONFIG_DEV_PIPE_SIZE > 0 +#ifdef CONFIG_PIPES /**************************************************************************** * Pre-processor Definitions @@ -122,6 +122,7 @@ static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev, for (i = 0; i < CONFIG_DEV_PIPE_NPOLLWAITERS; i++) { FAR struct pollfd *fds = dev->d_fds[i]; + if (fds) { fds->revents |= eventset & (fds->events | POLLERR | POLLHUP); @@ -153,10 +154,12 @@ static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev, * Name: pipecommon_allocdev ****************************************************************************/ -FAR struct pipe_dev_s *pipecommon_allocdev(void) +FAR struct pipe_dev_s *pipecommon_allocdev(size_t bufsize) { FAR struct pipe_dev_s *dev; + DEBUGASSERT(bufsize <= CONFIG_DEV_PIPE_MAXSIZE); + /* Allocate a private structure to manage the pipe */ dev = (FAR struct pipe_dev_s *)kmm_malloc(sizeof(struct pipe_dev_s)); @@ -168,6 +171,8 @@ FAR struct pipe_dev_s *pipecommon_allocdev(void) sem_init(&dev->d_bfsem, 0, 1); sem_init(&dev->d_rdsem, 0, 0); sem_init(&dev->d_wrsem, 0, 0); + + dev->d_bufsize = bufsize; } return dev; @@ -217,7 +222,7 @@ int pipecommon_open(FAR struct file *filep) if (dev->d_refs == 0 && dev->d_buffer == NULL) { - dev->d_buffer = (FAR uint8_t *)kmm_malloc(CONFIG_DEV_PIPE_SIZE); + dev->d_buffer = (FAR uint8_t *)kmm_malloc(dev->d_bufsize); if (!dev->d_buffer) { (void)sem_post(&dev->d_bfsem); @@ -397,7 +402,7 @@ int pipecommon_close(FAR struct file *filep) return OK; } #endif - } + } sem_post(&dev->d_bfsem); return OK; @@ -471,10 +476,11 @@ ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len) while ((size_t)nread < len && dev->d_wrndx != dev->d_rdndx) { *buffer++ = dev->d_buffer[dev->d_rdndx]; - if (++dev->d_rdndx >= CONFIG_DEV_PIPE_SIZE) + if (++dev->d_rdndx >= dev->d_bufsize) { dev->d_rdndx = 0; } + nread++; } @@ -545,7 +551,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, /* Calculate the write index AFTER the next byte is written */ nxtwrndx = dev->d_wrndx + 1; - if (nxtwrndx >= CONFIG_DEV_PIPE_SIZE) + if (nxtwrndx >= dev->d_bufsize) { nxtwrndx = 0; } @@ -594,6 +600,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, sem_post(&dev->d_rdsem); } } + last = nwritten; /* If O_NONBLOCK was set, then return partial bytes written or EGAIN */ @@ -604,6 +611,7 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, { nwritten = -EAGAIN; } + sem_post(&dev->d_bfsem); return nwritten; } @@ -676,14 +684,14 @@ int pipecommon_poll(FAR struct file *filep, FAR struct pollfd *fds, } else { - nbytes = (CONFIG_DEV_PIPE_SIZE-1) + dev->d_wrndx - dev->d_rdndx; + nbytes = (dev->d_bufsize - 1) + dev->d_wrndx - dev->d_rdndx; } /* Notify the POLLOUT event if the pipe is not full, but only if * there is readers. */ eventset = 0; - if (nbytes < (CONFIG_DEV_PIPE_SIZE-1)) + if (nbytes < (dev->d_bufsize - 1)) { eventset |= POLLOUT; } @@ -780,15 +788,22 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case FIONREAD: + case FIONWRITE: /* Number of bytes waiting in send queue */ + case FIONREAD: /* Number of bytes available for reading */ { int count; - /* Determine the number of bytes available in the buffer */ + /* Determine the number of bytes written to the buffer. This is, + * of course, also the number of bytes that may be read from the + * buffer. + * + * d_rdndx - index to remove next byte from the buffer + * d_wrndx - Index to next location to add a byte to the buffer. + */ if (dev->d_wrndx < dev->d_rdndx) { - count = (CONFIG_DEV_PIPE_SIZE - dev->d_rdndx) + dev->d_wrndx; + count = (dev->d_bufsize - dev->d_rdndx) + dev->d_wrndx; } else { @@ -800,11 +815,17 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case FIONWRITE: + /* Free space in buffer */ + + case FIONSPACE: { int count; - /* Determine the number of bytes free in the buffer */ + /* Determine the number of bytes free in the buffer. + * + * d_rdndx - index to remove next byte from the buffer + * d_wrndx - Index to next location to add a byte to the buffer. + */ if (dev->d_wrndx < dev->d_rdndx) { @@ -812,7 +833,7 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } else { - count = ((CONFIG_DEV_PIPE_SIZE - dev->d_wrndx) + dev->d_rdndx) - 1; + count = ((dev->d_bufsize - dev->d_wrndx) + dev->d_rdndx) - 1; } *(FAR int *)((uintptr_t)arg) = count; @@ -864,4 +885,4 @@ int pipecommon_unlink(FAR struct inode *inode) } #endif -#endif /* CONFIG_DEV_PIPE_SIZE > 0 */ +#endif /* CONFIG_PIPES */ diff --git a/drivers/pipes/pipe_common.h b/drivers/pipes/pipe_common.h index ae301795ecf..0986a27af17 100644 --- a/drivers/pipes/pipe_common.h +++ b/drivers/pipes/pipe_common.h @@ -47,15 +47,42 @@ #include #include +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Pipe/FIFO support */ + +#ifndef CONFIG_PIPES +# undef CONFIG_DEV_PIPE_MAXSIZE +# undef CONFIG_DEV_PIPE_SIZE +# undef CONFIG_DEV_FIFO_SIZE +# define CONFIG_DEV_PIPE_MAXSIZE 0 +# define CONFIG_DEV_PIPE_SIZE 0 +# define CONFIG_DEV_FIFO_SIZE 0 +#endif + +/* Pipe/FIFO size */ + +#ifndef CONFIG_DEV_PIPE_MAXSIZE +# define CONFIG_DEV_PIPE_MAXSIZE 1024 +#endif + +#if CONFIG_DEV_PIPE_MAXSIZE <= 0 +# undef CONFIG_PIPES +# undef CONFIG_DEV_PIPE_SIZE +# undef CONFIG_DEV_FIFO_SIZE +# define CONFIG_DEV_PIPE_SIZE 0 +# define CONFIG_DEV_FIFO_SIZE 0 +#endif + #ifndef CONFIG_DEV_PIPE_SIZE # define CONFIG_DEV_PIPE_SIZE 1024 #endif -#if CONFIG_DEV_PIPE_SIZE > 0 - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ +#ifndef CONFIG_DEV_FIFO_SIZE +# define CONFIG_DEV_FIFO_SIZE 1024 +#endif /* Maximum number of threads than can be waiting for POLL events */ @@ -87,9 +114,9 @@ /* Make the buffer index as small as possible for the configured pipe size */ -#if CONFIG_DEV_PIPE_SIZE > 65535 +#if CONFIG_DEV_PIPE_MAXSIZE > 65535 typedef uint32_t pipe_ndx_t; /* 32-bit index */ -#elif CONFIG_DEV_PIPE_SIZE > 255 +#elif CONFIG_DEV_PIPE_MAXSIZE > 255 typedef uint16_t pipe_ndx_t; /* 16-bit index */ #else typedef uint8_t pipe_ndx_t; /* 8-bit index */ @@ -107,6 +134,7 @@ struct pipe_dev_s sem_t d_wrsem; /* Full buffer - Writer waits for data read */ pipe_ndx_t d_wrndx; /* Index in d_buffer to save next byte written */ pipe_ndx_t d_rdndx; /* Index in d_buffer to return the next byte read */ + pipe_ndx_t d_bufsize; /* allocated size of d_buffer in bytes */ uint8_t d_refs; /* References counts on pipe (limited to 255) */ uint8_t d_nwriters; /* Number of reference counts for write access */ uint8_t d_nreaders; /* Number of reference counts for read access */ @@ -130,7 +158,8 @@ struct pipe_dev_s #ifdef __cplusplus # define EXTERN extern "C" -extern "C" { +extern "C" +{ #else # define EXTERN extern #endif @@ -138,7 +167,7 @@ extern "C" { struct file; /* Forward reference */ struct inode; /* Forward reference */ -FAR struct pipe_dev_s *pipecommon_allocdev(void); +FAR struct pipe_dev_s *pipecommon_allocdev(size_t bufsize); void pipecommon_freedev(FAR struct pipe_dev_s *dev); int pipecommon_open(FAR struct file *filep); int pipecommon_close(FAR struct file *filep); @@ -158,5 +187,4 @@ int pipecommon_unlink(FAR struct inode *priv); } #endif -#endif /* CONFIG_DEV_PIPE_SIZE > 0 */ #endif /* __DRIVERS_PIPES_PIPE_COMMON_H */ diff --git a/drivers/pwm.c b/drivers/pwm.c index 7fb6b3436f5..f3de79a387d 100644 --- a/drivers/pwm.c +++ b/drivers/pwm.c @@ -58,7 +58,7 @@ #include #include #include -#include +#include #include diff --git a/drivers/ramdisk.c b/drivers/ramdisk.c index 4ce4057103b..4473a41ad1d 100644 --- a/drivers/ramdisk.c +++ b/drivers/ramdisk.c @@ -51,7 +51,7 @@ #include #include -#include +#include /**************************************************************************** * Pre-processor Definitions diff --git a/drivers/rwbuffer.c b/drivers/rwbuffer.c index fd5b6e53eea..a7db82e156d 100644 --- a/drivers/rwbuffer.c +++ b/drivers/rwbuffer.c @@ -52,7 +52,7 @@ #include #include -#include +#include #if defined(CONFIG_DRVR_WRITEBUFFER) || defined(CONFIG_DRVR_READAHEAD) diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index c369db5fc54..90218fe0eea 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -25,6 +25,19 @@ config BMP180 ---help--- Enable driver support for the Bosch BMP180 barometer sensor. +config SENSOR_KXTJ9 + bool "Kionix KXTJ9 Accelerometer support" + default n + select I2C + +if SENSOR_KXTJ9 + +config SENSOR_KXTJ9_I2C_BUS_SPEED + int "Kionix KXTJ9 Bus Speed in Hz" + default 400000 + +endif # SENSOR_KXTJ9 + config LIS331DL bool "ST LIS331DL device support" default n diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs index b2d5d52f43c..21219588b39 100644 --- a/drivers/sensors/Make.defs +++ b/drivers/sensors/Make.defs @@ -49,6 +49,10 @@ ifeq ($(CONFIG_AS5048B),y) CSRCS += as5048b.c endif +ifeq ($(CONFIG_SENSOR_KXTJ9),y) + CSRCS += kxjt9.c +endif + ifeq ($(CONFIG_LIS331DL),y) CSRCS += lis331dl.c endif diff --git a/drivers/sensors/kxjt9.c b/drivers/sensors/kxjt9.c new file mode 100644 index 00000000000..36b23e2fa35 --- /dev/null +++ b/drivers/sensors/kxjt9.c @@ -0,0 +1,681 @@ +/**************************************************************************** + * drivers/sensors/kxjt9.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * This driver derives from the Motorola Moto Z MDK: + * + * Copyright (c) 2016 Motorola Mobility, LLC. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#if defined(CONFIG_I2C) && defined(CONFIG_SENSOR_KXTJ9) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED +# define CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED 400000 +#endif + +/* Register Definitions *****************************************************/ + +/* Output registers */ + +#define XOUT_L 0x06 +#define WHO_AM_I 0x0f +#define DCST_RESP 0x0c + +/* Control registers */ + +#define INT_REL 0x1a +#define CTRL_REG1 0x1b +#define INT_CTRL1 0x1e +#define DATA_CTRL 0x21 +#define CTRL_REG2 0x1d + +/* Control register 1 bits */ + +#define PC1_OFF 0x7f +#define PC1_ON (1 << 7) + +/* CTRL_REG1: set resolution, g-range, data ready enable */ +/* Output resolution: 8-bit valid or 12-bit valid */ + +#define RES_8BIT 0 +#define RES_12BIT (1 << 6) + +/* Data ready funtion enable bit: set during probe if using irq mode */ + +#define DRDYE (1 << 5) + +/* Output g-range: +/-2g, 4g, or 8g */ + +#define KXTJ9_G_2G 0 +#define KXTJ9_G_4G (1 << 3) +#define KXTJ9_G_8G (1 << 4) + +/* Interrupt control register 1 bits */ +/* Set these during probe if using irq mode */ + +#define KXTJ9_IEL (1 << 3) +#define KXTJ9_IEA (1 << 4) +#define KXTJ9_IEN (1 << 5) + +#define KXTJ9_SRST 0x80 +#define WHO_AM_I_KXCJ9 0x0a + +#define KXTJ9_CTRL1_CONFIG (RES_12BIT | KXTJ9_G_2G | DRDYE) + +/* Misc. driver defitions ***************************************************/ + +#define ACCEL_NUM_RETRIES 5 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of one KXTJ9 device */ + +struct kxjt9_dev_s +{ + FAR struct i2c_master_s *i2c; + sem_t exclsem; + bool enable; + bool power_enabled; + uint8_t address; + uint8_t shift; + uint8_t ctrl_reg1; + uint8_t data_ctrl; + uint8_t int_ctrl; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* I2C helpers */ + +static int kxtj9_reg_read(FAR struct kxjt9_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval, unsigned int len); +static int kxtj9_reg_write(FAR struct kxjt9_dev_s *priv, + uint8_t regaddr, uint8_t regval); + +/* KXTJ9 helpers */ + +static int kxtj9_configure(FAR struct kxjt9_dev_s *priv, uint8_t odr); +static int kxtj9_enable(FAR struct kxjt9_dev_s *priv, bool on); +static int kxtj9_read_sensor_data(FAR struct kxjt9_dev_s *priv, + FAR struct kxtj9_sensor_data *sensor_data); +static void kxtj9_soft_reset(FAR struct kxjt9_dev_s *priv); +static void kxtj9_set_mode_standby(FAR struct kxjt9_dev_s *priv); + +/* Character driver methods */ + +static int kxjt9_open(FAR struct file *filep); +static int kxjt9_close(FAR struct file *filep); +static ssize_t kxjt9_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static ssize_t kxjt9_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int kxjt9_ioctl(FAR struct file *filep, int cmd, + unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_fops = +{ + kxjt9_open, + kxjt9_close, + kxjt9_read, + kxjt9_write, + NULL, + kxjt9_ioctl, +#ifndef CONFIG_DISABLE_POLL + NULL, +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + NULL, +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kxtj9_reg_read + * + * Description: + * Read from multiple KXTJ9 registers. + * + ****************************************************************************/ + +static int kxtj9_reg_read(FAR struct kxjt9_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval, unsigned int len) +{ + struct i2c_msg_s msg[2]; + uint8_t buf[1]; + int retries = ACCEL_NUM_RETRIES; + int ret; + + do + { + /* Format two messages: The first is a write containing the register + * address + */ + + buf[0] = regaddr; + + msg[0].frequency = CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED, + msg[0].addr = priv->address; + msg[0].flags = 0; + msg[0].buffer = buf; + msg[0].length = 1; + + /* The second is a read with a restart containing the register data */ + + msg[1].frequency = CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED, + msg[1].addr = priv->address; + msg[1].flags = I2C_M_READ; + msg[1].buffer = regval; + msg[1].length = len; + + /* Then perform the transfer. */ + + ret = I2C_TRANSFER(priv->i2c, msg, 2); + } + while (ret < 0 && retries-- > 0); + + return ret; +} + +/**************************************************************************** + * Name: kxtj9_reg_write + * + * Description: + * Write a value to a single KXTJ9 register + * + ****************************************************************************/ + +static int kxtj9_reg_write(FAR struct kxjt9_dev_s *priv, uint8_t regaddr, + uint8_t regval) +{ + struct i2c_msg_s msg; + uint8_t buf[2]; + int ret; + int retries = ACCEL_NUM_RETRIES; + + do + { + /* Setup for the transfer */ + + buf[0] = regaddr; + buf[1] = regval; + + msg.frequency = CONFIG_SENSOR_KXTJ9_I2C_BUS_SPEED, + msg.addr = priv->address; + msg.flags = 0; + msg.buffer = buf; + msg.length = 2; + + /* Then perform the transfer. */ + + ret = I2C_TRANSFER(priv->i2c, &msg, 1); + } + while (ret < 0 && retries-- > 0); + + return ret; +} + +/**************************************************************************** + * Name: kxtj9_soft_reset + * + * Description: + * Configure the KXTJ9 device. Handler the SNIOC_CONFIGURE IOCTL command. + * + ****************************************************************************/ + +static void kxtj9_soft_reset(FAR struct kxjt9_dev_s *priv) +{ + uint8_t wbuf[1]; + + /* Set accel into standby and known state by disabling PC1 */ + + wbuf[0] = KXTJ9_CTRL1_CONFIG; + kxtj9_reg_write(priv, CTRL_REG1, wbuf[0]); + + /* Send the reset command */ + + kxtj9_reg_read(priv, CTRL_REG2, &wbuf[0], 1); + + wbuf[0] |= KXTJ9_SRST; + kxtj9_reg_write(priv, CTRL_REG2, wbuf[0]); + + /* Delay 10ms for the accel parts to re-initialize */ + + usleep(10000); +} + +/**************************************************************************** + * Name: kxtj9_set_mode_standby + * + * Description: + * Configure the KXTJ9 device. Handler the SNIOC_CONFIGURE IOCTL command. + * + ****************************************************************************/ + +static void kxtj9_set_mode_standby(FAR struct kxjt9_dev_s *priv) +{ + uint8_t wbuf[1]; + + /* Set Accel into standby and known state by disabling PC1 */ + + wbuf[0] = KXTJ9_CTRL1_CONFIG; + kxtj9_reg_write(priv, CTRL_REG1, wbuf[0]); + + /* Clear interrupts */ + + wbuf[0] = 0; + kxtj9_reg_write(priv, INT_CTRL1, wbuf[0]); +} + +/**************************************************************************** + * Name: kxtj9_configure + * + * Description: + * Configure the KXTJ9 device. Handler the SNIOC_CONFIGURE IOCTL command. + * + ****************************************************************************/ + +static int kxtj9_configure(FAR struct kxjt9_dev_s *priv, uint8_t odr) +{ + uint8_t wbuf[0]; + int ret; + + do + { + ret = sem_wait(&priv->exclsem); + } + while (ret < 0 && errno == EINTR); + + kxtj9_soft_reset(priv); + kxtj9_set_mode_standby(priv); + + /* Read WHO_AM_I register, should return 0x0a */ + + kxtj9_reg_read(priv, WHO_AM_I, &wbuf[0], 1); + if (wbuf[0] != WHO_AM_I_KXCJ9) + { + snerr("ERROR: Not KXCJ9 chipset, WHO_AM_I register is 0x%2x.\n", + wbuf[0]); + } + + /* Ensure that PC1 is cleared before updating control registers */ + + kxtj9_reg_write(priv, CTRL_REG1, 0); + + /* 12Bit Res and -2G~+2G range */ + + priv->ctrl_reg1 = KXTJ9_CTRL1_CONFIG; + kxtj9_reg_write(priv, CTRL_REG1, priv->ctrl_reg1); + + priv->data_ctrl = odr; + kxtj9_reg_write(priv, DATA_CTRL, priv->data_ctrl); + + /* In irq mode, populate INT_CTRL */ + + priv->int_ctrl = KXTJ9_IEN | KXTJ9_IEA | KXTJ9_IEL; + kxtj9_reg_write(priv, INT_CTRL1, priv->int_ctrl); + + sem_post(&priv->exclsem); + return 0; +} + +/**************************************************************************** + * Name: kxtj9_enable + * + * Description: + * Enable or disable the KXTJ9 device. Handler the SNIOC_ENABLE and + * SNIOC_DISABLE IOCTL commands. + * + ****************************************************************************/ + +static int kxtj9_enable(FAR struct kxjt9_dev_s *priv, bool on) +{ + uint8_t wbuf[1]; + int ret; + + do + { + ret = sem_wait(&priv->exclsem); + } + while (ret < 0 && errno == EINTR); + + if (!on && priv->power_enabled) + { + priv->ctrl_reg1 &= PC1_OFF; + kxtj9_reg_write(priv, CTRL_REG1, priv->ctrl_reg1); + + priv->power_enabled = false; + sninfo("KXTJ9 in disabled mode\n"); + } + else if (on && !priv->power_enabled) + { + /* Turn on outputs */ + + priv->ctrl_reg1 |= PC1_ON; + kxtj9_reg_write(priv, CTRL_REG1, priv->ctrl_reg1); + + /* Clear initial interrupt if in irq mode */ + + kxtj9_reg_read(priv, INT_REL, wbuf, 1); + priv->power_enabled = true; + sninfo("KXTJ9 in operating mode\n"); + } + + sem_post(&priv->exclsem); + return OK; +} + +/**************************************************************************** + * Name: kxtj9_read_sensor_data + * + * Description: + * Read sensor data. This supports the standard driver read() method. + * + ****************************************************************************/ + +static int kxtj9_read_sensor_data(FAR struct kxjt9_dev_s *priv, + FAR struct kxtj9_sensor_data *sensor_data) +{ + int16_t acc_data[3]; + uint8_t data; + int ret; + + do + { + ret = sem_wait(&priv->exclsem); + } + while (ret < 0 && errno == EINTR); + + kxtj9_reg_read(priv, XOUT_L, (uint8_t *)acc_data, 6); + + /* 12 bit resolution, get rid of the lowest 4 bits */ + + sensor_data->x = acc_data[0] >> 4; + sensor_data->y = acc_data[1] >> 4; + sensor_data->z = acc_data[2] >> 4; + + /* Read INT_REL to clear interrupt status */ + + kxtj9_reg_read(priv, INT_REL, &data, 1); + sem_post(&priv->exclsem); + return OK; +} + +/**************************************************************************** + * Name: kxjt9_open + * + * Description: + * This method is called when the device is opened. + * + ****************************************************************************/ + +static int kxjt9_open(FAR struct file *filep) +{ + return OK; +} + +/**************************************************************************** + * Name: kxjt9_close + * + * Description: + * This method is called when the device is closed. + * + ****************************************************************************/ + +static int kxjt9_close(FAR struct file *filep) +{ + return OK; +} + +/**************************************************************************** + * Name: kxjt9_read + * + * Description: + * The standard read method. + * + ****************************************************************************/ + +static ssize_t kxjt9_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct inode *inode; + FAR struct kxjt9_dev_s *priv; + size_t nsamples; + size_t i; + int ret; + + /* How many samples will fit in the buffer? */ + + nsamples = buflen / sizeof(struct kxtj9_sensor_data); + + /* If the provided buffer is not large enough to return a single sample, + * then return an error. + */ + + if (nsamples < 1) + { + snerr("ERROR: Bufer too small %lu < %u\n", + buflen, sizeof(struct kxtj9_sensor_data)); + return (ssize_t)-EINVAL; + } + + DEBUGASSERT(filep != NULL && filep->f_inode != NULL && buffer != NULL); + inode = filep->f_inode; + + priv = (FAR struct kxjt9_dev_s *)inode->i_private; + DEBUGASSERT(priv != NULL && priv->i2c != NULL); + + /* Return all of the samples that will fit in the user-provided buffer */ + + for (i = 0; i < nsamples; i++) + { + /* Get the next sample data */ + + ret = kxtj9_read_sensor_data(priv, (FAR struct kxtj9_sensor_data *)buffer); + if (ret < 0) + { + snerr("ERROR: kxtj9_read_sensor_data failed: %d\n", ret); + return (ssize_t)ret; + } + + /* Set up for the next sample */ + + buffer += sizeof(struct kxtj9_sensor_data); + } + + return (ssize_t)(nsamples * sizeof(struct kxtj9_sensor_data)); +} + +/**************************************************************************** + * Name: kxjt9_write + * + * Description: + * A dummy write method. + * + ****************************************************************************/ + +static ssize_t kxjt9_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + return -ENOSYS; +} + +/**************************************************************************** + * Name: kxjt9_ioctl + * + * Description: + * The standard ioctl method. + * + ****************************************************************************/ + +static int kxjt9_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode; + FAR struct kxjt9_dev_s *priv; + int ret; + + /* Sanity check */ + + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); + inode = filep->f_inode; + + priv = (FAR struct kxjt9_dev_s *)inode->i_private; + DEBUGASSERT(priv != NULL && priv->i2c != NULL); + + /* Handle ioctl commands */ + + switch (cmd) + { + /* Start converting. Arg: None. */ + + case SNIOC_ENABLE: + ret = kxtj9_enable(priv, true); + break; + + /* Stop converting. Arg: None. */ + + case SNIOC_DISABLE: + ret = kxtj9_enable(priv, false); + break; + + /* Configure the KXTJ9. Arg: enum kxtj9_odr_e value. */ + + case SNIOC_CONFIGURE: + { + DEBUGASSERT(arg <= UINT8_MAX); + ret = kxtj9_configure(priv, (uint8_t)arg); + sninfo("SNIOC_CONFIGURE: ODR=%u ret=%d\n", + (unsigned int)arg, ret); + } + break; + + /* Unrecognized commands */ + + default: + snerr("ERROR: Unrecognized cmd: %d arg: %lu\n", cmd, arg); + ret = -ENOTTY; + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kxjt9_register + * + * Description: + * Register the KXJT9 accelerometer device as 'devpath'. + * + * Input Parameters: + * devpath - The full path to the driver to register, e.g., "/dev/accel0". + * i2c - An I2C driver instance. + * addr - The I2C address of the KXJT9 accelerometer, gyroscope or + * magnetometer. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int kxjt9_register(FAR const char *devpath, FAR struct i2c_master_s *i2c, + uint8_t address) +{ + FAR struct kxjt9_dev_s *priv; + int ret; + + /* Sanity check */ + + DEBUGASSERT(devpath != NULL && i2c != NULL); + + /* Initialize the device's structure */ + + priv = (FAR struct kxjt9_dev_s *)kmm_zalloc(sizeof(struct kxjt9_dev_s)); + if (priv == NULL) + { + snerr("ERROR: Failed to allocate driver instance\n"); + return -ENOMEM; + } + + priv->i2c = i2c; + priv->address = address; + sem_init(&priv->exclsem, 0, 1); + + /* Register the character driver */ + + ret = register_driver(devpath, &g_fops, 0666, priv); + if (ret < 0) + { + snerr("ERROR: Failed to register driver: %d\n", ret); + kmm_free(priv); + return ret; + } + + return OK; +} + +#endif /* CONFIG_I2C && CONFIG_SENSOR_KXTJ9 */ diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5297a824f80..53ef72c3cb5 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -2011,3 +2011,55 @@ config SCI1_2STOP 1=Two stop bits endmenu # SCI1 Configuration + +menuconfig PSEUDOTERM + bool "Pseudo-Terminal (PTY) suppport" + default n + select PIPES + select ARCH_HAVE_SERIAL_TERMIOS + ---help--- + Enable support support for master and slave pseudo-terminal devices. + +if PSEUDOTERM + +choice + prompt "PTY model" + default PSEUDOTERM_BSD if DISABLE_PSEUDOFS_OPERATIONS + default PSEUDOTERM_SUSV1 if !DISABLE_PSEUDOFS_OPERATIONS + +config PSEUDOTERM_BSD + bool "BSD style" + ---help--- + Deprecated BSD style PTYs. + + Master: /dev/ptyN + Slave: /dev/ttypN + + Where N is the minor number + +config PSEUDOTERM_SUSV1 + bool "SUSv1 style" + depends on !DISABLE_PSEUDOFS_OPERATIONS + ---help--- + PTYs as specified in the Single Unix Specification (SUSv1). + + Master: /dev/ptmx (multiplexor) + Slave: /dev/pts/N + + Where N is the minor number + +endchoice # PTY model + +config PSEUDOTERM_RXBUFSIZE + int "Pseudo-Terminal Rx buffer size" + default 256 + ---help--- + Master-to-slave pipe buffer size. Default: 256 + +config PSEUDOTERM_TXBUFSIZE + int "Pseudo-Terminal Tx buffer size" + default 256 + ---help--- + Slave-to-master pipe buffer size. Default: 256 + +endif # PSEUDOTERM diff --git a/drivers/serial/Make.defs b/drivers/serial/Make.defs index bcbffd8368e..e7cc43426d2 100644 --- a/drivers/serial/Make.defs +++ b/drivers/serial/Make.defs @@ -47,6 +47,15 @@ ifeq ($(CONFIG_16550_UART),y) CSRCS += uart_16550.c endif +# Pseudo-terminal support + +ifeq ($(CONFIG_PSEUDOTERM),y) + CSRCS += pty.c +ifeq ($(CONFIG_PSEUDOTERM_SUSV1),y) + CSRCS += ptmx.c +endif +endif + # Include serial build support DEPPATH += --dep-path serial diff --git a/drivers/serial/ptmx.c b/drivers/serial/ptmx.c index d0439c14f31..dd6bd9fd3c5 100644 --- a/drivers/serial/ptmx.c +++ b/drivers/serial/ptmx.c @@ -41,10 +41,18 @@ #include #include +#include +#include +#include #include #include +#include #include + #include +#include + +#include "pty.h" /**************************************************************************** * Private Function Prototypes @@ -146,7 +154,7 @@ static void ptmx_semtake(void) * ****************************************************************************/ -static int ptmx_minor_allocate(FAR struct ptmx_dev_s *ptmx) +static int ptmx_minor_allocate(void) { uint8_t startaddr = g_ptmx.px_next; uint8_t minor; @@ -194,38 +202,6 @@ static int ptmx_minor_allocate(FAR struct ptmx_dev_s *ptmx) } } -/**************************************************************************** - * Name: ptmx_minor_free - * - * Description: - * De-allocate a PTY minor number. - * - * Assumptions: - * Caller hold the px_exclsem - * - ****************************************************************************/ - -static void ptmx_minor_free(uint8_t minor) -{ - int index; - int bitno; - - /* Free the address by clearing the associated bit in the px_alloctab[]; */ - - index = minor >> 5; - bitno = minor & 31; - - DEBUGASSERT((g_ptmx.px_alloctab[index] |= (1 << bitno)) != 0); - g_ptmx.px_alloctab[index] &= ~(1 << bitno); - - /* Reset the next pointer if the one just released has a lower value */ - - if (minor < g_ptmx.px_next) - { - g_ptmx.px_next = minor; - } -} - /**************************************************************************** * Name: ptmx_open ****************************************************************************/ @@ -250,7 +226,13 @@ static int ptmx_open(FAR struct file *filep) goto errout_with_sem; } - /* Create the master slave pair */ + /* Create the master slave pair. This should create: + * + * Slave device: /dev/pts/N + * Master device: /dev/ptyN + * + * Where N=minor + */ ret = pty_register(minor); if (ret < 0) @@ -258,9 +240,9 @@ static int ptmx_open(FAR struct file *filep) goto errout_with_minor; } - /* Open the master side */ + /* Open the master device: /dev/ptyN, where N=minor */ - snprintf(devname, 16, "/dev/ttyp%d", minor); + snprintf(devname, 16, "/dev/pty%d", minor); fd = open(devname, O_RDWR); DEBUGASSERT(fd >= 0); /* open() should never fail */ @@ -273,10 +255,11 @@ static int ptmx_open(FAR struct file *filep) DEBUGASSERT(ret >= 0); /* unlink() should never fail */ UNUSED(ret); - /* Return the master file descriptor */ + /* Return the encoded, master file descriptor */ ptmx_semgive(); - return fd; + DEBUGASSERT((unsigned)fd <= OPEN_MAXFD); + return (int)OPEN_SETFD(fd); errout_with_minor: ptmx_minor_free(minor); @@ -311,20 +294,57 @@ static ssize_t ptmx_write(FAR struct file *filep, FAR const char *buffer, size_t /**************************************************************************** * Name: ptmx_register * + * Input Parameters: + * None + * * Description: - * Register /dev/null + * Register the master pseudo-terminal multiplexor device at /dev/ptmx + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure. * ****************************************************************************/ -void ptmx_register(void) +int ptmx_register(void) { - FAR struct ptmx_dev_s *ptmx; - /* Initialize driver state */ sem_init(&g_ptmx.px_exclsem, 0, 1); /* Register the PTMX driver */ - (void)register_driver("/dev/ptmx", &g_ptmx_fops, 0666, NULL); + return register_driver("/dev/ptmx", &g_ptmx_fops, 0666, NULL); +} + +/**************************************************************************** + * Name: ptmx_minor_free + * + * Description: + * De-allocate a PTY minor number. + * + * Assumptions: + * Caller hold the px_exclsem + * + ****************************************************************************/ + +void ptmx_minor_free(uint8_t minor) +{ + int index; + int bitno; + + /* Free the address by clearing the associated bit in the px_alloctab[]; */ + + index = minor >> 5; + bitno = minor & 31; + + DEBUGASSERT((g_ptmx.px_alloctab[index] |= (1 << bitno)) != 0); + g_ptmx.px_alloctab[index] &= ~(1 << bitno); + + /* Reset the next pointer if the one just released has a lower value */ + + if (minor < g_ptmx.px_next) + { + g_ptmx.px_next = minor; + } } diff --git a/drivers/serial/pty.c b/drivers/serial/pty.c index 2719d6c35df..03c844b5f9c 100644 --- a/drivers/serial/pty.c +++ b/drivers/serial/pty.c @@ -33,6 +33,50 @@ * ****************************************************************************/ +/* TODO: O_NONBLOCK is not yet supported. Currently, the source and sink + * pipes are opened in blocking mode on both the slave and master so only + * blocking behavior is supported. This driver must be able to support + * multiple slave as well as master clients that may have the PTY device + * opened in blocking and non-blocking modes simultaneously. + * + * There are two different possible implementations under consideration: + * + * 1. Keep the pipes in blocking mode, but use a test based on FIONREAD (for + * the source pipe) or FIONSPACE (for the sink pipe) to determine if the + * read or write would block. There is existing logic like this in + * pty_read() to handle the case of a single byte reads which must never + * block in any case: Essentially, this logic uses FIONREAD to determine + * if there is anything to read before calling file_read(). Similar + * logic could be replicated for all read cases. + * + * Analogous logic could be added for all writes using FIONSPACE to + * assure that there is sufficient free space in the sink pipe to write + * without blocking. The write length could be adjusted, in necceary, + * to assure that there is no blocking. + * + * Locking, perhaps via sched_lock(), would be required to assure the + * test via FIONREAD or FIONWRITE is atomic with respect to the + * file_read() or file_write() operation. + * + * 2. An alternative that appeals to me is to modify the contained source + * or sink pipe file structures before each file_read() or file_write() + * operation to assure that the O_NONBLOCK is set correctly when the + * pipe read or write operation is performed. This might be done with + * file_vfcntl() (there is no file_fcntl(), yet) or directly into the + * source/sink file structure oflags mode settings. + * + * This would require (1) the ability to lock each pipe individually, + * setting the blocking mode for the source or sink pipe to match the + * mode in the open flags of the PTY device file structure, and (2) + * logic to restore the default pipe mode after the file_read/write() + * operation and before the pipe is unlocked. + * + * There are existing locks to support (1) destruction of the driver + * (pp_exclsem) and (2) slave PTY locking (pp_slavesem), as well as (3) + * locks within the pipe implementation. Care must be taken with any new + * source/sink pipe locking to assure that deadlocks are not possible. + */ + /**************************************************************************** * Included Files ****************************************************************************/ @@ -40,20 +84,81 @@ #include #include +#include #include #include +#include #include +#include +#include #include #include #include #include +#include #include +#include +#include + +#include "pty.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Should never be set... only for comparison to serial.c */ + +#undef CONFIG_PSEUDOTERM_FULLBLOCKS + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This device structure describes on memory of the PTY device pair */ + +struct pty_devpair_s; +struct pty_dev_s +{ + FAR struct pty_devpair_s *pd_devpair; + struct file pd_src; /* Provides data to read() method (pipe output) */ + struct file pd_sink; /* Accepts data from write() method (pipe input) */ + bool pd_master; /* True: this is the master */ + +#ifdef CONFIG_SERIAL_TERMIOS + /* Terminal control flags */ + + tcflag_t pd_iflag; /* Terminal nput modes */ + tcflag_t pd_oflag; /* Terminal output modes */ +#endif +}; + +/* This structure describes the pipe pair */ + +struct pty_devpair_s +{ + struct pty_dev_s pp_master; /* Maseter device */ + struct pty_dev_s pp_slave; /* Slave device */ + + bool pp_locked; /* Slave is locked */ +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + bool pp_unlinked; /* File has been unlinked */ + uint8_t pp_minor; /* Minor device number */ + uint16_t pp_nopen; /* Open file count */ +#endif + sem_t pp_slavesem; /* Slave lock semaphore */ + sem_t pp_exclsem; /* Mutual exclusion */ +}; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ +static void pty_semtake(FAR struct pty_devpair_s *devpair); +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS +static void pty_destroy(FAR struct pty_devpair_s *devpair); +#endif + static int pty_open(FAR struct file *filep); static int pty_close(FAR struct file *filep); static ssize_t pty_read(FAR struct file *filep, FAR char *buffer, @@ -69,40 +174,11 @@ static int pty_poll(FAR struct file *filep, FAR struct pollfd *fds, static int pty_unlink(FAR struct inode *inode); #endif -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/* This device structure describes on memory of the PTY device pair */ - -struct pty_devpair_s; -struct pty_dev_s -{ - FAR struct pty_common_s *pd_devpair; - struct file pd_src; /* Provides data to read() method (pipe output) */ - struct file pd_sink; /* Accepts data from write() method (pipe input) */ -}; - -/* This structure describes the pipe pair */ - -struct pty_devpair_s -{ - struct pty_dev_s pp_ptyp; /* /dev/ptypN device */ - struct pty_dev_s pp_ttyp; /* /dev/ttypN device */ - -#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS - uint8_t pp_minor; /* Minor device number */ - uint16_t pp_nopen; /* Open file count */ - sem_t pp_exclsem; /* Mutual exclusion */ - bool pp_unlinked; /* File has been unlinked */ -#endif -}; - /**************************************************************************** * Private Data ****************************************************************************/ -static const struct file_operations pty_fops = +static const struct file_operations g_pty_fops = { #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS pty_open, /* open */ @@ -131,15 +207,13 @@ static const struct file_operations pty_fops = * Name: pty_semtake ****************************************************************************/ -#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS -static void pty_semtake(FAR struct pty_common_s *devpair) +static void pty_semtake(FAR struct pty_devpair_s *devpair) { while (sem_wait(&devpair->pp_exclsem) < 0) { DEBUGASSERT(errno == EINTR); } } -#endif /**************************************************************************** * Name: pty_semgive @@ -152,31 +226,43 @@ static void pty_semtake(FAR struct pty_common_s *devpair) ****************************************************************************/ #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS -static void pty_destroy(FAR struct pty_common_s *devpair) +static void pty_destroy(FAR struct pty_devpair_s *devpair) { char devname[16]; - /* Un-register /dev/ptypN */ + /* Un-register the slave device */ - snprintf(devname, 16, "/dev/pp_ptyp%d", (int)devpair->pp_minor); +#ifdef CONFIG_PSEUDOTERM_BSD + snprintf(devname, 16, "/dev/ttyp%d", devpair->pp_minor); +#else + snprintf(devname, 16, "/dev/pts/%d", devpair->pp_minor); +#endif (void)unregister_driver(devname); - - /* Un-register /dev/ptypN */ - snprintf(devname, 16, "/dev/ttyp%d", (int)devpair->pp_minor); + /* Un-register the master device (/dev/ptyN may have already been + * unlinked). + */ + + snprintf(devname, 16, "/dev/pty%d", (int)devpair->pp_minor); (void)unregister_driver(devname); /* Close the contained file structures */ - (void)file_close_detached(&devpair->pp_ptyp.pd_src); - (void)file_close_detached(&devpair->pp_ptyp.pd_sink); - (void)file_close_detached(&devpair->pp_ttyp.pd_src); - (void)file_close_detached(&devpair->pp_ttyp.pd_sink); + (void)file_close_detached(&devpair->pp_master.pd_src); + (void)file_close_detached(&devpair->pp_master.pd_sink); + (void)file_close_detached(&devpair->pp_slave.pd_src); + (void)file_close_detached(&devpair->pp_slave.pd_sink); + +#ifdef CONFIG_PSEUDOTERM_SUSV1 + /* Free this minor number so that it can be reused */ + + ptmx_minor_free(devpair->pp_minor); +#endif /* And free the device structure */ sem_destroy(&devpair->pp_exclsem); - kmm_free(upper); + kmm_free(devpair); } #endif @@ -189,28 +275,77 @@ static int pty_open(FAR struct file *filep) { FAR struct inode *inode; FAR struct pty_dev_s *dev; - FAR struct pty_common_s *devpair; + FAR struct pty_devpair_s *devpair; int ret; - DEBUGASSERT(filep != NULL && file->f_inode != NULL); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); inode = filep->f_inode; dev = inode->i_private; DEBUGASSERT(dev != NULL && dev->pd_devpair != NULL); devpair = dev->pd_devpair; - /* Get exclusive access */ - - pty_semtake(devpair); - - /* If one side of the driver has been unlinked, then refuse further - * opens. + /* Wait if this is an attempt to open the slave device and the slave + * device is locked. */ - if (cmd->pp_unlinked) + if (!dev->pd_master) { - ret = -EIDRAM + /* Slave... Check if the slave driver is locked. We need to lock the + * scheduler while we are running to prevent asyncrhonous modification + * of pp_locked by pty_ioctl(). + */ + + sched_lock(); + while (devpair->pp_locked) + { + /* Wait until unlocked. We will also most certainly suspend here. */ + + sem_wait(&devpair->pp_slavesem); + + /* Get exclusive access to the device structure. This might also + * cause suspension. + */ + + pty_semtake(devpair); + + /* Check again in case something happened asynchronously while we + * were suspended. + */ + + if (devpair->pp_locked) + { + /* This cannot suspend because we have the scheduler locked. + * So pp_locked cannot change asyncrhonously between this test + * and the redundant test at the top of the loop. + */ + + pty_semgive(devpair); + } + } + + sched_unlock(); } else + { + /* Master ... Get exclusive access to the device structure */ + + pty_semtake(devpair); + } + +#ifndef CONFIG_PSEUDOTERM_SUSV1 + /* If one side of the driver has been unlinked, then refuse further + * opens. + * + * NOTE: We ignore this case in the SUSv1 case. In the SUSv1 case, the + * master side is always unlinked. + */ + + if (devpair->pp_unlinked) + { + ret = -EIDRM; + } + else +#endif { /* Increment the count of open references on the driver */ @@ -234,9 +369,9 @@ static int pty_close(FAR struct file *filep) { FAR struct inode *inode; FAR struct pty_dev_s *dev; - FAR struct pty_common_s *devpair; + FAR struct pty_devpair_s *devpair; - DEBUGASSERT(filep != NULL && file->f_inode != NULL); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); inode = filep->f_inode; dev = inode->i_private; DEBUGASSERT(dev != NULL && dev->pd_devpair != NULL); @@ -246,12 +381,28 @@ static int pty_close(FAR struct file *filep) pty_semtake(devpair); - /* Is this the last open reference? */ +#ifdef CONFIG_PSEUDOTERM_SUSV1 + /* Did the (single) master just close its reference? */ + + if (dev->pd_master) + { + /* Yes, then we are essentially unlinked and when all of the + * slaves close there references, then the PTY should be + * destroyed. + */ + + devpair->pp_unlinked = true; + } +#endif + + /* Is this the last open reference? If so, was the driver previously + * unlinked? + */ DEBUGASSERT(devpair->pp_nopen > 0); if (devpair->pp_nopen <= 1 && devpair->pp_unlinked) { - /* Free the device pair now (without freeing the semaphore) */ + /* Yes.. Free the device pair now (without freeing the semaphore) */ pty_destroy(devpair); return OK; @@ -276,13 +427,176 @@ static ssize_t pty_read(FAR struct file *filep, FAR char *buffer, size_t len) { FAR struct inode *inode; FAR struct pty_dev_s *dev; + ssize_t ntotal; +#ifdef CONFIG_SERIAL_TERMIOS + ssize_t nread; + size_t i; + char ch; + int ret; +#endif - DEBUGASSERT(filep != NULL && file->f_inode != NULL); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); inode = filep->f_inode; dev = inode->i_private; DEBUGASSERT(dev != NULL); - return file_read(&dev->src, buffer, len); +#ifdef CONFIG_SERIAL_TERMIOS + /* Do input processing if any is enabled + * + * Specifically not handled: + * + * All of the local modes; echo, line editing, etc. + * Anything to do with break or parity errors. + * ISTRIP - We should be 8-bit clean. + * IUCLC - Not Posix + * IXON/OXOFF - No xon/xoff flow control. + */ + + if (dev->pd_iflag & (INLCR | IGNCR | ICRNL)) + { + /* We will transfer one byte at a time, making the appropriate + * translations. + */ + + ntotal = 0; + for (i = 0; i < len; i++) + { +#ifndef CONFIG_PSEUDOTERM_FULLBLOCKS + /* This logic should return if the pipe becomes empty after some + * bytes were read from the pipe. If we have already read some + * data, we use the FIONREAD ioctl to test if there are more bytes + * in the pipe. + * + * REVISIT: An alternative design might be to (1) configure the + * source file as non-blocking, then (2) wait using poll() for the + * first byte to be received. (3) Subsequent bytes would + * use file_read() without polling and would (4) terminate when no + * data is returned. + */ + + if (ntotal > 0) + { + int nsrc; + + /* There are inherent race conditions in this test. We lock + * the scheduler before the test and after the file_read() + * below to eliminate one race: (a) We detect that there is + * data in the source file, (b) we are suspended and another + * thread reads the data, emptying the fifo, then (c) we + * resume and call file_read(), blocking indefinitely. + */ + + sched_lock(); + + /* Check how many bytes are waiting in the pipe */ + + ret = file_ioctl(&dev->pd_src, FIONREAD, + (unsigned long)((uintptr_t)&nsrc)); + if (ret < 0) + { + sched_unlock(); + ntotal = ret; + break; + } + + /* Break out of the loop and return ntotal if the pipe is + * empty. This is another race: There fifo was empty when we + * called file_ioctl() above, but it might not be empty right + * now. Losing that race should not lead to any bad behaviors, + * however, we the caller will get those bytes on the next + * read. + */ + + if (nsrc < 1) + { + sched_unlock(); + break; + } + + /* Read one byte from the source the byte. This should not + * block. + */ + + nread = file_read(&dev->pd_src, &ch, 1); + sched_unlock(); + } + else +#else + /* If we wanted to return full blocks of data, then file_read() + * may need to be called repeatedly. That is because the pipe + * read() method will return early if the fifo becomes empty + * after any data has been read. + */ + +# error Missing logic +#endif + { + /* Read one byte from the source the byte. This call will + * block if the source pipe is empty. + * + * REVISIT: Should not block if the oflags include O_NONBLOCK. + * How would we ripple the O_NONBLOCK characteristic to the + * contained soruce pipe? file_vfcntl()? Or FIONREAD? See the + * TODO comment at the top of this file. + */ + + nread = file_read(&dev->pd_src, &ch, 1); + } + + /* Check if file_read was successful */ + + if (nread < 0) + { + ntotal = nread; + break; + } + + /* Perform input processing */ + /* \n -> \r or \r -> \n translation? */ + + if (ch == '\n' && (dev->pd_iflag & INLCR) != 0) + { + ch = '\r'; + } + else if (ch == '\r' && (dev->pd_iflag & ICRNL) != 0) + { + ch = '\n'; + } + + /* Discarding \r ? Print character if (1) character is not \r or + * if (2) we were not asked to ignore \r. + */ + + if (ch != '\r' || (dev->pd_iflag & IGNCR) == 0) + { + + /* Transfer the (possibly translated) character and update the + * count of bytes transferred. + */ + + *buffer++ = ch; + ntotal++; + } + } + } + else +#endif + { + /* NOTE: the source pipe will block if no data is available in + * the pipe. Otherwise, it will return data from the pipe. If + * there are fewer than 'len' bytes in the, it will return with + * ntotal < len. + * + * REVISIT: Should not block if the oflags include O_NONBLOCK. + * How would we ripple the O_NONBLOCK characteristic to the + * contained source pipe? file_vfcntl()? Or FIONREAD? See the + * TODO comment at the top of this file. + */ + + ntotal = file_read(&dev->pd_src, buffer, len); + } + + return ntotal; } /**************************************************************************** @@ -293,13 +607,108 @@ static ssize_t pty_write(FAR struct file *filep, FAR const char *buffer, size_t { FAR struct inode *inode; FAR struct pty_dev_s *dev; + ssize_t ntotal; +#ifdef CONFIG_SERIAL_TERMIOS + ssize_t nwritten; + size_t i; + char ch; +#endif - DEBUGASSERT(filep != NULL && file->f_inode != NULL); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); inode = filep->f_inode; dev = inode->i_private; DEBUGASSERT(dev != NULL); - return file_write(&dev->src, buffer, len); +#ifdef CONFIG_SERIAL_TERMIOS + /* Do output post-processing */ + + if ((dev->pd_oflag & OPOST) != 0) + { + /* We will transfer one byte at a time, making the appropriae + * translations. Specifically not handled: + * + * OXTABS - primarily a full-screen terminal optimisation + * ONOEOT - Unix interoperability hack + * OLCUC - Not specified by POSIX + * ONOCR - low-speed interactive optimisation + */ + + ntotal = 0; + for (i = 0; i < len; i++) + { + ch = *buffer++; + + /* Mapping CR to NL? */ + + if (ch == '\r' && (dev->pd_oflag & OCRNL) != 0) + { + ch = '\n'; + } + + /* Are we interested in newline processing? */ + + if ((ch == '\n') && (dev->pd_oflag & (ONLCR | ONLRET)) != 0) + { + char cr = '\r'; + + /* Transfer the carriage return. This will block if the + * sink pipe is full. + * + * REVISIT: Should not block if the oflags include O_NONBLOCK. + * How would we ripple the O_NONBLOCK characteristic to the + * contained sink pipe? file_vfcntl()? Or FIONSPACE? See the + * TODO comment at the top of this file. + */ + + nwritten = file_write(&dev->pd_sink, &cr, 1); + if (nwritten < 0) + { + ntotal = nwritten; + break; + } + + /* Update the count of bytes transferred */ + + ntotal++; + } + + /* Transfer the (possibly translated) character.. This will block + * if the sink pipe is full + * + * REVISIT: Should not block if the oflags include O_NONBLOCK. + * How would we ripple the O_NONBLOCK characteristic to the + * contained sink pipe? file_vfcntl()? Or FIONSPACe? See the + * TODO comment at the top of this file. + */ + + nwritten = file_write(&dev->pd_sink, &ch, 1); + if (nwritten < 0) + { + ntotal = nwritten; + break; + } + + /* Update the count of bytes transferred */ + + ntotal++; + } + } + else +#endif + { + /* Write the 'len' bytes to the sink pipe. This will block until all + * 'len' bytes have been written to the pipe. + * + * REVISIT: Should not block if the oflags include O_NONBLOCK. + * How would we ripple the O_NONBLOCK characteristic to the + * contained sink pipe? file_vfcntl()? Or FIONSPACE? See the + * TODO comment at the top of this file. + */ + + ntotal = file_write(&dev->pd_sink, buffer, len); + } + + return ntotal; } /**************************************************************************** @@ -314,36 +723,180 @@ static int pty_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode; FAR struct pty_dev_s *dev; + FAR struct pty_devpair_s *devpair; int ret; - DEBUGASSERT(filep != NULL && file->f_inode != NULL); - inode = filep->f_inode; - dev = inode->i_private; - DEBUGASSERT(dev != NULL); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); + inode = filep->f_inode; + dev = inode->i_private; + DEBUGASSERT(dev != NULL && dev->pd_devpair != NULL); + devpair = dev->pd_devpair; + + /* Get exclusive access */ + + pty_semtake(devpair); /* Handle IOCTL commands */ switch (cmd) { /* PTY IOCTL commands would be handled here */ - /* There aren't any yet */ + + case TIOCGPTN: /* Get Pty Number (of pty-mux device): FAR int* */ + { +#ifdef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + ret = -ENOSYS; +#else + FAR int *ptyno = (FAR int *)((uintptr_t)arg); + if (ptyno == NULL) + { + ret = -EINVAL; + } + else + { + *ptyno = (int)devpair->pp_minor; + ret = OK; + } +#endif + } + break; + + case TIOCSPTLCK: /* Lock/unlock Pty: int */ + { + if (arg == 0) + { + int sval; + + /* Unlocking */ + + sched_lock(); + devpair->pp_locked = false; + + /* Release any waiting threads */ + + do + { + DEBUGVERIFY(sem_getvalue(&devpair->pp_slavesem, &sval)); + if (sval < 0) + { + sem_post(&devpair->pp_slavesem); + } + } + while (sval < 0); + + sched_unlock(); + ret = OK; + } + else + { + /* Locking */ + + devpair->pp_locked = true; + ret = OK; + } + } + break; + + case TIOCGPTLCK: /* Get Pty lock state: FAR int* */ + { + FAR int *ptr = (FAR int *)((uintptr_t)arg); + if (ptr == NULL) + { + ret = -EINVAL; + } + else + { + *ptr = (int)devpair->pp_locked; + ret = OK; + } + } + break; + +#ifdef CONFIG_SERIAL_TERMIOS + case TCGETS: + { + FAR struct termios *termiosp = (FAR struct termios *)arg; + + if (!termiosp) + { + ret = -EINVAL; + break; + } + + /* And update with flags from this layer */ + + termiosp->c_iflag = dev->pd_iflag; + termiosp->c_oflag = dev->pd_oflag; + termiosp->c_lflag = 0; + ret = OK; + } + break; + + case TCSETS: + { + FAR struct termios *termiosp = (FAR struct termios *)arg; + + if (!termiosp) + { + ret = -EINVAL; + break; + } + + /* Update the flags we keep at this layer */ + + dev->pd_iflag = termiosp->c_iflag; + dev->pd_oflag = termiosp->c_oflag; + ret = OK; + } + break; +#endif + + /* Get the number of bytes that are immediately available for reading + * from the source pipe. + */ + + case FIONREAD: + { + ret = file_ioctl(&dev->pd_src, cmd, arg); + } + break; + + /* Get the number of bytes waiting in the sink pipe (FIONWRITE) or the + * number of unused bytes in the sink pipe (FIONSPACE). + */ + + case FIONWRITE: + case FIONSPACE: + { + ret = file_ioctl(&dev->pd_sink, cmd, arg); + } + break; /* Any unrecognized IOCTL commands will be passed to the contained * pipe driver. + * + * REVISIT: We know for a fact that the pipe driver only supports + * FIONREAD, FIONWRITE, FIONSPACE and PIPEIOC_POLICY. The first two + * are handled above and PIPEIOC_POLICY should not be managed by + * applications -- it can break the PTY! */ default: { - ret = file_ioctl(dev->pd_src, cmd, arg); +#if 0 + ret = file_ioctl(&dev->pd_src, cmd, arg); if (ret >= 0 || ret == -ENOTTY) { - ret = file_ioctl(dev->pd_sink, cmd, arg); + ret = file_ioctl(&dev->pd_sink, cmd, arg); } +#else + ret = ENOTTY; +#endif } break; } - sem_post(&upper->exclsem); + pty_semgive(devpair); return ret; } @@ -353,9 +906,39 @@ static int pty_ioctl(FAR struct file *filep, int cmd, unsigned long arg) #ifndef CONFIG_DISABLE_POLL static int pty_poll(FAR struct file *filep, FAR struct pollfd *fds, - bool setup) + bool setup) { -#warning Missing logic + FAR struct inode *inode; + FAR struct pty_dev_s *dev; + int ret = -ENOSYS; + + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); + inode = filep->f_inode; + dev = inode->i_private; + + /* REVISIT: If both POLLIN and POLLOUT are set, might the following logic + * fail? Could we not get POLLIN on the sink file and POLLOUT on the source + * file? + */ + + /* POLLIN: Data other than high-priority data may be read without blocking. */ + + if ((fds->events & POLLIN) != 0) + { + ret = file_poll(&dev->pd_src, fds, setup); + } + + if (ret >= OK || ret == -ENOTTY) + { + /* POLLOUT: Normal data may be written without blocking. */ + + if ((fds->events & POLLOUT) != 0) + { + ret = file_poll(&dev->pd_sink, fds, setup); + } + } + + return ret; } #endif @@ -366,15 +949,13 @@ static int pty_poll(FAR struct file *filep, FAR struct pollfd *fds, #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS static int pty_unlink(FAR struct inode *inode) { - FAR struct inode *inode; FAR struct pty_dev_s *dev; - FAR struct pty_common_s *devpair; + FAR struct pty_devpair_s *devpair; - DEBUGASSERT(filep != NULL && file->f_inode != NULL); - inode = filep->f_inode; + DEBUGASSERT(inode != NULL && inode->i_private != NULL); dev = inode->i_private; - DEBUGASSERT(dev != NULL && dev->pd_devpair != NULL); devpair = dev->pd_devpair; + DEBUGASSERT(dev->pd_devpair != NULL); /* Get exclusive access */ @@ -405,10 +986,17 @@ static int pty_unlink(FAR struct inode *inode) /**************************************************************************** * Name: pty_register * - * Input Parameters: - * * Description: - * Register /dev/ttypN and /dev/ptpN where N=minor number + * Create and register PTY master and slave devices. The slave side of + * the interface is always locked initially. The master must call + * unlockpt() before the slave device can be opened. + * + * Input Parameters: + * minor - The number that qualifies the naming of the created devices. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure. * ****************************************************************************/ @@ -418,6 +1006,7 @@ int pty_register(int minor) int pipe_a[2]; int pipe_b[2]; char devname[16]; + int ret; /* Allocate a device instance */ @@ -427,22 +1016,29 @@ int pty_register(int minor) return -ENOMEM; } -#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + sem_init(&devpair->pp_slavesem, 0, 0); sem_init(&devpair->pp_exclsem, 0, 1); - devpair->pp_minor = minor; +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + devpair->pp_minor = minor; #endif - devpair->pp_ptyp.pd_devpair = devpair; - devpair->pp_ttyp.pd_devpair = devpair; + devpair->pp_locked = true; + devpair->pp_master.pd_devpair = devpair; + devpair->pp_master.pd_master = true; + devpair->pp_slave.pd_devpair = devpair; - /* Create two pipes */ + /* Create two pipes: + * + * pipe_a: Master source, slave sink (TX, slave-to-master) + * pipe_b: Master sink, slave source (RX, master-to-slave) + */ - ret = pipe(pipe_a); + ret = pipe2(pipe_a, CONFIG_PSEUDOTERM_TXBUFSIZE); if (ret < 0) { goto errout_with_devpair; } - ret = pipe(pipe_b); + ret = pipe2(pipe_b, CONFIG_PSEUDOTERM_RXBUFSIZE); if (ret < 0) { goto errout_with_pipea; @@ -454,7 +1050,7 @@ int pty_register(int minor) * fd[1] is for writing. */ - ret = file_detach(pipe_a[0], &devpair->pp_ptyp.pd_src); + ret = file_detach(pipe_a[0], &devpair->pp_master.pd_src); if (ret < 0) { goto errout_with_pipeb; @@ -462,7 +1058,7 @@ int pty_register(int minor) pipe_a[0] = -1; - ret = file_detach(pipe_a[1], &devpair->pp_ttyp.pd_sink); + ret = file_detach(pipe_a[1], &devpair->pp_slave.pd_sink); if (ret < 0) { goto errout_with_pipeb; @@ -470,7 +1066,7 @@ int pty_register(int minor) pipe_a[1] = -1; - ret = file_detach(pipe_b[0], &devpair->pp_ttyp.pd_src); + ret = file_detach(pipe_b[0], &devpair->pp_slave.pd_src); if (ret < 0) { goto errout_with_pipeb; @@ -478,7 +1074,7 @@ int pty_register(int minor) pipe_b[0] = -1; - ret = file_detach(pipe_b[1], &devpair->pp_ptyp.pd_sink); + ret = file_detach(pipe_b[1], &devpair->pp_master.pd_sink); if (ret < 0) { goto errout_with_pipeb; @@ -486,31 +1082,51 @@ int pty_register(int minor) pipe_b[1] = -1; - /* Register /dev/ptypN */ + /* Register the slave device + * + * BSD style (deprecated): /dev/ttypN + * SUSv1 style: /dev/pts/N + * + * Where N is the minor number + */ +#ifdef CONFIG_PSEUDOTERM_BSD + snprintf(devname, 16, "/dev/ttyp%d", minor); +#else snprintf(devname, 16, "/dev/pts/%d", minor); +#endif - ret = register_driver(devname, &pty_fops, 0666, &devpair->pp_ptyp); + ret = register_driver(devname, &g_pty_fops, 0666, &devpair->pp_slave); if (ret < 0) { goto errout_with_pipeb; } - - /* Register /dev/ptypN */ - snprintf(devname, 16, "/dev/ttyp%d", minor); + /* Register the master device + * + * BSD style (deprecated): /dev/ptyN + * SUSv1 style: Master: /dev/ptmx (multiplexor, see ptmx.c) + * + * Where N is the minor number + */ - ret = register_driver(devname, &pty_fops, 0666, &devpair->pp_ttyp); + snprintf(devname, 16, "/dev/pty%d", minor); + + ret = register_driver(devname, &g_pty_fops, 0666, &devpair->pp_master); if (ret < 0) { - goto errout_with_ptyp; + goto errout_with_slave; } return OK; -errout_with_ptyp: - snprintf(devname, 16, "/dev/ptyp%d", minor); - (void)unregister_driver(devname) +errout_with_slave: +#ifdef CONFIG_PSEUDOTERM_BSD + snprintf(devname, 16, "/dev/ttyp%d", minor); +#else + snprintf(devname, 16, "/dev/pts/%d", minor); +#endif + (void)unregister_driver(devname); errout_with_pipeb: if (pipe_b[0] >= 0) @@ -519,7 +1135,7 @@ errout_with_pipeb: } else { - (void)file_close_detached(&devpair->pp_ptyp.pd_src); + (void)file_close_detached(&devpair->pp_master.pd_src); } if (pipe_b[1] >= 0) @@ -528,7 +1144,7 @@ errout_with_pipeb: } else { - (void)file_close_detached(&devpair->pp_ttyp.pd_sink); + (void)file_close_detached(&devpair->pp_slave.pd_sink); } errout_with_pipea: @@ -538,7 +1154,7 @@ errout_with_pipea: } else { - (void)file_close_detached(&devpair->pp_ttyp.pd_src); + (void)file_close_detached(&devpair->pp_slave.pd_src); } if (pipe_a[1] >= 0) @@ -547,13 +1163,12 @@ errout_with_pipea: } else { - (void)file_close_detached(&devpair->pp_ptyp.pd_sink); + (void)file_close_detached(&devpair->pp_master.pd_sink); } errout_with_devpair: -#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS sem_destroy(&devpair->pp_exclsem); -#endif + sem_destroy(&devpair->pp_slavesem); kmm_free(devpair); return ret; } diff --git a/drivers/serial/pty.h b/drivers/serial/pty.h new file mode 100644 index 00000000000..1c3d96ae5d4 --- /dev/null +++ b/drivers/serial/pty.h @@ -0,0 +1,101 @@ +/**************************************************************************** + * drivers/serial/pty.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __DRIVERS_SERIAL_PTY_H +#define __DRIVERS_SERIAL_PTY_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: ptmx_minor_free + * + * Description: + * De-allocate a PTY minor number. + * + * Assumptions: + * Caller hold the px_exclsem + * + ****************************************************************************/ + +#ifdef CONFIG_PSEUDOTERM_SUSV1 +void ptmx_minor_free(uint8_t minor); +#endif + +/**************************************************************************** + * Name: pty_register + * + * Description: + * Create and register PTY master and slave devices. The master device + * will be registered at /dev/ptyN and slave at /dev/pts/N where N is + * the provided minor number. + * + * The slave side of the interface is always locked initially. The + * master must call unlockpt() before the slave device can be opened. + * + * Input Parameters: + * minor - The number that qualifies the naming of the created devices. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_PSEUDOTERM_SUSV1 +int pty_register(int minor); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __DRIVERS_SERIAL_PTY_H */ diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index c98867d6ff7..2b6d7ec8e53 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -208,50 +208,75 @@ static int uart_putxmitchar(FAR uart_dev_t *dev, int ch, bool oktoblock) nexthead = 0; } - /* Loop until we are able to add the character to the TX buffer */ + /* Loop until we are able to add the character to the TX buffer. */ for (; ; ) { + /* Check if the TX buffer is full */ + if (nexthead != dev->xmit.tail) { + /* No.. not full. Add the character to the TX buffer and return. */ + dev->xmit.buffer[dev->xmit.head] = ch; dev->xmit.head = nexthead; return OK; } - /* The buffer is full and no data is available now. Should be block, - * waiting for the hardware to remove some data from the TX - * buffer? + /* The TX buffer is full. Should be block, waiting for the hardware + * to remove some data from the TX buffer? */ else if (oktoblock) { - /* Inform the interrupt level logic that we are waiting. This and - * the following steps must be atomic. + /* The following steps must be atomic with respect to serial + * interrupt handling. */ flags = enter_critical_section(); + /* Check again... In certain race conditions an interrupt may + * have occurred between the test at the top of the loop and + * entering the critical section and the TX buffer may no longer + * be full. + * + * NOTE: On certain devices, such as USB CDC/ACM, the entire TX + * buffer may have been emptied in this race condition. In that + * case, the logic would hang below waiting for space in the TX + * buffer without this test. + */ + + if (nexthead != dev->xmit.tail) + { + ret = OK; + } + #ifdef CONFIG_SERIAL_REMOVABLE /* Check if the removable device is no longer connected while we * have interrupts off. We do not want the transition to occur * as a race condition before we begin the wait. */ - if (dev->disconnected) + else if (dev->disconnected) { ret = -ENOTCONN; } - else #endif + else { - /* Wait for some characters to be sent from the buffer with - * the TX interrupt enabled. When the TX interrupt is - * enabled, uart_xmitchars should execute and remove some - * of the data from the TX buffer. - */ + /* Inform the interrupt level logic that we are waiting. */ dev->xmitwaiting = true; + + /* Wait for some characters to be sent from the buffer with + * the TX interrupt enabled. When the TX interrupt is enabled, + * uart_xmitchars() should execute and remove some of the data + * from the TX buffer. + * + * NOTE that interrupts will be re-enabled while we wait for + * the semaphore. + */ + #ifdef CONFIG_SERIAL_DMA uart_dmatxavail(dev); #endif @@ -885,12 +910,16 @@ static int uart_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { switch (cmd) { + /* Get the number of bytes that may be read from the RX buffer + * (without waiting) + */ + case FIONREAD: { int count; irqstate_t flags = enter_critical_section(); - /* Determine the number of bytes available in the buffer */ + /* Determine the number of bytes available in the RX buffer */ if (dev->recv.tail <= dev->recv.head) { @@ -908,12 +937,39 @@ static int uart_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; + /* Get the number of bytes that have been written to the TX buffer. */ + case FIONWRITE: { int count; irqstate_t flags = enter_critical_section(); - /* Determine the number of bytes free in the buffer */ + /* Determine the number of bytes waiting in the TX buffer */ + + if (dev->xmit.tail <= dev->xmit.head) + { + count = dev->xmit.head - dev->xmit.tail; + } + else + { + count = dev->xmit.size - (dev->xmit.tail - dev->xmit.head); + } + + leave_critical_section(flags); + + *(FAR int *)((uintptr_t)arg) = count; + ret = 0; + } + break; + + /* Get the number of free bytes in the TX buffer */ + + case FIONSPACE: + { + int count; + irqstate_t flags = enter_critical_section(); + + /* Determine the number of bytes free in the TX buffer */ if (dev->xmit.head < dev->xmit.tail) { diff --git a/drivers/usbdev/cdcacm.c b/drivers/usbdev/cdcacm.c index 28d498363b0..64e2e68075d 100644 --- a/drivers/usbdev/cdcacm.c +++ b/drivers/usbdev/cdcacm.c @@ -1982,12 +1982,16 @@ static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; #endif + /* Get the number of bytes that may be read from the RX buffer (without + * waiting) + */ + case FIONREAD: { int count; irqstate_t flags = enter_critical_section(); - /* Determine the number of bytes available in the buffer. */ + /* Determine the number of bytes available in the RX buffer. */ if (serdev->recv.tail <= serdev->recv.head) { @@ -2005,12 +2009,39 @@ static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; + /* Get the number of bytes that have been written to the TX buffer. */ + case FIONWRITE: { int count; irqstate_t flags = enter_critical_section(); - /* Determine the number of bytes free in the buffer. */ + /* Determine the number of bytes waiting in the TX buffer. */ + + if (serdev->xmit.tail <= serdev->xmit.head) + { + count = serdev->xmit.head - serdev->xmit.tail; + } + else + { + count = serdev->xmit.size - (serdev->xmit.tail - serdev->xmit.head); + } + + leave_critical_section(flags); + + *(int *)arg = count; + ret = 0; + } + break; + + /* Get the number of free bytes in the TX buffer */ + + case FIONSPACE: + { + int count; + irqstate_t flags = enter_critical_section(); + + /* Determine the number of bytes free in the TX buffer */ if (serdev->xmit.head < serdev->xmit.tail) { diff --git a/drivers/usbdev/usbdev_strings.c b/drivers/usbdev/usbdev_strings.c index 9dc9afdc407..d8c35189f0a 100644 --- a/drivers/usbdev/usbdev_strings.c +++ b/drivers/usbdev/usbdev_strings.c @@ -177,7 +177,7 @@ const struct trace_msg_t g_usb_trace_strings_clserror[] = TRACE_STR(USBMSC_TRACEERR_CMDREADREADFAIL), TRACE_STR(USBMSC_TRACEERR_CMDREADSUBMIT), TRACE_STR(USBMSC_TRACEERR_CMDREADWRRQEMPTY), - TRACE_STR(USBMSC_TRACEERR_CMDSTATUSRDREQLISTEMPTY), + TRACE_STR(USBMSC_TRACEERR_CMDSTATUSWRREQLISTEMPTY), TRACE_STR(USBMSC_TRACEERR_CMDUNEVIOLATION), TRACE_STR(USBMSC_TRACEERR_CMDWRITERDSUBMIT), TRACE_STR(USBMSC_TRACEERR_CMDWRITERDRQEMPTY), diff --git a/drivers/usbdev/usbmsc_scsi.c b/drivers/usbdev/usbmsc_scsi.c index fd9e55cb6b4..d088312ca94 100644 --- a/drivers/usbdev/usbmsc_scsi.c +++ b/drivers/usbdev/usbmsc_scsi.c @@ -2263,7 +2263,9 @@ static int usbmsc_cmdwritestate(FAR struct usbmsc_dev_s *priv) * data to be written. */ + irqstate_t flags = enter_critical_section(); privreq = (FAR struct usbmsc_req_s *)sq_remfirst(&priv->rdreqlist); + leave_critical_section(flags); /* If there no request data available, then just return an error. * This will cause us to remain in the CMDWRITE state. When a filled request is @@ -2537,7 +2539,7 @@ static int usbmsc_cmdstatusstate(FAR struct usbmsc_dev_s *priv) if (!privreq) { - usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_CMDSTATUSRDREQLISTEMPTY), 0); + usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_CMDSTATUSWRREQLISTEMPTY), 0); return -ENOMEM; } @@ -2639,8 +2641,8 @@ int usbmsc_scsi_main(int argc, char *argv[]) uinfo("Waiting to be signalled\n"); usbmsc_scsi_lock(priv); priv->thstate = USBMSC_STATE_STARTED; - while ((priv->theventset & USBMSC_EVENT_READY) != 0 && - (priv->theventset & USBMSC_EVENT_TERMINATEREQUEST) != 0) + while ((priv->theventset & USBMSC_EVENT_READY) == 0 && + (priv->theventset & USBMSC_EVENT_TERMINATEREQUEST) == 0) { usbmsc_scsi_wait(priv); } diff --git a/drivers/wireless/cc1101.c b/drivers/wireless/cc1101.c index 8d8958fc728..aa27eda883b 100644 --- a/drivers/wireless/cc1101.c +++ b/drivers/wireless/cc1101.c @@ -97,11 +97,13 @@ ****************************************************************************/ #include -#include + #include #include -#include #include +#include +#include +#include #include #include @@ -450,6 +452,8 @@ void cc1101_dumpregs(struct cc1101_dev_s * dev, uint8_t addr, uint8_t length) cc1101_access(dev, addr, (FAR uint8_t *)buf, length); + /* REVISIT: printf() should not be used from within the OS */ + printf("CC1101[%2x]: ", addr); for (i = 0; i < length; i++) { @@ -814,7 +818,7 @@ int cc1101_read(struct cc1101_dev_s * dev, uint8_t * buf, size_t size) if (nbytes > size || (nbytes <= size && !(buf[nbytes-1]&0x80))) { - printf("Flushing RX FIFO\n"); + ninfo("Flushing RX FIFO\n"); cc1101_strobe(dev, CC1101_SFRX); } diff --git a/fs/driver/driver.h b/fs/driver/driver.h index 9b7f59bdb79..7cd14c56fa3 100644 --- a/fs/driver/driver.h +++ b/fs/driver/driver.h @@ -63,7 +63,6 @@ extern "C" * Public Function Prototypes ****************************************************************************/ -/* fs_findblockdriver.c *****************************************************/ /**************************************************************************** * Name: find_blockdriver * @@ -92,7 +91,6 @@ int find_blockdriver(FAR const char *pathname, int mountflags, FAR struct inode **ppinode); #endif -/* fs/drivers/fs_blockproxy.c ***********************************************/ /**************************************************************************** * Name: block_proxy * diff --git a/fs/driver/fs_blockproxy.c b/fs/driver/fs_blockproxy.c index 045110ac404..8da06d3e0b3 100644 --- a/fs/driver/fs_blockproxy.c +++ b/fs/driver/fs_blockproxy.c @@ -1,7 +1,7 @@ /**************************************************************************** * fs/driver/fs_blockproxy.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -53,7 +53,7 @@ #include #include -#include +#include #if !defined(CONFIG_DISABLE_PSEUDOFS_OPERATIONS) && \ !defined(CONFIG_DISABLE_MOUNTPOINT) diff --git a/fs/fat/fs_fat32.c b/fs/fat/fs_fat32.c index 618aa22e2f3..774db3c276d 100644 --- a/fs/fat/fs_fat32.c +++ b/fs/fat/fs_fat32.c @@ -1054,6 +1054,18 @@ static off_t fat_seek(FAR struct file *filep, off_t offset, int whence) return -EINVAL; } + /* Special case: We are seeking to the current position. This would + * happen normally with ftell() which does lseek(fd, 0, SEEK_CUR) but can + * also happen in other situation such as when SEEK_SET is used to assure + * assure sequential access in a multi-threaded environment where there + * may be are multiple users to the file descriptor. + */ + + if (position == filep->f_pos) + { + return OK; + } + /* Make sure that the mount is still healthy */ fat_semtake(fs); diff --git a/fs/hostfs/hostfs.c b/fs/hostfs/hostfs.c index ee57d8295f5..afee46afd46 100644 --- a/fs/hostfs/hostfs.c +++ b/fs/hostfs/hostfs.c @@ -161,7 +161,7 @@ const struct mountpt_operations hostfs_operations = * Name: hostfs_semtake ****************************************************************************/ -void hostfs_semtake(struct hostfs_mountpt_s *fs) +void hostfs_semtake(FAR struct hostfs_mountpt_s *fs) { /* Take the semaphore (perhaps waiting) */ @@ -179,7 +179,7 @@ void hostfs_semtake(struct hostfs_mountpt_s *fs) * Name: hostfs_semgive ****************************************************************************/ -void hostfs_semgive(struct hostfs_mountpt_s *fs) +void hostfs_semgive(FAR struct hostfs_mountpt_s *fs) { sem_post(fs->fs_sem); } @@ -191,12 +191,13 @@ void hostfs_semgive(struct hostfs_mountpt_s *fs) * ****************************************************************************/ -static void hostfs_mkpath(struct hostfs_mountpt_s *fs, const char *relpath, - char *path, int pathlen) +static void hostfs_mkpath(FAR struct hostfs_mountpt_s *fs, + FAR const char *relpath, + FAR char *path, int pathlen) { - int depth = 0; - int first; - int x; + int depth = 0; + int first; + int x; /* Copy base host path to output */ @@ -247,14 +248,14 @@ static void hostfs_mkpath(struct hostfs_mountpt_s *fs, const char *relpath, * Name: hostfs_open ****************************************************************************/ -static int hostfs_open(FAR struct file *filep, const char *relpath, +static int hostfs_open(FAR struct file *filep, FAR const char *relpath, int oflags, mode_t mode) { - struct inode *inode; - struct hostfs_mountpt_s *fs; - int ret; - struct hostfs_ofile_s *hf; - char path[HOSTFS_MAX_PATH]; + FAR struct inode *inode; + FAR struct hostfs_mountpt_s *fs; + FAR struct hostfs_ofile_s *hf; + char path[HOSTFS_MAX_PATH]; + int ret; /* Sanity checks */ @@ -335,11 +336,11 @@ errout_with_semaphore: static int hostfs_close(FAR struct file *filep) { - struct inode *inode; - struct hostfs_mountpt_s *fs; - struct hostfs_ofile_s *hf; - struct hostfs_ofile_s *nextfile; - struct hostfs_ofile_s *prevfile; + FAR struct inode *inode; + FAR struct hostfs_mountpt_s *fs; + FAR struct hostfs_ofile_s *hf; + FAR struct hostfs_ofile_s *nextfile; + FAR struct hostfs_ofile_s *prevfile; /* Sanity checks */ @@ -415,12 +416,13 @@ okout: * Name: hostfs_read ****************************************************************************/ -static ssize_t hostfs_read(FAR struct file *filep, char *buffer, size_t buflen) +static ssize_t hostfs_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) { - struct inode *inode; - struct hostfs_mountpt_s *fs; - struct hostfs_ofile_s *hf; - int ret = OK; + FAR struct inode *inode; + FAR struct hostfs_mountpt_s *fs; + FAR struct hostfs_ofile_s *hf; + int ret = OK; /* Sanity checks */ @@ -453,10 +455,10 @@ static ssize_t hostfs_read(FAR struct file *filep, char *buffer, size_t buflen) static ssize_t hostfs_write(FAR struct file *filep, const char *buffer, size_t buflen) { - struct inode *inode; - struct hostfs_mountpt_s *fs; - struct hostfs_ofile_s *hf; - int ret; + FAR struct inode *inode; + FAR struct hostfs_mountpt_s *fs; + FAR struct hostfs_ofile_s *hf; + int ret; /* Sanity checks. I have seen the following assertion misfire if * CONFIG_DEBUG_MM is enabled while re-directing output to a @@ -511,10 +513,10 @@ errout_with_semaphore: static off_t hostfs_seek(FAR struct file *filep, off_t offset, int whence) { - struct inode *inode; - struct hostfs_mountpt_s *fs; - struct hostfs_ofile_s *hf; - int ret; + FAR struct inode *inode; + FAR struct hostfs_mountpt_s *fs; + FAR struct hostfs_ofile_s *hf; + int ret; /* Sanity checks */ @@ -546,10 +548,10 @@ static off_t hostfs_seek(FAR struct file *filep, off_t offset, int whence) static int hostfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { - struct inode *inode; - struct hostfs_mountpt_s *fs; - struct hostfs_ofile_s *hf; - int ret; + FAR struct inode *inode; + FAR struct hostfs_mountpt_s *fs; + FAR struct hostfs_ofile_s *hf; + int ret; /* Sanity checks */ @@ -585,9 +587,9 @@ static int hostfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg) static int hostfs_sync(FAR struct file *filep) { - struct inode *inode; - struct hostfs_mountpt_s *fs; - struct hostfs_ofile_s *hf; + FAR struct inode *inode; + FAR struct hostfs_mountpt_s *fs; + FAR struct hostfs_ofile_s *hf; /* Sanity checks */ @@ -620,7 +622,7 @@ static int hostfs_sync(FAR struct file *filep) static int hostfs_dup(FAR const struct file *oldp, FAR struct file *newp) { - struct hostfs_ofile_s *sf; + FAR struct hostfs_ofile_s *sf; /* Sanity checks */ @@ -649,11 +651,12 @@ static int hostfs_dup(FAR const struct file *oldp, FAR struct file *newp) * ****************************************************************************/ -static int hostfs_opendir(struct inode *mountpt, const char *relpath, struct fs_dirent_s *dir) +static int hostfs_opendir(FAR struct inode *mountpt, FAR const char *relpath, + FAR struct fs_dirent_s *dir) { - struct hostfs_mountpt_s *fs; - int ret; - char path[HOSTFS_MAX_PATH]; + FAR struct hostfs_mountpt_s *fs; + char path[HOSTFS_MAX_PATH]; + int ret; /* Sanity checks */ @@ -674,7 +677,6 @@ static int hostfs_opendir(struct inode *mountpt, const char *relpath, struct fs_ /* Call the host's opendir function */ dir->u.hostfs.fs_dir = host_opendir(path); - if (dir->u.hostfs.fs_dir == NULL) { ret = -ENOENT; @@ -696,7 +698,8 @@ errout_with_semaphore: * ****************************************************************************/ -static int hostfs_closedir(FAR struct inode *mountpt, FAR struct fs_dirent_s *dir) +static int hostfs_closedir(FAR struct inode *mountpt, + FAR struct fs_dirent_s *dir) { struct hostfs_mountpt_s *fs; @@ -727,11 +730,11 @@ static int hostfs_closedir(FAR struct inode *mountpt, FAR struct fs_dirent_s *di * ****************************************************************************/ -static int hostfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir) +static int hostfs_readdir(FAR struct inode *mountpt, + FAR struct fs_dirent_s *dir) { - struct hostfs_mountpt_s *fs; - int ret; - struct host_dirent_s entry; + FAR struct hostfs_mountpt_s *fs; + int ret; /* Sanity checks */ @@ -747,22 +750,7 @@ static int hostfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir) /* Call the host OS's readdir function */ - ret = host_readdir(dir->u.hostfs.fs_dir, &entry); - - /* Save the entry name when successful */ - - if (ret == OK) - { - /* Copy the entry name */ - memset(dir->fd_dir.d_name, 0, sizeof(dir->fd_dir.d_name)); - strncpy(dir->fd_dir.d_name, entry.d_name, sizeof(dir->fd_dir.d_name)); - - /* Copy the entry type */ - - /* TODO: May need to do some type mapping */ - - dir->fd_dir.d_type = entry.d_type; - } + ret = host_readdir(dir->u.hostfs.fs_dir, &dir->fd_dir); hostfs_semgive(fs); return ret; @@ -775,7 +763,8 @@ static int hostfs_readdir(struct inode *mountpt, struct fs_dirent_s *dir) * ****************************************************************************/ -static int hostfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir) +static int hostfs_rewinddir(FAR struct inode *mountpt, + FAR struct fs_dirent_s *dir) { /* Sanity checks */ @@ -799,13 +788,14 @@ static int hostfs_rewinddir(struct inode *mountpt, struct fs_dirent_s *dir) * ****************************************************************************/ -static int hostfs_bind(FAR struct inode *blkdriver, const void *data, - void **handle) +static int hostfs_bind(FAR struct inode *blkdriver, FAR const void *data, + FAR void **handle) { - struct hostfs_mountpt_s *fs; - struct host_stat_s buf; - int ret, len; - const char * options; + FAR struct hostfs_mountpt_s *fs; + struct stat buf; + FAR const char *options; + int len; + int ret; /* Validate the block driver is NULL */ @@ -871,7 +861,7 @@ static int hostfs_bind(FAR struct inode *blkdriver, const void *data, /* Try to stat the file in the host FS */ ret = host_stat(fs->fs_root, &buf); - if ((ret != 0) || ((buf.st_mode & HOST_ST_MODE_DIR) == 0)) + if (ret != 0 || (buf.st_mode & S_IFDIR) == 0) { hostfs_semgive(fs); kmm_free(fs); @@ -896,7 +886,7 @@ static int hostfs_bind(FAR struct inode *blkdriver, const void *data, ****************************************************************************/ static int hostfs_unbind(FAR void *handle, FAR struct inode **blkdriver, - unsigned int flags) + unsigned int flags) { FAR struct hostfs_mountpt_s *fs = (FAR struct hostfs_mountpt_s *)handle; int ret; @@ -935,10 +925,9 @@ static int hostfs_unbind(FAR void *handle, FAR struct inode **blkdriver, * ****************************************************************************/ -static int hostfs_statfs(struct inode *mountpt, struct statfs *buf) +static int hostfs_statfs(FAR struct inode *mountpt, FAR struct statfs *buf) { - struct hostfs_mountpt_s *fs; - struct host_statfs_s host_buf; + FAR struct hostfs_mountpt_s *fs; int ret; /* Sanity checks */ @@ -958,15 +947,7 @@ static int hostfs_statfs(struct inode *mountpt, struct statfs *buf) /* Call the host fs to perform the statfs */ - ret = host_statfs(fs->fs_root, &host_buf); - - buf->f_namelen = host_buf.f_namelen; - buf->f_bsize = host_buf.f_bsize; - buf->f_blocks = host_buf.f_blocks; - buf->f_bfree = host_buf.f_bfree; - buf->f_bavail = host_buf.f_bavail; - buf->f_files = host_buf.f_files; - buf->f_ffree = host_buf.f_ffree; + ret = host_statfs(fs->fs_root, buf); hostfs_semgive(fs); return ret; @@ -979,11 +960,11 @@ static int hostfs_statfs(struct inode *mountpt, struct statfs *buf) * ****************************************************************************/ -static int hostfs_unlink(struct inode *mountpt, const char *relpath) +static int hostfs_unlink(FAR struct inode *mountpt, FAR const char *relpath) { - struct hostfs_mountpt_s *fs; - int ret; - char path[HOSTFS_MAX_PATH]; + FAR struct hostfs_mountpt_s *fs; + char path[HOSTFS_MAX_PATH]; + int ret; /* Sanity checks */ @@ -1014,11 +995,12 @@ static int hostfs_unlink(struct inode *mountpt, const char *relpath) * ****************************************************************************/ -static int hostfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode) +static int hostfs_mkdir(FAR struct inode *mountpt, FAR const char *relpath, + mode_t mode) { - struct hostfs_mountpt_s *fs; - int ret; - char path[HOSTFS_MAX_PATH]; + FAR struct hostfs_mountpt_s *fs; + char path[HOSTFS_MAX_PATH]; + int ret; /* Sanity checks */ @@ -1049,11 +1031,11 @@ static int hostfs_mkdir(struct inode *mountpt, const char *relpath, mode_t mode) * ****************************************************************************/ -int hostfs_rmdir(struct inode *mountpt, const char *relpath) +int hostfs_rmdir(FAR struct inode *mountpt, FAR const char *relpath) { - struct hostfs_mountpt_s *fs; - int ret; - char path[HOSTFS_MAX_PATH]; + FAR struct hostfs_mountpt_s *fs; + char path[HOSTFS_MAX_PATH]; + int ret; /* Sanity checks */ @@ -1086,13 +1068,13 @@ int hostfs_rmdir(struct inode *mountpt, const char *relpath) * ****************************************************************************/ -int hostfs_rename(struct inode *mountpt, const char *oldrelpath, - const char *newrelpath) +int hostfs_rename(FAR struct inode *mountpt, FAR const char *oldrelpath, + FAR const char *newrelpath) { - struct hostfs_mountpt_s *fs; - int ret; - char oldpath[HOSTFS_MAX_PATH]; - char newpath[HOSTFS_MAX_PATH]; + FAR struct hostfs_mountpt_s *fs; + char oldpath[HOSTFS_MAX_PATH]; + char newpath[HOSTFS_MAX_PATH]; + int ret; /* Sanity checks */ @@ -1126,12 +1108,12 @@ int hostfs_rename(struct inode *mountpt, const char *oldrelpath, * ****************************************************************************/ -static int hostfs_stat(struct inode *mountpt, const char *relpath, struct stat *buf) +static int hostfs_stat(FAR struct inode *mountpt, FAR const char *relpath, + FAR struct stat *buf) { - struct hostfs_mountpt_s *fs; - int ret; - struct host_stat_s host_buf; - char path[HOSTFS_MAX_PATH]; + FAR struct hostfs_mountpt_s *fs; + char path[HOSTFS_MAX_PATH]; + int ret; /* Sanity checks */ @@ -1147,60 +1129,10 @@ static int hostfs_stat(struct inode *mountpt, const char *relpath, struct stat * hostfs_mkpath(fs, relpath, path, sizeof(path)); - /* Call the host FS to do the mkdir */ + /* Call the host FS to do the stat operation */ - ret = host_stat(path, &host_buf); + ret = host_stat(path, buf); - if (ret != 0) - { - goto errout_with_semaphore; - } - - /* Initialize the stat structure */ - - memset(buf, 0, sizeof(struct stat)); - - buf->st_mode = host_buf.st_mode & 0xFFF; - - if (host_buf.st_mode & HOST_ST_MODE_DIR) - { - buf->st_mode |= S_IFDIR; - } - - if (host_buf.st_mode & HOST_ST_MODE_REG) - { - buf->st_mode |= S_IFREG; - } - - if (host_buf.st_mode & HOST_ST_MODE_CHR) - { - buf->st_mode |= S_IFCHR; - } - - if (host_buf.st_mode & HOST_ST_MODE_BLK) - { - buf->st_mode |= S_IFBLK; - } - - if (host_buf.st_mode & HOST_ST_MODE_LINK) - { - buf->st_mode |= S_IFLNK; - } - - if (host_buf.st_mode & HOST_ST_MODE_PIPE) - { - buf->st_mode |= S_IFIFO; - } - - buf->st_size = host_buf.st_size; - buf->st_blksize = host_buf.st_blksize; - buf->st_blocks = host_buf.st_blocks; - buf->st_atime = host_buf.st_atim; - buf->st_ctime = host_buf.st_ctim; - - ret = OK; - -errout_with_semaphore: hostfs_semgive(fs); return ret; } diff --git a/fs/procfs/fs_procfs.c b/fs/procfs/fs_procfs.c index b350809c970..4f9f2de5188 100644 --- a/fs/procfs/fs_procfs.c +++ b/fs/procfs/fs_procfs.c @@ -60,7 +60,7 @@ #include #include #include -#include +#include #if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_FS_PROCFS) diff --git a/fs/vfs/fs_epoll.c b/fs/vfs/fs_epoll.c index 47500d01f32..6678ae10f21 100644 --- a/fs/vfs/fs_epoll.c +++ b/fs/vfs/fs_epoll.c @@ -44,10 +44,11 @@ #include #include #include -#include #include #include +#include + #ifndef CONFIG_DISABLE_POLL /**************************************************************************** @@ -68,13 +69,17 @@ int epoll_create(int size) { FAR struct epoll_head *eph = - (FAR struct epoll_head *)malloc(sizeof(struct epoll_head)); + (FAR struct epoll_head *)kmm_malloc(sizeof(struct epoll_head)); eph->size = size; eph->occupied = 0; - eph->evs = malloc(sizeof(struct epoll_event) * eph->size); + eph->evs = kmm_malloc(sizeof(struct epoll_event) * eph->size); - return (int)eph; + /* REVISIT: This will not work on machines where: + * sizeof(struct epoll_head *) > sizeof(int) + */ + + return (int)((intptr_t)eph); } /**************************************************************************** @@ -90,10 +95,14 @@ int epoll_create(int size) void epoll_close(int epfd) { - struct epoll_head *eph = (struct epoll_head *)epfd; + /* REVISIT: This will not work on machines where: + * sizeof(struct epoll_head *) > sizeof(int) + */ - free(eph->evs); - free(eph); + FAR struct epoll_head *eph = (FAR struct epoll_head *)((intptr_t)epfd); + + kmm_free(eph->evs); + kmm_free(eph); } /**************************************************************************** @@ -109,7 +118,11 @@ void epoll_close(int epfd) int epoll_ctl(int epfd, int op, int fd, struct epoll_event *ev) { - FAR struct epoll_head *eph = (FAR struct epoll_head *)epfd; + /* REVISIT: This will not work on machines where: + * sizeof(struct epoll_head *) > sizeof(int) + */ + + FAR struct epoll_head *eph = (FAR struct epoll_head *)((intptr_t)epfd); switch (op) { @@ -180,9 +193,13 @@ int epoll_ctl(int epfd, int op, int fd, struct epoll_event *ev) int epoll_wait(int epfd, FAR struct epoll_event *evs, int maxevents, int timeout) { - int i; + /* REVISIT: This will not work on machines where: + * sizeof(struct epoll_head *) > sizeof(int) + */ + + FAR struct epoll_head *eph = (FAR struct epoll_head *)((intptr_t)epfd); int rc; - FAR struct epoll_head *eph = (FAR struct epoll_head *)epfd; + int i; rc = poll((FAR struct pollfd *)eph->evs, eph->occupied, timeout); diff --git a/fs/vfs/fs_open.c b/fs/vfs/fs_open.c index 81a2ef7f7cc..a66f62e869a 100644 --- a/fs/vfs/fs_open.c +++ b/fs/vfs/fs_open.c @@ -233,6 +233,37 @@ int open(const char *path, int oflags, ...) goto errout_with_fd; } +#ifdef CONFIG_PSEUDOTERM_SUSV1 + /* If the return value from the open method is > 0, then it may actually + * be an encoded file descriptor. This kind of logic is currently only + * needed for /dev/ptmx: When dev ptmx is opened, it does not return a + * file descriptor associated with the /dev/ptmx inode, but rather with + * the inode of master device created by the /dev/ptmx open method. + * + * The encoding supports (a) returning file descriptor 0 (which really + * should not happen), and (b) avoiding confusion if some other open + * method returns a positive, non-zero value which is not a file + * descriptor. + */ + + if (OPEN_ISFD(ret)) + { + /* Release file descriptor and inode that we allocated. We don't + * need those. + */ + + files_release(fd); + inode_release(inode); + + /* Instead, decode and return the descriptor associated with the + * master side device. + */ + + fd = (int)OPEN_GETFD(ret); + DEBUGASSERT((unsigned)fd < (CONFIG_NFILE_DESCRIPTORS + CONFIG_NSOCKET_DESCRIPTORS)); + } +#endif + return fd; errout_with_fd: diff --git a/fs/vfs/fs_poll.c b/fs/vfs/fs_poll.c index b4163230fea..605147ec7f6 100644 --- a/fs/vfs/fs_poll.c +++ b/fs/vfs/fs_poll.c @@ -121,7 +121,7 @@ static int poll_fdsetup(int fd, FAR struct pollfd *fds, bool setup) } } - return file_poll(fd, fds, setup); + return fdesc_poll(fd, fds, setup); } #endif @@ -247,6 +247,49 @@ static inline int poll_teardown(FAR struct pollfd *fds, nfds_t nfds, int *count, * Function: file_poll * * Description: + * Low-level poll operation based on struc file. This is used both to (1) + * support detached file, and also (2) by fdesc_poll() to perform all + * normal operations on file descriptors descriptors. + * + * Input Parameters: + * file File structure instance + * fds - The structure describing the events to be monitored, OR NULL if + * this is a request to stop monitoring events. + * setup - true: Setup up the poll; false: Teardown the poll + * + * Returned Value: + * 0: Success; Negated errno on failure + * + ****************************************************************************/ + +#if CONFIG_NFILE_DESCRIPTORS > 0 +int file_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup) +{ + FAR struct inode *inode; + int ret = -ENOSYS; + + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); + inode = filep->f_inode; + + /* Is a driver registered? Does it support the poll method? + * If not, return -ENOSYS + */ + + if (inode != NULL && inode->u.i_ops != NULL && inode->u.i_ops->poll != NULL) + { + /* Yes, it does... Setup the poll */ + + ret = (int)inode->u.i_ops->poll(filep, fds, setup); + } + + return ret; +} +#endif + +/**************************************************************************** + * Function: fdesc_poll + * + * Description: * The standard poll() operation redirects operations on file descriptors * to this function. * @@ -262,11 +305,9 @@ static inline int poll_teardown(FAR struct pollfd *fds, nfds_t nfds, int *count, ****************************************************************************/ #if CONFIG_NFILE_DESCRIPTORS > 0 -int file_poll(int fd, FAR struct pollfd *fds, bool setup) +int fdesc_poll(int fd, FAR struct pollfd *fds, bool setup) { FAR struct file *filep; - FAR struct inode *inode; - int ret = -ENOSYS; /* Get the file pointer corresponding to this file descriptor */ @@ -275,22 +316,14 @@ int file_poll(int fd, FAR struct pollfd *fds, bool setup) { /* The errno value has already been set */ - return -get_errno(); + int errorcode = get_errno(); + DEBUGASSERT(errorcode > 0); + return -errorcode; } - /* Is a driver registered? Does it support the poll method? - * If not, return -ENOSYS - */ + /* Let file_poll() do the rest */ - inode = filep->f_inode; - if (inode && inode->u.i_ops && inode->u.i_ops->poll) - { - /* Yes, then setup the poll */ - - ret = (int)inode->u.i_ops->poll(filep, fds, setup); - } - - return ret; + return file_poll(filep, fds, setup); } #endif diff --git a/include/nuttx/analog/adc.h b/include/nuttx/analog/adc.h index a566f2a0ded..639eddc5cf8 100644 --- a/include/nuttx/analog/adc.h +++ b/include/nuttx/analog/adc.h @@ -6,7 +6,7 @@ * Author: Li Zhuoyi * Gregory Nutt * - * Derived from include/nuttx/can.h + * Derived from include/nuttx/drivers/can.h * * Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/include/nuttx/analog/dac.h b/include/nuttx/analog/dac.h index 5648b51a9a8..db2cf5a7368 100644 --- a/include/nuttx/analog/dac.h +++ b/include/nuttx/analog/dac.h @@ -5,7 +5,7 @@ * Author: Li Zhuoyi * History: 0.1 2011-08-04 initial version * - * Derived from include/nuttx/can.h + * Derived from include/nuttx/drivers/can.h * * Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h index 24925c05ec6..93a595a44ae 100644 --- a/include/nuttx/arch.h +++ b/include/nuttx/arch.h @@ -1496,10 +1496,15 @@ void up_timer_initialize(void); * ****************************************************************************/ -#ifdef CONFIG_SCHED_TICKLESS +#if defined(CONFIG_SCHED_TICKLESS) && !defined(CONFIG_CLOCK_TIMEKEEPING) int up_timer_gettime(FAR struct timespec *ts); #endif +#ifdef CONFIG_CLOCK_TIMEKEEPING +int up_timer_getcounter(FAR uint64_t *cycles); +void up_timer_getmask(FAR uint64_t *mask); +#endif + /**************************************************************************** * Name: up_alarm_cancel * diff --git a/include/nuttx/1wire.h b/include/nuttx/drivers/1wire.h similarity index 97% rename from include/nuttx/1wire.h rename to include/nuttx/drivers/1wire.h index 49786a32aa9..5f2974e89e6 100644 --- a/include/nuttx/1wire.h +++ b/include/nuttx/drivers/1wire.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/1wire.h + * include/nuttx/drivers/1wire.h * * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. * Author: Aleksandr Vyhovanec @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_1WIRE_H -#define __INCLUDE_NUTTX_1WIRE_H +#ifndef __INCLUDE_NUTTX_DRIVERS_1WIRE_H +#define __INCLUDE_NUTTX_DRIVERS_1WIRE_H /**************************************************************************** * Included Files @@ -163,4 +163,4 @@ struct onewire_dev_s * Public Functions ****************************************************************************/ -#endif /* __INCLUDE_NUTTX_1WIRE_H */ +#endif /* __INCLUDE_NUTTX_DRIVERS_1WIRE_H */ diff --git a/include/nuttx/can.h b/include/nuttx/drivers/can.h similarity index 98% rename from include/nuttx/can.h rename to include/nuttx/drivers/can.h index 27ef01d77c4..ed570097fc4 100644 --- a/include/nuttx/can.h +++ b/include/nuttx/drivers/can.h @@ -1,7 +1,7 @@ /************************************************************************************ - * include/nuttx/can.h + * include/nuttx/drivers/can.h * - * Copyright (C) 2008, 2009, 2011-2012, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2008, 2009, 2011-2012, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef _INCLUDE_NUTTX_CAN_H -#define _INCLUDE_NUTTX_CAN_H +#ifndef _INCLUDE_NUTTX_DRVERS_CAN_H +#define _INCLUDE_NUTTX_DRVERS_CAN_H /************************************************************************************ * Included Files @@ -60,9 +60,11 @@ /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ + /* Configuration ********************************************************************/ -/* CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or - * CONFIG_STM32_CAN2 must also be defined) +/* CONFIG_CAN - Enables CAN support (MCU-specific selections are also required. For + * STM32, as an example, one or both of CONFIG_STM32_CAN1 or CONFIG_STM32_CAN2 + * must also be defined) * CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default * Standard 11-bit IDs. * CONFIG_CAN_FD - Enable support for CAN FD mode. For the upper half driver, this @@ -794,4 +796,4 @@ int can_txready(FAR struct can_dev_s *dev); #endif #endif /* CONFIG_CAN */ -#endif /* _INCLUDE_NUTTX_CAN_H */ +#endif /* _INCLUDE_NUTTX_DRVERS_CAN_H */ diff --git a/include/nuttx/drivers/drivers.h b/include/nuttx/drivers/drivers.h new file mode 100644 index 00000000000..612434d15b7 --- /dev/null +++ b/include/nuttx/drivers/drivers.h @@ -0,0 +1,288 @@ +/**************************************************************************** + * include/nuttx/fs/drivers.h + * + * Copyright (C) 2007-2009, 2011-2013, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_FS_DRIVERS_H +#define __INCLUDE_NUTTX_FS_DRIVERS_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: devnull_register + * + * Description: + * Register /dev/null + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void devnull_register(void); + +/**************************************************************************** + * Name: devrandom_register + * + * Description: + * Initialize the RNG hardware and register the /dev/random driver. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_RANDOM +void devrandom_register(void); +#endif + +/**************************************************************************** + * Name: devurandom_register + * + * Description: + * Register /dev/urandom + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM +void devurandom_register(void); +#endif + +/**************************************************************************** + * Name: devcrypto_register + * + * Description: + * Register /dev/crypto + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void devcrypto_register(void); + +/**************************************************************************** + * Name: devzero_register + * + * Description: + * Register /dev/zero + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void devzero_register(void); + +/**************************************************************************** + * Name: bchdev_register + * + * Description: + * Setup so that it exports the block driver referenced by 'blkdev' as a + * character device 'chardev' + * + ****************************************************************************/ + +int bchdev_register(FAR const char *blkdev, FAR const char *chardev, + bool readonly); + +/**************************************************************************** + * Name: bchdev_unregister + * + * Description: + * Unregister character driver access to a block device that was created + * by a previous call to bchdev_register(). + * + ****************************************************************************/ + +int bchdev_unregister(FAR const char *chardev); + +/* Low level, direct access. NOTE: low-level access and character driver access + * are incompatible. One and only one access method should be implemented. + */ + +/**************************************************************************** + * Name: bchlib_setup + * + * Description: + * Setup so that the block driver referenced by 'blkdev' can be accessed + * similar to a character device. + * + ****************************************************************************/ + +int bchlib_setup(FAR const char *blkdev, bool readonly, FAR void **handle); + +/**************************************************************************** + * Name: bchlib_teardown + * + * Description: + * Setup so that the block driver referenced by 'blkdev' can be accessed + * similar to a character device. + * + ****************************************************************************/ + +int bchlib_teardown(FAR void *handle); + +/**************************************************************************** + * Name: bchlib_read + * + * Description: + * Read from the block device set-up by bchlib_setup as if it were a + * character device. + * + ****************************************************************************/ + +ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, + size_t len); + +/**************************************************************************** + * Name: bchlib_write + * + * Description: + * Write to the block device set-up by bchlib_setup as if it were a + * character device. + * + ****************************************************************************/ + +ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, + size_t len); + +/**************************************************************************** + * Name: pipe2 + * + * Description: + * pipe() creates a pair of file descriptors, pointing to a pipe inode, + * and places them in the array pointed to by 'fd'. fd[0] is for reading, + * fd[1] is for writing. + * + * NOTE: mkfifo2 is a special, non-standard, NuttX-only interface. Since + * the NuttX FIFOs are based in in-memory, circular buffers, the ability + * to control the size of those buffers is critical for system tuning. + * + * Inputs: + * fd[2] - The user provided array in which to catch the pipe file + * descriptors + * bufsize - The size of the in-memory, circular buffer in bytes. + * + * Return: + * 0 is returned on success; otherwise, -1 is returned with errno set + * appropriately. + * + ****************************************************************************/ + +#if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0 +int pipe2(int fd[2], size_t bufsize); +#endif + +/**************************************************************************** + * Name: mkfifo2 + * + * Description: + * mkfifo() makes a FIFO device driver file with name 'pathname.' Unlike + * Linux, a NuttX FIFO is not a special file type but simply a device + * driver instance. 'mode' specifies the FIFO's permissions. + * + * Once the FIFO has been created by mkfifo(), any thread can open it for + * reading or writing, in the same way as an ordinary file. However, it + * must have been opened from both reading and writing before input or + * output can be performed. This FIFO implementation will block all + * attempts to open a FIFO read-only until at least one thread has opened + * the FIFO for writing. + * + * If all threads that write to the FIFO have closed, subsequent calls to + * read() on the FIFO will return 0 (end-of-file). + * + * NOTE: mkfifo2 is a special, non-standard, NuttX-only interface. Since + * the NuttX FIFOs are based in in-memory, circular buffers, the ability + * to control the size of those buffers is critical for system tuning. + * + * Inputs: + * pathname - The full path to the FIFO instance to attach to or to create + * (if not already created). + * mode - Ignored for now + * bufsize - The size of the in-memory, circular buffer in bytes. + * + * Return: + * 0 is returned on success; otherwise, -1 is returned with errno set + * appropriately. + * + ****************************************************************************/ + +#if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0 +int mkfifo2(FAR const char *pathname, mode_t mode, size_t bufsize); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __INCLUDE_NUTTX_FS_DRIVERS_H */ diff --git a/include/nuttx/pwm.h b/include/nuttx/drivers/pwm.h similarity index 98% rename from include/nuttx/pwm.h rename to include/nuttx/drivers/pwm.h index fe13a4efc69..7cf80b0d7b3 100644 --- a/include/nuttx/pwm.h +++ b/include/nuttx/drivers/pwm.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/pwm.h + * include/nuttx/drivers/pwm.h * * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_PWM_H -#define __INCLUDE_NUTTX_PWM_H +#ifndef __INCLUDE_NUTTX_DRIVERS_PWM_H +#define __INCLUDE_NUTTX_DRIVERS_PWM_H /* For the purposes of this driver, a PWM device is any device that generates * periodic output pulses s of controlled frequency and pulse width. Such a @@ -316,4 +316,4 @@ void pwm_expired(FAR void *handle); #endif #endif /* CONFIG_PWM */ -#endif /* __INCLUDE_NUTTX_PWM_H */ +#endif /* __INCLUDE_NUTTX_DRIVERS_PWM_H */ diff --git a/include/nuttx/fs/ramdisk.h b/include/nuttx/drivers/ramdisk.h similarity index 94% rename from include/nuttx/fs/ramdisk.h rename to include/nuttx/drivers/ramdisk.h index 0f425c46aaf..27cfb4e992a 100644 --- a/include/nuttx/fs/ramdisk.h +++ b/include/nuttx/drivers/ramdisk.h @@ -1,7 +1,7 @@ /**************************************************************************** - * include/nuttx/fs/ramdisk.h + * include/nuttx/drivers/ramdisk.h * - * Copyright (C) 2008-2009, 2012-2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2012-2013, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_FS_RAMDISK_H -#define __INCLUDE_NUTTX_FS_RAMDISK_H +#ifndef __INCLUDE_NUTTX_DRIVERS_RAMDISK_H +#define __INCLUDE_NUTTX_DRIVERS_RAMDISK_H /**************************************************************************** * Included Files @@ -105,4 +105,4 @@ int romdisk_register(int minor, FAR const uint8_t *buffer, uint32_t nsectors, } #endif -#endif /* __INCLUDE_NUTTX_FS_RAMDISK_H */ +#endif /* __INCLUDE_NUTTX_DRIVERS_RAMDISK_H */ diff --git a/include/nuttx/rwbuffer.h b/include/nuttx/drivers/rwbuffer.h similarity index 97% rename from include/nuttx/rwbuffer.h rename to include/nuttx/drivers/rwbuffer.h index c658117b686..ebb45ab8a42 100644 --- a/include/nuttx/rwbuffer.h +++ b/include/nuttx/drivers/rwbuffer.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/rwbuffer.h + * include/nuttx/drivers/rwbuffer.h * * Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_RWBUFFER_H -#define __INCLUDE_NUTTX_RWBUFFER_H +#ifndef __INCLUDE_NUTTX_DRIVERS_RWBUFFER_H +#define __INCLUDE_NUTTX_DRIVERS_RWBUFFER_H /**************************************************************************** * Included Files @@ -208,4 +208,4 @@ int rwb_invalidate(FAR struct rwbuffer_s *rwb, #endif #endif /* CONFIG_DRVR_WRITEBUFFER || CONFIG_DRVR_READAHEAD */ -#endif /* __INCLUDE_NUTTX_RWBUFFER_H */ +#endif /* __INCLUDE_NUTTX_DRIVERS_RWBUFFER_H */ diff --git a/include/nuttx/fs/dirent.h b/include/nuttx/fs/dirent.h index efd270fbeec..f616f734737 100644 --- a/include/nuttx/fs/dirent.h +++ b/include/nuttx/fs/dirent.h @@ -184,7 +184,7 @@ struct fs_unionfsdir_s struct fs_hostfsdir_s { - FAR void * fs_dir; /* Opaque pointer to host DIR * */ + FAR void *fs_dir; /* Opaque pointer to host DIR * */ }; #endif diff --git a/include/nuttx/fs/fs.h b/include/nuttx/fs/fs.h index f383c4ac06a..238a6b8ef96 100644 --- a/include/nuttx/fs/fs.h +++ b/include/nuttx/fs/fs.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/nuttx/fs/fs.h * - * Copyright (C) 2007-2009, 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2011-2013, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -60,6 +60,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Stream flags for the fs_flags field of in struct file_struct */ #define __FS_FLAG_EOF (1 << 0) /* EOF detected by a read operation */ @@ -111,6 +112,35 @@ #define DIRENT_SETPSEUDONODE(f) do (f) |= DIRENTFLAGS_PSEUDONODE; while (0) #define DIRENT_ISPSEUDONODE(f) (((f) & DIRENTFLAGS_PSEUDONODE) != 0) +/* The struct file_operations open(0) normally returns zero on success and + * a negated errno value on failure. There is one case, however, where + * the open method will redirect to another driver and return a file + * descriptor instead. + * + * This case is when SUSv1 pseudo-terminals are used (CONFIG_PSEUDOTERM_SUSV1=y). + * In this case, the output is encoded and decoded using these macros in + * order to support (a) returning file descriptor 0 (which really should + * not happen), and (b) avoiding confusion if some other open method returns + * a positive, non-zero value which is not a file descriptor. + * + * OPEN_ISFD(r) tests if the return value from the open method is + * really a file descriptor. + * OPEN_SETFD(f) is used by an implementation of the open() method + * in order to encode a file descriptor in the return value. + * OPEN_GETFD(r) is use by the upper level open() logic to decode + * the file descriptor encoded in the return value. + * + * REVISIT: This only works for file descriptors in the in range 0-255. + */ + +#define OPEN_MAGIC 0x4200 +#define OPEN_MASK 0x00ff +#define OPEN_MAXFD 0x00ff + +#define OPEN_ISFD(r) (((r) & ~OPEN_MASK) == OPEN_MAGIC) +#define OPEN_SETFD(f) ((f) | OPEN_MAGIC) +#define OPEN_GETFD(r) ((r) & OPEN_MASK) + /**************************************************************************** * Public Type Definitions ****************************************************************************/ @@ -468,8 +498,9 @@ int foreach_mountpoint(foreach_mountpoint_t handler, FAR void *arg); * ****************************************************************************/ -int register_driver(FAR const char *path, FAR const struct file_operations *fops, - mode_t mode, FAR void *priv); +int register_driver(FAR const char *path, + FAR const struct file_operations *fops, mode_t mode, + FAR void *priv); /**************************************************************************** * Name: register_blockdriver @@ -496,8 +527,8 @@ int register_driver(FAR const char *path, FAR const struct file_operations *fops #ifndef CONFIG_DISABLE_MOUNTPOINT int register_blockdriver(FAR const char *path, - FAR const struct block_operations *bops, mode_t mode, - FAR void *priv); + FAR const struct block_operations *bops, + mode_t mode, FAR void *priv); #endif /**************************************************************************** @@ -508,7 +539,7 @@ int register_blockdriver(FAR const char *path, * ****************************************************************************/ -int unregister_driver(const char *path); +int unregister_driver(FAR const char *path); /**************************************************************************** * Name: unregister_blockdriver @@ -518,7 +549,7 @@ int unregister_driver(const char *path); * ****************************************************************************/ -int unregister_blockdriver(const char *path); +int unregister_blockdriver(FAR const char *path); /**************************************************************************** * Name: inode_checkflags @@ -933,6 +964,29 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap); * Function: file_poll * * Description: + * Low-level poll operation based on struc file. This is used both to (1) + * support detached file, and also (2) by fdesc_poll() to perform all + * normal operations on file descriptors descriptors. + * + * Input Parameters: + * file File structure instance + * fds - The structure describing the events to be monitored, OR NULL if + * this is a request to stop monitoring events. + * setup - true: Setup up the poll; false: Teardown the poll + * + * Returned Value: + * 0: Success; Negated errno on failure + * + ****************************************************************************/ + +#if CONFIG_NFILE_DESCRIPTORS > 0 +int file_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup); +#endif + +/**************************************************************************** + * Function: fdesc_poll + * + * Description: * The standard poll() operation redirects operations on file descriptors * to this function. * @@ -948,112 +1002,9 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap); ****************************************************************************/ #if CONFIG_NFILE_DESCRIPTORS > 0 -int file_poll(int fd, FAR struct pollfd *fds, bool setup); +int fdesc_poll(int fd, FAR struct pollfd *fds, bool setup); #endif -/**************************************************************************** - * Name: devnull_register - * - * Description: - * Register /dev/null - * - ****************************************************************************/ - -void devnull_register(void); - -/**************************************************************************** - * Name: devcrypto_register - * - * Description: - * Register /dev/crypto - * - ****************************************************************************/ - -void devcrypto_register(void); - -/**************************************************************************** - * Name: devzero_register - * - * Description: - * Register /dev/zero - * - ****************************************************************************/ - -void devzero_register(void); - -/**************************************************************************** - * Name: bchdev_register - * - * Description: - * Setup so that it exports the block driver referenced by 'blkdev' as a - * character device 'chardev' - * - ****************************************************************************/ - -int bchdev_register(FAR const char *blkdev, FAR const char *chardev, - bool readonly); - -/**************************************************************************** - * Name: bchdev_unregister - * - * Description: - * Unregister character driver access to a block device that was created - * by a previous call to bchdev_register(). - * - ****************************************************************************/ - -int bchdev_unregister(FAR const char *chardev); - -/* Low level, direct access. NOTE: low-level access and character driver access - * are incompatible. One and only one access method should be implemented. - */ - -/**************************************************************************** - * Name: bchlib_setup - * - * Description: - * Setup so that the block driver referenced by 'blkdev' can be accessed - * similar to a character device. - * - ****************************************************************************/ - -int bchlib_setup(FAR const char *blkdev, bool readonly, FAR void **handle); - -/**************************************************************************** - * Name: bchlib_teardown - * - * Description: - * Setup so that the block driver referenced by 'blkdev' can be accessed - * similar to a character device. - * - ****************************************************************************/ - -int bchlib_teardown(FAR void *handle); - -/**************************************************************************** - * Name: bchlib_read - * - * Description: - * Read from the block device set-up by bchlib_setup as if it were a - * character device. - * - ****************************************************************************/ - -ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, - size_t len); - -/**************************************************************************** - * Name: bchlib_write - * - * Description: - * Write to the block device set-up by bchlib_setup as if it were a - * character device. - * - ****************************************************************************/ - -ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, - size_t len); - #undef EXTERN #if defined(__cplusplus) } diff --git a/include/nuttx/fs/hostfs.h b/include/nuttx/fs/hostfs.h index 0a57797e57b..66cc304ee65 100644 --- a/include/nuttx/fs/hostfs.h +++ b/include/nuttx/fs/hostfs.h @@ -40,94 +40,156 @@ * Included Files ****************************************************************************/ +#ifndef __SIM__ +# include +# include +# include +# include +# include +#else +# include +#endif + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -#define HOST_ST_MODE_REG 0x01000 -#define HOST_ST_MODE_DIR 0x02000 -#define HOST_ST_MODE_CHR 0x04000 -#define HOST_ST_MODE_BLK 0x08000 -#define HOST_ST_MODE_PIPE 0x10000 -#define HOST_ST_MODE_LINK 0x20000 +#ifdef __SIM__ -#define HOSTFS_FLAG_RDOK 0x0001 -#define HOSTFS_FLAG_WROK 0x0002 -#define HOSTFS_FLAG_CREAT 0x0004 -#define HOSTFS_FLAG_EXCL 0x0008 -#define HOSTFS_FLAG_APPEND 0x0010 -#define HOSTFS_FLAG_TRUNC 0x0020 +/* These must exactly match the definitions from include/dirent.h: */ -#define HOSTFS_DTYPE_FILE 0x0001 -#define HOSTFS_DTYPE_CHR 0x0002 -#define HOSTFS_DTYPE_BLK 0x0004 -#define HOSTFS_DTYPE_DIRECTORY 0x0008 +#define NUTTX_DTYPE_FILE 0x01 +#define NUTTX_DTYPE_CHR 0x02 +#define NUTTX_DTYPE_BLK 0x04 +#define NUTTX_DTYPE_DIRECTORY 0x08 + +/* These must exactly match the definitions from include/sys/stat.h: */ + +#define NUTTX_S_IFIFO 0010000 +#define NUTTX_S_IFCHR 0020000 +#define NUTTX_S_IFDIR 0040000 +#define NUTTX_S_IFBLK 0060000 +#define NUTTX_S_IFREG 0100000 +#define NUTTX_S_IFLNK 0120000 + +/* These must exactly match the definitions from include/fctnl.h: */ + +#define NUTTX_O_RDONLY (1 << 0) /* Open for read access (only) */ +#define NUTTX_O_WRONLY (1 << 1) /* Open for write access (only) */ +#define NUTTX_O_CREAT (1 << 2) /* Create file/sem/mq object */ +#define NUTTX_O_EXCL (1 << 3) /* Name must not exist when opened */ +#define NUTTX_O_APPEND (1 << 4) /* Keep contents, append to end */ +#define NUTTX_O_TRUNC (1 << 5) /* Delete contents */ +#define NUTTX_O_NONBLOCK (1 << 6) /* Don't wait for data */ +#define NUTTX_O_SYNC (1 << 7) /* Synchronize output on write */ +#define NUTTX_O_BINARY (1 << 8) /* Open the file in binary mode. */ + +#define NUTTX_O_RDWR (NUTTX_O_RDONLY | NUTTX_O_WRONLY) + +/* Should match definition in include/limits.h */ + +#define NUTTX_NAME_MAX 32 + +#endif /* __SIM__ */ /**************************************************************************** * Public Type Definitions ****************************************************************************/ -struct host_dirent_s +#ifdef __SIM__ + +/* These must match the definitions in include/sys/types.h */ + +typedef uintptr_t nuttx_size_t; +typedef int32_t nuttx_off_t; +typedef unsigned int nuttx_mode_t; +typedef int16_t nuttx_blksize_t; +typedef uint32_t nuttx_blkcnt_t; + +/* These must match the definition in include/time.h */ + +typedef uint32_t nuttx_time_t; + +/* These must exactly match the definition from include/dirent.h: */ + +struct nuttx_dirent_s { - size_t d_ino; - size_t d_off; - unsigned short d_reclen; - unsigned char d_type; - char d_name[256]; + uint8_t d_type; /* type of file */ + char d_name[NUTTX_NAME_MAX+1]; /* filename */ }; -struct host_statfs_s +/* These must exactly match the definition from include/sys/statfs.h: */ + +struct nuttx_statfs_s { - size_t f_type; /* Type of file system */ - size_t f_bsize; /* Optimal transfer block size */ - size_t f_blocks; /* Total data blocks in the file system */ - size_t f_bfree; /* Free blocks */ - size_t f_bavail; /* Free blocks available */ - size_t f_files; /* Total file nodes in file system */ - size_t f_ffree; /* Free file nodes in fs */ - size_t f_fsid; /* File Systme ID */ - size_t f_namelen; /* Max length of filenames */ - size_t f_frsize; /* Fragment size */ + uint32_t f_type; /* Type of filesystem */ + nuttx_size_t f_namelen; /* Maximum length of filenames */ + nuttx_size_t f_bsize; /* Optimal block size for transfers */ + nuttx_off_t f_blocks; /* Total data blocks in the file system of this size */ + nuttx_off_t f_bfree; /* Free blocks in the file system */ + nuttx_off_t f_bavail; /* Free blocks avail to non-superuser */ + nuttx_off_t f_files; /* Total file nodes in the file system */ + nuttx_off_t f_ffree; /* Free file nodes in the file system */ }; -struct host_stat_s +/* These must exactly match the definition from include/sys/stat.h: */ + +struct nuttx_stat_s { - int st_dev; /* ID of the device containing file */ - size_t st_ino; /* inode number */ - size_t st_mode; /* protection */ - size_t st_nlink; /* number of hard links */ - size_t st_uid; /* user ID of owner */ - size_t st_gid; /* group ID of owner */ - size_t st_rdev; /* device ID */ - size_t st_size; /* total size, in bytes */ - size_t st_blksize; /* blocksize for file system I/O */ - size_t st_blocks; /* number of 512B blocks allocated */ - size_t st_atim; /* time of last access */ - size_t st_mtim; /* time of last modification */ - size_t st_ctim; /* time of last status change */ + nuttx_mode_t st_mode; /* File type, atributes, and access mode bits */ + nuttx_off_t st_size; /* Size of file/directory, in bytes */ + nuttx_blksize_t st_blksize; /* Blocksize used for filesystem I/O */ + nuttx_blkcnt_t st_blocks; /* Number of blocks allocated */ + nuttx_time_t st_atim; /* Time of last access */ + nuttx_time_t st_mtim; /* Time of last modification */ + nuttx_time_t st_ctim; /* Time of last status change */ }; +#endif /* __SIM__ */ + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ +#ifdef __SIM__ int host_open(const char *pathname, int flags, int mode); int host_close(int fd); -ssize_t host_read(int fd, void* buf, size_t count); +ssize_t host_read(int fd, void *buf, nuttx_size_t count); +ssize_t host_write(int fd, const void *buf, nuttx_size_t count); +off_t host_lseek(int fd, off_t offset, int whence); +int host_ioctl(int fd, int request, unsigned long arg); +void host_sync(int fd); +int host_dup(int fd); +void *host_opendir(const char *name); +int host_readdir(void* dirp, struct nuttx_dirent_s* entry); +void host_rewinddir(void* dirp); +int host_closedir(void* dirp); +int host_statfs(const char *path, struct nuttx_statfs_s *buf); +int host_unlink(const char *pathname); +int host_mkdir(const char *pathname, mode_t mode); +int host_rmdir(const char *pathname); +int host_rename(const char *oldpath, const char *newpath); +int host_stat(const char *path, struct nuttx_stat_s *buf); +#else +int host_open(const char *pathname, int flags, int mode); +int host_close(int fd); +ssize_t host_read(int fd, void *buf, size_t count); ssize_t host_write(int fd, const void *buf, size_t count); off_t host_lseek(int fd, off_t offset, int whence); int host_ioctl(int fd, int request, unsigned long arg); void host_sync(int fd); int host_dup(int fd); void *host_opendir(const char *name); -int host_readdir(void* dirp, struct host_dirent_s* entry); +int host_readdir(void* dirp, struct dirent *entry); void host_rewinddir(void* dirp); int host_closedir(void* dirp); -int host_statfs(const char *path, struct host_statfs_s *buf); +int host_statfs(const char *path, struct statfs *buf); int host_unlink(const char *pathname); int host_mkdir(const char *pathname, mode_t mode); int host_rmdir(const char *pathname); int host_rename(const char *oldpath, const char *newpath); -int host_stat(const char *path, struct host_stat_s *buf); +int host_stat(const char *path, struct stat *buf); + +#endif /* __SIM__ */ #endif /* __INCLUDE_NUTTX_FS_HOSTFS_H */ diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index b79c783923f..63074a3a9bc 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -137,7 +137,10 @@ * OUT: Bytes readable from this fd */ #define FIONWRITE _FIOC(0x0006) /* IN: Location to return value (int *) - * OUT: Bytes writable to this fd + * OUT: Number bytes in send queue + */ +#define FIONSPACE _FIOC(0x0007) /* IN: Location to return value (int *) + * OUT: Free space in send queue. */ /* NuttX file system ioctl definitions **************************************/ @@ -251,7 +254,7 @@ * IN: None * OUT: None */ -/* NuttX PWM ioctl definitions (see nuttx/pwm.h) ****************************/ +/* NuttX PWM ioctl definitions (see nuttx/drivers/pwm.h) ****************************/ #define _PWMIOCVALID(c) (_IOC_TYPE(c)==_PWMIOCBASE) #define _PWMIOC(nr) _IOC(_PWMIOCBASE,nr) @@ -341,7 +344,7 @@ #define _RELAYIOC(nr) _IOC(_RELAYBASE,nr) /* CAN driver ioctl definitions *********************************************/ -/* (see nuttx/can.h */ +/* (see nuttx/drivers/can.h */ #define _CANIOCVALID(c) (_IOC_TYPE(c)==_CANBASE) #define _CANIOC(nr) _IOC(_CANBASE,nr) diff --git a/include/nuttx/ioexpander/gpio.h b/include/nuttx/ioexpander/gpio.h index ce6e13794b7..c0d091753c1 100644 --- a/include/nuttx/ioexpander/gpio.h +++ b/include/nuttx/ioexpander/gpio.h @@ -41,70 +41,111 @@ ****************************************************************************/ #include + +#include +#include +#include + #include /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/* Command: GPIO_WRITE +/* Command: GPIOC_WRITE * Description: Set the value of an output GPIO - * Argument: 0=output a low value; 1=outut a high value + * Argument: T0=output a low value; 1=outut a high value * - * Command: GPIO_READ + * Command: GPIOC_READ * Description: Read the value of an input or output GPIO - * Argument: A pointer to an integer value to receive the result: - * 0=low value; 1=high value. + * Argument: A pointer to an bool value to receive the result: + * false=low value; true=high value. + * + * Command: GPIOC_PINTYPE + * Description: Return the GPIO pin type. + * Argument: A pointer to an instance of type enum gpio_pintype_e + * + * Command: GPIOC_REGISTER + * Description: Register to receive a signal whenever there an interrupt + * is received on an input gpio pin. This feature, of course, + * depends upon interrupt GPIO support from the platform. + * Argument: The number of signal to be generated when the interrupt + * occurs. + * + * Command: GPIOC_UNREGISTER + * Description: Stop receiving signals for pin interrupts. + * Argument: None. */ -#define GPIO_WRITE _GPIOC(1) -#define GPIO_READ _GPIOC(2) +#define GPIOC_WRITE _GPIOC(1) +#define GPIOC_READ _GPIOC(2) +#define GPIOC_PINTYPE _GPIOC(3) +#define GPIOC_REGISTER _GPIOC(4) +#define GPIOC_UNREGISTER _GPIOC(5) /**************************************************************************** * Public Types ****************************************************************************/ -/* Common interface definition. Must be cast-compatible with struct - * gpio_input_dev_s and struct gpio_output_dev_s +/* Identifies the type of the GPIO pin */ + +enum gpio_pintype_e +{ + GPIO_INPUT_PIN = 0, + GPIO_OUTPUT_PIN, + GPIO_INTERRUPT_PIN, + GPIO_NPINTYPES +}; + +/* Interrupt callback */ + +struct gpio_dev_s; +typedef CODE int (*pin_interrupt_t)(FAR struct gpio_dev_s *dev); + +/* Pin interface vtable definition. Instances of this vtable are read-only + * and may reside in FLASH. + * + * - go_read. Required for all all pin types. + * - go_write. Required only for the GPIO_OUTPUT_PIN pin type. Unused + * for other pin types may be NULL. + * - go_attach and gp_eanble. Required only the GPIO_INTERRUPT_PIN pin + * type. Unused for other pin types may be NULL. */ -struct gpio_common_dev_s +struct gpio_dev_s; +struct gpio_operations_s { - bool gp_output; - uint8_t gp_unused[3]; + /* Interface methods */ + + CODE int (*go_read)(FAR struct gpio_dev_s *dev, FAR bool *value); + CODE int (*go_write)(FAR struct gpio_dev_s *dev, bool value); + CODE int (*go_attach)(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback); + CODE int (*go_enable)(FAR struct gpio_dev_s *dev, bool enable); }; -/* The interface to a GPIO input pin */ +/* Pin interface definition. Must lie in writable memory. */ -struct gpio_input_dev_s +struct gpio_dev_s { - /* Common fields */ + /* Information provided from the lower half driver to the upper half + * driver when gpio_pin_register() is called. + */ - bool gpin_output; - uint8_t gpin_unused[3]; + uint8_t gp_pintype; /* See enum gpio_pintype_e */; - /* Fields unique to input pins */ + /* Writable storage used by the upper half driver */ - CODE int (*gpin_read)(FAR struct gpio_input_dev_s *dev, FAR int *value); + uint8_t gp_signo; /* signo to use when signaling a GPIO interrupt */ + pid_t gp_pid; /* The task to be signalled */ - /* Lower-half private definitions may follow */ -}; + /* Read-only pointer to GPIO device operations (also provided by the + * lower half driver). + */ -/* The interface to a GPIO input pin */ + FAR const struct gpio_operations_s *gp_ops; -struct gpio_output_dev_s -{ - /* Common fields */ - - bool gpout_output; - uint8_t gpout_unused[3]; - - /* Fields unique to output pins */ - - CODE int (*gpout_read)(FAR struct gpio_output_dev_s *dev, FAR int *value); - CODE int (*gpout_write)(FAR struct gpio_output_dev_s *dev, int value); - - /* Lower-half private definitions may follow */ + /* Device specific, lower-half information may follow. */ }; /**************************************************************************** @@ -120,24 +161,46 @@ extern "C" #endif /**************************************************************************** - * Name: gpio_input_register + * Name: gpio_pin_register * * Description: - * Register GPIO input pin device driver. + * Register GPIO pin device driver. + * + * - Input pin types will be registered at /dev/gpinN + * - Output pin types will be registered at /dev/gpoutN + * - Interrupt pin types will be registered at /dev/gpintN + * + * Where N is the provided minor number in the range of 0-99. + * * ****************************************************************************/ -int gpio_input_register(FAR struct gpio_input_dev_s *dev, int minor); +int gpio_pin_register(FAR struct gpio_dev_s *dev, int minor); /**************************************************************************** - * Name: gpio_output_register + * Name: gpio_lower_half * * Description: - * Register GPIO output pin device driver. + * Create a GPIO pin device driver instance for an I/O expander pin. + * The I/O expander pin must have already been configured by the caller + * for the particular pintype. + * + * Input Parameters: + * ioe - An instance of the I/O expander interface + * pin - The I/O expander pin number for the driver + * pintype - See enum gpio_pintype_e + * minor - The minor device number to use when registering the device + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. * ****************************************************************************/ -int gpio_output_register(FAR struct gpio_output_dev_s *dev, int minor); +#ifdef CONFIG_GPIO_LOWER_HALF +struct ioexpander_dev_s; +int gpio_lower_half(FAR struct ioexpander_dev_s *ioe, unsigned int pin, + enum gpio_pintype_e pintype, int minor); +#endif #ifdef __cplusplus } diff --git a/include/nuttx/ioexpander/ioexpander.h b/include/nuttx/ioexpander/ioexpander.h index ce95d6d4914..f149b7dfa79 100644 --- a/include/nuttx/ioexpander/ioexpander.h +++ b/include/nuttx/ioexpander/ioexpander.h @@ -41,26 +41,47 @@ ****************************************************************************/ #include -#include +#include -#if defined(CONFIG_IOEXPANDER) - -#ifndef CONFIG_PCA9555_INT_DISABLE -#ifndef CONFIG_SCHED_WORKQUEUE -# error "Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected." -#endif -#endif +#ifdef CONFIG_IOEXPANDER /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -#define IOEXPANDER_DIRECTION_IN 0 -#define IOEXPANDER_DIRECTION_OUT 1 +/* Configuration ************************************************************/ + +#ifndef CONFIG_IOEXPANDER_NPINS +# define CONFIG_IOEXPANDER_NPINS 16 +#endif + +#if CONFIG_IOEXPANDER_NPINS > 64 +# error No support for devices with more than 64 pins +#endif + +/* Pin definitions **********************************************************/ + +#define IOEXPANDER_DIRECTION_IN 0 +#define IOEXPANDER_DIRECTION_OUT 1 + +#define IOEXPANDER_PINMASK (((ioe_pinset_t)1 << CONFIG_IOEXPANDER_NPINS) - 1) +#define PINSET_ALL (~((ioe_pinset_t)0)) /* Pin options */ -#define IOEXPANDER_OPTION_INVERT 1 /* set the "active" level for the line */ +#define IOEXPANDER_OPTION_INVERT 1 /* Set the "active" level for a pin */ +# define IOEXPANDER_VAL_NORMAL 0 /* Normal, no inversion */ +# define IOEXPANDER_VAL_INVERT 1 /* Inverted */ + +#define IOEXPANDER_OPTION_INTCFG 2 /* Configure interrupt for a pin */ +# define IOEXPANDER_VAL_DISABLE 0 /* 0000 Disable pin interrupts */ +# define IOEXPANDER_VAL_LEVEL 1 /* xx01 Interrupt on level (vs. edge) */ +# define IOEXPANDER_VAL_HIGH 5 /* 0101 Interrupt on high level */ +# define IOEXPANDER_VAL_LOW 9 /* 1001 Interrupt on low level */ +# define IOEXPANDER_VAL_EDGE 2 /* xx10 Interrupt on edge (vs. level) */ +# define IOEXPANDER_VAL_RISING 6 /* 0110 Interrupt on rising edge */ +# define IOEXPANDER_VAL_FALLING 10 /* 1010 Interrupt on falling edge */ +# define IOEXPANDER_VAL_BOTH 14 /* 1110 Interrupt on both edges */ /* Access macros ************************************************************/ @@ -221,46 +242,121 @@ ****************************************************************************/ #define IOEXP_MULTIREADBUF(dev,pins,vals,count) \ - ((dev)->ops->ioe_multireadbuf(dev,pin,vals,count)) + ((dev)->ops->ioe_multireadbuf(dev,pins,vals,count)) #endif /* CONFIG_IOEXPANDER_MULTIPIN */ +/**************************************************************************** + * Name: IOEP_ATTACH + * + * Description: + * Attach and enable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * pinset - The set of pin events that will generate the callback + * callback - The pointer to callback function. NULL will detach the + * callback. + * arg - User-provided callback argument + * + * Returned Value: + * A non-NULL handle value is returned on success. This handle may be + * used later to detach and disable the pin interrupt. + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +#define IOEP_ATTACH(dev,pinset,callback,arg) \ + ((dev)->ops->ioe_attach(dev,pinset,callback,arg)) +#endif + +/**************************************************************************** + * Name: IOEP_DETACH + * + * Description: + * Detach and disable a pin interrupt callback function. + * + * Input Parameters: + * dev - Device-specific state data + * handle - The non-NULL opaque value return by IOEP_ATTACH + * + * Returned Value: + * 0 on success, else a negative error code + * + ****************************************************************************/ + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +#define IOEP_DETACH(dev,handle) ((dev)->ops->ioe_detach(dev,handle)) +#endif + /**************************************************************************** * Public Types ****************************************************************************/ -struct ioexpander_dev_s; +/* This type represents a bitmap of pins */ +#if CONFIG_IOEXPANDER_NPINS <= 8 +typedef uint8_t ioe_pinset_t; +#elif CONFIG_IOEXPANDER_NPINS <= 16 +typedef uint16_t ioe_pinset_t; +#elif CONFIG_IOEXPANDER_NPINS <= 32 +typedef uint32_t ioe_pinset_t; +#else /* if CONFIG_IOEXPANDER_NPINS <= 64 */ +typedef uint64_t ioe_pinset_t; +#endif + +#ifdef CONFIG_IOEXPANDER_INT_ENABLE +/* This type represents a pin interrupt callback function */ + +struct ioexpander_dev_s; +typedef int (*ioe_callback_t)(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, FAR void *arg); +#endif /* CONFIG_IOEXPANDER_INT_ENABLE */ + +/* I/O expander interface methods */ + +struct ioexpander_dev_s; struct ioexpander_ops_s { CODE int (*ioe_direction)(FAR struct ioexpander_dev_s *dev, uint8_t pin, int direction); CODE int (*ioe_option)(FAR struct ioexpander_dev_s *dev, uint8_t pin, - int opt, void *val); + int opt, FAR void *val); CODE int (*ioe_writepin)(FAR struct ioexpander_dev_s *dev, uint8_t pin, bool value); CODE int (*ioe_readpin)(FAR struct ioexpander_dev_s *dev, uint8_t pin, - bool *value); + FAR bool *value); CODE int (*ioe_readbuf)(FAR struct ioexpander_dev_s *dev, uint8_t pin, - bool *value); + FAR bool *value); #ifdef CONFIG_IOEXPANDER_MULTIPIN CODE int (*ioe_multiwritepin)(FAR struct ioexpander_dev_s *dev, - uint8_t *pins, bool *values, int count); + FAR uint8_t *pins, FAR bool *values, + int count); CODE int (*ioe_multireadpin)(FAR struct ioexpander_dev_s *dev, - uint8_t *pins, bool *values, int count); + FAR uint8_t *pins, FAR bool *values, + int count); CODE int (*ioe_multireadbuf)(FAR struct ioexpander_dev_s *dev, - uint8_t *pins, bool *values, int count); + FAR uint8_t *pins, FAR bool *values, + int count); +#endif +#ifdef CONFIG_IOEXPANDER_INT_ENABLE + CODE FAR void *(*ioe_attach)(FAR struct ioexpander_dev_s *dev, + ioe_pinset_t pinset, + ioe_callback_t callback, FAR void *arg); + CODE int (*ioe_detach)(FAR struct ioexpander_dev_s *dev, + FAR void *handle); #endif }; struct ioexpander_dev_s { + /* "Lower half" operations provided by the I/O expander lower half */ + FAR const struct ioexpander_ops_s *ops; -#ifdef CONFIG_IOEXPANDER_INT_ENABLE - struct work_s work; /* Supports the interrupt handling "bottom half" */ - int sigpid; /* PID to be signaled in case of interrupt */ - int sigval; /* Signal to be sent in case of interrupt */ -#endif + + /* Internal storage used by the I/O expander may (internal to the I/O + * expander implementation). + */ }; #endif /* CONFIG_IOEXPANDER */ diff --git a/include/nuttx/ioexpander/pca9555.h b/include/nuttx/ioexpander/pca9555.h index 3a99a7def32..151b9fed36a 100644 --- a/include/nuttx/ioexpander/pca9555.h +++ b/include/nuttx/ioexpander/pca9555.h @@ -69,12 +69,11 @@ struct pca9555_config_s uint8_t address; /* 7-bit I2C address (only bits 0-6 used) */ uint32_t frequency; /* I2C or SPI frequency */ +#ifdef CONFIG_IOEXPANDER_INT_ENABLE /* If multiple PCA9555 devices are supported, then an IRQ number must * be provided for each so that their interrupts can be distinguished. */ -#ifndef CONFIG_PCA9555_INT_DISABLE - #ifdef CONFIG_PCA9555_MULTIPLE int irq; /* IRQ number received by interrupt handler. */ #endif diff --git a/include/nuttx/ioexpander/pcf8574.h b/include/nuttx/ioexpander/pcf8574.h new file mode 100644 index 00000000000..1caa0fa5895 --- /dev/null +++ b/include/nuttx/ioexpander/pcf8574.h @@ -0,0 +1,114 @@ +/**************************************************************************** + * include/nuttx/ioexpander/pcf8574.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __INCLUDE_NUTTX_IOEXPANDER_PCF8574_H +#define __INCLUDE_NUTTX_IOEXPANDER_PCF8574_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifdef CONFIG_PCF8574_INT_ENABLE +/* This is the type of the PCF8574xx interrupt handler */ + +typedef CODE void (*pcf8574_handler_t)(FAR void *arg); +#endif + +/* A reference to a structure of this type must be passed to the PCF8574xx + * driver when the driver is instantiated. This structure provides + * information about the configuration of the PCF8574xx and provides some + * board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied by + * the driver and is presumed to persist while the driver is active. The + * memory must be writeable because, under certain circumstances, the driver + * may modify the frequency. + */ + +struct pcf8574_config_s +{ + /* Device characterization */ + + uint8_t address; /* 7-bit I2C address (only bits 0-6 used) */ + uint32_t frequency; /* I2C frequency */ + +#ifdef CONFIG_PCF8574_INT_ENABLE + /* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the PCF8574xx driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach the PCF8574xx interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + */ + + CODE int (*attach)(FAR struct pcf8574_config_s *state, + pcf8574_handler_t handler, FAR void *arg); + CODE void (*enable)(FAR struct pcf8574_config_s *state, bool enable); +#endif +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: pcf8574_initialize + * + * Description: + * Instantiate and configure the PCF8574xx device driver to use the provided + * I2C device instance. + * + * Input Parameters: + * i2c - An I2C driver instance + * minor - The device i2c address + * config - Persistent board configuration data + * + * Returned Value: + * an ioexpander_dev_s instance on success, NULL on failure. + * + ****************************************************************************/ + +struct i2c_master_s; +FAR struct ioexpander_dev_s *pcf8574_initialize(FAR struct i2c_master_s *i2c, + FAR struct pcf8574_config_s *config); + +#endif diff --git a/include/nuttx/ioexpander/tca64xx.h b/include/nuttx/ioexpander/tca64xx.h new file mode 100644 index 00000000000..9a1ec8ca0a1 --- /dev/null +++ b/include/nuttx/ioexpander/tca64xx.h @@ -0,0 +1,130 @@ +/**************************************************************************** + * include/nuttx/ioexpander/tca64xx.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * This header file derives, in part, from the Project Ara TCA64xx driver + * which has this copyright: + * + * Copyright (c) 2014-2015 Google Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_IOEXPANDER_TCA64XX_H +#define __INCLUDE_NUTTX_IOEXPANDER_TCA64XX_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Identifies supported TCA64xx parts (as well as the number of supported + * parts). + */ + +enum tca64xx_part_e +{ + TCA6408_PART = 0, + TCA6416_PART, + TCA6424_PART, + TCA64_NPARTS +}; + +#ifdef CONFIG_TCA64XX_INT_ENABLE +/* This is the type of the TCA64xx interrupt handler */ + +typedef CODE void (*tca64_handler_t)(FAR void *arg); +#endif + +/* A reference to a structure of this type must be passed to the TCA64xx + * driver when the driver is instantiated. This structure provides + * information about the configuration of the TCA64xx and provides some + * board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied by + * the driver and is presumed to persist while the driver is active. The + * memory must be writeable because, under certain circumstances, the driver + * may modify the frequency. + */ + +struct tca64_config_s +{ + /* Device characterization */ + + uint8_t address; /* 7-bit I2C address (only bits 0-6 used) */ + uint8_t part; /* See enum tca64xx_part_e */ + uint32_t frequency; /* I2C or SPI frequency */ + +#ifdef CONFIG_TCA64XX_INT_ENABLE + /* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the TCA64xx driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach the TCA64xx interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + */ + + CODE int (*attach)(FAR struct tca64_config_s *state, + tca64_handler_t handler, FAR void *arg); + CODE void (*enable)(FAR struct tca64_config_s *state, bool enable); +#endif +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: tca64_initialize + * + * Description: + * Instantiate and configure the TCA64xx device driver to use the provided + * I2C device instance. + * + * Input Parameters: + * i2c - An I2C driver instance + * minor - The device i2c address + * config - Persistent board configuration data + * + * Returned Value: + * an ioexpander_dev_s instance on success, NULL on failure. + * + ****************************************************************************/ + +struct i2c_master_s; +FAR struct ioexpander_dev_s *tca64_initialize(FAR struct i2c_master_s *i2c, + FAR struct tca64_config_s *config); + +#endif diff --git a/include/nuttx/leds/rgbled.h b/include/nuttx/leds/rgbled.h index 07560d6a6eb..554f0719ffd 100644 --- a/include/nuttx/leds/rgbled.h +++ b/include/nuttx/leds/rgbled.h @@ -45,7 +45,7 @@ #include -#include +#include #include #ifdef CONFIG_RGBLED diff --git a/include/nuttx/float.h b/include/nuttx/lib/float.h similarity index 96% rename from include/nuttx/float.h rename to include/nuttx/lib/float.h index a4d8945ee57..2ff2b4252c6 100644 --- a/include/nuttx/float.h +++ b/include/nuttx/lib/float.h @@ -1,7 +1,7 @@ /**************************************************************************** - * include/nuttx/float.h + * include/nuttx/lib/float.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Reference: http://pubs.opengroup.org/onlinepubs/009695399/basedefs/float.h.html @@ -35,8 +35,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_FLOAT_H -#define __INCLUDE_NUTTX_FLOAT_H +#ifndef __INCLUDE_NUTTX_LIB_FLOAT_H +#define __INCLUDE_NUTTX_LIB_FLOAT_H /* TODO: These values could vary with architectures toolchains. This * logic should be move at least to the include/arch directory. @@ -222,4 +222,4 @@ # define LDBL_MIN DBL_MIN #endif -#endif /* __INCLUDE_NUTTX_FLOAT_H */ +#endif /* __INCLUDE_NUTTX_LIB_FLOAT_H */ diff --git a/include/nuttx/lib.h b/include/nuttx/lib/lib.h similarity index 90% rename from include/nuttx/lib.h rename to include/nuttx/lib/lib.h index 609f4f86f7e..5a55af8046a 100644 --- a/include/nuttx/lib.h +++ b/include/nuttx/lib/lib.h @@ -1,8 +1,8 @@ /**************************************************************************** - * include/nuttx/lib.h + * include/nuttx/lib/lib.h * Non-standard, internal APIs available in lib/. * - * Copyright (C) 2007-2009, 2012-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2012-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -34,8 +34,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_LIB_H -#define __INCLUDE_NUTTX_LIB_H +#ifndef __INCLUDE_NUTTX_LIB_LIB_H +#define __INCLUDE_NUTTX_LIB_LIB_H /**************************************************************************** * Included Files @@ -77,10 +77,14 @@ void lib_stream_initialize(FAR struct task_group_s *group); void lib_stream_release(FAR struct task_group_s *group); #endif +/* Functions defined in lib_srand.c *****************************************/ + +unsigned long nrand(unsigned long limit); + #undef EXTERN #ifdef __cplusplus } #endif #endif /* __ASSEMBLY__ */ -#endif /* __INCLUDE_NUTTX_LIB_H */ +#endif /* __INCLUDE_NUTTX_LIB_LIB_H */ diff --git a/include/nuttx/math.h b/include/nuttx/lib/math.h similarity index 98% rename from include/nuttx/math.h rename to include/nuttx/lib/math.h index d6963a50137..108706c2b92 100644 --- a/include/nuttx/math.h +++ b/include/nuttx/lib/math.h @@ -1,7 +1,7 @@ /**************************************************************************** - * include/nuttx/math.h + * include/nuttx/lib/math.h * - * Copyright (C) 2009, 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2012, 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_MATH_H -#define __INCLUDE_NUTTX_MATH_H +#ifndef __INCLUDE_NUTTX_LIB_MATH_H +#define __INCLUDE_NUTTX_LIB_MATH_H /**************************************************************************** * Included Files @@ -406,4 +406,4 @@ long double truncl (long double x); #endif #endif /* CONFIG_LIBM */ -#endif /* __INCLUDE_NUTTX_MATH_H */ +#endif /* __INCLUDE_NUTTX_LIB_MATH_H */ diff --git a/include/nuttx/math32.h b/include/nuttx/lib/math32.h similarity index 98% rename from include/nuttx/math32.h rename to include/nuttx/lib/math32.h index 64e993d7905..ba70f3184d1 100644 --- a/include/nuttx/math32.h +++ b/include/nuttx/lib/math32.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/math32.h + * include/nuttx/lib/math32.h * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_MATH32_H -#define __INCLUDE_NUTTX_MATH32_H +#ifndef __INCLUDE_NUTTX_LIB_MATH32_H +#define __INCLUDE_NUTTX_LIB_MATH32_H /**************************************************************************** * Included Files @@ -238,4 +238,4 @@ void umul64(FAR const struct uint64_s *factor1, } #endif -#endif /* __INCLUDE_NUTTX_MATH32_H */ +#endif /* __INCLUDE_NUTTX_LIB_MATH32_H */ diff --git a/include/nuttx/regex.h b/include/nuttx/lib/regex.h similarity index 93% rename from include/nuttx/regex.h rename to include/nuttx/lib/regex.h index e26eed91409..660058c6cc8 100644 --- a/include/nuttx/regex.h +++ b/include/nuttx/lib/regex.h @@ -1,8 +1,8 @@ /**************************************************************************** - * include/nuttx/regex.h + * include/nuttx/lib/regex.h * Non-standard, pattern-matching APIs available in lib/. * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -34,8 +34,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_REGEX_H -#define __INCLUDE_NUTTX_REGEX_H +#ifndef __INCLUDE_NUTTX_LIB_REGEX_H +#define __INCLUDE_NUTTX_LIB_REGEX_H /**************************************************************************** * Included Files @@ -80,4 +80,4 @@ int match(const char *pattern, const char *string); } #endif -#endif /* __INCLUDE_NUTTX_REGEX_H */ +#endif /* __INCLUDE_NUTTX_LIB_REGEX_H */ diff --git a/include/nuttx/stdarg.h b/include/nuttx/lib/stdarg.h similarity index 92% rename from include/nuttx/stdarg.h rename to include/nuttx/lib/stdarg.h index 2bda8cbd617..6d0ef173daf 100644 --- a/include/nuttx/stdarg.h +++ b/include/nuttx/lib/stdarg.h @@ -1,7 +1,7 @@ /**************************************************************************** - * include/nuttx/stdarg.h + * include/nuttx/lib/stdarg.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_STDARG_H -#define __INCLUDE_NUTTX_STDARG_H +#ifndef __INCLUDE_NUTTX_LIB_STDARG_H +#define __INCLUDE_NUTTX_LIB_STDARG_H /**************************************************************************** * Included Files @@ -61,4 +61,4 @@ * Public Function Prototypes ****************************************************************************/ -#endif /* __INCLUDE_NUTTX_STDARG_H */ +#endif /* __INCLUDE_NUTTX_LIB_STDARG_H */ diff --git a/include/nuttx/configdata.h b/include/nuttx/mtd/configdata.h similarity index 96% rename from include/nuttx/configdata.h rename to include/nuttx/mtd/configdata.h index 60539993aae..65965c61959 100644 --- a/include/nuttx/configdata.h +++ b/include/nuttx/mtd/configdata.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/configdata.h + * include/nuttx/mtd/configdata.h * * Copyright (C) 2013 Ken Pettit. All rights reserved. * Author: Ken Pettit @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_CONFIGDATA_H -#define __INCLUDE_NUTTX_CONFIGDATA_H +#ifndef __INCLUDE_NUTTX_MTD_CONFIGDATA_H +#define __INCLUDE_NUTTX_MTD_CONFIGDATA_H /* The configdata device details kernel level services for providing * application config data from kernel control objects, such as partitions @@ -133,4 +133,4 @@ int mtdconfig_register(FAR struct mtd_dev_s *mtd); } #endif -#endif /* __INCLUDE_NUTTX_CONFIGDATA_H */ +#endif /* __INCLUDE_NUTTX_MTD_CONFIGDATA_H */ diff --git a/include/nuttx/sensors/kxjt9.h b/include/nuttx/sensors/kxjt9.h new file mode 100644 index 00000000000..4ebb5836107 --- /dev/null +++ b/include/nuttx/sensors/kxjt9.h @@ -0,0 +1,128 @@ +/**************************************************************************** + * include/nuttx/sensors/kxjt9.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * This driver derives from the Motorola Moto Z MDK: + * + * Copyright (c) 2016 Motorola Mobility, LLC. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_SENSORS_KXJT9_H +#define __INCLUDE_NUTTX_SENSORS_KXJT9_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#if defined(CONFIG_I2C) && defined(CONFIG_SENSOR_KXTJ9) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* IOCTL Commands ***********************************************************/ + +#define SNIOC_ENABLE _SNIOC(0x0001) /* Arg: None */ +#define SNIOC_DISABLE _SNIOC(0x0002) /* Arg: None */ +#define SNIOC_CONFIGURE _SNIOC(0x0003) /* Arg: enum kxtj9_odr_e value */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Data control register bits */ + +enum kxtj9_odr_e +{ + ODR0_781F = 8, + ODR1_563F = 9, + ODR3_125F = 10, + ODR6_25F = 11, + ODR12_5F = 0, + ODR25F = 1, + ODR50F = 2, + ODR100F = 3, + ODR200F = 4, + ODR400F = 5, + ODR800F = 6 +}; + +/* Data returned by reading from the KXTJ9 is returned in this format. + * In order for the read to be successful, a buffer of size >= sizeof(struct + * kxtj9_sensor_data) must be provided with the read. + */ + +struct kxtj9_sensor_data +{ + uint16_t x; + uint16_t y; + uint16_t z; +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/**************************************************************************** + * Name: kxjt9_register + * + * Description: + * Register the KXJT9 accelerometer device as 'devpath'. + * + * Input Parameters: + * devpath - The full path to the driver to register, e.g., "/dev/accel0". + * i2c - An I2C driver instance. + * addr - The I2C address of the KXJT9 accelerometer, gyroscope or + * magnetometer. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +struct i2c_master_s; +int kxjt9_register(FAR const char *devpath, FAR struct i2c_master_s *i2c, + uint8_t address); + +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_I2C && CONFIG_SENSOR_KXTJ9 */ +#endif /* __INCLUDE_NUTTX_SENSORS_KXJT9_H */ diff --git a/include/nuttx/serial/pty.h b/include/nuttx/serial/pty.h new file mode 100644 index 00000000000..8b8768909a1 --- /dev/null +++ b/include/nuttx/serial/pty.h @@ -0,0 +1,105 @@ +/**************************************************************************** + * include/nuttx/serial/pty.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_SERIAL_PTY_H +#define __INCLUDE_NUTTX_SERIAL_PTY_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: ptmx_register + * + * Input Parameters: + * None + * + * Description: + * Register the master pseudo-terminal multiplexor device at /dev/ptmx + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_PSEUDOTERM_SUSV1 +int ptmx_register(void); +#endif + +/**************************************************************************** + * Name: pty_register + * + * Description: + * Create and register PTY master and slave devices. The master device + * will be registered at /dev/ptyN and slave at /dev/ttypN where N is + * the provided minor number. + * + * The slave side of the interface is always locked initially. The + * master must call unlockpt() before the slave device can be opened. + * + * Input Parameters: + * minor - The number that qualifies the naming of the created devices. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_PSEUDOTERM_BSD +int pty_register(int minor); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_SERIAL_PTY_H */ diff --git a/include/nuttx/serial/serial.h b/include/nuttx/serial/serial.h index 493c0d53bad..a5a29f25690 100644 --- a/include/nuttx/serial/serial.h +++ b/include/nuttx/serial/serial.h @@ -280,9 +280,9 @@ struct uart_dev_s #endif bool isconsole; /* true: This is the serial console */ +#ifdef CONFIG_SERIAL_TERMIOS /* Terminal control flags */ -#ifdef CONFIG_SERIAL_TERMIOS tcflag_t tc_iflag; /* Input modes */ tcflag_t tc_oflag; /* Output modes */ tcflag_t tc_lflag; /* Local modes */ diff --git a/include/nuttx/serial/tioctl.h b/include/nuttx/serial/tioctl.h index 2044195e502..e4c01690edb 100644 --- a/include/nuttx/serial/tioctl.h +++ b/include/nuttx/serial/tioctl.h @@ -146,7 +146,7 @@ /* Marking a line as local */ -#define TIOCGSOFTCAR _TIOC(0x0023) /* Get software carrier flag: FAR int */ +#define TIOCGSOFTCAR _TIOC(0x0023) /* Get software carrier flag: FAR int* */ #define TIOCSSOFTCAR _TIOC(0x0024) /* Set software carrier flag: FAR const int */ /* Get/set serial line info */ @@ -160,10 +160,16 @@ #define TIOCMIWAIT _TIOC(0x0028) /* Wait for a change on serial input line(s): void */ #define TIOCGICOUNT _TIOC(0x0029) /* Read serial port interrupt count: FAR struct serial_icounter_struct */ +/* Pseudo-terminals */ + +#define TIOCGPTN _TIOC(0x002a) /* Get Pty Number (of pty-mux device): FAR int* */ +#define TIOCSPTLCK _TIOC(0x002b) /* Lock/unlock Pty: int */ +#define TIOCGPTLCK _TIOC(0x002c) /* Get Pty lock state: FAR int* */ + /* RS-485 Support */ -#define TIOCSRS485 _TIOC(0x002a) /* Set RS485 mode, arg: pointer to struct serial_rs485 */ -#define TIOCGRS485 _TIOC(0x002b) /* Get RS485 mode, arg: pointer to struct serial_rs485 */ +#define TIOCSRS485 _TIOC(0x002d) /* Set RS485 mode, arg: pointer to struct serial_rs485 */ +#define TIOCGRS485 _TIOC(0x002e) /* Get RS485 mode, arg: pointer to struct serial_rs485 */ /* Definitions for flags used in struct serial_rs485 (Linux compatible) */ @@ -174,14 +180,14 @@ /* Single-wire UART support */ -#define TIOCSSINGLEWIRE _TIOC(0x002c) /* Set single-wire mode */ -#define TIOCGSINGLEWIRE _TIOC(0x002d) /* Get single-wire mode */ +#define TIOCSSINGLEWIRE _TIOC(0x002f) /* Set single-wire mode */ +#define TIOCGSINGLEWIRE _TIOC(0x0030) /* Get single-wire mode */ # define SER_SINGLEWIRE_ENABLED (1 << 0) /* Enable/disable single-wire support */ /* Debugging */ -#define TIOCSERGSTRUCT _TIOC(0x002e) /* Get device TTY structure */ +#define TIOCSERGSTRUCT _TIOC(0x0031) /* Get device TTY structure */ /******************************************************************************************** * Public Type Definitions diff --git a/include/nuttx/usb/usbdev_trace.h b/include/nuttx/usb/usbdev_trace.h index 4ef4e170e11..55915caee83 100644 --- a/include/nuttx/usb/usbdev_trace.h +++ b/include/nuttx/usb/usbdev_trace.h @@ -295,7 +295,7 @@ #define USBMSC_TRACEERR_CMDREADREADFAIL 0x0094 #define USBMSC_TRACEERR_CMDREADSUBMIT 0x0095 #define USBMSC_TRACEERR_CMDREADWRRQEMPTY 0x0096 -#define USBMSC_TRACEERR_CMDSTATUSRDREQLISTEMPTY 0x0097 +#define USBMSC_TRACEERR_CMDSTATUSWRREQLISTEMPTY 0x0097 #define USBMSC_TRACEERR_CMDUNEVIOLATION 0x0098 #define USBMSC_TRACEERR_CMDWRITERDSUBMIT 0x0099 #define USBMSC_TRACEERR_CMDWRITERDRQEMPTY 0x009a diff --git a/include/stdlib.h b/include/stdlib.h index aa259c9d50c..d08db9d5570 100644 --- a/include/stdlib.h +++ b/include/stdlib.h @@ -207,6 +207,21 @@ struct mallinfo mallinfo(void); int mallinfo(FAR struct mallinfo *info); #endif +/* Pseudo-Terminals */ + +#ifdef CONFIG_PSEUDOTERM_SUSV1 +FAR char *ptsname(int fd); +int ptsname_r(int fd, FAR char *buf, size_t buflen); +#endif + +#ifdef CONFIG_PSEUDOTERM +int unlockpt(int fd); + +/* int grantpt(int fd); Not implemented */ + +#define grantpt(fd) (0) +#endif + /* Arithmetic */ int abs(int j); diff --git a/include/sys/syscall.h b/include/sys/syscall.h index 389c11bf08f..2fba44de34f 100644 --- a/include/sys/syscall.h +++ b/include/sys/syscall.h @@ -215,7 +215,12 @@ #define SYS_clock_getres (__SYS_clock+1) #define SYS_clock_gettime (__SYS_clock+2) #define SYS_clock_settime (__SYS_clock+3) -#define __SYS_timers (__SYS_clock+4) +#ifdef CONFIG_CLOCK_TIMEKEEPING +# define SYS_adjtime (__SYS_clock+4) +# define __SYS_timers (__SYS_clock+5) +#else +# define __SYS_timers (__SYS_clock+4) +#endif /* The following are defined only if POSIX timers are supported */ @@ -292,24 +297,36 @@ # define SYS_dup2 (__SYS_filedesc+2) # define SYS_fcntl (__SYS_filedesc+3) # define SYS_lseek (__SYS_filedesc+4) -# define SYS_mkfifo (__SYS_filedesc+5) -# define SYS_mmap (__SYS_filedesc+6) -# define SYS_open (__SYS_filedesc+7) -# define SYS_opendir (__SYS_filedesc+8) -# define SYS_pipe (__SYS_filedesc+9) -# define SYS_readdir (__SYS_filedesc+10) -# define SYS_rewinddir (__SYS_filedesc+11) -# define SYS_seekdir (__SYS_filedesc+12) -# define SYS_stat (__SYS_filedesc+13) -# define SYS_statfs (__SYS_filedesc+14) -# define SYS_telldir (__SYS_filedesc+15) +# define SYS_mmap (__SYS_filedesc+5) +# define SYS_open (__SYS_filedesc+6) +# define SYS_opendir (__SYS_filedesc+7) +# define SYS_readdir (__SYS_filedesc+8) +# define SYS_rewinddir (__SYS_filedesc+9) +# define SYS_seekdir (__SYS_filedesc+10) +# define SYS_stat (__SYS_filedesc+11) +# define SYS_statfs (__SYS_filedesc+12) +# define SYS_telldir (__SYS_filedesc+13) + +# if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0 +# define SYS_pipe2 (__SYS_filedesc+14) +# define __SYS_mkfifo2 (__SYS_filedesc+15) +# else +# define __SYS_mkfifo2 (__SYS_filedesc+14) +# endif + +# if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0 +# define SYS_mkfifo2 (__SYS_mkfifo2+0) +# define __SYS_fs_fdopen (__SYS_mkfifo2+1) +# else +# define __SYS_fs_fdopen (__SYS_mkfifo2+0) +# endif # if CONFIG_NFILE_STREAMS > 0 -# define SYS_fs_fdopen (__SYS_filedesc+16) -# define SYS_sched_getstreams (__SYS_filedesc+17) -# define __SYS_sendfile (__SYS_filedesc+18) +# define SYS_fs_fdopen (__SYS_fs_fdopen+0) +# define SYS_sched_getstreams (__SYS_fs_fdopen+1) +# define __SYS_sendfile (__SYS_fs_fdopen+2) # else -# define __SYS_sendfile (__SYS_filedesc+16) +# define __SYS_sendfile (__SYS_fs_fdopen+0) # endif # if defined(CONFIG_NET_SENDFILE) diff --git a/include/sys/time.h b/include/sys/time.h index b36e30fca9a..7b1e15e9b5f 100644 --- a/include/sys/time.h +++ b/include/sys/time.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/sys/time.h * - * Copyright (C) 2009, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -112,6 +112,7 @@ /**************************************************************************** * Public Type Definitions ****************************************************************************/ + /* struct timeval represents time as seconds plus microseconds */ struct timeval @@ -190,6 +191,46 @@ int gettimeofday(FAR struct timeval *tv, FAR struct timezone *tz); int settimeofday(FAR const struct timeval *tv, FAR struct timezone *tz); +/**************************************************************************** + * Name: adjtime + * + * Description: + * The adjtime() function gradually adjusts the system clock (as returned + * by gettimeofday(2)). The amount of time by which the clock is to be + * adjusted is specified in the structure pointed to by delta. + * + * This structure has the following form: + * + * struct timeval + * { + * time_t tv_sec; (seconds) + * suseconds_t tv_usec; (microseconds) + * }; + * + * If the adjustment in delta is positive, then the system clock is + * speeded up by some small percentage (i.e., by adding a small amount of + * time to the clock value in each second) until the adjustment has been + * completed. If the adjustment in delta is negative, then the clock is + * slowed down in a similar fashion. + * + * If a clock adjustment from an earlier adjtime() call is already in + * progress at the time of a later adjtime() call, and delta is not NULL + * for the later call, then the earlier adjustment is stopped, but any + * already completed part of that adjustment is not undone. + * + * If olddelta is not NULL, then the buffer that it points to is used to + * return the amount of time remaining from any previous adjustment that + * has not yet been completed. + * + * NOTE: This is not a POSIX interface but derives from 4.3BSD, System V. + * It is also supported for Linux compatibility. + * + ****************************************************************************/ + +#ifdef CONFIG_CLOCK_TIMEKEEPING +int adjtime(FAR const struct timeval *delta, FAR struct timeval *olddelta); +#endif + #undef EXTERN #if defined(__cplusplus) } diff --git a/include/unistd.h b/include/unistd.h index e482109f5c1..909df0b3383 100644 --- a/include/unistd.h +++ b/include/unistd.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/unistd.h * - * Copyright (C) 2007-2009, 2013-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2013-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/libc/libc.csv b/libc/libc.csv index 9a385a215b9..7fbbf47e0ea 100644 --- a/libc/libc.csv +++ b/libc/libc.csv @@ -64,17 +64,19 @@ "lib_dumpbuffer","debug.h","","void","FAR const char *","FAR const uint8_t *","unsigned int" "lio_listio","aio.h","defined(CONFIG_FS_AIO)","int","int","FAR struct aiocb *const []|FAR struct aiocb *const *","int","FAR struct sigevent *" "llabs","stdlib.h","defined(CONFIG_HAVE_LONG_LONG)","long long int","long long int" -"match","nuttx/regex.h","","int","const char *","const char *" +"match","nuttx/lib/regex.h","","int","const char *","const char *" "memccpy","string.h","","FAR void","FAR void *","FAR const void *","int c","size_t" "memchr","string.h","","FAR void","FAR const void *","int c","size_t" "memcmp","string.h","","int","FAR const void *","FAR const void *","size_t" "memcpy","string.h","","FAR void","FAR void *","FAR const void *","size_t" "memmove","string.h","","FAR void","FAR void *","FAR const void *","size_t" "memset","string.h","","FAR void","FAR void *","int c","size_t" +"mkfifo","sys/stat.h","CONFIG_NFILE_DESCRIPTORS > 0","int","FAR const char*","mode_t" "mktime","time.h","","time_t","const struct tm *" "ntohl","arpa/inet.h","","uint32_t","uint32_t" "ntohs","arpa/inet.h","","uint16_t","uint16_t" "perror","stdio.h","CONFIG_NFILE_DESCRIPTORS > 0 && CONFIG_NFILE_STREAMS > 0","void","FAR const char *" +"pipe","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0","int","int [2]|int*" "printf","stdio.h","","int","const char *","..." "pthread_attr_destroy","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR pthread_attr_t *" "pthread_attr_getinheritsched","pthread.h","!defined(CONFIG_DISABLE_PTHREAD)","int","FAR const pthread_attr_t *","FAR int *" diff --git a/libc/math/Kconfig b/libc/math/Kconfig index 6fb14ec2724..a3a859824e4 100644 --- a/libc/math/Kconfig +++ b/libc/math/Kconfig @@ -17,8 +17,9 @@ config LIBM Another possibility is that you have a custom, architecture-specific math libary and that the corresponding math.h file resides at arch//include/math.h. - The option is selected via ARCH_MATH_H. If ARCH_MATH_H is selected,then the include/nuttx/math.h - header file will be copied to include/math.h where it can be used by your applications. + The option is selected via ARCH_MATH_H. If ARCH_MATH_H is selected,then the + include/nuttx/libmath.h header file will be copied to include/math.h where it can + be used by your applications. If ARCH_MATH_H is not defined, then this option can be selected to build a generic, math library built into NuttX. This math library comes from the Rhombus OS and diff --git a/libc/math/lib_asin.c b/libc/math/lib_asin.c index 2f45a24a1d9..15bce7913a1 100644 --- a/libc/math/lib_asin.c +++ b/libc/math/lib_asin.c @@ -35,6 +35,8 @@ #include #include +#ifdef CONFIG_HAVE_DOUBLE + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -42,16 +44,40 @@ #undef DBL_EPSILON #define DBL_EPSILON 1e-12 +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* This lib uses Newton's method to approximate asin(x). Newton's Method + * converges very slowly for x close to 1. We can accelerate convergence + * with the following identy: asin(x)=Sign(x)*(Pi/2-asin(sqrt(1-x^2))) + */ + +static double asin_aux(double x) +{ + long double y; + double y_cos, y_sin; + + y = 0.0; + y_sin = 0.0; + + while (fabs(y_sin - x) > DBL_EPSILON) + { + y_cos = cos(y); + y -= ((long double)y_sin - (long double)x) / (long double)y_cos; + y_sin = sin(y); + } + + return y; +} + /**************************************************************************** * Public Functions ****************************************************************************/ -#ifdef CONFIG_HAVE_DOUBLE double asin(double x) { - long double y; - long double y_sin; - long double y_cos; + double y; /* Verify that the input value is in the domain of the function */ @@ -60,26 +86,19 @@ double asin(double x) return NAN; } - y = 0; + /* if x is > sqrt(2), use identity for faster convergence */ - while (1) + if (fabs(x) > 0.71) { - y_sin = sin(y); - y_cos = cos(y); - - if (y > M_PI_2 || y < -M_PI_2) - { - y = fmod(y, M_PI); - } - - if (y_sin + DBL_EPSILON >= x && y_sin - DBL_EPSILON <= x) - { - break; - } - - y = y - (y_sin - x) / y_cos; + y = M_PI_2 - asin_aux(sqrt(1.0 - x * x)); + y = copysign(y, x); + } + else + { + y = asin_aux(x); } return y; } -#endif + +#endif /* CONFIG_HAVE_DOUBLE */ diff --git a/libc/math/lib_asinf.c b/libc/math/lib_asinf.c index ac17a539441..e60f439f6e7 100644 --- a/libc/math/lib_asinf.c +++ b/libc/math/lib_asinf.c @@ -3,7 +3,7 @@ * * This file is a part of NuttX: * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Ported by: Darcy Gong * * It derives from the Rhombs OS math library by Nick Johnson which has @@ -33,33 +33,58 @@ #include /**************************************************************************** - * Public Functions + * Private Functions ****************************************************************************/ -float asinf(float x) +/* This lib uses Newton's method to approximate asin(x). Newton's Method + * converges very slowly for x close to 1. We can accelerate convergence + * with the following identy: asin(x)=Sign(x)*(Pi/2-asin(sqrt(1-x^2))) + */ + +static float asinf_aux(float x) { - long double y, y_sin, y_cos; + double y; + float y_sin, y_cos; - y = 0; + y = 0.0; + y_sin = 0.0F; - while (1) + while (fabsf(y_sin - x) > FLT_EPSILON) { - y_sin = sinf(y); y_cos = cosf(y); - - if (y > M_PI_2_F || y < -M_PI_2_F) - { - y = fmodf(y, M_PI_F); - } - - if (y_sin + FLT_EPSILON >= x && y_sin - FLT_EPSILON <= x) - { - break; - } - - y = y - (y_sin - x) / y_cos; + y -= ((double)y_sin - (double)x) / (double)y_cos; + y_sin = sinf(y); } return y; } +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +float asinf(float x) +{ + float y; + + /* Verify that the input value is in the domain of the function */ + + if (x < -1.0F || x > 1.0F || isnan(x)) + { + return NAN_F; + } + + /* if x is > sqrt(2), use identity for faster convergence */ + + if (fabsf(x) > 0.71F) + { + y = M_PI_2_F - asinf_aux(sqrtf(1.0F - x * x)); + y = copysignf(y, x); + } + else + { + y = asinf_aux(x); + } + + return y; +} diff --git a/libc/math/lib_asinl.c b/libc/math/lib_asinl.c index 466910daf31..088257a1e5f 100644 --- a/libc/math/lib_asinl.c +++ b/libc/math/lib_asinl.c @@ -3,7 +3,7 @@ * * This file is a part of NuttX: * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Ported by: Darcy Gong * * It derives from the Rhombs OS math library by Nick Johnson which has @@ -35,35 +35,57 @@ #include #include +#ifdef CONFIG_HAVE_LONG_DOUBLE + /**************************************************************************** * Public Functions ****************************************************************************/ -#ifdef CONFIG_HAVE_LONG_DOUBLE -long double asinl(long double x) +static long double asinl_aux(long double x) { - long double y, y_sin, y_cos; + long double y, y_cos, y_sin; - y = 0; + y = 0.0; + y_sin = 0.0; - while (1) + while (fabsl(y_sin - x) > DBL_EPSILON) { - y_sin = sinl(y); y_cos = cosl(y); - - if (y > M_PI_2 || y < -M_PI_2) - { - y = fmodl(y, M_PI); - } - - if (y_sin + LDBL_EPSILON >= x && y_sin - LDBL_EPSILON <= x) - { - break; - } - - y = y - (y_sin - x) / y_cos; + y -= (y_sin - x) / y_cos; + y_sin = sinl(y); } return y; } -#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +long double asinl(long double x) +{ + long double y; + + /* Verify that the input value is in the domain of the function */ + + if (x < -1.0 || x > 1.0 || isnan(x)) + { + return NAN; + } + + /* if x is > sqrt(2), use identity for faster convergence */ + + if (fabsl(x) > 0.71) + { + y = M_PI_2 - asinl_aux(sqrtl(1.0 - x * x)); + y = copysignl(y, x); + } + else + { + y = asinl_aux(x); + } + + return y; +} + +#endif /* CONFIG_HAVE_LONG_DOUBLE */ diff --git a/libc/math/lib_copysignf.c b/libc/math/lib_copysignf.c index 9684f68a746..c438e7d43ae 100644 --- a/libc/math/lib_copysignf.c +++ b/libc/math/lib_copysignf.c @@ -1,10 +1,20 @@ /**************************************************************************** * libc/math/lib_copysignf.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Dave Marples * + * Replaced on 2016-07-30 by David Alession with a faster version of + * copysignf() from NetBSD with the following Copyright: + * + * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. + * + * Developed at SunPro, a Sun Microsystems, Inc. business. + * Permission to use, copy, modify, and distribute this + * software is freely granted, provided that this notice + * is preserved. + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -42,6 +52,44 @@ #include #include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Get a 32 bit int from a float. */ + +#define GET_FLOAT_WORD(i,d) \ + do \ + { \ + ieee_float_shape_type gf_u; \ + gf_u.value = (d); \ + (i) = gf_u.word; \ + } while (0) + +/* Set a float from a 32 bit int. */ + +#define SET_FLOAT_WORD(d,i) \ + do \ + { \ + ieee_float_shape_type sf_u; \ + sf_u.word = (i); \ + (d) = sf_u.value; \ + } while (0) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* union which permits us to convert between a float and a 32 bit int. */ + +typedef union +{ + float value; + uint32_t word; +} +ieee_float_shape_type; /**************************************************************************** * Public Functions @@ -49,10 +97,12 @@ float copysignf(float x, float y) { - if (y < 0) - { - return -fabsf(x); - } + uint32_t ix; + uint32_t iy; - return fabsf(x); + GET_FLOAT_WORD(ix, x); + GET_FLOAT_WORD(iy, y); + SET_FLOAT_WORD(x, (ix & 0x7fffffff) | (iy & 0x80000000)); + + return x; } diff --git a/libc/math/lib_erf.c b/libc/math/lib_erf.c index 215c1017204..28f266196f0 100644 --- a/libc/math/lib_erf.c +++ b/libc/math/lib_erf.c @@ -1,6 +1,7 @@ /**************************************************************************** * libc/math/lib_erf.c * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 Brennan Ashton. All rights reserved. * Author: Brennan Ashton * @@ -42,32 +43,42 @@ #include +#ifdef CONFIG_HAVE_DOUBLE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define A1 0.254829592 +#define A2 (-0.284496736) +#define A3 1.421413741 +#define A4 (-1.453152027) +#define A5 1.061405429 +#define P 0.3275911 + /**************************************************************************** * Public Functions ****************************************************************************/ -#ifdef CONFIG_HAVE_DOUBLE +/**************************************************************************** + * Name: erf + * + * Description: + * This implementation comes from the Handbook of Mathmatical Functions + * The implementations in this book are not protected by copyright. + * erf comes from formula 7.1.26 + * + ****************************************************************************/ + double erf(double x) { - /* This implementation comes from the Handbook of Mathmatical Functions - * The implementations in this book are not protected by copyright. - * erf comes from formula 7.1.26 - */ - - char sign; double t; - double a1, a2, a3, a4, a5, p; + double z; - a1 = 0.254829592; - a2 = -0.284496736; - a3 = 1.421413741; - a4 = -1.453152027; - a5 = 1.061405429; - p = 0.3275911; - - sign = (x >= 0 ? 1 : -1); - t = 1.0/(1.0 + p*x); - return sign * (1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * - (double)expf(-x * x)); + z = fabs(x); + t = 1.0 / (1.0 + P * z); + t = 1.0 - (((((A5 * t + A4) * t) + A3) * t + A2) * t + A1) * t * exp(-z * z); + return copysign(t, x); } -#endif + +#endif /* CONFIG_HAVE_DOUBLE */ diff --git a/libc/math/lib_erff.c b/libc/math/lib_erff.c index 364b7fe03c0..8ca0fefb0fe 100644 --- a/libc/math/lib_erff.c +++ b/libc/math/lib_erff.c @@ -1,6 +1,7 @@ /**************************************************************************** * libc/math/lib_erff.c * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 Brennan Ashton. All rights reserved. * Author: Brennan Ashton * @@ -42,29 +43,38 @@ #include +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define A1 0.254829592F +#define A2 (-0.284496736F) +#define A3 1.421413741F +#define A4 (-1.453152027F) +#define A5 1.061405429F +#define P 0.3275911F + /**************************************************************************** * Public Functions ****************************************************************************/ +/**************************************************************************** + * Name: erff + * + * Description: + * This implementation comes from the Handbook of Mathmatical Functions + * The implementations in this book are not protected by copyright. + * erf comes from formula 7.1.26 + * + ****************************************************************************/ + float erff(float x) { - /* This implementation comes from the Handbook of Mathmatical Functions - * The implementations in this book are not protected by copyright. - * erf comes from formula 7.1.26 - */ - - char sign; float t; - float a1, a2, a3, a4, a5, p; + float z; - a1 = 0.254829592F; - a2 = -0.284496736F; - a3 = 1.421413741F; - a4 = -1.453152027F; - a5 = 1.061405429F; - p = 0.3275911F; - - sign = (x >= 0 ? 1 : -1); - t = 1.0F/(1.0F + p*x); - return sign * (1.0F - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x)); + z = fabsf(x); + t = 1.0F / (1.0F + P * z); + t = 1.0F - (((((A5 * t + A4) * t) + A3) * t + A2) * t + A1) * t * expf(-z * z); + return copysignf(t, x); } diff --git a/libc/math/lib_erfl.c b/libc/math/lib_erfl.c index 44d62389808..2e674bb1497 100644 --- a/libc/math/lib_erfl.c +++ b/libc/math/lib_erfl.c @@ -46,6 +46,13 @@ * Public Functions ****************************************************************************/ +#define A1 0.254829592 +#define A2 (-0.284496736) +#define A3 1.421413741 +#define A4 (-1.453152027) +#define A5 1.061405429 +#define P 0.3275911 + #ifdef CONFIG_HAVE_LONG_DOUBLE long double erfl(long double x) { @@ -54,19 +61,11 @@ long double erfl(long double x) * erf comes from formula 7.1.26 */ - char sign; - long double t; - long double a1, a2, a3, a4, a5, p; + long double t, z; - a1 = 0.254829592; - a2 = -0.284496736; - a3 = 1.421413741; - a4 = -1.453152027; - a5 = 1.061405429; - p = 0.3275911; - - sign = (x >= 0 ? 1 : -1); - t = 1.0/(1.0 + p*x); - return sign * (1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x)); + z = fabsl(x); + t = 1.0 / (1.0 + P * z); + t = 1.0 - (((((A5 * t + A4) * t) + A3) * t + A2) * t + A1) * t * expl(-z * z); + return copysignl(t, x); } #endif diff --git a/libc/misc/Make.defs b/libc/misc/Make.defs index e25b6a783ad..dbdb3495471 100644 --- a/libc/misc/Make.defs +++ b/libc/misc/Make.defs @@ -1,7 +1,7 @@ ############################################################################ # libc/misc/Make.defs # -# Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved. +# Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without @@ -57,7 +57,11 @@ ifeq ($(CONFIG_LIBC_IOCTL_VARIADIC),y) CSRCS += lib_ioctl.c endif -else +ifeq ($(CONFIG_PIPES),y) +CSRCS += lib_mkfifo.c +endif + +else # CONFIG_NFILE_DESCRIPTORS > 0 ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0) CSRCS += lib_sendfile.c @@ -70,8 +74,8 @@ ifeq ($(CONFIG_LIBC_IOCTL_VARIADIC),y) CSRCS += lib_ioctl.c endif -endif -endif +endif # CONFIG_NSOCKET_DESCRIPTORS > 0 +endif # CONFIG_NFILE_DESCRIPTORS > 0 # Add the miscellaneous C files to the build diff --git a/libc/misc/lib_dumpbuffer.c b/libc/misc/lib_dumpbuffer.c index b1024d00b73..f535a23b857 100644 --- a/libc/misc/lib_dumpbuffer.c +++ b/libc/misc/lib_dumpbuffer.c @@ -1,7 +1,7 @@ /**************************************************************************** * libc/misc/lib_dumpbuffer.c * - * Copyright (C) 2009, 2011, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,6 +47,33 @@ * Pre-processor definitions ****************************************************************************/ +#define _NITEMS 32 /* 32 bytes displayed per line */ +#define _LINESIZE (3 * _NITEMS + 4) /* 2 hex chars, ASCII char, 3 spaces, NUL */ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lib_nibble + * + * Description: + * Convert a binary nibble to a hexadecimal character. + * + ****************************************************************************/ + +static char lib_nibble(unsigned char nibble) +{ + if (nibble < 10) + { + return '0' + nibble; + } + else + { + return 'a' + nibble - 10; + } +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -55,63 +82,76 @@ * Name: lib_dumpbuffer * * Description: - * Do a pretty buffer dump + * Do a pretty buffer dump. + * + * A fairly large on-stack buffer is used for the case where timestamps are + * applied to each line. * ****************************************************************************/ void lib_dumpbuffer(FAR const char *msg, FAR const uint8_t *buffer, unsigned int buflen) { + char buf[_LINESIZE]; unsigned int i; unsigned int j; unsigned int k; syslog(LOG_INFO, "%s (%p):\n", msg, buffer); - for (i = 0; i < buflen; i += 32) + for (i = 0; i < buflen; i += _NITEMS) { - syslog(LOG_INFO, "%04x: ", i); - for (j = 0; j < 32; j++) + FAR char *ptr = buf; + + /* Generate hex values: 2 * _NITEMS + 1 bytes */ + + for (j = 0; j < _NITEMS; j++) { k = i + j; - if (j == 16) + if (j == (_NITEMS / 2)) { - syslog(LOG_INFO, " "); + *ptr++ = ' '; } if (k < buflen) { - syslog(LOG_INFO, "%02x", buffer[k]); + *ptr++ = lib_nibble((buffer[k] >> 4) & 0xf); + *ptr++ = lib_nibble(buffer[k] & 0xf); } else { - syslog(LOG_INFO, " "); + *ptr++ = ' '; + *ptr++ = ' '; } } - syslog(LOG_INFO, " "); - for (j = 0; j < 32; j++) + *ptr++ = ' '; /* Plus 1 byte */ + + /* Generate printable characters: Plus 1 * _NITEMS + 1 bytes */ + + for (j = 0; j < _NITEMS; j++) { k = i + j; - if (j == 16) + if (j == (_NITEMS / 2)) { - syslog(LOG_INFO, " "); + *ptr++ = ' '; } if (k < buflen) { if (buffer[k] >= 0x20 && buffer[k] < 0x7f) { - syslog(LOG_INFO, "%c", buffer[k]); + *ptr++ = buffer[k]; } else { - syslog(LOG_INFO, "."); + *ptr++ = '.'; } } } - syslog(LOG_INFO, "\n"); + *ptr = '\0'; /* Plus 1 byte */ + syslog(LOG_INFO, "%04x: %s\n", i, buf); } } diff --git a/libc/misc/lib_match.c b/libc/misc/lib_match.c index 690d111a5c7..2b3085d6635 100644 --- a/libc/misc/lib_match.c +++ b/libc/misc/lib_match.c @@ -39,7 +39,7 @@ ****************************************************************************/ #include -#include +#include /**************************************************************************** * Private Functions diff --git a/libc/misc/lib_mkfifo.c b/libc/misc/lib_mkfifo.c new file mode 100644 index 00000000000..deb919aad1c --- /dev/null +++ b/libc/misc/lib_mkfifo.c @@ -0,0 +1,88 @@ +/**************************************************************************** + * libc/misc/lib_mkfifo.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mkfifo + * + * Description: + * mkfifo() makes a FIFO device driver file with name 'pathname.' Unlike + * Linux, a NuttX FIFO is not a special file type but simply a device + * driver instance. 'mode' specifies the FIFO's permissions. + * + * Once the FIFO has been created by mkfifo(), any thread can open it for + * reading or writing, in the same way as an ordinary file. However, it + * must have been opened from both reading and writing before input or + * output can be performed. This FIFO implementation will block all + * attempts to open a FIFO read-only until at least one thread has opened + * the FIFO for writing. + * + * If all threads that write to the FIFO have closed, subsequent calls to + * read() on the FIFO will return 0 (end-of-file). + * + * Inputs: + * pathname - The full path to the FIFO instance to attach to or to create + * (if not already created). + * mode - Ignored for now + * + * Return: + * 0 is returned on success; otherwise, -1 is returned with errno set + * appropriately. + * + ****************************************************************************/ + +int mkfifo(FAR const char *pathname, mode_t mode) +{ + return mkfifo2(pathname, mode, CONFIG_DEV_FIFO_SIZE); +} + +#endif /* CONFIG_PIPES && CONFIG_DEV_FIFO_SIZE > 0 */ + diff --git a/libc/misc/lib_stream.c b/libc/misc/lib_stream.c index bcf78389b09..276d40d5e2e 100644 --- a/libc/misc/lib_stream.c +++ b/libc/misc/lib_stream.c @@ -46,7 +46,7 @@ #include #include #include -#include +#include #include "libc.h" diff --git a/libc/misc/lib_uadd32x64.c b/libc/misc/lib_uadd32x64.c index 68800e55295..291a282d7c7 100644 --- a/libc/misc/lib_uadd32x64.c +++ b/libc/misc/lib_uadd32x64.c @@ -37,7 +37,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Public Functions diff --git a/libc/misc/lib_uadd64.c b/libc/misc/lib_uadd64.c index c9e634d1eef..8d071687915 100644 --- a/libc/misc/lib_uadd64.c +++ b/libc/misc/lib_uadd64.c @@ -37,7 +37,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Public Functions diff --git a/libc/misc/lib_umul32.c b/libc/misc/lib_umul32.c index b245e10ee05..27540c08efa 100644 --- a/libc/misc/lib_umul32.c +++ b/libc/misc/lib_umul32.c @@ -37,7 +37,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Public Functions diff --git a/libc/misc/lib_umul32x64.c b/libc/misc/lib_umul32x64.c index ca37fa2ea8d..b7c4510f013 100644 --- a/libc/misc/lib_umul32x64.c +++ b/libc/misc/lib_umul32x64.c @@ -37,7 +37,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Public Functions diff --git a/libc/misc/lib_umul64.c b/libc/misc/lib_umul64.c index d20612638ef..29cbd37a9e2 100644 --- a/libc/misc/lib_umul64.c +++ b/libc/misc/lib_umul64.c @@ -37,7 +37,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Public Functions diff --git a/libc/misc/lib_usub64.c b/libc/misc/lib_usub64.c index 2a327245ece..49742ac27d8 100644 --- a/libc/misc/lib_usub64.c +++ b/libc/misc/lib_usub64.c @@ -37,7 +37,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Public Functions diff --git a/libc/misc/lib_usub64x32.c b/libc/misc/lib_usub64x32.c index b691e5105fb..7bda326e2a2 100644 --- a/libc/misc/lib_usub64x32.c +++ b/libc/misc/lib_usub64x32.c @@ -37,7 +37,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Public Functions diff --git a/libc/stdlib/Make.defs b/libc/stdlib/Make.defs index 68eb75e68b4..618b16a5450 100644 --- a/libc/stdlib/Make.defs +++ b/libc/stdlib/Make.defs @@ -1,7 +1,7 @@ ############################################################################ # libc/stdlib/Make.defs # -# Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. +# Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without @@ -37,7 +37,7 @@ CSRCS += lib_abs.c lib_abort.c lib_div.c lib_ldiv.c lib_lldiv.c CSRCS += lib_imaxabs.c lib_itoa.c lib_labs.c lib_llabs.c -CSRCS += lib_bsearch.c lib_rand.c lib_qsort.c +CSRCS += lib_bsearch.c lib_rand.c lib_qsort.c lib_srand.c CSRCS += lib_strtol.c lib_strtoll.c lib_strtoul.c lib_strtoull.c CSRCS += lib_strtod.c lib_checkbase.c @@ -45,6 +45,14 @@ ifeq ($(CONFIG_FS_WRITABLE),y) CSRCS += lib_mktemp.c lib_mkstemp.c endif +ifeq ($(CONFIG_PSEUDOTERM_SUSV1),y) +CSRCS += lib_ptsname.c lib_ptsnamer.c +endif + +ifeq ($(CONFIG_PSEUDOTERM),y) +CSRCS += lib_unlockpt.c +endif + # Add the stdlib directory to the build DEPPATH += --dep-path stdlib diff --git a/libc/stdlib/lib_ptsname.c b/libc/stdlib/lib_ptsname.c new file mode 100644 index 00000000000..54cdabd69ef --- /dev/null +++ b/libc/stdlib/lib_ptsname.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * libc/stdlib/lib_ptsname.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#ifdef CONFIG_PSEUDOTERM_SUSV1 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ptsname + * + * Description: + * The ptsname() function returns the name of the slave pseudoterminal + * device corresponding to the master referred to by fd. + * + * Returned Values: + * On success, ptsname() returns a pointer to a string in static storage + * which will be overwritten by subsequent calls. This pointer must not + * be freed. On failure, NULL is returned. + * + * ENOTTY fd does not refer to a pseudoterminal master device. + * + ****************************************************************************/ + +FAR char *ptsname(int fd) +{ + static char devname[16]; + int ret = ptsname_r(fd, devname, 16); + return ret < 0 ? NULL : devname; +} + +#endif /* CONFIG_PSEUDOTERM_SUSV1 */ diff --git a/libc/stdlib/lib_ptsnamer.c b/libc/stdlib/lib_ptsnamer.c new file mode 100644 index 00000000000..e5df9c0ec7e --- /dev/null +++ b/libc/stdlib/lib_ptsnamer.c @@ -0,0 +1,95 @@ +/**************************************************************************** + * libc/stdlib/lib_ptsnamer.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#ifdef CONFIG_PSEUDOTERM_SUSV1 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: ptsname_r + * + * Description: + * The ptsname_r() function is the reentrant equivalent of ptsname(). + * It returns the name of the slave pseudoterminal device as a null- + * terminated string in the buffer pointed to by buf. The buflen + * argument specifies the number of bytes available in buf. + * + * Returned Values: + * On success, ptsname_r() returns 0. On failure, a nonzero value is + * returned and errno is set to indicate the error. + * + * EINVAL (ptsname_r() only) buf is NULL. + * ENOTTY fd does not refer to a pseudoterminal master device. + * ERANGE (ptsname_r() only) buf is too small. + * + ****************************************************************************/ + +int ptsname_r(int fd, FAR char *buf, size_t buflen) +{ + int ptyno; + int ret; + + DEBUGASSERT(buf != NULL); + + /* Get the slave PTY number */ + + ret = ioctl(fd, TIOCGPTN, (unsigned long)((uintptr_t)&ptyno)); + if (ret < 0) + { + return ret; + } + + /* Create the device name. This current does not handler EINVAL or ERANGE + * error detection. + */ + + snprintf(buf, buflen, "/dev/pts/%d", ptyno); + return OK; +} + +#endif /* CONFIG_PSEUDOTERM_SUSV1 */ diff --git a/libc/stdlib/lib_rand.c b/libc/stdlib/lib_rand.c index 453a4537a0f..8de8c763d04 100644 --- a/libc/stdlib/lib_rand.c +++ b/libc/stdlib/lib_rand.c @@ -1,7 +1,7 @@ /**************************************************************************** * libc/stdlib/lib_rand.c * - * Copyright (C) 2007, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -37,241 +37,27 @@ * Included Files ****************************************************************************/ +#include + #include #include -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ -/* First, second, and thired order congruential generators are supported */ - -#ifndef CONFIG_LIB_RAND_ORDER -# define CONFIG_LIB_RAND_ORDER 1 -#endif - -#if CONFIG_LIB_RAND_ORDER > 3 -# undef CONFIG_LIB_RAND_ORDER -# define CONFIG_LIB_RAND_ORDER 3 -#endif - -/* Values needed by the random number generator */ - -#define RND1_CONSTK 470001 -#define RND1_CONSTP 999563 -#define RND2_CONSTK1 366528 -#define RND2_CONSTK2 508531 -#define RND2_CONSTP 998917 -#define RND3_CONSTK1 360137 -#define RND3_CONSTK2 519815 -#define RND3_CONSTK3 616087 -#define RND3_CONSTP 997783 - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -static unsigned int nrand(unsigned int nLimit); - -/* First order congruential generators */ - -static inline unsigned long fgenerate1(void); -#if (CONFIG_LIB_RAND_ORDER == 1) -static double_t frand1(void); -#endif - -/* Second order congruential generators */ - -#if (CONFIG_LIB_RAND_ORDER > 1) -static inline unsigned long fgenerate2(void); -#if (CONFIG_LIB_RAND_ORDER == 2) -static double_t frand2(void); -#endif - -/* Third order congruential generators */ - -#if (CONFIG_LIB_RAND_ORDER > 2) -static inline unsigned long fgenerate3(void); -static double_t frand3(void); -#endif -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static unsigned long g_randint1; -#if (CONFIG_LIB_RAND_ORDER > 1) -static unsigned long g_randint2; -#if (CONFIG_LIB_RAND_ORDER > 2) -static unsigned long g_randint3; -#endif -#endif - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -static unsigned int nrand(unsigned int nLimit) -{ - unsigned long result; - double_t ratio; - - /* Loop to be sure a legal random number is generated */ - - do - { - /* Get a random integer in the requested range */ - -#if (CONFIG_LIB_RAND_ORDER == 1) - ratio = frand1(); -#elif (CONFIG_LIB_RAND_ORDER == 2) - ratio = frand2(); -#else /* if (CONFIG_LIB_RAND_ORDER > 2) */ - ratio = frand3(); -#endif - - /* Then, produce the return-able value */ - - result = (unsigned long)(((double_t)nLimit) * ratio); - } - while (result >= (unsigned long)nLimit); - - return (unsigned int)result; -} - -/* First order congruential generators */ - -static inline unsigned long fgenerate1(void) -{ - unsigned long randint; - - /* First order congruential generator. One may be added to the result of the - * generated value to avoid the value zero. This would be fatal for the - * first order random number generator. - */ - - randint = (RND1_CONSTK * g_randint1) % RND1_CONSTP; - g_randint1 = (randint == 0 ? 1 : randint); - return randint; -} - -#if (CONFIG_LIB_RAND_ORDER == 1) -static double_t frand1(void) -{ - /* First order congruential generator. */ - - unsigned long randint = fgenerate1(); - - /* Construct an floating point value in the range from 0.0 up to 1.0 */ - - return ((double_t)randint) / ((double_t)RND1_CONSTP); -} -#endif - -/* Second order congruential generators */ - -#if (CONFIG_LIB_RAND_ORDER > 1) -static inline unsigned long fgenerate2(void) -{ - unsigned long randint; - - /* Second order congruential generator. */ - - randint = (RND2_CONSTK1 * g_randint1 + - RND2_CONSTK2 * g_randint2) % RND2_CONSTP; - - g_randint2 = g_randint1; - g_randint1 = randint; - - /* We cannot permit both values to become zero. That would be fatal for the - * second order random number generator. - */ - - if (g_randint2 == 0 && g_randint1 == 0) - { - g_randint2 = 1; - } - - return randint; -} - -#if (CONFIG_LIB_RAND_ORDER == 2) -static double_t frand2(void) -{ - /* Second order congruential generator */ - - unsigned long randint = fgenerate2(); - - /* Construct an floating point value in the range from 0.0 up to 1.0 */ - - return ((double_t)randint) / ((double_t)RND2_CONSTP); -} -#endif - -/* Third order congruential generators */ - -#if (CONFIG_LIB_RAND_ORDER > 2) -static inline unsigned long fgenerate3(void) -{ - unsigned long randint; - - /* Third order congruential generator. */ - - randint = (RND3_CONSTK1 * g_randint1 + - RND3_CONSTK2 * g_randint2 + - RND3_CONSTK2 * g_randint3) % RND3_CONSTP; - - g_randint3 = g_randint2; - g_randint2 = g_randint1; - g_randint1 = randint; - - /* We cannot permit all three values to become zero. That would be fatal for the - * third order random number generator. - */ - - if (g_randint3 == 0 && g_randint2 == 0 && g_randint1 == 0) - { - g_randint3 = 1; - } - - return randint; -} - -static double_t frand3(void) -{ - /* Third order congruential generator */ - - unsigned long randint = fgenerate3(); - - /* Construct an floating point value in the range from 0.0 up to 1.0 */ - - return ((double_t)randint) / ((double_t)RND3_CONSTP); -} -#endif -#endif +#include /**************************************************************************** * Public Functions ****************************************************************************/ /**************************************************************************** - * Function: srand, rand + * Name: rand + * + * Description: + * Generate a non-negative, integer random number in the range of 0 through + * (RAND_MAX - 1) + * ****************************************************************************/ -void srand(unsigned int seed) -{ - g_randint1 = seed; -#if (CONFIG_LIB_RAND_ORDER > 1) - g_randint2 = seed; - (void)fgenerate1(); -#if (CONFIG_LIB_RAND_ORDER > 2) - g_randint3 = seed; - (void)fgenerate2(); -#endif -#endif -} - int rand(void) { - return (int)nrand(32768); + return (int)nrand(32768L); } diff --git a/libc/stdlib/lib_srand.c b/libc/stdlib/lib_srand.c new file mode 100644 index 00000000000..a1c87f0d436 --- /dev/null +++ b/libc/stdlib/lib_srand.c @@ -0,0 +1,291 @@ +/**************************************************************************** + * libc/stdlib/lib_srand.c + * + * Copyright (C) 2007, 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* First, second, and thired order congruential generators are supported */ + +#ifndef CONFIG_LIB_RAND_ORDER +# define CONFIG_LIB_RAND_ORDER 1 +#endif + +#if CONFIG_LIB_RAND_ORDER > 3 +# undef CONFIG_LIB_RAND_ORDER +# define CONFIG_LIB_RAND_ORDER 3 +#endif + +/* Values needed by the random number generator */ + +#define RND1_CONSTK 470001 +#define RND1_CONSTP 999563 +#define RND2_CONSTK1 366528 +#define RND2_CONSTK2 508531 +#define RND2_CONSTP 998917 +#define RND3_CONSTK1 360137 +#define RND3_CONSTK2 519815 +#define RND3_CONSTK3 616087 +#define RND3_CONSTP 997783 + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* First order congruential generators */ + +static inline unsigned long fgenerate1(void); +#if (CONFIG_LIB_RAND_ORDER == 1) +static double_t frand1(void); +#endif + +/* Second order congruential generators */ + +#if (CONFIG_LIB_RAND_ORDER > 1) +static inline unsigned long fgenerate2(void); +#if (CONFIG_LIB_RAND_ORDER == 2) +static double_t frand2(void); +#endif + +/* Third order congruential generators */ + +#if (CONFIG_LIB_RAND_ORDER > 2) +static inline unsigned long fgenerate3(void); +static double_t frand3(void); +#endif +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static unsigned long g_randint1; +#if (CONFIG_LIB_RAND_ORDER > 1) +static unsigned long g_randint2; +#if (CONFIG_LIB_RAND_ORDER > 2) +static unsigned long g_randint3; +#endif +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* First order congruential generators */ + +static inline unsigned long fgenerate1(void) +{ + unsigned long randint; + + /* First order congruential generator. One may be added to the result of the + * generated value to avoid the value zero. This would be fatal for the + * first order random number generator. + */ + + randint = (RND1_CONSTK * g_randint1) % RND1_CONSTP; + g_randint1 = (randint == 0 ? 1 : randint); + return randint; +} + +#if (CONFIG_LIB_RAND_ORDER == 1) +static double_t frand1(void) +{ + /* First order congruential generator. */ + + unsigned long randint = fgenerate1(); + + /* Construct an floating point value in the range from 0.0 up to 1.0 */ + + return ((double_t)randint) / ((double_t)RND1_CONSTP); +} +#endif + +/* Second order congruential generators */ + +#if (CONFIG_LIB_RAND_ORDER > 1) +static inline unsigned long fgenerate2(void) +{ + unsigned long randint; + + /* Second order congruential generator. */ + + randint = (RND2_CONSTK1 * g_randint1 + + RND2_CONSTK2 * g_randint2) % RND2_CONSTP; + + g_randint2 = g_randint1; + g_randint1 = randint; + + /* We cannot permit both values to become zero. That would be fatal for the + * second order random number generator. + */ + + if (g_randint2 == 0 && g_randint1 == 0) + { + g_randint2 = 1; + } + + return randint; +} + +#if (CONFIG_LIB_RAND_ORDER == 2) +static double_t frand2(void) +{ + /* Second order congruential generator */ + + unsigned long randint = fgenerate2(); + + /* Construct an floating point value in the range from 0.0 up to 1.0 */ + + return ((double_t)randint) / ((double_t)RND2_CONSTP); +} +#endif + +/* Third order congruential generators */ + +#if (CONFIG_LIB_RAND_ORDER > 2) +static inline unsigned long fgenerate3(void) +{ + unsigned long randint; + + /* Third order congruential generator. */ + + randint = (RND3_CONSTK1 * g_randint1 + + RND3_CONSTK2 * g_randint2 + + RND3_CONSTK2 * g_randint3) % RND3_CONSTP; + + g_randint3 = g_randint2; + g_randint2 = g_randint1; + g_randint1 = randint; + + /* We cannot permit all three values to become zero. That would be fatal for the + * third order random number generator. + */ + + if (g_randint3 == 0 && g_randint2 == 0 && g_randint1 == 0) + { + g_randint3 = 1; + } + + return randint; +} + +static double_t frand3(void) +{ + /* Third order congruential generator */ + + unsigned long randint = fgenerate3(); + + /* Construct an floating point value in the range from 0.0 up to 1.0 */ + + return ((double_t)randint) / ((double_t)RND3_CONSTP); +} +#endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: srand + * + * Description: + * Seed the congruential random number generator. + * + ****************************************************************************/ + +void srand(unsigned int seed) +{ + g_randint1 = seed; +#if (CONFIG_LIB_RAND_ORDER > 1) + g_randint2 = seed; + (void)fgenerate1(); +#if (CONFIG_LIB_RAND_ORDER > 2) + g_randint3 = seed; + (void)fgenerate2(); +#endif +#endif +} + +/**************************************************************************** + * Name: nrand + * + * Description: + * Return a random, unsigned long value in the range of 0 to (limit - 1) + * + ****************************************************************************/ + +unsigned long nrand(unsigned long limit) +{ + unsigned long result; + double_t ratio; + + /* Loop to be sure a legal random number is generated */ + + do + { + /* Get a random integer in the range 0.0 - 1.0 */ + +#if (CONFIG_LIB_RAND_ORDER == 1) + ratio = frand1(); +#elif (CONFIG_LIB_RAND_ORDER == 2) + ratio = frand2(); +#else /* if (CONFIG_LIB_RAND_ORDER > 2) */ + ratio = frand3(); +#endif + + /* Then, produce the return-able value in the requested range */ + + result = (unsigned long)(((double_t)limit) * ratio); + + /* Loop because there is a (unlikely) possibility that round could but + * the result at the limit value. + */ + } + while (result >= limit); + + return result; +} diff --git a/libc/stdlib/lib_unlockpt.c b/libc/stdlib/lib_unlockpt.c new file mode 100644 index 00000000000..72e148b1bea --- /dev/null +++ b/libc/stdlib/lib_unlockpt.c @@ -0,0 +1,75 @@ +/**************************************************************************** + * libc/stdlib/lib_unlockpt.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#ifdef CONFIG_PSEUDOTERM + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: unlockpt + * + * Description: + * The unlockpt() function unlocks the slave pseudoterminal device + * corresponding to the master pseudoterminal referred to by fd. + * unlockpt() must be called before opening the slave side of a + * pseudoterminal. + * + * Returned Values: + * When successful, unlockpt() returns 0. Otherwise, it returns -1 and + * sets errno appropriately. + * + * EBADF - The fd argument is not a file descriptor open for writing. + * EINVAL - The fd argument is not associated with a master + * pseudoterminal + * + ****************************************************************************/ + +int unlockpt(int fd) +{ + return ioctl(fd, TIOCSPTLCK, 0); +} + +#endif /* CONFIG_PSEUDOTERM */ diff --git a/libc/unistd/Make.defs b/libc/unistd/Make.defs index ddb463c3db7..2aa942dd3ff 100644 --- a/libc/unistd/Make.defs +++ b/libc/unistd/Make.defs @@ -46,6 +46,10 @@ endif ifeq ($(CONFIG_LIBC_EXECFUNCS),y) CSRCS += lib_execl.c endif + +ifeq ($(CONFIG_PIPES),y) +CSRCS += lib_pipe.c +endif endif ifneq ($(CONFIG_DISABLE_SIGNALS),y) diff --git a/libc/unistd/lib_pipe.c b/libc/unistd/lib_pipe.c new file mode 100644 index 00000000000..469dd5a1d50 --- /dev/null +++ b/libc/unistd/lib_pipe.c @@ -0,0 +1,76 @@ +/**************************************************************************** + * libc/unistd/lib_pipe.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pipe + * + * Description: + * pipe() creates a pair of file descriptors, pointing to a pipe inode, + * and places them in the array pointed to by 'fd'. fd[0] is for reading, + * fd[1] is for writing. + * + * Inputs: + * fd[2] - The user provided array in which to catch the pipe file + * descriptors + * + * Return: + * 0 is returned on success; otherwise, -1 is returned with errno set + * appropriately. + * + ****************************************************************************/ + +int pipe(int fd[2]) +{ + return pipe2(fd, CONFIG_DEV_PIPE_SIZE); +} + +#endif /* CONFIG_PIPES && CONFIG_DEV_PIPE_SIZE > 0 */ + diff --git a/libc/zoneinfo/README.txt b/libc/zoneinfo/README.txt index 7aea826ea8b..9ceb5de8093 100644 --- a/libc/zoneinfo/README.txt +++ b/libc/zoneinfo/README.txt @@ -23,7 +23,7 @@ doing this: - First, a ROM disk device must be created. This is done by calling the function romdisk_register() as described in - nuttx/include/nuttx/fs/ramdisk.h. This is an OS level operation + nuttx/include/nuttx/drivers/ramdisk.h. This is an OS level operation and must be done in the board-level logic before your application starts. @@ -114,7 +114,7 @@ Sample Code to Mount the ROMFS Filesystem #include #include -#include +#include #include /**************************************************************************** diff --git a/net/local/Kconfig b/net/local/Kconfig index 144844a6375..3125ab34a51 100644 --- a/net/local/Kconfig +++ b/net/local/Kconfig @@ -9,6 +9,7 @@ menu "Unix Domain Socket Support" config NET_LOCAL bool "Unix domain (local) sockets" default n + select PIPES ---help--- Enable or disable Unix domain (aka Local) sockets. diff --git a/net/local/local_netpoll.c b/net/local/local_netpoll.c index 4b100d67d02..9800af3172c 100644 --- a/net/local/local_netpoll.c +++ b/net/local/local_netpoll.c @@ -233,13 +233,13 @@ int local_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds) /* Setup poll for both shadow pollfds. */ - ret = file_poll(conn->lc_infd, &shadowfds[0], true); + ret = fdesc_poll(conn->lc_infd, &shadowfds[0], true); if (ret >= 0) { - ret = file_poll(conn->lc_outfd, &shadowfds[1], true); + ret = fdesc_poll(conn->lc_outfd, &shadowfds[1], true); if (ret < 0) { - (void)file_poll(conn->lc_infd, &shadowfds[0], false); + (void)fdesc_poll(conn->lc_infd, &shadowfds[0], false); } } @@ -267,7 +267,7 @@ int local_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds) goto pollerr; } - ret = file_poll(conn->lc_infd, fds, true); + ret = fdesc_poll(conn->lc_infd, fds, true); } break; @@ -281,7 +281,7 @@ int local_pollsetup(FAR struct socket *psock, FAR struct pollfd *fds) goto pollerr; } - ret = file_poll(conn->lc_outfd, fds, true); + ret = fdesc_poll(conn->lc_outfd, fds, true); } break; @@ -356,13 +356,13 @@ int local_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds) /* Teardown for both shadow pollfds. */ - ret = file_poll(conn->lc_infd, &shadowfds[0], false); + ret = fdesc_poll(conn->lc_infd, &shadowfds[0], false); if (ret < 0) { status = ret; } - ret = file_poll(conn->lc_outfd, &shadowfds[1], false); + ret = fdesc_poll(conn->lc_outfd, &shadowfds[1], false); if (ret < 0) { status = ret; @@ -381,7 +381,7 @@ int local_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds) return OK; } - status = file_poll(conn->lc_infd, fds, false); + status = fdesc_poll(conn->lc_infd, fds, false); } break; @@ -392,7 +392,7 @@ int local_pollteardown(FAR struct socket *psock, FAR struct pollfd *fds) return OK; } - status = file_poll(conn->lc_outfd, fds, false); + status = fdesc_poll(conn->lc_outfd, fds, false); } break; diff --git a/sched/Kconfig b/sched/Kconfig index 864220286ab..731baa801ef 100644 --- a/sched/Kconfig +++ b/sched/Kconfig @@ -167,6 +167,17 @@ config CLOCK_MONOTONIC The value of the CLOCK_MONOTONIC clock cannot be set via clock_settime(). +config ARCH_HAVE_TIMEKEEPING + bool + default n + +config CLOCK_TIMEKEEPING + bool "Support timekeeping algorithms" + default n + depends on EXPERIMENTAL && ARCH_HAVE_TIMEKEEPING + ---help--- + CLOCK_TIMEKEEPING enables experimental time management algorithms. + config JULIAN_TIME bool "Enables Julian time conversions" default n diff --git a/sched/clock/Make.defs b/sched/clock/Make.defs index c0bc23f5101..20ddd3d03b3 100644 --- a/sched/clock/Make.defs +++ b/sched/clock/Make.defs @@ -38,6 +38,10 @@ CSRCS += clock_time2ticks.c clock_abstime2ticks.c clock_ticks2time.c CSRCS += clock_systimer.c clock_systimespec.c clock_timespec_add.c CSRCS += clock_timespec_subtract.c +ifeq ($(CONFIG_CLOCK_TIMEKEEPING),y) +CSRCS += clock_timekeeping.c +endif + # Include clock build support DEPPATH += --dep-path clock diff --git a/sched/clock/clock.h b/sched/clock/clock.h index 8a5c55a3e76..a3286dfc31f 100644 --- a/sched/clock/clock.h +++ b/sched/clock/clock.h @@ -79,7 +79,9 @@ extern volatile uint32_t g_system_timer; # endif #endif +#ifndef CONFIG_CLOCK_TIMEKEEPING extern struct timespec g_basetime; +#endif /******************************************************************************** * Public Function Prototypes diff --git a/sched/clock/clock_gettime.c b/sched/clock/clock_gettime.c index e014984f491..74ffea5be8b 100644 --- a/sched/clock/clock_gettime.c +++ b/sched/clock/clock_gettime.c @@ -49,6 +49,9 @@ #include #include "clock/clock.h" +#ifdef CONFIG_CLOCK_TIMEKEEPING +# include "clock/clock_timekeeping.h" +#endif /**************************************************************************** * Public Functions @@ -90,7 +93,9 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp) * reset. */ -#ifdef CONFIG_SCHED_TICKLESS +#if defined(CONFIG_CLOCK_TIMEKEEPING) + ret = clock_timekeeping_get_monotonic_time(tp); +#elif defined(CONFIG_SCHED_TICKLESS) ret = up_timer_gettime(tp); #else ret = clock_systimespec(tp); @@ -113,7 +118,15 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp) * last set. */ +#if defined(CONFIG_CLOCK_TIMEKEEPING) + ret = clock_timekeeping_get_wall_time(tp); +#elif defined(CONFIG_SCHED_TICKLESS) + ret = up_timer_gettime(&ts); +#else ret = clock_systimespec(&ts); +#endif + +#ifndef CONFIG_CLOCK_TIMEKEEPING if (ret == OK) { /* Add the base time to this. The base time is the time-of-day @@ -138,6 +151,7 @@ int clock_gettime(clockid_t clock_id, struct timespec *tp) tp->tv_sec = ts.tv_sec; tp->tv_nsec = ts.tv_nsec; } +#endif /* CONFIG_CLOCK_TIMEKEEPING */ } else { diff --git a/sched/clock/clock_initialize.c b/sched/clock/clock_initialize.c index 6e653e78e7f..9e5d9f93f4b 100644 --- a/sched/clock/clock_initialize.c +++ b/sched/clock/clock_initialize.c @@ -54,6 +54,9 @@ #include #include "clock/clock.h" +#ifdef CONFIG_CLOCK_TIMEKEEPING +# include "clock/clock_timekeeping.h" +#endif /**************************************************************************** * Pre-processor Definitions @@ -172,10 +175,16 @@ static void clock_inittime(void) { /* (Re-)initialize the time value to match the RTC */ - (void)clock_basetime(&g_basetime); +#ifndef CONFIG_CLOCK_TIMEKEEPING +#ifndef CONFIG_RTC_HIRES + clock_basetime(&g_basetime); +#endif #ifndef CONFIG_SCHED_TICKLESS g_system_timer = 0; #endif +#else + clock_inittimekeeping(); +#endif } /**************************************************************************** diff --git a/sched/clock/clock_settime.c b/sched/clock/clock_settime.c index 8f269079d89..ec0c1d85be9 100644 --- a/sched/clock/clock_settime.c +++ b/sched/clock/clock_settime.c @@ -48,6 +48,9 @@ #include #include "clock/clock.h" +#ifdef CONFIG_CLOCK_TIMEKEEPING +# include "clock/clock_timekeeping.h" +#endif /**************************************************************************** * Public Functions @@ -76,6 +79,7 @@ int clock_settime(clockid_t clock_id, FAR const struct timespec *tp) if (clock_id == CLOCK_REALTIME) { +#ifndef CONFIG_CLOCK_TIMEKEEPING /* Interrupts are disabled here so that the in-memory time * representation and the RTC setting will be as close as * possible. @@ -123,6 +127,9 @@ int clock_settime(clockid_t clock_id, FAR const struct timespec *tp) sinfo("basetime=(%ld,%lu) bias=(%ld,%lu)\n", (long)g_basetime.tv_sec, (unsigned long)g_basetime.tv_nsec, (long)bias.tv_sec, (unsigned long)bias.tv_nsec); +#else + ret = clock_timekeeping_set_wall_time(tp); +#endif } else { diff --git a/sched/clock/clock_systimer.c b/sched/clock/clock_systimer.c index 3e8e978ce99..6c9645fbf86 100644 --- a/sched/clock/clock_systimer.c +++ b/sched/clock/clock_systimer.c @@ -83,7 +83,11 @@ systime_t clock_systimer(void) /* Get the time from the platform specific hardware */ +#ifndef CONFIG_CLOCK_TIMEKEEPING (void)up_timer_gettime(&ts); +#else + (void)clock_timekeeping_get_monotonic_time(&ts); +#endif /* Convert to a 64-bit value in microseconds, then in clock tick units */ @@ -96,7 +100,11 @@ systime_t clock_systimer(void) /* Get the time from the platform specific hardware */ +#ifndef CONFIG_CLOCK_TIMEKEEPING (void)up_timer_gettime(&ts); +#else + (void)clock_timekeeping_get_monotonic_time(&ts); +#endif /* Convert to a 64- then a 32-bit value */ diff --git a/sched/clock/clock_timekeeping.c b/sched/clock/clock_timekeeping.c new file mode 100644 index 00000000000..c8fb361c6fe --- /dev/null +++ b/sched/clock/clock_timekeeping.c @@ -0,0 +1,329 @@ +/************************************************************************ + * sched/clock/clock_timekeeping.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Max Neklyudov + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************/ + +/************************************************************************ + * Included Files + ************************************************************************/ + +#include + +#ifdef CONFIG_CLOCK_TIMEKEEPING + +#include +#include +#include +#include +#include + +#include +#include + +#include "clock/clock.h" + +/************************************************************************ + * Pre-processor Definitions + ************************************************************************/ + +#define NTP_MAX_ADJUST 500 + +/********************************************************************** + * Private Data + **********************************************************************/ + +static struct timespec g_clock_wall_time; +static struct timespec g_clock_monotonic_time; +static uint64_t g_clock_last_counter; +static uint64_t g_clock_mask; +static long g_clock_adjust; + +/************************************************************************ + * Private Functions + ************************************************************************/ + +/************************************************************************ + * Name: clock_get_current_time + ************************************************************************/ + +static int clock_get_current_time(FAR struct timespec *ts, + FAR struct timespec *base) +{ + irqstate_t flags; + uint64_t counter; + uint64_t offset; + uint64_t nsec; + time_t sec; + int ret; + + flags = enter_critical_section(); + + ret = up_timer_getcounter(&counter); + if (ret < 0) + { + goto errout_in_critical_section; + } + + offset = (counter - g_clock_last_counter) & g_clock_mask; + nsec = offset * NSEC_PER_TICK; + sec = nsec / NSEC_PER_SEC; + nsec -= sec * NSEC_PER_SEC; + + nsec += base->tv_nsec; + if (nsec > NSEC_PER_SEC) + { + nsec -= NSEC_PER_SEC; + sec += 1; + } + + ts->tv_nsec = nsec; + ts->tv_sec = base->tv_sec + sec; + +errout_in_critical_section: + leave_critical_section(flags); + return ret; +} + +/************************************************************************ + * Public Functions + ************************************************************************/ + +/************************************************************************ + * Name: clock_timekeeping_get_monotonic_time + ************************************************************************/ + +int clock_timekeeping_get_monotonic_time(FAR struct timespec *ts) +{ + return clock_get_current_time(ts, &g_clock_monotonic_time); +} + +/************************************************************************ + * Name: clock_timekeeping_get_wall_time + ************************************************************************/ + +int clock_timekeeping_get_wall_time(FAR struct timespec *ts) +{ + return clock_get_current_time(ts, &g_clock_wall_time); +} + +/************************************************************************ + * Name: clock_timekeeping_set_wall_time + ************************************************************************/ + +int clock_timekeeping_set_wall_time(FAR struct timespec *ts) +{ + irqstate_t flags; + uint64_t counter; + int ret; + + flags = enter_critical_section(); + + ret = up_timer_getcounter(&counter); + if (ret < 0) + { + goto errout_in_critical_section; + } + + g_clock_wall_time = *ts; + g_clock_adjust = 0; + g_clock_last_counter = counter; + +errout_in_critical_section: + leave_critical_section(flags); + return ret; +} + +/**************************************************************************** + * Name: adjtime + * + * Description: + * The adjtime() function gradually adjusts the system clock (as returned + * by gettimeofday(2)). The amount of time by which the clock is to be + * adjusted is specified in the structure pointed to by delta. + * + * This structure has the following form: + * + * struct timeval + * { + * time_t tv_sec; (seconds) + * suseconds_t tv_usec; (microseconds) + * }; + * + * If the adjustment in delta is positive, then the system clock is + * speeded up by some small percentage (i.e., by adding a small amount of + * time to the clock value in each second) until the adjustment has been + * completed. If the adjustment in delta is negative, then the clock is + * slowed down in a similar fashion. + * + * If a clock adjustment from an earlier adjtime() call is already in + * progress at the time of a later adjtime() call, and delta is not NULL + * for the later call, then the earlier adjustment is stopped, but any + * already completed part of that adjustment is not undone. + * + * If olddelta is not NULL, then the buffer that it points to is used to + * return the amount of time remaining from any previous adjustment that + * has not yet been completed. + * + * NOTE: This is not a POSIX interface but derives from 4.3BSD, System V. + * It is also supported for Linux compatibility. + * + ****************************************************************************/ + +int adjtime(FAR const struct timeval *delta, FAR struct timeval *olddelta) +{ + irqstate_t flags; + long adjust_usec; + + if (!delta) + { + set_errno(EINVAL); + return -1; + } + + flags = enter_critical_section(); + + adjust_usec = delta->tv_sec * USEC_PER_SEC + delta->tv_usec; + + if (olddelta) + { + olddelta->tv_usec = g_clock_adjust; + } + + g_clock_adjust = adjust_usec; + + leave_critical_section(flags); + + return OK; +} + +/************************************************************************ + * Name: clock_update_wall_time + ************************************************************************/ + +void clock_update_wall_time(void) +{ + irqstate_t flags; + uint64_t counter; + uint64_t offset; + int64_t nsec; + time_t sec; + int ret; + + flags = enter_critical_section(); + + ret = up_timer_getcounter(&counter); + if (ret < 0) + { + goto errout_in_critical_section; + } + + offset = (counter - g_clock_last_counter) & g_clock_mask; + if (offset == 0) + { + goto errout_in_critical_section; + } + + nsec = offset * NSEC_PER_TICK; + sec = nsec / NSEC_PER_SEC; + nsec -= sec * NSEC_PER_SEC; + + g_clock_monotonic_time.tv_sec += sec; + g_clock_monotonic_time.tv_nsec += nsec; + if (g_clock_monotonic_time.tv_nsec > NSEC_PER_SEC) + { + g_clock_monotonic_time.tv_nsec -= NSEC_PER_SEC; + g_clock_monotonic_time.tv_sec += 1; + } + + nsec += g_clock_wall_time.tv_nsec; + if (nsec > NSEC_PER_SEC) + { + nsec -= NSEC_PER_SEC; + sec += 1; + } + + if (g_clock_adjust != 0 && sec > 0) + { + long adjust = NTP_MAX_ADJUST * (long)sec; + if (g_clock_adjust < adjust && g_clock_adjust > -adjust) + { + adjust = g_clock_adjust; + } + + nsec += adjust * NSEC_PER_USEC; + + while (nsec < 0) + { + nsec += NSEC_PER_SEC; + sec -= 1; + } + + while (nsec > NSEC_PER_SEC) + { + nsec -= NSEC_PER_SEC; + sec += 1; + } + } + + g_clock_wall_time.tv_sec += sec; + g_clock_wall_time.tv_nsec = (long)nsec; + + g_clock_last_counter = counter; + +errout_in_critical_section: + leave_critical_section(flags); +} + +/************************************************************************ + * Name: clock_inittimekeeping + ************************************************************************/ + +void clock_inittimekeeping(void) +{ + struct tm rtctime; + + up_timer_getmask(&g_clock_mask); + + /* Get the broken-errout_in_critical_section time from the date/time RTC. */ + + (void)up_rtc_getdatetime(&rtctime); + + /* And use the broken-errout_in_critical_section time to initialize the system time */ + + g_clock_wall_time.tv_sec = mktime(&rtctime); + g_clock_wall_time.tv_nsec = 0; + + memset(&g_clock_monotonic_time, 0, sizeof(g_clock_monotonic_time)); +} + +#endif /* CONFIG_CLOCK_TIMEKEEPING */ diff --git a/sched/clock/clock_timekeeping.h b/sched/clock/clock_timekeeping.h new file mode 100644 index 00000000000..e86613a3a44 --- /dev/null +++ b/sched/clock/clock_timekeeping.h @@ -0,0 +1,62 @@ +/******************************************************************************** + * sched/clock/clock_timekeeping.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Max Neklyudov + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************/ + +#ifndef __SCHED_CLOCK_CLOCK_TIMEKEEPING_H +#define __SCHED_CLOCK_CLOCK_TIMEKEEPING_H + +/******************************************************************************** + * Included Files + ********************************************************************************/ + +#include +#include + +#include + +#include + +/******************************************************************************** + * Public Function Prototypes + ********************************************************************************/ + +int clock_timekeeping_get_monotonic_time(FAR struct timespec *ts); +int clock_timekeeping_get_wall_time(FAR struct timespec *ts); +int clock_timekeeping_set_wall_time(FAR struct timespec *ts); + +void clock_update_wall_time(void); + +void clock_inittimekeeping(void); + +#endif /* __SCHED_CLOCK_CLOCK_TIMEKEEPING_H */ diff --git a/sched/group/group_leave.c b/sched/group/group_leave.c index 9c5cf0f50b0..7339e61cf0e 100644 --- a/sched/group/group_leave.c +++ b/sched/group/group_leave.c @@ -47,7 +47,7 @@ #include #include #include -#include +#include #include "environ/environ.h" #include "signal/signal.h" diff --git a/sched/group/group_setupstreams.c b/sched/group/group_setupstreams.c index 02df7b7b53e..63929de8e6f 100644 --- a/sched/group/group_setupstreams.c +++ b/sched/group/group_setupstreams.c @@ -44,7 +44,7 @@ #include #include -#include +#include #include "group/group.h" diff --git a/sched/init/os_start.c b/sched/init/os_start.c index 1a65af1403c..54ef7b4a276 100644 --- a/sched/init/os_start.c +++ b/sched/init/os_start.c @@ -49,7 +49,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/sched/sched/sched_processtimer.c b/sched/sched/sched_processtimer.c index 33c3f583ac8..9b64abed1b8 100644 --- a/sched/sched/sched_processtimer.c +++ b/sched/sched/sched_processtimer.c @@ -1,7 +1,7 @@ /**************************************************************************** * sched/sched/sched_processtimer.c * - * Copyright (C) 2007, 2009, 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009, 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -144,6 +144,12 @@ static inline void sched_process_scheduler(void) void sched_process_timer(void) { +#ifdef CONFIG_CLOCK_TIMEKEEPING + /* Process wall time */ + + clock_update_wall_time(); +#endif + /* Increment the system time (if in the link) */ #ifdef CONFIG_HAVE_WEAKFUNCTIONS diff --git a/sched/sched/sched_timerexpiration.c b/sched/sched/sched_timerexpiration.c index a0ebcff8c9c..309b1a705d1 100644 --- a/sched/sched/sched_timerexpiration.c +++ b/sched/sched/sched_timerexpiration.c @@ -1,7 +1,7 @@ /**************************************************************************** * sched/sched/sched_timerexpiration.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -53,6 +53,10 @@ #include "wdog/wdog.h" #include "clock/clock.h" +#ifdef CONFIG_CLOCK_TIMEKEEPING +# include "clock/clock_timekeeping.h" +#endif + #ifdef CONFIG_SCHED_TICKLESS /**************************************************************************** @@ -262,6 +266,12 @@ static unsigned int sched_timer_process(unsigned int ticks, bool noswitches) unsigned int rettime = 0; unsigned int tmp; +#ifdef CONFIG_CLOCK_TIMEKEEPING + /* Process wall time */ + + clock_update_wall_time(); +#endif + /* Process watchdogs */ tmp = wd_timer(ticks); diff --git a/syscall/syscall.csv b/syscall/syscall.csv index 77b7ce750c4..c1fdd2e2916 100644 --- a/syscall/syscall.csv +++ b/syscall/syscall.csv @@ -1,4 +1,5 @@ "_exit","unistd.h","","void","int" +"adjtime","sys/time.h","defined(CONFIG_CLOCK_TIMEKEEPING)","int","FAR const struct timeval *","FAR struct timeval *" "aio_cancel","aio.h","defined(CONFIG_FS_AIO)","int","int","FAR struct aiocb *" "aio_fsync","aio.h","defined(CONFIG_FS_AIO)","int","int","FAR struct aiocb *" "aio_read","aio.h","defined(CONFIG_FS_AIO)","int","FAR struct aiocb *" @@ -34,7 +35,7 @@ "listen","sys/socket.h","CONFIG_NSOCKET_DESCRIPTORS > 0 && defined(CONFIG_NET)","int","int","int" "lseek","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0","off_t","int","off_t","int" "mkdir","sys/stat.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_MOUNTPOINT)","int","FAR const char*","mode_t" -"mkfifo","sys/stat.h","CONFIG_NFILE_DESCRIPTORS > 0","int","FAR const char*","mode_t" +"mkfifo2","nuttx/drivers/drivers.h","defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0","int","FAR const char*","mode_t","size_t" "mmap","sys/mman.h","CONFIG_NFILE_DESCRIPTORS > 0","FAR void*","FAR void*","size_t","int","int","int","off_t" "mount","sys/mount.h","CONFIG_NFILE_DESCRIPTORS > 0 && !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_FS_READABLE)","int","const char*","const char*","const char*","unsigned long","const void*" "mq_close","mqueue.h","!defined(CONFIG_DISABLE_MQUEUE)","int","mqd_t" @@ -52,7 +53,7 @@ "open","fcntl.h","CONFIG_NFILE_DESCRIPTORS > 0","int","const char*","int","..." "opendir","dirent.h","CONFIG_NFILE_DESCRIPTORS > 0","FAR DIR*","FAR const char*" "pgalloc", "nuttx/arch.h", "defined(CONFIG_BUILD_KERNEL)", "uintptr_t", "uintptr_t", "unsigned int" -"pipe","unistd.h","CONFIG_NFILE_DESCRIPTORS > 0","int","int [2]|int*" +"pipe2","nuttx/drivers/drivers.h","defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0","int","int [2]|int*","size_t" "poll","poll.h","!defined(CONFIG_DISABLE_POLL) && (CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0)","int","FAR struct pollfd*","nfds_t","int" "prctl","sys/prctl.h", "CONFIG_TASK_NAME_SIZE > 0","int","int","..." "pread","unistd.h","CONFIG_NSOCKET_DESCRIPTORS > 0 || CONFIG_NFILE_DESCRIPTORS > 0","ssize_t","int","FAR void*","size_t","off_t" diff --git a/syscall/syscall_lookup.h b/syscall/syscall_lookup.h index 4cd1a3d6765..d0f304fbadd 100644 --- a/syscall/syscall_lookup.h +++ b/syscall/syscall_lookup.h @@ -152,6 +152,9 @@ SYSCALL_LOOKUP(up_assert, 2, STUB_up_assert) SYSCALL_LOOKUP(clock_getres, 2, STUB_clock_getres) SYSCALL_LOOKUP(clock_gettime, 2, STUB_clock_gettime) SYSCALL_LOOKUP(clock_settime, 2, STUB_clock_settime) +#ifdef CONFIG_CLOCK_TIMEKEEPING + SYSCALL_LOOKUP(adjtime, 2, STUB_adjtime) +#endif /* The following are defined only if POSIX timers are supported */ @@ -183,10 +186,10 @@ SYSCALL_LOOKUP(up_assert, 2, STUB_up_assert) SYSCALL_LOOKUP(pread, 4, STUB_pread) SYSCALL_LOOKUP(pwrite, 4, STUB_pwrite) # ifdef CONFIG_FS_AIO - SYSCALL_LOOKUP(aio_read, 1, SYS_aio_read) - SYSCALL_LOOKUP(aio_write, 1, SYS_aio_write) - SYSCALL_LOOKUP(aio_fsync, 2, SYS_aio_fsync) - SYSCALL_LOOKUP(aio_cancel, 2, SYS_aio_cancel) + SYSCALL_LOOKUP(aio_read, 1, STUB_aio_read) + SYSCALL_LOOKUP(aio_write, 1, STUB_aio_write) + SYSCALL_LOOKUP(aio_fsync, 2, STUB_aio_fsync) + SYSCALL_LOOKUP(aio_cancel, 2, STUB_aio_cancel) # endif # ifndef CONFIG_DISABLE_POLL SYSCALL_LOOKUP(poll, 3, STUB_poll) @@ -208,11 +211,9 @@ SYSCALL_LOOKUP(up_assert, 2, STUB_up_assert) SYSCALL_LOOKUP(dup2, 2, STUB_dup2) SYSCALL_LOOKUP(fcntl, 6, STUB_fcntl) SYSCALL_LOOKUP(lseek, 3, STUB_lseek) - SYSCALL_LOOKUP(mkfifo, 2, STUB_mkfifo) SYSCALL_LOOKUP(mmap, 6, STUB_mmap) SYSCALL_LOOKUP(open, 6, STUB_open) SYSCALL_LOOKUP(opendir, 1, STUB_opendir) - SYSCALL_LOOKUP(pipe, 1, STUB_pipe) SYSCALL_LOOKUP(readdir, 1, STUB_readdir) SYSCALL_LOOKUP(rewinddir, 1, STUB_rewinddir) SYSCALL_LOOKUP(seekdir, 2, STUB_seekdir) @@ -220,6 +221,14 @@ SYSCALL_LOOKUP(up_assert, 2, STUB_up_assert) SYSCALL_LOOKUP(statfs, 2, STUB_statfs) SYSCALL_LOOKUP(telldir, 1, STUB_telldir) +# if defined(CONFIG_PIPES) && CONFIG_DEV_PIPE_SIZE > 0 + SYSCALL_LOOKUP(pipe2, 2, STUB_pipe2) +# endif + +# if defined(CONFIG_PIPES) && CONFIG_DEV_FIFO_SIZE > 0 + SYSCALL_LOOKUP(mkfifo2, 3, STUB_mkfifo2) +# endif + # if CONFIG_NFILE_STREAMS > 0 SYSCALL_LOOKUP(fdopen, 3, STUB_fs_fdopen) SYSCALL_LOOKUP(sched_getstreams, 0, STUB_sched_getstreams) diff --git a/syscall/syscall_stublookup.c b/syscall/syscall_stublookup.c index 96862aa4062..868eca6f132 100644 --- a/syscall/syscall_stublookup.c +++ b/syscall/syscall_stublookup.c @@ -154,6 +154,7 @@ uintptr_t STUB_clock_systimer(int nbr); uintptr_t STUB_clock_getres(int nbr, uintptr_t parm1, uintptr_t parm2); uintptr_t STUB_clock_gettime(int nbr, uintptr_t parm1, uintptr_t parm2); uintptr_t STUB_clock_settime(int nbr, uintptr_t parm1, uintptr_t parm2); +uintptr_t STUB_adjtime(int nbr, uintptr_t parm1, uintptr_t parm2); /* The following are defined only if POSIX timers are supported */ @@ -214,7 +215,6 @@ uintptr_t STUB_fcntl(int nbr, uintptr_t parm1, uintptr_t parm2, uintptr_t parm6); uintptr_t STUB_lseek(int nbr, uintptr_t parm1, uintptr_t parm2, uintptr_t parm3); -uintptr_t STUB_mkfifo(int nbr, uintptr_t parm1, uintptr_t parm2); uintptr_t STUB_mmap(int nbr, uintptr_t parm1, uintptr_t parm2, uintptr_t parm3, uintptr_t parm4, uintptr_t parm5, uintptr_t parm6); @@ -222,7 +222,6 @@ uintptr_t STUB_open(int nbr, uintptr_t parm1, uintptr_t parm2, uintptr_t parm3, uintptr_t parm4, uintptr_t parm5, uintptr_t parm6); uintptr_t STUB_opendir(int nbr, uintptr_t parm1); -uintptr_t STUB_pipe(int nbr, uintptr_t parm1); uintptr_t STUB_readdir(int nbr, uintptr_t parm1); uintptr_t STUB_rewinddir(int nbr, uintptr_t parm1); uintptr_t STUB_seekdir(int nbr, uintptr_t parm1, uintptr_t parm2); @@ -230,6 +229,10 @@ uintptr_t STUB_stat(int nbr, uintptr_t parm1, uintptr_t parm2); uintptr_t STUB_statfs(int nbr, uintptr_t parm1, uintptr_t parm2); uintptr_t STUB_telldir(int nbr, uintptr_t parm1); +uintptr_t STUB_pipe2(int nbr, uintptr_t parm1, uintptr_t parm2); +uintptr_t STUB_mkfifo2(int nbr, uintptr_t parm1, uintptr_t parm2, + uintptr_t parm3); + uintptr_t STUB_fs_fdopen(int nbr, uintptr_t parm1, uintptr_t parm2, uintptr_t parm3); uintptr_t STUB_sched_getstreams(int nbr); diff --git a/tools/README.txt b/tools/README.txt index 408bccad7b3..1fcac577c10 100644 --- a/tools/README.txt +++ b/tools/README.txt @@ -104,6 +104,16 @@ kconfig2html.c is the directory containing the root Kconfig file. Default : . + NOTE: In order to use this tool, some configuration must be in-place will + all necessary symbolic links. You can establish the configured symbolic + links with: + + make context + + or more quickly with: + + make dirlinks + mkconfigvars.sh --------------- @@ -575,6 +585,46 @@ indent.sh -h Show this help message and exit +sethost.sh +---------- + + Saved configurations may run on Linux, Cygwin (32- or 64-bit), or other + platforms. The platform characteristics can be changed use 'make + menuconfig'. Sometimes this can be confusing due to the differences + between the platforms. Enter sethost.sh + + sethost.sh is a simple script that changes a configuration to your + host platform. This can greatly simplify life if you use many different + configurations. For example, if you are running on Linux and you + configure like this: + + $ cd tools + $ ./configure.sh board/configuration + $ cd .. + + The you can use the following command to both (1) make sure that the + configuration is up to date, AND (2) the configuration is set up + correctly for Linux: + + $ tools/sethost.sh -l + + Or, if you are on a Windows/Cygwin 64-bit platform: + + $ tools/sethost.sh -w + + Other options are available: + + $ tools/sethost.sh -h + + USAGE: tools/sethost.sh [-w|l] [-c|n] [-32|64] [] + tools/sethost.sh -h + + Where: + -w|l selects Windows (w) or Linux (l). Default: Linux + -c|n selects Windows native (n) or Cygwin (c). Default Cygwin + -32|64 selects 32- or 64-bit host (Only for Cygwin). Default 64 + -h will show this help test and terminate + refresh.sh ---------- diff --git a/tools/kconfig2html.c b/tools/kconfig2html.c index 295d4814e81..d8ccef63b12 100644 --- a/tools/kconfig2html.c +++ b/tools/kconfig2html.c @@ -2245,33 +2245,44 @@ static char *parse_kconfigfile(FILE *stream, const char *kconfigdir) { /* Get the relative path from the Kconfig file line */ - char *relpath = get_token(); + char *source = get_token(); /* Remove optional quoting */ - relpath = dequote(relpath); - if (relpath) + source = dequote(source); + if (source) { - char *subdir = dirname(relpath); + char *subdir = dirname(source); char *dirpath; - /* Check if the directory path contains $APPSDIR */ + /* Check for an absolute path */ - char *appsdir = strstr(subdir, "$APPSDIR"); - if (appsdir) + if (source[0] == '/') { - char *tmp = appsdir + strlen("$APPSDIR"); - - *appsdir = '\0'; - asprintf(&dirpath, "%s/%s%s%s", g_kconfigroot, subdir, g_appsdir, tmp); + dirpath = strdup(subdir); } else { - asprintf(&dirpath, "%s/%s", g_kconfigroot, subdir); + /* Check if the directory path contains $APPSDIR */ + + char *appsdir = strstr(subdir, "$APPSDIR"); + if (appsdir) + { + char *tmp = appsdir + strlen("$APPSDIR"); + + *appsdir = '\0'; + asprintf(&dirpath, "%s/%s%s%s", + g_kconfigroot, subdir, g_appsdir, tmp); + } + else + { + asprintf(&dirpath, "%s/%s", g_kconfigroot, subdir); + } + } debug("parse_kconfigfile: Recursing for TOKEN_SOURCE\n"); - debug(" relpath: %s\n", relpath); + debug(" source: %s\n", source); debug(" subdir: %s\n", subdir); debug(" dirpath: %s\n", dirpath); diff --git a/tools/refresh.sh b/tools/refresh.sh index 8e24fa0d90f..47df7832638 100755 --- a/tools/refresh.sh +++ b/tools/refresh.sh @@ -1,7 +1,7 @@ #!/bin/bash # refresh.sh # -# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without @@ -104,6 +104,7 @@ WD=${PWD} BOARDDIR=configs/$BOARDSUBDIR CONFIGDIR=$BOARDDIR/$CONFIGSUBDIR DEFCONFIG=$CONFIGDIR/defconfig +MAKEDEFS=$CONFIGDIR/Make.defs CMPCONFIG_TARGET=cmpconfig CMPCONFIG1=tools/cmpconfig @@ -124,7 +125,12 @@ if [ ! -d "$CONFIGDIR" ]; then fi if [ ! -r "$DEFCONFIG" ]; then - echo "No readable defconfig file in $DEFCONFIG" + echo "No readable defconfig file at $DEFCONFIG" + exit 1 +fi + +if [ ! -r "$MAKEDEFS" ]; then + echo "No readable Make.defs file at $MAKEDEFS" exit 1 fi @@ -152,7 +158,7 @@ else fi fi -# Copy the .config to the toplevel directory +# Copy the .config and Make.defs to the toplevel directory rm -f SAVEconfig if [ -e .config ]; then @@ -163,6 +169,15 @@ fi cp -a $DEFCONFIG .config || \ { echo "ERROR: Failed to copy $DEFCONFIG to .config"; exit 1; } +rm -f SAVEMake.defs +if [ -e Make.defs ]; then + mv Make.defs SAVEMake.defs || \ + { echo "ERROR: Failed to move Make.defs to SAVEMake.defs"; exit 1; } +fi + +cp -a $MAKEDEFS Make.defs || \ + { echo "ERROR: Failed to copy $MAKEDEFS to Make.defs"; exit 1; } + # Then run oldconfig or oldefconfig if [ "X${silent}" == "Xy" ]; then @@ -195,9 +210,14 @@ else fi fi -# Restore any previous .config file +# Restore any previous .config and Make.defs files if [ -e SAVEconfig ]; then mv SAVEconfig .config || \ { echo "ERROR: Failed to move SAVEconfig to .config"; exit 1; } fi + +if [ -e SAVEMake.defs ]; then + mv SAVEMake.defs Make.defs || \ + { echo "ERROR: Failed to move SAVEMake.defs to Make.defs"; exit 1; } +fi diff --git a/tools/sethost.sh b/tools/sethost.sh new file mode 100644 index 00000000000..b68b991b6f2 --- /dev/null +++ b/tools/sethost.sh @@ -0,0 +1,233 @@ +#!/bin/bash +# tools/sethost.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +WD=$PWD + +progname=$0 +host=linux +wenv=cygwin +hsize=64 +unset configfile + +function showusage { + echo "" + echo "USAGE: $progname [-w|l] [-c|n] [-32|64] []" + echo " $progname -h" + echo "" + echo "Where:" + echo " -w|l selects Windows (w) or Linux (l). Default: Linux" + echo " -c|n selects Windows native (n) or Cygwin (c). Default Cygwin" + echo " -32|64 selects 32- or 64-bit host (Only for Cygwin). Default 64" + echo " -h will show this help test and terminate" + echo " selects configuration file. Default: .config" + exit 1 +} + +# Parse command line + +while [ ! -z "$1" ]; do + case $1 in + -w ) + host=windows + ;; + -l ) + host=linux + ;; + -c ) + wenv=cygwin + ;; + -n ) + wenv=native + ;; + -32 ) + hsize=32 + ;; + -64 ) + hsize=32 + ;; + -h ) + showusage + ;; + * ) + configfile="$1" + shift + break; + ;; + esac + shift +done + +if [ ! -z "$1" ]; then + echo "ERROR: Garbage at the end of line" + showusage +fi + +if [ -x sethost.sh ]; then + nuttx=$PWD/.. +else + if [ -x tools/sethost.sh ]; then + nuttx=$PWD + else + echo "This script must be execute in nuttx/ or nutts/tools directories" + exit 1 + fi +fi + +rm -f $nuttx/SAVEconfig +rm -f $nuttx/SAVEMake.defs + +unset dotconfig +if [ -z "$configfile" ]; then + dotconfig=y +else + if [ "X$configfile" = "X.config"]; then + dotconfig=y + else + if [ "X$configfile" = "X$nuttx/.config"]; then + dotconfig=y + fi + fi +fi + +if [ "X$dotconfig" = "Xy" ]; then + unset configfile + if [ -r $nuttx/.config ]; then + configfile=$nuttx/.config + else + echo "There is no .config at $nuttx" + exit 1 + fi + + if [ ! -r $nuttx/Make.defs ]; then + echo "ERROR: No readable Make.defs file exists at $nuttx" + exit 1 + fi +else + if [ ! -r "$configfile" ]; then + echo "ERROR: No readable configuration file exists at $configfile" + exit 1 + fi + + configdir=`dirname $configfile` + makedefs=$configdir/Make.defs + + if [ ! -r $makedefs]; then + echo "ERROR: No readable Make.defs file exists at $configdir" + exit 1 + fi + + if [ -f $nuttx/.config]; then + mv $nuttx/.config $nuttx/SAVEconfig + fi + cp $configfile $nuttx/.config || \ + { echo "ERROR: cp to $nuttx/.config failed"; exit 1; } + + if [ -f $nuttx/Make.defs]; then + mv $nuttx/Make.defs $nuttx/SAVEMake.defs + fi + cp $makedefs $nuttx/Make.defs || \ + { echo "ERROR: cp to $nuttx/Make.defs failed"; exit 1; } +fi + +# Modify the configuration + +if [ "X$host" == "Xlinux" ]; then + echo " Select CONFIG_HOST_LINUX=y" + + kconfig-tweak --file $nuttx/.config --enable CONFIG_HOST_LINUX + kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_WINDOWS + + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_NATIVE + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_CYGWIN + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_MSYS + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_OTHER + + kconfig-tweak --file $nuttx/.config --enable CONFIG_SIM_X8664_SYSTEMV + kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_X8664_MICROSOFT + kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_M32 +else + echo " Select CONFIG_HOST_WINDOWS=y" + kconfig-tweak --file $nuttx/.config --enable CONFIG_HOST_WINDOWS + kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_LINUX + + if [ "X$wenv" == "Xcygwin" ]; then + echo " Select CONFIG_WINDOWS_CYGWIN=y" + kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_CYGWIN + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_NATIVE + else + echo " Select CONFIG_WINDOWS_NATIVE=y" + kconfig-tweak --file $nuttx/.config --enable CONFIG_WINDOWS_NATIVE + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_CYGWIN + fi + + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_MSYS + kconfig-tweak --file $nuttx/.config --disable CONFIG_WINDOWS_OTHER + + kconfig-tweak --file $nuttx/.config --enable CONFIG_SIM_X8664_MICROSOFT + kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_X8664_SYSTEMV + + if [ "X$hsize" == "X32" ]; then + kconfig-tweak --file $nuttx/.config --enable CONFIG_SIM_M32 + else + kconfig-tweak --file $nuttx/.config --disable CONFIG_SIM_M32 + fi +fi + +kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_OSX +kconfig-tweak --file $nuttx/.config --disable CONFIG_HOST_OTHER + +echo " Refreshing..." +cd $nuttx || { echo "ERROR: failed to cd to $nuttx"; exit 1; } +make clean_context 1>/dev/null 2>&1 +make olddefconfig 1>/dev/null 2>&1 + +# Move config file to correct location and restore any previous .config +# and Make.defs files + +if [ "X$dotconfig" != "Xy" ]; then + sed -i -e "s/^CONFIG_APPS_DIR/# CONFIG_APPS_DIR/g" .config + + mv .config $configfile || \ + { echo "ERROR: Failed to move .conig to $configfile"; exit 1; } + + if [ -e SAVEconfig ]; then + mv SAVEconfig .config || \ + { echo "ERROR: Failed to move SAVEconfig to .config"; exit 1; } + fi + + if [ -e SAVEMake.defs ]; then + mv SAVEMake.defs Make.defs || \ + { echo "ERROR: Failed to move SAVEMake.defs to Make.defs"; exit 1; } + fi +fi \ No newline at end of file diff --git a/tools/testbuild.sh b/tools/testbuild.sh index 31b0f9b4eae..775dcab3fb9 100755 --- a/tools/testbuild.sh +++ b/tools/testbuild.sh @@ -116,13 +116,11 @@ fi if [ ! -r "$testfile" ]; then echo "ERROR: No readable file exists at $testfile" - echo $USAGE showusage fi if [ ! -d "$nuttx" ]; then echo "ERROR: Expected to find nuttx/ at $nuttx" - echo $USAGE showusage fi