diff --git a/ChangeLog b/ChangeLog
index b4fe24fea56..a8c4203b2d5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -7171,6 +7171,7 @@
 	  also reset the camera module.  Noted by David Sidrane (2014-4-11).
 	* arch/arm/src/stm32/stm32_usbhost.c/.h and stm32_otgfshost.c:  USB host
 	  tracing added by Leo (2014-4-12).
-	* arch/arm/src/sama5/sam_adc.c, sam_can.c:  If running from SDRAM, then
-	  BOARD_MCK_FREQUENCY is not a constant and cannot be used in conditional
-	  compilation (2014-4-16).
+	* arch/arm/src/sama5/sam_adc.c, sam_can.c, sam_emac.c sam_gmac.c:  If
+	  running from SDRAM, then BOARD_MCK_FREQUENCY is not a constant and
+	  cannot be used in conditional compilation (2014-4-16).
+
diff --git a/arch/arm/src/sama5/sam_emac.c b/arch/arm/src/sama5/sam_emac.c
index e4cb81ae0c2..2f2603cb526 100644
--- a/arch/arm/src/sama5/sam_emac.c
+++ b/arch/arm/src/sama5/sam_emac.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_emac.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * References:
@@ -2470,6 +2470,7 @@ errout:
 static int sam_phyinit(struct sam_emac_s *priv)
 {
   uint32_t regval;
+  uint32_t mck;
   int ret;
 
   /* Configure PHY clocking */
@@ -2477,17 +2478,28 @@ static int sam_phyinit(struct sam_emac_s *priv)
   regval = sam_getreg(priv, SAM_EMAC_NCFGR);
   regval &= ~EMAC_NCFGR_CLK_MASK;
 
-#if BOARD_MCK_FREQUENCY > (160*1000*1000)
-#  error Supported MCK frequency
-#elif BOARD_MCK_FREQUENCY > (80*1000*1000)
-  regval |= EMAC_NCFGR_CLK_DIV64; /* MCK divided by 64 (MCK up to 160 MHz) */
-#elif BOARD_MCK_FREQUENCY > (40*1000*1000)
-  regval |= EMAC_NCFGR_CLK_DIV32; /* MCK divided by 32 (MCK up to 80 MHz) */
-#elif BOARD_MCK_FREQUENCY > (20*1000*1000)
-  regval |= EMAC_NCFGR_CLK_DIV16; /* MCK divided by 16 (MCK up to 40 MHz) */
-#else
-  regval |= EMAC_NCFGR_CLK_DIV8;  /* MCK divided by 8 (MCK up to 20 MHz) */
-#endif
+  mck = BOARD_MCK_FREQUENCY;
+  if (mck > (160*1000*1000))
+    {
+      ndbg("ERROR: Cannot realize PHY clock\n");
+      return -EINVAL;
+    }
+  else if (mck > (80*1000*1000)
+    {
+      regval |= EMAC_NCFGR_CLK_DIV64; /* MCK divided by 64 (MCK up to 160 MHz) */
+    }
+  else if (mck > (40*1000*1000)
+    {
+      regval |= EMAC_NCFGR_CLK_DIV32; /* MCK divided by 32 (MCK up to 80 MHz) */
+    }
+  else if (mck > (20*1000*1000)
+    {
+      regval |= EMAC_NCFGR_CLK_DIV16; /* MCK divided by 16 (MCK up to 40 MHz) */
+    }
+  else
+    {
+      regval |= EMAC_NCFGR_CLK_DIV8;  /* MCK divided by 8 (MCK up to 20 MHz) */
+    }
 
   sam_putreg(priv, SAM_EMAC_NCFGR, regval);
 
diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c
index 2232a81925b..453dca9c0d7 100644
--- a/arch/arm/src/sama5/sam_gmac.c
+++ b/arch/arm/src/sama5/sam_gmac.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/sama5/sam_gmac.c
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * References:
@@ -2489,6 +2489,7 @@ static void sam_mdcclock(struct sam_gmac_s *priv)
 {
   uint32_t ncfgr;
   uint32_t ncr;
+  uint32_t mck;
 
   /* Disable RX and TX momentarily */
 
@@ -2500,21 +2501,33 @@ static void sam_mdcclock(struct sam_gmac_s *priv)
   ncfgr  = sam_getreg(priv, SAM_GMAC_NCFGR);
   ncfgr &= ~GMAC_NCFGR_CLK_MASK;
 
-#if BOARD_MCK_FREQUENCY <= 20000000
-  ncfgr |= GMAC_NCFGR_CLK_DIV8;          /* MCK divided by 8 (MCK up to 20 MHz) */
-#elif BOARD_MCK_FREQUENCY <= 40000000
-  ncfgr |= GMAC_NCFGR_CLK_DIV16;         /* MCK divided by 16 (MCK up to 40 MHz) */
-#elif BOARD_MCK_FREQUENCY <= 80000000
-  ncfgr |= GMAC_NCFGR_CLK_DIV32;         /* MCK divided by 32 (MCK up to 80 MHz) */
-#elif BOARD_MCK_FREQUENCY <= 120000000
-  ncfgr |= GMAC_NCFGR_CLK_DIV48;         /* MCK divided by 48 (MCK up to 120 MHz) */
-#elif BOARD_MCK_FREQUENCY <= 160000000
-  ncfgr |= GMAC_NCFGR_CLK_DIV64;         /* MCK divided by 64 (MCK up to 160 MHz) */
-#elif BOARD_MCK_FREQUENCY <= 240000000
-  ncfgr |= GMAC_NCFGR_CLK_DIV96;         /* MCK divided by 64 (MCK up to 240 MHz) */
-#else
-#  error Invalid BOARD_MCK_FREQUENCY
-#endif
+  mck = BOARD_MCK_FREQUENCY;
+  DEBUGASSERT(mck <= 240000000);
+
+  if (mck <= 20000000)
+    {
+      ncfgr |= GMAC_NCFGR_CLK_DIV8;   /* MCK divided by 8 (MCK up to 20 MHz) */
+    }
+  else if (mck <= 40000000)
+    {
+      ncfgr |= GMAC_NCFGR_CLK_DIV16;  /* MCK divided by 16 (MCK up to 40 MHz) */
+    }
+  else if (mck <= 80000000)
+    {
+      ncfgr |= GMAC_NCFGR_CLK_DIV32;  /* MCK divided by 32 (MCK up to 80 MHz) */
+    }
+  else if (mck <= 120000000)
+    {
+      ncfgr |= GMAC_NCFGR_CLK_DIV48;  /* MCK divided by 48 (MCK up to 120 MHz) */
+    }
+  else if (mck <= 160000000)
+    {
+      ncfgr |= GMAC_NCFGR_CLK_DIV64;  /* MCK divided by 64 (MCK up to 160 MHz) */
+    }
+  else /* if (mck <= 240000000) */
+    {
+      ncfgr |= GMAC_NCFGR_CLK_DIV96;  /* MCK divided by 64 (MCK up to 240 MHz) */
+    }
 
   sam_putreg(priv, SAM_GMAC_NCFGR, ncfgr);