From 1df49fbb362cf45eebdd80cf1d5296a5602a42c5 Mon Sep 17 00:00:00 2001 From: raiden00pl Date: Thu, 23 Apr 2026 11:15:47 +0200 Subject: [PATCH] boards/stm32f2: migrate to new pinmap migrate stm32f2 to new pinmap Signed-off-by: raiden00pl --- .../arm/stm32/emw3162/configs/nsh/defconfig | 1 + .../arm/stm32/emw3162/configs/wlan/defconfig | 1 + boards/arm/stm32/emw3162/include/board.h | 17 ++- .../stm32/nucleo-f207zg/configs/adc/defconfig | 1 + .../stm32/nucleo-f207zg/configs/nsh/defconfig | 1 + .../stm32/nucleo-f207zg/configs/pwm/defconfig | 1 + .../arm/stm32/nucleo-f207zg/include/board.h | 16 +- .../arm/stm32/nucleo-f207zg/src/stm32_adc.c | 18 +-- .../olimex-stm32-p207/configs/nsh/defconfig | 1 + .../stm32/olimex-stm32-p207/include/board.h | 44 +++--- .../stm32/olimex-stm32-p207/src/stm32_adc.c | 2 +- boards/arm/stm32/photon/configs/adb/defconfig | 1 + boards/arm/stm32/photon/configs/nsh/defconfig | 1 + .../arm/stm32/photon/configs/rgbled/defconfig | 1 + .../arm/stm32/photon/configs/usbnsh/defconfig | 1 + .../stm32/photon/configs/wlan-perf/defconfig | 1 + .../arm/stm32/photon/configs/wlan/defconfig | 1 + boards/arm/stm32/photon/include/board.h | 45 ++++-- .../stm3220g-eval/configs/dhcpd/defconfig | 1 + .../stm3220g-eval/configs/nettest/defconfig | 1 + .../stm32/stm3220g-eval/configs/nsh/defconfig | 1 + .../stm3220g-eval/configs/nsh2/defconfig | 1 + .../stm3220g-eval/configs/nxwm/defconfig | 1 + .../stm3220g-eval/configs/telnetd/defconfig | 1 + .../arm/stm32/stm3220g-eval/include/board.h | 141 +++++++++++++----- .../stm32/stm3220g-eval/src/stm32_selectlcd.c | 1 + .../stm3220g-eval/src/stm32_selectsram.c | 1 + 27 files changed, 219 insertions(+), 84 deletions(-) diff --git a/boards/arm/stm32/emw3162/configs/nsh/defconfig b/boards/arm/stm32/emw3162/configs/nsh/defconfig index 9688757eaf2..2ab1204a38f 100644 --- a/boards/arm/stm32/emw3162/configs/nsh/defconfig +++ b/boards/arm/stm32/emw3162/configs/nsh/defconfig @@ -7,6 +7,7 @@ # # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="emw3162" CONFIG_ARCH_BOARD_EMW3162=y diff --git a/boards/arm/stm32/emw3162/configs/wlan/defconfig b/boards/arm/stm32/emw3162/configs/wlan/defconfig index ceeedd6a6b5..e32ff30e6c5 100644 --- a/boards/arm/stm32/emw3162/configs/wlan/defconfig +++ b/boards/arm/stm32/emw3162/configs/wlan/defconfig @@ -10,6 +10,7 @@ # CONFIG_MMCSD_MMCSUPPORT is not set # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="emw3162" CONFIG_ARCH_BOARD_EMW3162=y diff --git a/boards/arm/stm32/emw3162/include/board.h b/boards/arm/stm32/emw3162/include/board.h index 3673f04bbe5..96825cff434 100644 --- a/boards/arm/stm32/emw3162/include/board.h +++ b/boards/arm/stm32/emw3162/include/board.h @@ -153,10 +153,23 @@ /* UART1 */ #ifdef CONFIG_STM32_USART1 -# define GPIO_USART1_RX GPIO_USART1_RX_1 -# define GPIO_USART1_TX GPIO_USART1_TX_1 +# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) +# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) #endif +/* MCO1 */ + +#define GPIO_MCO1 (GPIO_MCO1_0|GPIO_SPEED_100MHz) + +/* SDIO */ + +#define GPIO_SDIO_CK (GPIO_SDIO_CK_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_CMD (GPIO_SDIO_CMD_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D0 (GPIO_SDIO_D0_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D1 (GPIO_SDIO_D1_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D2 (GPIO_SDIO_D2_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D3 (GPIO_SDIO_D3_0|GPIO_SPEED_50MHz) + /* SDIO definitions *********************************************************/ /* Note that slower clocking is required when DMA is disabled in order diff --git a/boards/arm/stm32/nucleo-f207zg/configs/adc/defconfig b/boards/arm/stm32/nucleo-f207zg/configs/adc/defconfig index 2615e630e80..b986cc6ba59 100644 --- a/boards/arm/stm32/nucleo-f207zg/configs/adc/defconfig +++ b/boards/arm/stm32/nucleo-f207zg/configs/adc/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ADC=y CONFIG_ADC_FIFOSIZE=4 CONFIG_ANALOG=y diff --git a/boards/arm/stm32/nucleo-f207zg/configs/nsh/defconfig b/boards/arm/stm32/nucleo-f207zg/configs/nsh/defconfig index 855e4c155bb..77af8621f1c 100644 --- a/boards/arm/stm32/nucleo-f207zg/configs/nsh/defconfig +++ b/boards/arm/stm32/nucleo-f207zg/configs/nsh/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-f207zg" CONFIG_ARCH_BOARD_NUCLEO_F207ZG=y diff --git a/boards/arm/stm32/nucleo-f207zg/configs/pwm/defconfig b/boards/arm/stm32/nucleo-f207zg/configs/pwm/defconfig index 03abe05bec9..2469c67946e 100644 --- a/boards/arm/stm32/nucleo-f207zg/configs/pwm/defconfig +++ b/boards/arm/stm32/nucleo-f207zg/configs/pwm/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="nucleo-f207zg" CONFIG_ARCH_BOARD_NUCLEO_F207ZG=y diff --git a/boards/arm/stm32/nucleo-f207zg/include/board.h b/boards/arm/stm32/nucleo-f207zg/include/board.h index d60490a19fe..bf2ce642c59 100644 --- a/boards/arm/stm32/nucleo-f207zg/include/board.h +++ b/boards/arm/stm32/nucleo-f207zg/include/board.h @@ -186,19 +186,19 @@ /* USART3 (Nucleo Virtual Console) */ -#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */ -#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */ +#define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz) /* PD9 */ +#define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz) /* PD8 */ /* PWM configuration ********************************************************/ /* TIM1 PWM */ -#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 /* PE9 */ -#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_3 /* PE8 */ -#define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2 /* PE11 */ -#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_3 /* PE10 */ -#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_2 /* PE13 */ -#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3N_3 /* PE12 */ +#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_2|GPIO_SPEED_50MHz) /* PE9 */ +#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_3 /* PE8 */ +#define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_2|GPIO_SPEED_50MHz) /* PE11 */ +#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_3 /* PE10 */ +#define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_2|GPIO_SPEED_50MHz) /* PE13 */ +#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3N_3 /* PE12 */ /* DMA channels *************************************************************/ diff --git a/boards/arm/stm32/nucleo-f207zg/src/stm32_adc.c b/boards/arm/stm32/nucleo-f207zg/src/stm32_adc.c index 5b2ee78d5bd..6a7e27ca6b7 100644 --- a/boards/arm/stm32/nucleo-f207zg/src/stm32_adc.c +++ b/boards/arm/stm32/nucleo-f207zg/src/stm32_adc.c @@ -93,9 +93,9 @@ static const uint8_t g_chanlist1[3] = static const uint32_t g_pinlist1[3] = { - GPIO_ADC1_IN3, /* PA3/A0 */ - GPIO_ADC1_IN10, /* PC0/A1 */ - GPIO_ADC1_IN13, /* PC3/A2 */ + GPIO_ADC1_IN3_0, /* PA3/A0 */ + GPIO_ADC1_IN10_0, /* PC0/A1 */ + GPIO_ADC1_IN13_0, /* PC3/A2 */ }; #elif DEV1_PORT == 3 @@ -115,9 +115,9 @@ static const uint8_t g_chanlist1[3] = static const uint32_t g_pinlist1[3] = { - GPIO_ADC3_IN9, /* PF3/A3 */ - GPIO_ADC3_IN15, /* PF5/A4 */ - GPIO_ADC3_IN8, /* PF10/A5 */ + GPIO_ADC3_IN9_0, /* PF3/A3 */ + GPIO_ADC3_IN15_0, /* PF5/A4 */ + GPIO_ADC3_IN8_0, /* PF10/A5 */ }; #endif /* DEV1_PORT == 1 */ @@ -143,9 +143,9 @@ static const uint8_t g_chanlist2[3] = static const uint32_t g_pinlist2[3] = { - GPIO_ADC3_IN9, /* PF3/A3 */ - GPIO_ADC3_IN15, /* PF5/A4 */ - GPIO_ADC3_IN8, /* PF10/A5 */ + GPIO_ADC3_IN9_0, /* PF3/A3 */ + GPIO_ADC3_IN15_0, /* PF5/A4 */ + GPIO_ADC3_IN8_0, /* PF10/A5 */ }; #endif /* DEV2_PORT == 3 */ diff --git a/boards/arm/stm32/olimex-stm32-p207/configs/nsh/defconfig b/boards/arm/stm32/olimex-stm32-p207/configs/nsh/defconfig index 4e50e59cce3..36382fa3608 100644 --- a/boards/arm/stm32/olimex-stm32-p207/configs/nsh/defconfig +++ b/boards/arm/stm32/olimex-stm32-p207/configs/nsh/defconfig @@ -7,6 +7,7 @@ # # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ADC=y CONFIG_ANALOG=y CONFIG_ARCH="arm" diff --git a/boards/arm/stm32/olimex-stm32-p207/include/board.h b/boards/arm/stm32/olimex-stm32-p207/include/board.h index 54f1ddeee19..6a632373c9b 100644 --- a/boards/arm/stm32/olimex-stm32-p207/include/board.h +++ b/boards/arm/stm32/olimex-stm32-p207/include/board.h @@ -187,14 +187,14 @@ /* Alternate function pin selections ****************************************/ /* USART3: */ -#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */ -#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */ -#define GPIO_USART3_CTS GPIO_USART3_CTS_2 /* PD11 */ -#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */ +#define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz) /* PD9 */ +#define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz) /* PD8 */ +#define GPIO_USART3_CTS GPIO_USART3_CTS_2 /* PD11 */ +#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12 */ /* CAN: */ -#define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */ -#define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */ +#define GPIO_CAN1_RX (GPIO_CAN1_RX_2|GPIO_SPEED_50MHz) /* PB8 */ +#define GPIO_CAN1_TX (GPIO_CAN1_TX_2|GPIO_SPEED_50MHz) /* PB9 */ /* Ethernet: */ @@ -218,18 +218,24 @@ * - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1 */ -#define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1 -#define GPIO_ETH_MII_CRS GPIO_ETH_MII_CRS_1 -#define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_1 -#define GPIO_ETH_MII_RX_ER GPIO_ETH_MII_RX_ER_1 -#define GPIO_ETH_MII_RXD2 GPIO_ETH_MII_RXD2_1 -#define GPIO_ETH_MII_RXD3 GPIO_ETH_MII_RXD3_1 -#define GPIO_ETH_MII_TXD3 GPIO_ETH_MII_TXD3_1 -#define GPIO_ETH_MII_TX_EN GPIO_ETH_MII_TX_EN_2 -#define GPIO_ETH_MII_TXD0 GPIO_ETH_MII_TXD0_2 -#define GPIO_ETH_MII_TXD1 GPIO_ETH_MII_TXD1_2 -#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1 -#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 -#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 +#define GPIO_ETH_MDC (GPIO_ETH_MDC_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_PPS_OUT (GPIO_ETH_PPS_OUT_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_CRS (GPIO_ETH_MII_CRS_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_COL (GPIO_ETH_MII_COL_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RX_ER (GPIO_ETH_MII_RX_ER_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RXD2 (GPIO_ETH_MII_RXD2_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RXD3 (GPIO_ETH_MII_RXD3_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TXD3 (GPIO_ETH_MII_TXD3_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TX_EN (GPIO_ETH_MII_TX_EN_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TXD0 (GPIO_ETH_MII_TXD0_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TXD1 (GPIO_ETH_MII_TXD1_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_2|GPIO_SPEED_100MHz) #endif /* __BOARDS_ARM_STM32_OLIMEX_STM32_P207_INCLUDE_BOARD_H */ diff --git a/boards/arm/stm32/olimex-stm32-p207/src/stm32_adc.c b/boards/arm/stm32/olimex-stm32-p207/src/stm32_adc.c index c01f6044b9b..82241854400 100644 --- a/boards/arm/stm32/olimex-stm32-p207/src/stm32_adc.c +++ b/boards/arm/stm32/olimex-stm32-p207/src/stm32_adc.c @@ -88,7 +88,7 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] = static const uint32_t g_pinlist[ADC1_NCHANNELS] = { - GPIO_ADC1_IN10 + GPIO_ADC1_IN10_0 }; #endif diff --git a/boards/arm/stm32/photon/configs/adb/defconfig b/boards/arm/stm32/photon/configs/adb/defconfig index 1cd0b1d4e0f..f3bd5a14201 100644 --- a/boards/arm/stm32/photon/configs/adb/defconfig +++ b/boards/arm/stm32/photon/configs/adb/defconfig @@ -8,6 +8,7 @@ # CONFIG_ARCH_LEDS is not set # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ADBD_AUTHENTICATION=y CONFIG_ADBD_AUTH_PUBKEY=y CONFIG_ADBD_DEVICE_ID="serialno" diff --git a/boards/arm/stm32/photon/configs/nsh/defconfig b/boards/arm/stm32/photon/configs/nsh/defconfig index e0e25c7c346..e4a84cfb17d 100644 --- a/boards/arm/stm32/photon/configs/nsh/defconfig +++ b/boards/arm/stm32/photon/configs/nsh/defconfig @@ -8,6 +8,7 @@ # CONFIG_ARCH_LEDS is not set # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="photon" CONFIG_ARCH_BOARD_PHOTON=y diff --git a/boards/arm/stm32/photon/configs/rgbled/defconfig b/boards/arm/stm32/photon/configs/rgbled/defconfig index ca84d052dd3..9b876cb4d13 100644 --- a/boards/arm/stm32/photon/configs/rgbled/defconfig +++ b/boards/arm/stm32/photon/configs/rgbled/defconfig @@ -9,6 +9,7 @@ # CONFIG_DEV_CONSOLE is not set # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="photon" CONFIG_ARCH_BOARD_PHOTON=y diff --git a/boards/arm/stm32/photon/configs/usbnsh/defconfig b/boards/arm/stm32/photon/configs/usbnsh/defconfig index 860b3301702..52fb5705102 100644 --- a/boards/arm/stm32/photon/configs/usbnsh/defconfig +++ b/boards/arm/stm32/photon/configs/usbnsh/defconfig @@ -8,6 +8,7 @@ # CONFIG_DEV_CONSOLE is not set # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="photon" CONFIG_ARCH_BOARD_PHOTON=y diff --git a/boards/arm/stm32/photon/configs/wlan-perf/defconfig b/boards/arm/stm32/photon/configs/wlan-perf/defconfig index d6a02110e3b..9b7fff7e1d7 100644 --- a/boards/arm/stm32/photon/configs/wlan-perf/defconfig +++ b/boards/arm/stm32/photon/configs/wlan-perf/defconfig @@ -11,6 +11,7 @@ # CONFIG_MMCSD_MMCSUPPORT is not set # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="photon" CONFIG_ARCH_BOARD_PHOTON=y diff --git a/boards/arm/stm32/photon/configs/wlan/defconfig b/boards/arm/stm32/photon/configs/wlan/defconfig index c2cf5294c3b..7831cab6c4e 100644 --- a/boards/arm/stm32/photon/configs/wlan/defconfig +++ b/boards/arm/stm32/photon/configs/wlan/defconfig @@ -11,6 +11,7 @@ # CONFIG_MMCSD_MMCSUPPORT is not set # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="photon" CONFIG_ARCH_BOARD_PHOTON=y diff --git a/boards/arm/stm32/photon/include/board.h b/boards/arm/stm32/photon/include/board.h index c584b3813ff..6c5ac34d01c 100644 --- a/boards/arm/stm32/photon/include/board.h +++ b/boards/arm/stm32/photon/include/board.h @@ -195,9 +195,9 @@ /* TIM */ -#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_1 -#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_1 -#define GPIO_TIM2_CH4OUT GPIO_TIM2_CH4OUT_1 +#define GPIO_TIM2_CH2OUT (GPIO_TIM2_CH2OUT_1|GPIO_SPEED_50MHz) +#define GPIO_TIM2_CH3OUT (GPIO_TIM2_CH3OUT_1|GPIO_SPEED_50MHz) +#define GPIO_TIM2_CH4OUT (GPIO_TIM2_CH4OUT_1|GPIO_SPEED_50MHz) /* RGB LED * @@ -224,21 +224,44 @@ /* UART1 */ #ifdef CONFIG_STM32_USART1 -# define GPIO_USART1_RX GPIO_USART1_RX_1 -# define GPIO_USART1_TX GPIO_USART1_TX_1 +# define GPIO_USART1_RX (GPIO_USART1_RX_1|GPIO_SPEED_100MHz) +# define GPIO_USART1_TX (GPIO_USART1_TX_1|GPIO_SPEED_100MHz) #endif /* SPI1 */ -#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */ -#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 /* PA7 */ -#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 /* PA5 */ +#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz) /* PA6 */ +#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz) /* PA7 */ +#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz) /* PA5 */ /* SPI3 */ -#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1 /* PB4 */ -#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_1 /* PB5 */ -#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1 /* PB3 */ +#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_1|GPIO_SPEED_50MHz) /* PB4 */ +#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_1|GPIO_SPEED_50MHz) /* PB5 */ +#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_1|GPIO_SPEED_50MHz) /* PB3 */ + +/* SDIO */ + +#define GPIO_SDIO_CK (GPIO_SDIO_CK_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_CMD (GPIO_SDIO_CMD_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D0 (GPIO_SDIO_D0_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D1 (GPIO_SDIO_D1_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D2 (GPIO_SDIO_D2_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D3 (GPIO_SDIO_D3_0|GPIO_SPEED_50MHz) + +/* OTG FS */ + +#define GPIO_OTGFS_DM (GPIO_OTGFS_DM_0|GPIO_SPEED_100MHz) +#define GPIO_OTGFS_DP (GPIO_OTGFS_DP_0|GPIO_SPEED_100MHz) +#define GPIO_OTGFS_ID (GPIO_OTGFS_ID_0|GPIO_SPEED_100MHz) +#define GPIO_OTGFS_SOF (GPIO_OTGFS_SOF_0|GPIO_SPEED_100MHz) + +/* OTG HS */ + +#define GPIO_OTGHS_DM (GPIO_OTGHS_DM_0|GPIO_SPEED_100MHz) +#define GPIO_OTGHS_DP (GPIO_OTGHS_DP_0|GPIO_SPEED_100MHz) +#define GPIO_OTGHS_ID GPIO_OTGHS_ID_0 +#define GPIO_OTGHS_SOF GPIO_OTGHS_SOF_0 /* SDIO definitions *********************************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/configs/dhcpd/defconfig b/boards/arm/stm32/stm3220g-eval/configs/dhcpd/defconfig index 4765c757824..e2a3e1dc645 100644 --- a/boards/arm/stm32/stm3220g-eval/configs/dhcpd/defconfig +++ b/boards/arm/stm32/stm3220g-eval/configs/dhcpd/defconfig @@ -6,6 +6,7 @@ # modifications. # # CONFIG_NETUTILS_DHCPD_IGNOREBROADCAST is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="stm3220g-eval" CONFIG_ARCH_BOARD_STM3220G_EVAL=y diff --git a/boards/arm/stm32/stm3220g-eval/configs/nettest/defconfig b/boards/arm/stm32/stm3220g-eval/configs/nettest/defconfig index ad6101db818..4aed04b16c5 100644 --- a/boards/arm/stm32/stm3220g-eval/configs/nettest/defconfig +++ b/boards/arm/stm32/stm3220g-eval/configs/nettest/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="stm3220g-eval" CONFIG_ARCH_BOARD_STM3220G_EVAL=y diff --git a/boards/arm/stm32/stm3220g-eval/configs/nsh/defconfig b/boards/arm/stm32/stm3220g-eval/configs/nsh/defconfig index 45e7aca47f1..fda167db310 100644 --- a/boards/arm/stm32/stm3220g-eval/configs/nsh/defconfig +++ b/boards/arm/stm32/stm3220g-eval/configs/nsh/defconfig @@ -9,6 +9,7 @@ # CONFIG_MMCSD_MMCSUPPORT is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="stm3220g-eval" CONFIG_ARCH_BOARD_STM3220G_EVAL=y diff --git a/boards/arm/stm32/stm3220g-eval/configs/nsh2/defconfig b/boards/arm/stm32/stm3220g-eval/configs/nsh2/defconfig index 25cbc3ad5eb..d2e5a0d204e 100644 --- a/boards/arm/stm32/stm3220g-eval/configs/nsh2/defconfig +++ b/boards/arm/stm32/stm3220g-eval/configs/nsh2/defconfig @@ -11,6 +11,7 @@ # CONFIG_NSH_CONSOLE is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="stm3220g-eval" CONFIG_ARCH_BOARD_STM3220G_EVAL=y diff --git a/boards/arm/stm32/stm3220g-eval/configs/nxwm/defconfig b/boards/arm/stm32/stm3220g-eval/configs/nxwm/defconfig index 4756ef1512f..edbf50416e0 100644 --- a/boards/arm/stm32/stm3220g-eval/configs/nxwm/defconfig +++ b/boards/arm/stm32/stm3220g-eval/configs/nxwm/defconfig @@ -14,6 +14,7 @@ # CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set # CONFIG_NX_DISABLE_16BPP is not set # CONFIG_NX_PACKEDMSFIRST is not set +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="stm3220g-eval" CONFIG_ARCH_BOARD_STM3220G_EVAL=y diff --git a/boards/arm/stm32/stm3220g-eval/configs/telnetd/defconfig b/boards/arm/stm32/stm3220g-eval/configs/telnetd/defconfig index 7ca6a50bbac..2e5e2387c10 100644 --- a/boards/arm/stm32/stm3220g-eval/configs/telnetd/defconfig +++ b/boards/arm/stm32/stm3220g-eval/configs/telnetd/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +# CONFIG_STM32_USE_LEGACY_PINMAP is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="stm3220g-eval" CONFIG_ARCH_BOARD_STM3220G_EVAL=y diff --git a/boards/arm/stm32/stm3220g-eval/include/board.h b/boards/arm/stm32/stm3220g-eval/include/board.h index b514e58fa55..86ebef53bb0 100644 --- a/boards/arm/stm32/stm3220g-eval/include/board.h +++ b/boards/arm/stm32/stm3220g-eval/include/board.h @@ -264,8 +264,8 @@ */ #ifdef CONFIG_STM32_USART3 -# define GPIO_USART3_RX GPIO_USART3_RX_2 -# define GPIO_USART3_TX GPIO_USART3_TX_2 +# define GPIO_USART3_RX (GPIO_USART3_RX_2|GPIO_SPEED_100MHz) +# define GPIO_USART3_TX (GPIO_USART3_TX_2|GPIO_SPEED_100MHz) #endif /* Ethernet: @@ -290,19 +290,32 @@ * - PG14 is ETH_MII_TXD1/ETH_RMII_TXD1 */ -#define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1 -#define GPIO_ETH_MII_CRS GPIO_ETH_MII_CRS_2 -#define GPIO_ETH_MII_COL GPIO_ETH_MII_COL_2 -#define GPIO_ETH_MII_RX_ER GPIO_ETH_MII_RX_ER_2 -#define GPIO_ETH_MII_RXD2 GPIO_ETH_MII_RXD2_2 -#define GPIO_ETH_MII_RXD3 GPIO_ETH_MII_RXD3_2 -#define GPIO_ETH_MII_TXD3 GPIO_ETH_MII_TXD3_1 -#define GPIO_ETH_MII_TX_EN GPIO_ETH_MII_TX_EN_2 -#define GPIO_ETH_MII_TXD0 GPIO_ETH_MII_TXD0_2 -#define GPIO_ETH_MII_TXD1 GPIO_ETH_MII_TXD1_2 -#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 -#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 -#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 +#define GPIO_MCO1 (GPIO_MCO1_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MDC (GPIO_ETH_MDC_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RX_CLK (GPIO_ETH_MII_RX_CLK_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RX_DV (GPIO_ETH_MII_RX_DV_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RXD0 (GPIO_ETH_MII_RXD0_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RXD1 (GPIO_ETH_MII_RXD1_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TX_CLK (GPIO_ETH_MII_TX_CLK_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TXD2 (GPIO_ETH_MII_TXD2_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0|GPIO_SPEED_100MHz) +#define GPIO_ETH_PPS_OUT (GPIO_ETH_PPS_OUT_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_CRS (GPIO_ETH_MII_CRS_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_COL (GPIO_ETH_MII_COL_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RX_ER (GPIO_ETH_MII_RX_ER_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RXD2 (GPIO_ETH_MII_RXD2_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_RXD3 (GPIO_ETH_MII_RXD3_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TXD3 (GPIO_ETH_MII_TXD3_1|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TX_EN (GPIO_ETH_MII_TX_EN_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TXD0 (GPIO_ETH_MII_TXD0_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_MII_TXD1 (GPIO_ETH_MII_TXD1_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2|GPIO_SPEED_100MHz) +#define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_2|GPIO_SPEED_100MHz) /* PWM * @@ -360,29 +373,29 @@ */ #if !defined(CONFIG_STM32_FSMC) -# define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 -# define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 -# define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_2 -# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_2 -# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_2 +# define GPIO_TIM4_CH2OUT (GPIO_TIM4_CH2OUT_2|GPIO_SPEED_50MHz) +# define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_2|GPIO_SPEED_50MHz) +# define GPIO_TIM1_CH2OUT (GPIO_TIM1_CH2OUT_2|GPIO_SPEED_50MHz) +# define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_2|GPIO_SPEED_50MHz) +# define GPIO_TIM1_CH4OUT (GPIO_TIM1_CH4OUT_2|GPIO_SPEED_50MHz) #elif !defined(CONFIG_STM32_OTGFS) -# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 -# define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_1 +# define GPIO_TIM1_CH3OUT (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz) +# define GPIO_TIM1_CH4OUT (GPIO_TIM1_CH4OUT_1|GPIO_SPEED_50MHz) #endif #if !defined(CONFIG_STM32_DCMI) -# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_2 -# define GPIO_TIM8_CH2OUT GPIO_TIM8_CH2OUT_2 -# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_2 +# define GPIO_TIM8_CH1OUT (GPIO_TIM8_CH1OUT_2|GPIO_SPEED_50MHz) +# define GPIO_TIM8_CH2OUT (GPIO_TIM8_CH2OUT_2|GPIO_SPEED_50MHz) +# define GPIO_TIM8_CH3OUT (GPIO_TIM8_CH3OUT_2|GPIO_SPEED_50MHz) #else -# define GPIO_TIM8_CH1OUT GPIO_TIM8_CH1OUT_1 +# define GPIO_TIM8_CH1OUT (GPIO_TIM8_CH1OUT_1|GPIO_SPEED_50MHz) # if !defined(CONFIG_STM32_SDIO) -# define GPIO_TIM8_CH3OUT GPIO_TIM8_CH3OUT_1 +# define GPIO_TIM8_CH3OUT (GPIO_TIM8_CH3OUT_1|GPIO_SPEED_50MHz) # endif #endif #if !defined(CONFIG_STM32_SDIO) -# define GPIO_TIM8_CH4OUT GPIO_TIM8_CH4OUT_1 +# define GPIO_TIM8_CH4OUT (GPIO_TIM8_CH4OUT_1|GPIO_SPEED_50MHz) #endif /* CAN @@ -406,11 +419,11 @@ * PB5 = ULPI_D7 & CAN2_RX */ -#define GPIO_CAN1_RX GPIO_CAN1_RX_3 -#define GPIO_CAN1_TX GPIO_CAN1_TX_3 +#define GPIO_CAN1_RX (GPIO_CAN1_RX_3|GPIO_SPEED_50MHz) +#define GPIO_CAN1_TX (GPIO_CAN1_TX_3|GPIO_SPEED_50MHz) -#define GPIO_CAN2_RX GPIO_CAN2_RX_2 -#define GPIO_CAN2_TX GPIO_CAN2_TX_1 +#define GPIO_CAN2_RX (GPIO_CAN2_RX_2|GPIO_SPEED_50MHz) +#define GPIO_CAN2_TX (GPIO_CAN2_TX_1|GPIO_SPEED_50MHz) /* I2C. * Only I2C1 is available on the STM3220G-EVAL. I2C1_SCL and I2C1_SDA are @@ -420,8 +433,68 @@ * - PB9 is I2C1_SDA */ -#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 -#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 +#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_1|GPIO_SPEED_50MHz) +#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz) + +/* SDIO */ + +#define GPIO_SDIO_CK (GPIO_SDIO_CK_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_CMD (GPIO_SDIO_CMD_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D0 (GPIO_SDIO_D0_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D1 (GPIO_SDIO_D1_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D2 (GPIO_SDIO_D2_0|GPIO_SPEED_50MHz) +#define GPIO_SDIO_D3 (GPIO_SDIO_D3_0|GPIO_SPEED_50MHz) + +/* FSMC (LCD/SRAM) */ + +#define GPIO_FSMC_NOE (GPIO_FSMC_NOE_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_NWE (GPIO_FSMC_NWE_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_NE2 (GPIO_FSMC_NE2_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_NE3 (GPIO_FSMC_NE3_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_NBL0 (GPIO_FSMC_NBL0_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_NBL1 (GPIO_FSMC_NBL1_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A0 (GPIO_FSMC_A0_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A1 (GPIO_FSMC_A1_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A2 (GPIO_FSMC_A2_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A3 (GPIO_FSMC_A3_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A4 (GPIO_FSMC_A4_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A5 (GPIO_FSMC_A5_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A6 (GPIO_FSMC_A6_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A7 (GPIO_FSMC_A7_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A8 (GPIO_FSMC_A8_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A9 (GPIO_FSMC_A9_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A10 (GPIO_FSMC_A10_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A11 (GPIO_FSMC_A11_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A12 (GPIO_FSMC_A12_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A13 (GPIO_FSMC_A13_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A14 (GPIO_FSMC_A14_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A15 (GPIO_FSMC_A15_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A16 (GPIO_FSMC_A16_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A17 (GPIO_FSMC_A17_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A18 (GPIO_FSMC_A18_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A19 (GPIO_FSMC_A19_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A20 (GPIO_FSMC_A20_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A21 (GPIO_FSMC_A21_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A22 (GPIO_FSMC_A22_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A23 (GPIO_FSMC_A23_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A24 (GPIO_FSMC_A24_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_A25 (GPIO_FSMC_A25_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D0 (GPIO_FSMC_D0_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D1 (GPIO_FSMC_D1_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D2 (GPIO_FSMC_D2_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D3 (GPIO_FSMC_D3_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D4 (GPIO_FSMC_D4_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D5 (GPIO_FSMC_D5_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D6 (GPIO_FSMC_D6_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D7 (GPIO_FSMC_D7_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D8 (GPIO_FSMC_D8_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D9 (GPIO_FSMC_D9_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D10 (GPIO_FSMC_D10_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D11 (GPIO_FSMC_D11_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D12 (GPIO_FSMC_D12_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D13 (GPIO_FSMC_D13_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D14 (GPIO_FSMC_D14_0|GPIO_SPEED_100MHz) +#define GPIO_FSMC_D15 (GPIO_FSMC_D15_0|GPIO_SPEED_100MHz) /* DMA Channel/Stream Selections ********************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c index d41fe1e0a59..45603a50da5 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c @@ -32,6 +32,7 @@ #include "chip.h" #include "arm_internal.h" #include "stm32.h" +#include #include "stm3220g-eval.h" #ifdef CONFIG_STM32_FSMC diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_selectsram.c b/boards/arm/stm32/stm3220g-eval/src/stm32_selectsram.c index ba72bf0454c..5c1553a1aa4 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_selectsram.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_selectsram.c @@ -32,6 +32,7 @@ #include "chip.h" #include "arm_internal.h" #include "stm32.h" +#include #include "stm3220g-eval.h" #ifdef CONFIG_STM32_FSMC