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Fix a optimization related problem in the LM3S

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4907 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2012-07-04 22:11:31 +00:00
parent 8bee8ebfce
commit 1dd5db0742
3 changed files with 4 additions and 4 deletions
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configs/ekk-lm3s9b96/README.txt
+1 -1
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@@ -268,7 +268,7 @@ Stellaris EKK-LM3S9B96 Evaluation Kit Configuration Options
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case): CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_DRAM_SIZE=0x00010000 (64Kb) CONFIG_DRAM_SIZE=0x00018000 (96Kb)
CONFIG_DRAM_START - The start address of installed DRAM CONFIG_DRAM_START - The start address of installed DRAM
configs/ekk-lm3s9b96/src/up_boot.c
+1 -1
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@@ -72,7 +72,7 @@
void lm3s_boardinitialize(void) void lm3s_boardinitialize(void)
{ {
/* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function /* Configure chip selects if 1) SSI is not disabled, and 2) the weak function
* lm3s_ssiinitialize() has been brought into the link. * lm3s_ssiinitialize() has been brought into the link.
*/ */
configs/ekk-lm3s9b96/src/up_ssi.c
+2 -2
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@@ -99,13 +99,13 @@
* Name: lm3s_ssiinitialize * Name: lm3s_ssiinitialize
* *
* Description: * Description:
* Called to configure SPI chip select GPIO pins for the LM3S6965 Eval Kit. * Called to configure chip select GPIO pins for the LM3S9B96 Eval board.
* *
************************************************************************************/ ************************************************************************************/
void weak_function lm3s_ssiinitialize(void) void weak_function lm3s_ssiinitialize(void)
{ {
/* Configure the SPI CS GPIO */ /* Configure the CS GPIO */
#if 0 #if 0
ssi_dumpgpio("lm3s_ssiinitialize() Entry"); ssi_dumpgpio("lm3s_ssiinitialize() Entry");
ssi_dumpgpio("lm3s_ssiinitialize() Exit"); ssi_dumpgpio("lm3s_ssiinitialize() Exit");