diff --git a/arch/arm/src/stm32/stm32_lowputc.c b/arch/arm/src/stm32/stm32_lowputc.c index fe6f513867c..4d752796253 100644 --- a/arch/arm/src/stm32/stm32_lowputc.c +++ b/arch/arm/src/stm32/stm32_lowputc.c @@ -162,9 +162,9 @@ #define STM32_USARTDIV32 (STM32_APBCLOCK / (STM32_CONSOLE_BAUD >> 1)) -/* The mantissa is then usartdiv32 * 32: +/* The mantissa is then usartdiv32 / 32: * - * mantissa = 32 * usartdiv32 + * mantissa = usartdiv32 / 32/ * * Eg. usartdiv32=1250, mantissa = 39 */ @@ -247,7 +247,7 @@ void stm32_lowsetup(void) uint32_t cr; #endif - /* Enable the selected USARTs and configure GPIO pins need byed the + /* Enable the selected USARTs and configure GPIO pins need by the * the selected USARTs. NOTE: The serial driver later depends on * this pin configuration -- whether or not a serial console is selected. * diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index a529285f451..7255ef491fa 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -425,8 +425,8 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) static int up_setup(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; -#ifdef CONFIG_SUPPRESS_UART_CONFIG - uint32_t uartdiv32; +#ifndef CONFIG_SUPPRESS_UART_CONFIG + uint32_t usartdiv32; uint32_t mantissa; uint32_t fraction; uint32_t brr; @@ -483,7 +483,7 @@ static int up_setup(struct uart_dev_s *dev) /* Configure hardware flow control -- Not yet supported */ - up_serialout(priv, STM32_USART_CR1_OFFSET, regval); + up_serialout(priv, STM32_USART_CR3_OFFSET, regval); /* Configure the USART Baud Rate. The baud rate for the receiver and * transmitter (Rx and Tx) are both set to the same value as programmed @@ -521,7 +521,7 @@ static int up_setup(struct uart_dev_s *dev) up_serialout(priv, STM32_USART_CR1_OFFSET, regval); #endif - /* Set up the cache interrupt enables value */ + /* Set up the cached interrupt enables value */ priv->ie = 0; return OK;