From 1b39aff8b4ec8e34af985be58b5faf1f16eef02e Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 15 May 2014 11:41:58 -0600
Subject: [PATCH] SAM4E GPIO:  Fix some compile errors when CONFIG_DEBUG_GPIO
 is enabled

---
 ChangeLog                     |  3 +++
 arch/arm/src/sam34/sam_gpio.c | 10 ++++------
 configs/sam4e-ek/README.txt   |  5 +++++
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 80d1c1b17bc..fc8659cf6d8 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -7338,3 +7338,6 @@
 	* arch/arm/src/stm32/stm32_i2c_alt.c: Add an alternative I2C implementation
 	  for the STM32 F03 that works around errata in that part.  From Patrizio
 	  Simona (2014-5-14).
+	* arch/arm/src/sam34/sam_gpio.c:  Fix some SAM4E compiler errors when
+	  CONFIG_DEBUG_GPIO is enabled (2014-5-15).
+
diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c
index da581eed19f..917567807bf 100644
--- a/arch/arm/src/sam34/sam_gpio.c
+++ b/arch/arm/src/sam34/sam_gpio.c
@@ -376,9 +376,9 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
 int sam_configgpio(gpio_pinset_t cfgset)
 {
   uintptr_t base = sam_gpiobase(cfgset);
-  uint32_t  pin  = sam_gpiopin(cfgset);
+  uint32_t pin   = sam_gpiopin(cfgset);
   irqstate_t flags;
-  int       ret;
+  int ret;
 
   /* Disable interrupts to prohibit re-entrance. */
 
@@ -484,12 +484,10 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
   uintptr_t     base;
-  unsigned int  pin;
   unsigned int  port;
 
   /* Get the base address associated with the PIO port */
 
-  pin  = sam_gpiopin(pinset);
   port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   base = SAM_PION_BASE(port);
 
@@ -511,7 +509,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
 #elif defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
   lldbg(" ABCDSR: %08x %08x         IFSCSR: %08x  PPDSR: %08x\n",
         getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
-        getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIOC_PPDSR));
+        getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
 #endif
   lldbg("   PUSR: %08x   SCDR: %08x   OWSR: %08x  AIMMR: %08x\n",
         getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
@@ -528,7 +526,7 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
         getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
 #ifdef CONFIG_ARCH_CHIP_SAM4E
   lldbg("SCHMITT: %08x DELAYR:%08x\n",
-        getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DELAY_OFFSET));
+        getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DELAYR_OFFSET));
 #else
   lldbg("SCHMITT: %08x\n",
         getreg32(base + SAM_PIO_SCHMITT_OFFSET));
diff --git a/configs/sam4e-ek/README.txt b/configs/sam4e-ek/README.txt
index 44fec94e45a..4e53692099d 100644
--- a/configs/sam4e-ek/README.txt
+++ b/configs/sam4e-ek/README.txt
@@ -1440,7 +1440,12 @@ Configurations
                      only discusses PDC-based HSMCI DMA (although there is
                      a DMA channel interface definition for HSMCI).  So
                      this is effort is dead-in-the-water for now.
+         2014-05-15: The HSCMCI driver has been recently updated to support
+                     PCD DMA.  That modified driver, however, has not yet
+                     been tested with the SAM4E-EK
+
          2014-05-14: The touchscreen interface was successfully verified.
+
          2014-05-14: The LCD interface is fully implemented.  However,
                      there is still a bug in in the LCD communications.  The
                      LCD ID is read as 0x0000 instead of 0x9325.