Add framework for z180 SCC driver

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5436 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2012-12-14 15:32:26 +00:00
parent 91daac1b7d
commit 1a24e2be3e
7 changed files with 1402 additions and 24 deletions
+324 -2
View File
@@ -142,12 +142,334 @@ menu "Z180 Peripheral Support"
config Z180_UART0 config Z180_UART0
bool "UART0" bool "UART0"
default n default n
select ARCH_HAVE_UART0 ---help---
Select to enable a serial port on UART0. On the Z8x182, bits 0-4 of
port B will not be available if ASCI channel 0 is selected.
config Z180_UART1 config Z180_UART1
bool "UART1" bool "UART1"
default n default n
select ARCH_HAVE_UART1 ---help---
Select to enable a serial port on UART1. On the Z8x182, bits 5-7 of
port B will not be available if ASCI channel 0 is selected.
config Z180_SCC
bool "SCC"
default n
depends on ARCH_CHIP_Z8L181
---help---
Select to enable a serial port on the SCC
config Z180_ESCCA
bool "ESCC Channel A"
default n
depends on ARCH_CHIP_Z8L182 && !Z180_PORTC
---help---
Select to enable a serial port on ESCC Channel A. Not available
if port C is selected.
config Z180_ESCCB
bool "ESCC Channel B"
default n
depends on ARCH_CHIP_Z8L182 && !Z180_MIMIC
---help---
Select to enable a serial port on ESCC Channel B
config Z180_TMR1
bool "Timer 1"
default n
---help---
Select to enable a Timer 1 (Timer 0 is used by NuttX as the system timer)
# config Z180_DMA0
# bool "DMA0"
# default n
# ---help---
# Select to enable support for DMA0
#
# config Z180_DMA1
# bool "DMA1"
# default n
# ---help---
# Select to enable support for DMA1
config Z180_PORTA
bool "PORT A"
default n
depends on ARCH_CHIP_Z8L181 || ARCH_CHIP_Z8L182 || !Z180_CTC
---help---
Select to enable a Port A (called PIA1 on the Z8x181)
config Z180_PORTB
bool "PORT B"
default n
depends on ARCH_CHIP_Z8L181 || ARCH_CHIP_Z8L182
---help---
Select to enable a Port B (called PIA2 on the Z8x181). On the Z8x182,
Bits 5-7 will not be available if ASCI channel 1 is used; Bits 0-4 will
not be available if ASCI channel 0 is used.
config Z180_PORTC
bool "PORT C"
default n
depends on ARCH_CHIP_Z8L182 && !Z180_ESCCA
---help---
Select to enable a Port C. Not available if ESCC channel A is selected.
config Z180_CTC
bool "CTC"
default n
depends on ARCH_CHIP_Z8L181
---help---
Select to enable the Counter/Timer (CTC)
config Z180_MIMIC
bool "16550 MIMIC"
default n
depends on ARCH_CHIP_Z8L182 && !Z180_ESCCB
---help---
Select to enable the 16550 MIMIC
endmenu
choice
prompt "Serial console"
default NO_SERIAL_CONSOLE
config Z180_UART0_SERIAL_CONSOLE
bool "UART0"
depends on Z180_UART0
config Z180_UART1_SERIAL_CONSOLE
bool "UART1"
depends on Z180_UART1
config Z180_SCC_SERIAL_CONSOLE
bool "SCC"
depends on Z180_SCC
config Z180_ESCCA_SERIAL_CONSOLE
bool "ESCC Channel A"
depends on Z180_ESCCA
config Z180_ESCCB_SERIAL_CONSOLE
bool "ESCC Channel B"
depends on Z180_ESCCB
endchoice
menu "UART0 Configuration"
depends on Z180_UART0
config Z180_UART0_RXBUFSIZE
int "Receive Buffer Size"
default 64
help
Characters are buffered as they are received. This specifies
the size of the receive buffer.
config Z180_UART0_TXBUFSIZE
int "Transmit Buffer Size"
default 64
help
Characters are buffered before being sent. This specifies
the size of the transmit buffer.
config Z180_UART0_BAUD
int "Baud Rate"
default 9600
help
The configured BAUD of the SCC.
config Z180_UART0_BITS
int "Character Size"
default 8
help
The number of bits in one character. Must be either 5, 6, 7, or 8.
config Z180_UART0_PARITY
int "Parity Setting"
default 0
help
0=no parity, 1=odd parity, 2=even parity
config Z180_UART0_2STOP
int "use 2 stop bits"
default 0
help
1=Two stop bits
endmenu
menu "UART1 Configuration"
depends on Z180_UART1
config Z180_UART1_RXBUFSIZE
int "Receive Buffer Size"
default 64
help
Characters are buffered as they are received. This specifies
the size of the receive buffer.
config Z180_UART1_TXBUFSIZE
int "Transmit Buffer Size"
default 64
help
Characters are buffered before being sent. This specifies
the size of the transmit buffer.
config Z180_UART1_BAUD
int "Baud Rate"
default 9600
help
The configured BAUD of the SCC.
config Z180_UART1_BITS
int "Character Size"
default 8
help
The number of bits in one character. Must be either 5, 6, 7, or 8.
config Z180_UART1_PARITY
int "Parity Setting"
default 0
help
0=no parity, 1=odd parity, 2=even parity
config Z180_UART1_2STOP
int "use 2 stop bits"
default 0
help
1=Two stop bits
endmenu
menu "SCC Configuration"
depends on Z180_SCC
config Z180_SCC_RXBUFSIZE
int "Receive Buffer Size"
default 64
help
Characters are buffered as they are received. This specifies
the size of the receive buffer.
config Z180_SCC_TXBUFSIZE
int "Transmit Buffer Size"
default 64
help
Characters are buffered before being sent. This specifies
the size of the transmit buffer.
config Z180_SCC_BAUD
int "Baud Rate"
default 9600
help
The configured BAUD of the SCC.
config Z180_SCC_BITS
int "Character Size"
default 8
help
The number of bits in one character. Must be either 5, 6, 7, or 8.
config Z180_SCC_PARITY
int "Parity Setting"
default 0
help
0=no parity, 1=odd parity, 2=even parity
config Z180_SCC_2STOP
int "use 2 stop bits"
default 0
help
1=Two stop bits
endmenu
menu "ESCC Channel A Configuration"
depends on Z180_ESCCA
config Z180_ESCCA_RXBUFSIZE
int "Receive Buffer Size"
default 64
help
Characters are buffered as they are received. This specifies
the size of the receive buffer.
config Z180_ESCCA_TXBUFSIZE
int "Transmit Buffer Size"
default 64
help
Characters are buffered before being sent. This specifies
the size of the transmit buffer.
config Z180_ESCCA_BAUD
int "Baud Rate"
default 9600
help
The configured BAUD of the SCC.
config Z180_ESCCA_BITS
int "Character Size"
default 8
help
The number of bits in one character. Must be either 5, 6, 7, or 8.
config Z180_ESCCA_PARITY
int "Parity Setting"
default 0
help
0=no parity, 1=odd parity, 2=even parity
config Z180_ESCCA_2STOP
int "use 2 stop bits"
default 0
help
1=Two stop bits
endmenu
menu "ESCC Channel B Configuration"
depends on Z180_ESCCB
config Z180_ESCCB_RXBUFSIZE
int "Receive Buffer Size"
default 64
help
Characters are buffered as they are received. This specifies
the size of the receive buffer.
config Z180_ESCCB_TXBUFSIZE
int "Transmit Buffer Size"
default 64
help
Characters are buffered before being sent. This specifies
the size of the transmit buffer.
config Z180_ESCCB_BAUD
int "Baud Rate"
default 9600
help
The configured BAUD of the SCC.
config Z180_ESCCB_BITS
int "Character Size"
default 8
help
The number of bits in one character. Must be either 5, 6, 7, or 8.
config Z180_ESCCB_PARITY
int "Parity Setting"
default 0
help
0=no parity, 1=odd parity, 2=even parity
config Z180_ESCCB_2STOP
int "use 2 stop bits"
default 0
help
1=Two stop bits
endmenu endmenu
endif endif
+6 -6
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@@ -41,14 +41,14 @@ HEAD_ASRC = z180_head.asm
endif endif
endif endif
CMN_ASRCS = CMN_ASRCS =
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_createstack.c CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_createstack.c
CMN_CSRCS += up_doirq.c up_exit.c up_idle.c up_initialize.c CMN_CSRCS += up_doirq.c up_exit.c up_idle.c up_initialize.c
CMN_CSRCS += up_interruptcontext.c up_mdelay.c up_releasepending.c CMN_CSRCS += up_interruptcontext.c up_mdelay.c up_releasepending.c
CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_unblocktask.c CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_unblocktask.c
CMN_CSRCS += up_udelay.c up_usestack.c CMN_CSRCS += up_udelay.c up_usestack.c
CHIP_ASRCS = z180_restoreusercontext.asm z180_saveusercontext.asm CHIP_ASRCS = z180_restoreusercontext.asm z180_saveusercontext.asm
CHIP_ASRCS += z180_vectcommon.asm CHIP_ASRCS += z180_vectcommon.asm
ifeq ($(CONFIG_LINKER_ROM_AT_0000),y) ifeq ($(CONFIG_LINKER_ROM_AT_0000),y)
@@ -57,6 +57,6 @@ else
CHIP_ASRCS += z180_vectors.asm CHIP_ASRCS += z180_vectors.asm
endif endif
CHIP_CSRCS = z180_copystate.c z180_initialstate.c z180_io.c z180_irq.c CHIP_CSRCS = z180_copystate.c z180_initialstate.c z180_io.c z180_irq.c
CHIP_CSRCS += z180_mmu.c z180_registerdump.c z180_schedulesigaction.c CHIP_CSRCS += z180_modifiyreg8.c z180_mmu.c z180_registerdump.c
CHIP_CSRCS += z180_sigdeliver.c CHIP_CSRCS += z180_schedulesigaction.c z180_sigdeliver.c
+140
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@@ -0,0 +1,140 @@
/************************************************************************************
* arch/z80/src/z180/z180_config.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_Z80_SRC_Z180_Z180_CONFIG_H
#define __ARCH_Z80_SRC_Z180_Z180_CONFIG_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <arch/z180/chip.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Verify that selected features match the capability of the selected CPU */
#ifndef HAVE_Z8X181
# undef CONFIG_Z180_SCC
# undef CONFIG_Z180_CTC
#endif
#ifndef HAVE_Z8X182
# undef CONFIG_Z180_ESCCA
# undef CONFIG_Z180_ESCCB
# undef CONFIG_Z180_PORTC
# undef CONFIG_Z180_MIMIC
#endif
#if !defined(HAVE_Z8X181) && !defined(HAVE_Z8X182)
# undef CONFIG_Z180_PORTA
# undef CONFIG_Z180_PORTB
#endif
/* Are any UARTs enabled? */
#undef HAVE_SERIAL
#if defined(CONFIG_Z180_UART0) || defined(CONFIG_Z180_UART1) || \
defined(CONFIG_Z180_SCC) || defined(CONFIG_Z180_ESCCA) || \
defined(CONFIG_Z180_ESCCB)
# define HAVE_SERIAL 1
#endif
/* Make sure all features are disabled for disabled UARTs/[E]SCC channels. This
* simplifies checking later.
*/
#ifndef CONFIG_Z180_UART0
# undef CONFIG_Z180_UART0_SERIAL_CONSOLE
#endif
#ifndef CONFIG_Z180_UART1
# undef CONFIG_Z180_UART1_SERIAL_CONSOLE
#endif
#ifndef CONFIG_Z180_SCC
# undef CONFIG_SCC_SERIAL_CONSOLE
#endif
#ifndef CONFIG_Z180_ESCCA
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
#endif
#ifndef CONFIG_Z180_ESCCA
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
#endif
/* Is there a serial console? There should be at most one defined. */
#if defined(CONFIG_Z180_UART0_SERIAL_CONSOLE)
# undef CONFIG_Z180_UART1_SERIAL_CONSOLE
# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_Z180_UART1_SERIAL_CONSOLE)
# undef CONFIG_Z180_SCC_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_Z180_ESCC_SERIAL_CONSOLE)
# undef CONFIG_Z180_ESCCA_SERIAL_CONSOLE
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_Z180_ESCCA_SERIAL_CONSOLE)
# undef CONFIG_Z180_ESCCB_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
# define HAVE_SERIAL_CONSOLE 1
#else
# undef HAVE_SERIAL_CONSOLE
#endif
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_Z80_SRC_Z180_Z180_CONFIG_H */
+18 -16
View File
@@ -106,24 +106,26 @@
/* DMA Registers */ /* DMA Registers */
#define Z180_DMA_SAR0L (SFR_OFFSET+0x20) /* DMA Source Address Register Ch 0L */ #define Z180_DMA0_SARL (SFR_OFFSET+0x20) /* DMA Source Address Register Ch 0L */
#define Z180_DMA_SAR0H (SFR_OFFSET+0x21) /* DMA Source Address Register Ch 0H */ #define Z180_DMA0_SARH (SFR_OFFSET+0x21) /* DMA Source Address Register Ch 0H */
#define Z180_DMA_SAR0B (SFR_OFFSET+0x22) /* DMA Source Address Register Ch 0B */ #define Z180_DMA0_SARB (SFR_OFFSET+0x22) /* DMA Source Address Register Ch 0B */
#define Z180_DMA_DAR0L (SFR_OFFSET+0x23) /* DMA Destination Address Register Ch 0L */ #define Z180_DMA0_DARL (SFR_OFFSET+0x23) /* DMA Destination Address Register Ch 0L */
#define Z180_DMA_DAR0H (SFR_OFFSET+0x24) /* DMA Destination Address Register Ch 0H */ #define Z180_DMA0_DARH (SFR_OFFSET+0x24) /* DMA Destination Address Register Ch 0H */
#define Z180_DMA_DAR0B (SFR_OFFSET+0x25) /* DMA Destination Address Register Ch 0B */ #define Z180_DMA0_DARB (SFR_OFFSET+0x25) /* DMA Destination Address Register Ch 0B */
#define Z180_DMA_BCR0L (SFR_OFFSET+0x26) /* DMA Byte Count Register Ch 0L */ #define Z180_DMA0_BCRL (SFR_OFFSET+0x26) /* DMA Byte Count Register Ch 0L */
#define Z180_DMA_BCR0H (SFR_OFFSET+0x27) /* DMA Byte Count Register Ch 0H */ #define Z180_DMA0_BCRH (SFR_OFFSET+0x27) /* DMA Byte Count Register Ch 0H */
#define Z180_DMA_MAR1L (SFR_OFFSET+0x28) /* DMA Memory Address Register Ch 1L */
#define Z180_DMA_MAR1H (SFR_OFFSET+0x29) /* DMA Memory Address Register Ch 1H */ #define Z180_DMA1_MARL (SFR_OFFSET+0x28) /* DMA Memory Address Register Ch 1L */
#define Z180_DMA_MAR1B (SFR_OFFSET+0x2a) /* DMA Memory Address Register Ch 1B */ #define Z180_DMA1_MARH (SFR_OFFSET+0x29) /* DMA Memory Address Register Ch 1H */
#define Z180_DMA_IAR1L (SFR_OFFSET+0x2b) /* DMA I/0 Address Register Ch 1L */ #define Z180_DMA1_MARB (SFR_OFFSET+0x2a) /* DMA Memory Address Register Ch 1B */
#define Z180_DMA_IAR1H (SFR_OFFSET+0x2c) /* DMA I/0 Address Register Ch 1H */ #define Z180_DMA1_IARL (SFR_OFFSET+0x2b) /* DMA I/0 Address Register Ch 1L */
#define Z180_DMA1_IARH (SFR_OFFSET+0x2c) /* DMA I/0 Address Register Ch 1H */
#ifdef HAVE_Z8S180 /* Z8S180/Z8L180 class processors */ #ifdef HAVE_Z8S180 /* Z8S180/Z8L180 class processors */
# define Z180_DMA_IAR1B (SFR_OFFSET+0x2d) /* DMA I/O Address Register Ch 1B */ # define Z180_DMA1_IARB (SFR_OFFSET+0x2d) /* DMA I/O Address Register Ch 1B */
#endif #endif
#define Z180_DMA_BCR1L (SFR_OFFSET+0x2e) /* DMA Byte Count Register Ch 1L */ #define Z180_DMA1_BCRL (SFR_OFFSET+0x2e) /* DMA Byte Count Register Ch 1L */
#define Z180_DMA_BCR1H (SFR_OFFSET+0x2f) /* DMA Byte Count Register Ch 1H */ #define Z180_DMA1_BCRH (SFR_OFFSET+0x2f) /* DMA Byte Count Register Ch 1H */
#define Z180_DMA_DSTAT (SFR_OFFSET+0x30) /* DMA Status Register */ #define Z180_DMA_DSTAT (SFR_OFFSET+0x30) /* DMA Status Register */
#define Z180_DMA_DMODE (SFR_OFFSET+0x31) /* DMA Mode Register */ #define Z180_DMA_DMODE (SFR_OFFSET+0x31) /* DMA Mode Register */
#define Z180_DMA_DCNTL (SFR_OFFSET+0x32) /* DMA/WAIT Control Register */ #define Z180_DMA_DCNTL (SFR_OFFSET+0x32) /* DMA/WAIT Control Register */
+135
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@@ -0,0 +1,135 @@
/****************************************************************************
* arch/z80/src/z180/z180_loweruart.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include "chip/chip.h"
#include "common/up_internal.h"
#include "z80_config.h"
#ifdef USE_LOWUARTINIT
/****************************************************************************
* Private Definitions
****************************************************************************/
/* Select UART parameters for the selected console */
#if defined(CONFIG_Z180_SCC_SERIAL_CONSOLE)
# define CONSOLE_CR Z181_SCC_CR
# define CONSOLE_DR Z181_SCC_DR
# define CONSOLE_BAUD CONFIG_Z180_SCC_BAUD
# define CONSOLE_BITS CONFIG_Z180_SCC_BITS
# define CONSOLE_2STOP CONFIG_Z180_SCC_2STOP
# define CONSOLE_PARITY CONFIG_Z180_SCC_PARITY
#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
# define CONSOLE_CR Z182_ESCCA_CR
# define CONSOLE_DR Z182_ESCCA_DR
# define CONSOLE_BAUD CONFIG_Z180_ESCCA_BAUD
# define CONSOLE_BITS CONFIG_Z180_ESCCA_BITS
# define CONSOLE_2STOP CONFIG_Z180_ESCCA_2STOP
# define CONSOLE_PARITY CONFIG_Z180_ESCCA_PARITY
#elif defined(CONFIG_Z180_ESCCB_SERIAL_CONSOLE)
# define CONSOLE_CR Z182_ESCCB_CR
# define CONSOLE_DR Z182_ESCCB_DR
# define CONSOLE_BAUD CONFIG_Z180_ESCCB_BAUD
# define CONSOLE_BITS CONFIG_Z180_ESCCB_BITS
# define CONSOLE_PARITY CONFIG_Z180_ESCCB_PARITY
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
static void z180_setbaud(void)
{
#warning "Missing logic"
}
#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_lowuartinit
****************************************************************************/
void up_lowuartinit(void)
{
#ifdef HAVE_SERIAL
#warning "Missing logic"
/* Configure for usage of {E]SCC channels (whether or not we have a console) */
#ifdef CONFIG_Z180_SCC
#warning "Missing logic"
#endif
#ifdef CONFIG_Z180_ESCCA
#warning "Missing logic"
#endif
#ifdef CONFIG_Z180_ESCCB
#warning "Missing logic"
#endif
/* Configure the console for immediate usage */
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
#warning "Missing logic"
#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
#endif /* HAVE_SERIAL */
}
#endif /* USE_LOWUARTINIT */
+82
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@@ -0,0 +1,82 @@
/****************************************************************************
* arch/arm/src/common/up_modifyreg8.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include <arch/io.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: modifyreg8
*
* Description:
* Atomically modify the specified bits in a I/O register
*
****************************************************************************/
void modifyreg8(uint16_t addr, uint8_t clearbits, uint8_t setbits)
{
irqstate_t flags;
uint8_t regval;
flags = irqsave();
regval = inp(addr);
regval &= ~clearbits;
regval |= setbits;
outp(regval, addr);
irqrestore(flags);
}
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