Fixes to get USB working on STM32 F3

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5638 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2013-02-10 23:31:11 +00:00
parent 57be52caf1
commit 19fcd020d7
4 changed files with 284 additions and 252 deletions
+12 -5
View File
@@ -56,8 +56,10 @@
/************************************************************************** /**************************************************************************
* Private Definitions * Private Definitions
**************************************************************************/ **************************************************************************/
/* Select USART parameters for the selected console */ /* Select USART parameters for the selected console */
#ifdef HAVE_CONSOLE
# if defined(CONFIG_USART1_SERIAL_CONSOLE) # if defined(CONFIG_USART1_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_USART1_BASE # define STM32_CONSOLE_BASE STM32_USART1_BASE
# define STM32_APBCLOCK STM32_PCLK2_FREQUENCY # define STM32_APBCLOCK STM32_PCLK2_FREQUENCY
@@ -143,6 +145,7 @@
# define STM32_CONSOLE_RS485_DIR_POLARITY true # define STM32_CONSOLE_RS485_DIR_POLARITY true
# endif # endif
# endif # endif
# elif defined(CONFIG_USART6_SERIAL_CONSOLE) # elif defined(CONFIG_USART6_SERIAL_CONSOLE)
# define STM32_CONSOLE_BASE STM32_USART6_BASE # define STM32_CONSOLE_BASE STM32_USART6_BASE
# define STM32_APBCLOCK STM32_PCLK2_FREQUENCY # define STM32_APBCLOCK STM32_PCLK2_FREQUENCY
@@ -265,7 +268,7 @@
((STM32_USARTDIV8 & 0xfff0) | ((STM32_USARTDIV8 & 0x000f) >> 1)) ((STM32_USARTDIV8 & 0xfff0) | ((STM32_USARTDIV8 & 0x000f) >> 1))
# endif # endif
#else # else /* CONFIG_STM32_STM32F30XX */
/* The baud rate for the receiver and transmitter (Rx and Tx) are both set /* The baud rate for the receiver and transmitter (Rx and Tx) are both set
* to the same value as programmed in the Mantissa and Fraction values of * to the same value as programmed in the Mantissa and Fraction values of
@@ -312,7 +315,9 @@
# define STM32_BRR_VALUE \ # define STM32_BRR_VALUE \
((STM32_MANTISSA << USART_BRR_MANT_SHIFT) | \ ((STM32_MANTISSA << USART_BRR_MANT_SHIFT) | \
(STM32_FRACTION << USART_BRR_FRAC_SHIFT)) (STM32_FRACTION << USART_BRR_FRAC_SHIFT))
#endif
# endif /* CONFIG_STM32_STM32F30XX */
#endif /* HAVE_CONSOLE */
/************************************************************************** /**************************************************************************
* Private Types * Private Types
@@ -365,7 +370,7 @@ void up_lowputc(char ch)
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY); stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY);
#endif #endif
#endif #endif /* HAVE_CONSOLE */
} }
/************************************************************************** /**************************************************************************
@@ -503,7 +508,8 @@ void stm32_lowsetup(void)
cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
cr |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE); cr |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE);
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
#endif
#endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
#endif /* HAVE_UART */ #endif /* HAVE_UART */
} }
@@ -573,7 +579,8 @@ void stm32_lowsetup(void)
cr |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE); cr |= (USART_CR1_UE|USART_CR1_TE|USART_CR1_RE);
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
#endif
#endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
#endif /* HAVE_UART */ #endif /* HAVE_UART */
} }
+4 -4
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@@ -84,13 +84,13 @@
#ifdef CONFIG_STM32_STM32F30XX #ifdef CONFIG_STM32_STM32F30XX
# ifdef CONFIG_STM32_USB_ITRMP # ifdef CONFIG_STM32_USB_ITRMP
# define STM32_IRQ_USBHP STM32_IRQ_USBHP_1
# define STM32_IRQ_USBLP STM32_IRQ_USBLP_1
# define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_1
# else
# define STM32_IRQ_USBHP STM32_IRQ_USBHP_2 # define STM32_IRQ_USBHP STM32_IRQ_USBHP_2
# define STM32_IRQ_USBLP STM32_IRQ_USBLP_2 # define STM32_IRQ_USBLP STM32_IRQ_USBLP_2
# define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_2 # define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_2
# else
# define STM32_IRQ_USBHP STM32_IRQ_USBHP_1
# define STM32_IRQ_USBLP STM32_IRQ_USBLP_1
# define STM32_IRQ_USBWKUP STM32_IRQ_USBWKUP_1
# endif # endif
#endif #endif
+25 -5
View File
@@ -776,11 +776,20 @@ Where <subdir> is one of the following:
sercon : Connect the serial device a create /dev/ttyACM0 sercon : Connect the serial device a create /dev/ttyACM0
serdis : Disconnect the serial device. serdis : Disconnect the serial device.
NOTE: I don't expect there serial connections/disconnections to work NOTE: The serial connections/disconnections do not work as advertised.
well. the STM32F3Discovery board does not provide circuitry for This is because the STM32F3Discovery board does not provide circuitry for
control for the "soft connect" USB pullup. As a result, the host PC control of the "soft connect" USB pullup. As a result, the host PC
may not know when the USB has been logically connected or disconnected does not know the USB has been logically connected or disconnected. You
and may not re-enumerate the device. have to follow these steps to use USB:
1) Start NSH with USB disconnected
2) enter to 'sercon' command to start the CDC/ACM device, then
3) Connect the USB device to the host.
and to close the connection:
4) Disconnect the USB device from the host
5) Enter the 'serdis' command
4. This example can support the watchdog timer test (apps/examples/watchdog) 4. This example can support the watchdog timer test (apps/examples/watchdog)
but this must be enabled by selecting: but this must be enabled by selecting:
@@ -807,6 +816,9 @@ Where <subdir> is one of the following:
Such a configuration is useful on the stm32f3discovery which has no Such a configuration is useful on the stm32f3discovery which has no
builtin RS-232 drivers. builtin RS-232 drivers.
Status: As of this writing, this configuration has not ran properly.
There appears to be some kind of driver-related issue.
NOTES: NOTES:
1. This configuration uses the mconf-based configuration tool. To 1. This configuration uses the mconf-based configuration tool. To
@@ -858,6 +870,14 @@ Where <subdir> is one of the following:
CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y
CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y
5. The STM32F3Discovery board does not provide circuitry for control of
the "soft connect" USB pullup. As a result, the host PC does not know
the USB has been logically connected or disconnected. You have to
follow these steps to use USB:
1) Start NSH with USB disconnected, then
2) Connect the USB device to the host.
5. By default, this project assumes that you are *NOT* using the DFU 5. By default, this project assumes that you are *NOT* using the DFU
bootloader. bootloader.
@@ -213,6 +213,11 @@ CONFIG_STM32_USART=y
# USB Host Configuration # USB Host Configuration
# #
#
# USB Device Configuration
#
# CONFIG_STM32_USB_ITRMP is not set
# #
# External Memory Configuration # External Memory Configuration
# #