mirror of
https://github.com/apache/nuttx.git
synced 2026-06-07 09:18:00 +08:00
pcie: add framework
Squashed commits: 1. x86_64: qemu: implement pci-e functions and enumerate pci-e devices on boot 2. virt: add qemu pci-testdev driver 3. pcie: types array should be null terminated 4. pcie: enable don't take flags, hardcoded enabling flags 5. pcie: checking bar > 4 for 64bit bars are sufficient 6. pcie: qemu: remove not used header 7. pcie: qemu: return -EINVAL if buffer argument is NULL 8. pcie: make pcie enumerate routine as common instead of architecture dependent 9. pcie: cosmetic changes to fit check tools 10. pcie: create MSI/MSIX related marcos and simplify the msi/msix routines
This commit is contained in:
committed by
Xiang Xiao
parent
204f4a18a0
commit
18f97bf2f8
@@ -920,6 +920,24 @@
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# define ipcinfo _none
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#endif
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#ifdef CONFIG_DEBUG_PCIE_ERROR
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# define pcierr _err
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#else
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# define pcierr _none
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#endif
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#ifdef CONFIG_DEBUG_PCIE_WARN
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# define pciwarn _warn
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#else
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# define pciwarn _none
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#endif
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#ifdef CONFIG_DEBUG_PCIE_INFO
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# define pciinfo _info
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#else
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# define pciinfo _none
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#endif
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/* Buffer dumping macros do not depend on varargs */
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#ifdef CONFIG_DEBUG_ERROR
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@@ -0,0 +1,352 @@
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/****************************************************************************
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* include/nuttx/pcie/pcie.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_PCIE_PCIE_H
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#define __INCLUDE_NUTTX_PCIE_PCIE_H
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#ifdef CONFIG_PCIE
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <nuttx/fs/ioctl.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define PCI_CFG_VENDOR_ID 0x000
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#define PCI_CFG_DEVICE_ID 0x002
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#define PCI_CFG_COMMAND 0x004
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# define PCI_CMD_IO (1 << 0)
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# define PCI_CMD_MEM (1 << 1)
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# define PCI_CMD_MASTER (1 << 2)
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# define PCI_CMD_INTX_OFF (1 << 10)
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#define PCI_CFG_STATUS 0x006
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# define PCI_STS_INT (1 << 3)
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# define PCI_STS_CAPS (1 << 4)
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#define PCI_CFG_REVERSION 0x008
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#define PCI_CFG_BAR 0x010
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# define PCI_BAR_IO 0x1
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# define PCI_BAR_1M 0x2
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# define PCI_BAR_64BIT 0x4
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#define PCI_CFG_CAP_PTR 0x034
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#define PCI_ID_ANY 0xffff
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#define PCI_DEV_CLASS_OTHER 0xff
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#define PCI_CAP_PM 0x01
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#define PCI_CAP_MSI 0x05
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# define PCI_MSI_MCR 0x02
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# define PCI_MSI_MCR_SIZE 2
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# define PCI_MSI_MCR_EN (1 << 0)
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# define PCI_MSI_MCR_64 (1 << 7)
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# define PCI_MSI_MAR 0x04
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# define PCI_MSI_MAR_SIZE 4
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# define PCI_MSI_MDR 0x08
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# define PCI_MSI_MDR_SIZE 2
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# define PCI_MSI_MAR64_HI 0x08
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# define PCI_MSI_MAR64_HI_SIZE 4
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# define PCI_MSI_MDR64 0x0c
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# define PCI_MSI_MDR64_SIZE 2
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# define PCI_MSI_APIC_ID_OFFSET 0xc
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#define PCI_CAP_MSIX 0x11
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# define PCI_MSIX_MCR 0x02
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# define PCI_MSIX_MCR_SIZE 2
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# define PCI_MSIX_MCR_EN (1 << 15)
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# define PCI_MSIX_MCR_FMASK 0x4000
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# define PCI_MSIX_MCR_TBL_MASK 0x03ff
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# define PCI_MSIX_TBL 0x04
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# define PCI_MSIX_TBL_SIZE 4
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# define PCI_MSIX_PBA 0x08
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# define PCI_MSIX_PBA_SIZE 4
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# define PCI_MSIX_BIR_MASK 0x07
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# define PCI_MSIX_TBL_ENTRY_SIZE 0x10
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# define PCI_MSIX_TBL_LO_ADDR 0x0
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# define PCI_MSIX_TBL_HI_ADDR 0x4
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# define PCI_MSIX_TBL_MSG_DATA 0x8
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# define PCI_MSIX_TBL_VEC_CTL 0xc
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# define PCI_MSIX_APIC_ID_OFFSET 0xc
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* The PCIE driver interface */
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struct pcie_bus_s;
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struct pcie_dev_type_s;
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struct pcie_dev_s;
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/* Bus related operations */
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struct pcie_bus_ops_s
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{
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CODE int (*pcie_enumerate)(FAR struct pcie_bus_s *bus,
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FAR struct pcie_dev_type_s **types);
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CODE int (*pci_cfg_write)(FAR struct pcie_dev_s *dev, uintptr_t addr,
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FAR const void *buffer, unsigned int size);
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CODE int (*pci_cfg_read)(FAR struct pcie_dev_s *dev, uintptr_t addr,
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FAR void *buffer, unsigned int size);
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CODE int (*pci_map_bar)(FAR struct pcie_dev_s *dev, uint32_t addr,
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unsigned long length);
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CODE int (*pci_map_bar64)(FAR struct pcie_dev_s *dev, uint64_t addr,
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unsigned long length);
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CODE int (*pci_msi_register)(FAR struct pcie_dev_s *dev,
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uint16_t vector);
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CODE int (*pci_msix_register)(FAR struct pcie_dev_s *dev,
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uint32_t vector, uint32_t index);
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};
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/* PCIE bus private data. */
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struct pcie_bus_s
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{
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FAR const struct pcie_bus_ops_s *ops; /* operations */
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};
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/* PCIE device type, defines by vendor ID and device ID */
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struct pcie_dev_type_s
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{
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uint16_t vendor; /* Device vendor ID */
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uint16_t device; /* Device ID */
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uint32_t class_rev; /* Device reversion */
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const char *name; /* Human readable name */
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/* Call back function when a device is probed */
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CODE int (*probe)(FAR struct pcie_bus_s *bus,
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FAR struct pcie_dev_type_s *type, uint16_t bdf);
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};
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/* PCIE device private data. */
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struct pcie_dev_s
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{
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FAR struct pcie_bus_s *bus;
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FAR struct pcie_dev_type_s *type;
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uint16_t bdf;
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};
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: pcie_initialize
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*
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* Description:
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* Initialize the PCI-E bus and enumerate the devices with give devices
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* type array
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*
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* Input Parameters:
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* bus - An PCIE bus
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* types - A array of PCIE device types
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* num - Number of device types
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*
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* Returned Value:
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* OK if the driver was successfully register; A negated errno value is
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* returned on any failure.
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*
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****************************************************************************/
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int pcie_initialize(FAR struct pcie_bus_s *bus);
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/****************************************************************************
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* Name: pci_enable_device
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*
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* Description:
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* Enable device with MMIO
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*
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* Input Parameters:
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* dev - device
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*
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* Return value:
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* -EINVAL: error
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* OK: OK
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*
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****************************************************************************/
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int pci_enable_device(FAR struct pcie_dev_s *dev);
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/****************************************************************************
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* Name: pci_find_cap
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*
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* Description:
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* Search through the PCI-e device capability list to find given capability.
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*
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* Input Parameters:
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* dev - Device
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* cap - Bitmask of capability
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*
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* Returned Value:
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* -1: Capability not supported
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* other: the offset in PCI configuration space to the capability structure
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*
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****************************************************************************/
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int pci_find_cap(FAR struct pcie_dev_s *dev, uint16_t cap);
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/****************************************************************************
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* Name: pci_map_bar
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*
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* Description:
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* Map address in a 32 bits bar in the flat memory address space
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*
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* Input Parameters:
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* dev - Device private data
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* bar - Bar number
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* length - Map length, multiple of PAGE_SIZE
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* ret - Bar Contentif not NULL
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*
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* Returned Value:
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* 0: success, <0: A negated errno
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*
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****************************************************************************/
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int pci_map_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
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unsigned long length, uint32_t *ret);
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/****************************************************************************
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* Name: pci_map_bar64
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*
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* Description:
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* Map address in a 64 bits bar in the flat memory address space
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*
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* Input Parameters:
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* dev - Device private data
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* bar - Bar number
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* length - Map length, multiple of PAGE_SIZE
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* ret - Bar Content if not NULL
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*
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* Returned Value:
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* 0: success, <0: A negated errno
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*
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****************************************************************************/
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int pci_map_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
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unsigned long length, uint64_t *ret);
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/****************************************************************************
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* Name: pci_get_bar
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*
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* Description:
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* Get a 32 bits bar
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*
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* Input Parameters:
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* dev - Device private data
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* bar - Bar number
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* ret - Bar Content
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*
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* Returned Value:
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* 0: success, <0: A negated errno
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*
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****************************************************************************/
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int pci_get_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
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uint32_t *ret);
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/****************************************************************************
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* Name: pci_get_bar64
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*
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* Description:
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* Get a 64 bits bar
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*
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* Input Parameters:
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* dev - Device private data
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* bar - Bar number
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* ret - Bar Content
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*
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* Returned Value:
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* 0: success, <0: A negated errno
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*
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****************************************************************************/
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int pci_get_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
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uint64_t *ret);
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/****************************************************************************
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* Name: pci_set_bar
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*
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* Description:
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* Set a 32 bits bar
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*
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* Input Parameters:
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* dev - Device private data
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* bar - Bar number
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* val - Bar Content
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*
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* Returned Value:
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* 0: success, <0: A negated errno
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*
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****************************************************************************/
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int pci_set_bar(FAR struct pcie_dev_s *dev, uint32_t bar,
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uint32_t val);
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/****************************************************************************
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* Name: pci_set_bar64
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*
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* Description:
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* Set a 64 bits bar
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*
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* Input Parameters:
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* dev - Device private data
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* bar - Bar number
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* val - Bar Content
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*
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* Returned Value:
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* 0: success, <0: A negated errno
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*
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****************************************************************************/
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int pci_set_bar64(FAR struct pcie_dev_s *dev, uint32_t bar,
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uint64_t val);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif
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#endif /* __INCLUDE_NUTTX_I2C_I2C_MASTER_H */
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@@ -0,0 +1,53 @@
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/****************************************************************************
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* include/nuttx/serial/uart_mcs99xx.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_VIRT_QEMU_PCI_TEST_H
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#define __INCLUDE_NUTTX_VIRT_QEMU_PCI_TEST_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#ifdef CONFIG_VIRT_QEMU_PCI_TEST
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extern struct pcie_dev_type_s pcie_type_qemu_pci_test;
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#endif /* CONFIG_VIRT_QEMU_PCI_TEST */
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCLUDE_NUTTX_VIRT_QEMU_PCI_TEST_H */
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Block a user