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MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy.
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles. This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver. From David Sidrane
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Regular → Executable
+17
@@ -38,6 +38,23 @@ config MMCSD_HAVECARDDETECT
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SDIO driver card detection is
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100% accurate
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config MMCSD_SDIOWAIT_WRCOMPLETE
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bool "Use SDIO_D Busy to detect Write Complete"
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default n
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---help---
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SDIO driver will use SDIO_D Busy signalling to detect Write Complete.
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This option when selected, will enable the MMCSD driver to use the
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underlying (stm32_sdio only) drivers implementation of the SD specs
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SDIO_D Busy signalling to detect Write Complete. This will avoid
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potentially very long (600Ms+) busy waiting in the MMCSD driver.
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To implement SDIO_D Busy signalling, the underlying driver must
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be capable of switching the GPIO_SDIO_D0 to be a rising edge sensitive
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interrupt pin. It must then, condition that pin to detect the rising edge
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on receipt of SDWAIT_WRCOMPLETE in the SDIO_WAITENABLE call and
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return it back to regular SDIO mode, when either the ISR fires or pin is
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found to be high in the SDIO_EVENTWAIT call.
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config MMCSD_SPI
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bool "MMC/SD SPI transfer support"
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default y
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Regular → Executable
+15
@@ -1150,6 +1150,15 @@ static int mmcsd_transferready(FAR struct mmcsd_state_s *priv)
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* the TRANSFER state when the card completes the WRITE operation.
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*/
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#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
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ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR,
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MMCSD_BLOCK_WDATADELAY);
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if (ret != OK)
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{
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fdbg("ERROR: mmcsd_eventwait for transfer ready failed: %d\n", ret);
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}
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#endif
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starttime = clock_systimer();
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do
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{
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@@ -1721,6 +1730,12 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
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return ret;
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}
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#if defined(CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE)
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/* Arm the write complete detection with timeout */
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SDIO_WAITENABLE(priv->dev, SDIOWAIT_WRCOMPLETE|SDIOWAIT_TIMEOUT);
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#endif
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/* On success, return the number of blocks written */
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return 1;
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