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stm32/stm32_adc.c: add an option to configure ANIOC_TRIGGER behavior
This commit is contained in:
committed by
Alan Carvalho de Assis
parent
58a03302d2
commit
166bf0434b
@@ -8199,6 +8199,16 @@ config STM32_ADC1_DMA_CFG
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---help---
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---help---
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0 - ADC1 DMA in One Shot Mode, 1 - ADC1 DMA in Circular Mode
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0 - ADC1 DMA in One Shot Mode, 1 - ADC1 DMA in Circular Mode
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config STM32_ADC1_ANIOC_TRIGGER
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int "ADC1 software trigger (ANIOC_TRIGGER) configuration"
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depends on STM32_ADC1
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range 1 3
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default 3
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---help---
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1 - ANIOC_TRIGGER only starts regular conversion
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2 - ANIOC_TRIGGER only starts injected conversion
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3 - ANIOC_TRIGGER starts both regular and injected conversions
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config STM32_ADC2_DMA
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config STM32_ADC2_DMA
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bool "ADC2 DMA"
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bool "ADC2 DMA"
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depends on STM32_ADC2 && STM32_HAVE_ADC2_DMA
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depends on STM32_ADC2 && STM32_HAVE_ADC2_DMA
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@@ -8222,6 +8232,16 @@ config STM32_ADC2_DMA_CFG
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---help---
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---help---
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0 - ADC2 DMA in One Shot Mode, 1 - ADC2 DMA in Circular Mode
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0 - ADC2 DMA in One Shot Mode, 1 - ADC2 DMA in Circular Mode
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config STM32_ADC2_ANIOC_TRIGGER
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int "ADC2 software trigger (ANIOC_TRIGGER) configuration"
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depends on STM32_ADC2
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range 1 3
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default 3
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---help---
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1 - ANIOC_TRIGGER only starts regular conversion
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2 - ANIOC_TRIGGER only starts injected conversion
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3 - ANIOC_TRIGGER starts both regular and injected conversions
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config STM32_ADC3_DMA
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config STM32_ADC3_DMA
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bool "ADC3 DMA"
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bool "ADC3 DMA"
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depends on STM32_ADC3 && STM32_HAVE_ADC3_DMA
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depends on STM32_ADC3 && STM32_HAVE_ADC3_DMA
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@@ -8245,6 +8265,16 @@ config STM32_ADC3_DMA_CFG
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---help---
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---help---
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0 - ADC3 DMA in One Shot Mode, 1 - ADC3 DMA in Circular Mode
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0 - ADC3 DMA in One Shot Mode, 1 - ADC3 DMA in Circular Mode
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config STM32_ADC3_ANIOC_TRIGGER
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int "ADC3 software trigger (ANIOC_TRIGGER) configuration"
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depends on STM32_ADC3
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range 1 3
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default 3
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---help---
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1 - ANIOC_TRIGGER only starts regular conversion
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2 - ANIOC_TRIGGER only starts injected conversion
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3 - ANIOC_TRIGGER starts both regular and injected conversions
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config STM32_ADC4_DMA
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config STM32_ADC4_DMA
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bool "ADC4 DMA"
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bool "ADC4 DMA"
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depends on STM32_ADC4 && STM32_HAVE_ADC4_DMA
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depends on STM32_ADC4 && STM32_HAVE_ADC4_DMA
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@@ -8262,6 +8292,16 @@ config STM32_ADC4_DMA_CFG
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---help---
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---help---
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0 - ADC4 DMA in One Shot Mode, 1 - ADC4 DMA in Circular Mode
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0 - ADC4 DMA in One Shot Mode, 1 - ADC4 DMA in Circular Mode
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config STM32_ADC4_ANIOC_TRIGGER
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int "ADC4 software trigger (ANIOC_TRIGGER) configuration"
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depends on STM32_ADC4
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range 1 3
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default 3
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---help---
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1 - ANIOC_TRIGGER only starts regular conversion
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2 - ANIOC_TRIGGER only starts injected conversion
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3 - ANIOC_TRIGGER starts both regular and injected conversions
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config STM32_ADC5_DMA
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config STM32_ADC5_DMA
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bool "ADC5 DMA"
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bool "ADC5 DMA"
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depends on STM32_ADC5 && STM32_HAVE_ADC5_DMA
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depends on STM32_ADC5 && STM32_HAVE_ADC5_DMA
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@@ -377,6 +377,11 @@
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# undef ADC_HAVE_CB
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# undef ADC_HAVE_CB
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#endif
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#endif
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/* ADC software trigger configuration */
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#define ANIOC_TRIGGER_REGULAR (1 << 0)
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#define ANIOC_TRIGGER_INJECTED (1 << 1)
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/****************************************************************************
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/****************************************************************************
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* Private Types
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* Private Types
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****************************************************************************/
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****************************************************************************/
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@@ -416,6 +421,7 @@ struct stm32_dev_s
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uint8_t intf; /* ADC interface number */
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uint8_t intf; /* ADC interface number */
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uint8_t initialized; /* ADC interface initialization counter */
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uint8_t initialized; /* ADC interface initialization counter */
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uint8_t current; /* Current ADC channel being converted */
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uint8_t current; /* Current ADC channel being converted */
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uint8_t anioc_trg; /* ANIOC_TRIGGER configuration */
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#ifdef HAVE_ADC_RESOLUTION
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#ifdef HAVE_ADC_RESOLUTION
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uint8_t resolution; /* ADC resolution (0-3) */
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uint8_t resolution; /* ADC resolution (0-3) */
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#endif
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#endif
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@@ -766,6 +772,7 @@ static struct stm32_dev_s g_adcpriv1 =
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#endif
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#endif
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.intf = 1,
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.intf = 1,
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.initialized = 0,
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.initialized = 0,
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.anioc_trg = CONFIG_STM32_ADC1_ANIOC_TRIGGER,
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#ifdef HAVE_ADC_RESOLUTION
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#ifdef HAVE_ADC_RESOLUTION
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.resolution = CONFIG_STM32_ADC1_RESOLUTION,
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.resolution = CONFIG_STM32_ADC1_RESOLUTION,
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#endif
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#endif
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@@ -825,6 +832,7 @@ static struct stm32_dev_s g_adcpriv2 =
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#endif
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#endif
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.intf = 2,
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.intf = 2,
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.initialized = 0,
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.initialized = 0,
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.anioc_trg = CONFIG_STM32_ADC2_ANIOC_TRIGGER,
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#ifdef HAVE_ADC_RESOLUTION
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#ifdef HAVE_ADC_RESOLUTION
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.resolution = CONFIG_STM32_ADC2_RESOLUTION,
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.resolution = CONFIG_STM32_ADC2_RESOLUTION,
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#endif
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#endif
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@@ -884,6 +892,7 @@ static struct stm32_dev_s g_adcpriv3 =
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#endif
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#endif
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.intf = 3,
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.intf = 3,
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.initialized = 0,
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.initialized = 0,
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.anioc_trg = CONFIG_STM32_ADC3_ANIOC_TRIGGER,
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#ifdef HAVE_ADC_RESOLUTION
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#ifdef HAVE_ADC_RESOLUTION
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.resolution = CONFIG_STM32_ADC3_RESOLUTION,
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.resolution = CONFIG_STM32_ADC3_RESOLUTION,
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#endif
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#endif
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@@ -936,6 +945,7 @@ static struct stm32_dev_s g_adcpriv4 =
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#endif
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#endif
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.intf = 4,
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.intf = 4,
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.initialized = 0,
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.initialized = 0,
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.anioc_trg = CONFIG_STM32_ADC4_ANIOC_TRIGGER,
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#ifdef HAVE_ADC_RESOLUTION
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#ifdef HAVE_ADC_RESOLUTION
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.resolution = CONFIG_STM32_ADC4_RESOLUTION,
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.resolution = CONFIG_STM32_ADC4_RESOLUTION,
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#endif
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#endif
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@@ -3820,17 +3830,23 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
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{
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{
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/* Start regular conversion if regular channels configured */
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/* Start regular conversion if regular channels configured */
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if (priv->cr_channels > 0)
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if (priv->anioc_trg & ANIOC_TRIGGER_REGULAR)
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{
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{
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adc_reg_startconv(priv, true);
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if (priv->cr_channels > 0)
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{
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adc_reg_startconv(priv, true);
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}
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}
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}
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#ifdef ADC_HAVE_INJECTED
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#ifdef ADC_HAVE_INJECTED
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/* Start injected conversion if injected channels configured */
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/* Start injected conversion if injected channels configured */
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if (priv->cj_channels > 0)
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if (priv->anioc_trg & ANIOC_TRIGGER_INJECTED)
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{
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{
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adc_inj_startconv(priv, true);
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if (priv->cj_channels > 0)
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{
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adc_inj_startconv(priv, true);
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}
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}
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}
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#endif
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#endif
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