diff --git a/arch/arm/src/armv7-m/ram_vectors.h b/arch/arm/src/armv7-m/ram_vectors.h
index 5b228d69c80..0fe7b83af09 100644
--- a/arch/arm/src/armv7-m/ram_vectors.h
+++ b/arch/arm/src/armv7-m/ram_vectors.h
@@ -79,10 +79,12 @@
  * irq_dispatch.  In this case, it is also assumed that the ARM vector
  * table resides in RAM, has the name up_ram_vectors, and has been
  * properly positioned and aligned in memory by the linker script.
+ *
+ * REVISIT: Can this alignment requirement vary from core-to-core?
  */
 
 extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
-  __attribute__((section(".ram_vectors")));
+  __attribute__ ((section (".ram_vectors"), aligned (64)));
 
 /************************************************************************************
  * Public Function Prototypes
diff --git a/arch/arm/src/armv7-m/up_ramvec_attach.c b/arch/arm/src/armv7-m/up_ramvec_attach.c
index 605886352f9..274996af3cd 100644
--- a/arch/arm/src/armv7-m/up_ramvec_attach.c
+++ b/arch/arm/src/armv7-m/up_ramvec_attach.c
@@ -39,6 +39,8 @@
 
 #include <nuttx/config.h>
 
+#include <debug.h>
+
 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
 
@@ -49,6 +51,19 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+/* Debug ********************************************************************/
+/* Non-standard debug that may be enabled just for testing the interrupt
+ * config.  NOTE: that only lldbg types are used so that the output is
+ * immediately available.
+ */
+
+#ifdef CONFIG_DEBUG_IRQ
+#  define intdbg    lldbg
+#  define intvdbg   llvdbg
+#else
+#  define intdbg(x...)
+#  define intvdbg(x...)
+#endif
 
 /****************************************************************************
  * Private Type Declarations
@@ -87,6 +102,8 @@ int up_ramvec_attach(int irq, up_vector_t vector)
 {
   int ret = ERROR;
 
+  intvdbg("%s IRQ%d\n", vector ? "Attaching" : "Detaching", irq);
+
   if ((unsigned)irq < ARMV7M_PERIPHERAL_INTERRUPTS)
     {
       irqstate_t flags;
diff --git a/arch/arm/src/armv7-m/up_ramvec_initialize.c b/arch/arm/src/armv7-m/up_ramvec_initialize.c
index ee8ac43d08c..a36e3126b76 100644
--- a/arch/arm/src/armv7-m/up_ramvec_initialize.c
+++ b/arch/arm/src/armv7-m/up_ramvec_initialize.c
@@ -38,6 +38,9 @@
  ****************************************************************************/
 
 #include <nuttx/config.h>
+
+#include <debug.h>
+
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
 
@@ -51,8 +54,21 @@
 #ifdef CONFIG_ARCH_RAMVECTORS
 
 /****************************************************************************
- * Definitions
+ * Pre-processor Definitions
  ****************************************************************************/
+/* Debug ********************************************************************/
+/* Non-standard debug that may be enabled just for testing the interrupt
+ * config.  NOTE: that only lldbg types are used so that the output is
+ * immediately available.
+ */
+
+#ifdef CONFIG_DEBUG_IRQ
+#  define intdbg    lldbg
+#  define intvdbg   llvdbg
+#else
+#  define intdbg(x...)
+#  define intvdbg(x...)
+#endif
 
 /****************************************************************************
  * Private Type Declarations
@@ -67,10 +83,12 @@
  * irq_dispatch.  In this case, it is also assumed that the ARM vector
  * table resides in RAM, has the name up_ram_vectors, and has been
  * properly positioned and aligned in memory by the linker script.
+ *
+ * REVISIT: Can this alignment requirement vary from core-to-core?
  */
 
 up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
-  __attribute__((section(".ram_vectors")));
+  __attribute__ ((section (".ram_vectors"), aligned (64)));
 
 /****************************************************************************
  * Private Variables
@@ -108,9 +126,11 @@ void up_ramvec_initialize(void)
    * protect against NULL pointer references.
    */
 
-  src  = (const CODE up_vector_t *)0;
+  src  = (const CODE up_vector_t *)getreg32(NVIC_VECTAB);
   dest = g_ram_vectors;
 
+  intvdbg("src=%p dest=%p\n", src, dest);
+
   for (i = 0; i < ARMV7M_VECTAB_SIZE; i++)
     {
       *dest++ = *src++;
@@ -119,6 +139,7 @@ void up_ramvec_initialize(void)
   /* Now configure the NVIC to use the new vector table. */
 
   putreg32((uint32_t)g_ram_vectors, NVIC_VECTAB);
+  intvdbg("NVIC_VECTAB=%08x\n", getreg32(NVIC_VECTAB));
 }
 
 #endif /* !CONFIG_ARCH_RAMVECTORS */