Leverage some bit timing logic from LPC17xx to the STM32 CAN driver

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4317 42af7a65-404d-4744-a932-0658087f49c3

arch/arm/src/lpc17xx/lpc17_can.c

@@ -151,6 +151,10 @@
 #  define CONFIG_CAN_TSEG2 7
 #endif
 
+#if CONFIG_CAN_TSEG2 < 1 || CONFIG_CAN_TSEG2 > CAN_BTR_TSEG2_MAX
+#  errror "CONFIG_CAN_TSEG2 is out of range"
+#endif
+
 #define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1)
 
 /* Debug ********************************************************************/
@@ -1127,7 +1131,7 @@ static int can_bittiming(struct up_dev_s *priv)
     {
       /* At the smallest brp value (1), there are already too few bit times
        * (CAN_CLOCK / baud) to meet our goal.  brp must be one and we need
-       * make some reasonalble guesses about ts1 and ts2.
+       * make some reasonable guesses about ts1 and ts2.
        */
 
       brp = 1;
@@ -1153,7 +1157,7 @@ static int can_bittiming(struct up_dev_s *priv)
       ts1 = CONFIG_CAN_TSEG1;
       ts2 = CONFIG_CAN_TSEG2;
       brp = (nclks + (CAN_BIT_QUANTA/2)) / CAN_BIT_QUANTA;
-      DEBUGASSERT(brp >=1 && brp < 1024);
+      DEBUGASSERT(brp >=1 && brp <= CAN_BTR_BRP_MAX);
     }
     
   sjw = 1;

arch/arm/src/lpc17xx/lpc17_can.h

@@ -370,9 +370,10 @@
 #define CAN_BTR_TSEG2_MASK          (7 << CAN_BTR_TSEG2_SHIFT)
 #define CAN_BTR_SAM                 (1 << 23) /* Bit 23: Sampling */
                                               /* Bits 24-31: Reserved */
+
 #define CAN_BTR_BRP_MAX             (1024)    /* Maximum BTR value (without decrement) */
-#define CAN_BTR_TSEG1_MAX           (16)      /* Maximum TSEG value (without decrement) */
+#define CAN_BTR_TSEG1_MAX           (16)      /* Maximum TSEG1 value (without decrement) */
-#define CAN_BTR_TSEG2_MAX           (8)       /* Maximum TSEG value (without decrement) */
+#define CAN_BTR_TSEG2_MAX           (8)       /* Maximum TSEG2 value (without decrement) */
 
 /* Error Warning Limit */
 

arch/arm/src/stm32/chip/stm32_can.h

@@ -358,6 +358,10 @@
 #define CAN_BTR_LBKM              (1 << 30) /* Bit 30: Loop Back Mode (Debug) */
 #define CAN_BTR_SILM              (1 << 31) /* Bit 31: Silent Mode (Debug) */
 
+#define CAN_BTR_BRP_MAX           (1024)    /* Maximum BTR value (without decrement) */
+#define CAN_BTR_TSEG1_MAX         (16)      /* Maximum TSEG1 value (without decrement) */
+#define CAN_BTR_TSEG2_MAX         (8)       /* Maximum TSEG2 value (without decrement) */
+
 /* TX mailbox identifier register */
 
 #define CAN_TIR_TXRQ              (1 << 0)  /* Bit 0: Transmit Mailbox Request */

arch/arm/src/stm32/stm32_can.c

@@ -74,6 +74,10 @@
 
 #define CAN_ALL_MAILBOXES (CAN_TSR_TME0 | CAN_TSR_TME1 | CAN_TSR_TME2)
 
+/* Bit timing ***************************************************************/
+
+#define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1)
+
 /* Debug ********************************************************************/
 /* Non-standard debug that may be enabled just for testing CAN */
 
@@ -1259,14 +1263,13 @@ static int can_bittiming(struct stm32_can_s *priv)
 
   canllvdbg("CAN%d PCLK1: %d baud: %d\n", priv->port, STM32_PCLK1_FREQUENCY, priv->baud);
 
-  /* Try to get 14 quanta in one bit_time.  That is based on the idea that the ideal
+  /* Try to get CAN_BIT_QUANTA quanta in one bit_time.
-   * would be ts1=6 nd ts2=7 and (1 + ts1 + ts2) = 14.
    *
-   *   bit_time = Tq*(1 +ts1 + ts2)
+   *   bit_time = Tq*(ts1 + ts2 + 1)
-   *   nquanta = bit_time/Tq
+   *   nquanta  = bit_time / Tq
-   *   nquanta  = (1 +ts1 + ts2)
+   *   nquanta  = (ts1 + ts2 + 1)
    *
-   *   bit_time = brp * Tpclk1 * (1 + ts1 + ts2)
+   *   bit_time = brp * Tpclk1 * (ts1 + ts2 + 1)
    *   nquanta  = bit_time / brp / Tpclk1
    *            = PCLK1 / baud / brp
    *   brp      = PCLK1 / baud / nquanta;
@@ -1277,11 +1280,11 @@ static int can_bittiming(struct stm32_can_s *priv)
    */
 
   tmp = STM32_PCLK1_FREQUENCY / priv->baud;
-  if (tmp < 14)
+  if (tmp < CAN_BIT_QUANTA)
     {
-      /* At the smallest brp value (1), there are already fewer bit times
+      /* At the smallest brp value (1), there are already too few bit times
-       * (PCLCK1 / baud) is already smaller than our goal.  brp must be one
+       * (PCLCK1 / baud) to meet our goal.  brp must be one and we need
-       * and we need make some reasonalble guesses about ts1 and ts2.
+       * make some reasonable guesses about ts1 and ts2.
        */
 
       brp = 1;
@@ -1290,23 +1293,24 @@ static int can_bittiming(struct stm32_can_s *priv)
 
       ts1 = (tmp - 1) >> 1;
       ts2 = tmp - ts1 - 1;
-      if (ts1 == ts2 && ts1 > 1 && ts2 < 16)
+      if (ts1 == ts2 && ts1 > 1 && ts2 < CAN_BTR_TSEG2_MAX)
         {
           ts1--;
           ts2++;          
         }
     }
 
-  /* Otherwise, nquanta is 14, ts1 is 6, ts2 is 7 and we calculate brp to
+  /* Otherwise, nquanta is CAN_BIT_QUANTA, ts1 is CONFIG_CAN_TSEG1, ts2 is
-   * achieve 14 quanta in the bit time 
+   * CONFIG_CAN_TSEG2 and we calculate brp to achieve CAN_BIT_QUANTA quanta
+   * in the bit time
    */
 
   else
     {
-      ts1 = 6;
+      ts1 = CONFIG_CAN_TSEG1;
-      ts2 = 7;
+      ts2 = CONFIG_CAN_TSEG2;
-      brp = tmp / 14;
+      brp = (tmp + (CAN_BIT_QUANTA/2)) / CAN_BIT_QUANTA;
-      DEBUGASSERT(brp >=1 && brp < 1024);
+      DEBUGASSERT(brp >=1 && brp <= CAN_BTR_BRP_MAX);
     }
 
   canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);

arch/arm/src/stm32/stm32_can.h

@@ -73,6 +73,29 @@
 #  error "CONFIG_CAN2_BAUD is not defined"
 #endif
 
+/* User-defined TSEG1 and TSEG2 settings may be used.
+ *
+ * CONFIG_CAN_TSEG1 = the number of CAN time quanta in segment 1
+ * CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2
+ * CAN_BIT_QUANTA   = The number of CAN time quanta in on bit time
+ */
+
+#ifndef CONFIG_CAN_TSEG1
+#  define CONFIG_CAN_TSEG1 6
+#endif
+
+#if CONFIG_CAN_TSEG1 < 1 || CONFIG_CAN_TSEG1 > CAN_BTR_TSEG1_MAX
+#  errror "CONFIG_CAN_TSEG1 is out of range"
+#endif
+
+#ifndef CONFIG_CAN_TSEG2
+#  define CONFIG_CAN_TSEG2 7
+#endif
+
+#if CONFIG_CAN_TSEG2 < 1 || CONFIG_CAN_TSEG2 > CAN_BTR_TSEG2_MAX
+#  errror "CONFIG_CAN_TSEG2 is out of range"
+#endif
+
 /************************************************************************************
  * Public Types
  ************************************************************************************/

configs/hymini-stm32v/README.txt

@@ -480,6 +480,8 @@ HY-Mini specific Configuration Options
 	  mode for testing. The STM32 CAN driver does support loopback mode.
 	CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
 	CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+	CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+	CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
 	CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
 	  dump of all CAN registers.
 

configs/olimex-lpc1766stk/README.txt

@@ -705,7 +705,7 @@ Olimex LPC1766-STK Configuration Options
 	  (the CCLK frequency is divided by this number to get the CAN clock).
 	  Options = {1,2,4,6}. Default: 4.
 	CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
-	CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
+	CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
 
   LPC17xx specific PHY/Ethernet device driver settings.  These setting
   also require CONFIG_NET and CONFIG_LPC17_ETHERNET.

configs/stm3210e-eval/README.txt

@@ -570,6 +570,8 @@ STM3210E-EVAL-specific Configuration Options
 	  mode for testing. The STM32 CAN driver does support loopback mode.
 	CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
 	CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+	CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+	CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
 	CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
 	  dump of all CAN registers.
 

configs/stm3210e-eval/ostest/defconfig

@@ -241,6 +241,29 @@ CONFIG_STM32_AM240320_DISABLE=n
 CONFIG_STM32_SPFD5408B_DISABLE=n
 CONFIG_STM32_R61580_DISABLE=y
 
+#
+# STM32F103Z specific CAN device driver settings
+#
+# CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
+#   CONFIG_STM32_CAN2 must also be defined)
+# CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
+#   Default: 8
+# CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
+#   Default: 4
+# CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
+#   mode for testing. The STM32 CAN driver does support loopback mode.
+# CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
+# CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+# CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+# CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
+#
+CONFIG_CAN=n
+#CONFIG_CAN_FIFOSIZE
+#CONFIG_CAN_NPENDINGRTR
+CONFIG_CAN_LOOPBACK=n
+CONFIG_CAN1_BAUD=700000
+CONFIG_CAN2_BAUD=700000
+
 #
 # General build options
 #

configs/stm3240g-eval/README.txt

@@ -282,6 +282,8 @@ Configuration Options:
   CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
   CONFIG_STM32_CAN2 - Enable support for CAN2
   CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+  CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+  CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
   CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
     dump of all CAN registers.
 
@@ -535,6 +537,8 @@ STM3240G-EVAL-specific Configuration Options
 	  mode for testing. The STM32 CAN driver does support loopback mode.
 	CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
 	CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+	CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+	CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
 	CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
 	  dump of all CAN registers.
 

configs/stm3240g-eval/nsh/defconfig

@@ -269,6 +269,8 @@ CONFIG_SSI_POLLWAIT=y
 #   mode for testing. The STM32 CAN driver does support loopback mode.
 # CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
 # CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+# CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+# CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
 #
 CONFIG_CAN=n
 #CONFIG_CAN_FIFOSIZE

configs/stm3240g-eval/ostest/defconfig

@@ -269,6 +269,8 @@ CONFIG_SSI_POLLWAIT=y
 #   mode for testing. The STM32 CAN driver does support loopback mode.
 # CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
 # CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+# CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+# CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
 #
 CONFIG_CAN=n
 #CONFIG_CAN_FIFOSIZE
@@ -986,7 +988,7 @@ CONFIG_USBSTRG_REMOVABLE=y
 #   too many messages (CONFIG_PREALLOC_MQ_MSGS controls how many
 #   messages are pre-allocated).
 #
-CONFIG_NX=y
+CONFIG_NX=n
 CONFIG_NX_MULTIUSER=n
 CONFIG_NX_NPLANES=1
 CONFIG_NX_DISABLE_1BPP=y

configs/stm32f4discovery/README.txt

@@ -398,12 +398,33 @@ stm32f4discovery-specific Configuration Options
 	CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
 	CONFIG_U[S]ARTn_2STOP - Two stop bits
 
+  STM3240xxx CAN Configuration
+
+	CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
+	  CONFIG_STM32_CAN2 must also be defined)
+	CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
+	  Default: 8
+	CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
+	  Default: 4
+	CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
+	  mode for testing. The STM32 CAN driver does support loopback mode.
+	CONFIG_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1 is defined.
+	CONFIG_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2 is defined.
+	CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+	CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
+	CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+	  dump of all CAN registers.
+
+  STM3240xxx SPI Configuration
+
 	CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
 	  support. Non-interrupt-driven, poll-waiting is recommended if the
 	  interrupt rate would be to high in the interrupt driven case.
 	CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
 	  Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
 
+  STM3240xxx DMA Configuration
+
 	CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO
 	  and CONFIG_STM32_DMA2.
 	CONFIG_SDIO_PRI - Select SDIO interrupt prority.  Default: 128