diff --git a/arch/arm/src/stm32h7/stm32_spi.c b/arch/arm/src/stm32h7/stm32_spi.c
index 112ddaf64be..1c35f782f5f 100644
--- a/arch/arm/src/stm32h7/stm32_spi.c
+++ b/arch/arm/src/stm32h7/stm32_spi.c
@@ -87,7 +87,6 @@
 #include "chip.h"
 #include "stm32_rcc.h"
 #include "stm32_gpio.h"
-/* #include "stm32_dma.h" */
 #include "stm32_spi.h"
 
 #if defined(CONFIG_STM32H7_SPI1) || defined(CONFIG_STM32H7_SPI2) || \
@@ -127,9 +126,9 @@
 #    error "Unknown STM32 DMA"
 #  endif
 
-#if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
+#  if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
 #    error "Illegal value for CONFIG_SPI_DMAPRIO"
-#endif
+#  endif
 
 /* DMA channel configuration */
 
@@ -768,7 +767,6 @@ static void spi_dumpregs(FAR struct stm32_spidev_s *priv)
           spi_getreg(priv, STM32_SPI_IER_OFFSET),
           spi_getreg(priv, STM32_SPI_SR_OFFSET),
           spi_getreg(priv, STM32_SPI_I2SCFGR_OFFSET));
-
 }
 #endif
 
@@ -1883,9 +1881,7 @@ static void spi_bus_initialize(struct stm32_spidev_s *priv)
    *   Master:                        CFG2.MSTR=1
    *   8-bit:                         CFG1.DSIZE=7
    *   MSB tranmitted first:          CFG2.LSBFRST=0
-
    *   Replace NSS with SSI & SSI=1:  CR1.SSI=1 CFG2.SSM=1 (prevents MODF error)
-
    *   Two lines full duplex:         CFG2.COMM=0
    */
 
diff --git a/configs/nucleo-h743zi/include/board.h b/configs/nucleo-h743zi/include/board.h
index adcd1b2a1ef..d2833152ec5 100644
--- a/configs/nucleo-h743zi/include/board.h
+++ b/configs/nucleo-h743zi/include/board.h
@@ -160,8 +160,7 @@
 #define STM32_PLL3Q_FREQUENCY
 #define STM32_PLL3R_FREQUENCY
 
-/*
- * SYSCLK = PLL1P = 400 MHz
+/* SYSCLK = PLL1P = 400 MHz
  * CPUCLK = SYSCLK / 1 = 400 MHz
  */
 
diff --git a/configs/nucleo-h743zi/src/stm32_spi.c b/configs/nucleo-h743zi/src/stm32_spi.c
index e76e5bc56f1..9477c00b5b1 100644
--- a/configs/nucleo-h743zi/src/stm32_spi.c
+++ b/configs/nucleo-h743zi/src/stm32_spi.c
@@ -79,7 +79,9 @@ void stm32_spidev_initialize(void)
 #ifdef CONFIG_STM32H7_SPI3
 #  ifdef CONFIG_WL_NRF24L01
   /* Configure the SPI-based NRF24L01 chip select GPIO */
+
   spiinfo("Configure GPIO for SPI3/CS\n");
+
   stm32_configgpio(GPIO_NRF24L01_CS);
   stm32_gpiowrite(GPIO_NRF24L01_CS, true);
 #  endif
diff --git a/drivers/wireless/nrf24l01.c b/drivers/wireless/nrf24l01.c
index 7136d5a4a72..0c2a65ae0d4 100644
--- a/drivers/wireless/nrf24l01.c
+++ b/drivers/wireless/nrf24l01.c
@@ -757,10 +757,6 @@ static void nrf24l01_worker(FAR void *arg)
 
            nxsem_post(&dev->sem_tx);
          }
-       else
-         {
-           /* wlerr("invalid length in rx: %d\n", (int)pktlen); */
-         }
     }
 
   if (dev->state == ST_RX)
diff --git a/include/sys/socket.h b/include/sys/socket.h
index 4a9f2af8244..770f29b916e 100644
--- a/include/sys/socket.h
+++ b/include/sys/socket.h
@@ -253,7 +253,7 @@ struct sockaddr_storage
 struct sockaddr
 {
   sa_family_t sa_family;       /* Address family: See AF_* definitions */
-  char        sa_data[14];     /* 14-bytes of address data */
+  char        sa_data[14];     /* 14-bytes data (actually variable length) */
 };
 
 /* Used with the SO_LINGER socket option */