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litex: nsh working

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This commit is contained in:
David Jablonski
2021-02-06 17:11:37 +01:00
committed by Brennan Ashton
parent af42079cc7
commit 11167857c3
4 changed files with 8 additions and 7 deletions
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arch/risc-v/src/litex/hardware/litex_clint.h
+1 -1
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@@ -27,6 +27,6 @@
#define LITEX_CLINT_LATCH (LITEX_CPUTIMER_BASE) #define LITEX_CLINT_LATCH (LITEX_CPUTIMER_BASE)
#define LITEX_CLINT_MTIME (LITEX_CPUTIMER_BASE + 0x04) #define LITEX_CLINT_MTIME (LITEX_CPUTIMER_BASE + 0x04)
#define LITEX_CLINT_MTIMECMP (LITEX_CPUTIMER_BASE + 0x24) #define LITEX_CLINT_MTIMECMP (LITEX_CPUTIMER_BASE + 0x0C)
#endif /* __ARCH_RISCV_SRC_LITEX_HARDWARE_LITEX_CLINT_H */ #endif /* __ARCH_RISCV_SRC_LITEX_HARDWARE_LITEX_CLINT_H */
arch/risc-v/src/litex/hardware/litex_memorymap.h
+2 -2
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@@ -32,7 +32,7 @@
*/ */
#define LITEX_CPUTIMER_BASE 0xf0000800 /* riscv clint timer */ #define LITEX_CPUTIMER_BASE 0xf0000800 /* riscv clint timer */
#define LITEX_TIMER0_BASE 0xf0001800 #define LITEX_TIMER0_BASE 0xf0002800
#define LITEX_UART0_BASE 0xf0001000 /* 0xf0001000 - : UART0 */ #define LITEX_UART0_BASE 0xf0002000 /* 0xf0001000 - : UART0 */
#endif /* __ARCH_RISCV_SRC_LITEX_HARDWARE_LITEX_MEMORYMAP_H */ #endif /* __ARCH_RISCV_SRC_LITEX_HARDWARE_LITEX_MEMORYMAP_H */
boards/risc-v/litex/arty_a7/configs/nsh/defconfig
+3 -2
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@@ -25,6 +25,7 @@ CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEFAULT_SMALL=y CONFIG_DEFAULT_SMALL=y
CONFIG_DEV_ZERO=y CONFIG_DEV_ZERO=y
CONFIG_DISABLE_MQUEUE=y CONFIG_DISABLE_MQUEUE=y
CONFIG_ELF=y
CONFIG_EXAMPLES_HELLO=y CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_HELLO_STACKSIZE=8192 CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS=y
@@ -47,8 +48,8 @@ CONFIG_NSH_FILEIOSIZE=64
CONFIG_NSH_STRERROR=y CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0 CONFIG_PREALLOC_TIMERS=0
CONFIG_PTHREAD_STACK_DEFAULT=8192 CONFIG_PTHREAD_STACK_DEFAULT=8192
CONFIG_RAM_SIZE=134217728 CONFIG_RAM_SIZE=268435456
CONFIG_RAM_START=0xc0800000 CONFIG_RAM_START=0x40000000
CONFIG_RAW_BINARY=y CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200 CONFIG_RR_INTERVAL=200
CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT=y CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT=y
boards/risc-v/litex/arty_a7/scripts/ld.script
+2 -2
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@@ -20,8 +20,8 @@
MEMORY MEMORY
{ {
progmem (rx) : ORIGIN = 0xc0000000, LENGTH = 8M progmem (rx) : ORIGIN = 0x40000000, LENGTH = 8M
sram (rwx) : ORIGIN = 0xc0800000, LENGTH = 256M - 8M sram (rwx) : ORIGIN = 0x40800000, LENGTH = 256M - 8M
} }
OUTPUT_ARCH("riscv") OUTPUT_ARCH("riscv")