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Add beginning of Kinetis pin interrupt/dma logic

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3880 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2011-08-14 22:47:44 +00:00
parent f1219b0836
commit 1109cc7e26
20 changed files with 1638 additions and 1263 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/kinetis/Make.defs
+9 -5
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@@ -57,18 +57,22 @@ endif
# Required Kinetis files
CHIP_ASRCS =
CHIP_CSRCS = kinetis_clockconfig.c kinetis_clrpend.c kinetis_gpio.c \
kinetis_idle.c kinetis_irq.c kinetis_lowputc.c kinetis_serial.c \
kinetis_start.c kinetis_timerisr.c kinetis_wdog.c
CHIP_CSRCS = kinetis_clockconfig.c kinetis_clrpend.c kinetis_idle.c \
kinetis_irq.c kinetis_lowputc.c kinetis_pin.c kinetis_pingpio.c \
kinetis_serial.c kinetis_start.c kinetis_timerisr.c kinetis_wdog.c
# Configuration-dependent Kinetis files
ifeq ($(CONFIG_GPIO_IRQ),y)
CHIP_CSRCS += kinetis_gpioint.c
CHIP_CSRCS += kinetis_pinirq.c
endif
ifeq ($(CONFIG_KINETIS_DMA),y)
CHIP_CSRCS += kinetis_pindma.c
endif
ifeq ($(CONFIG_DEBUG_GPIO),y)
CHIP_CSRCS += kinetis_gpiodbg.c
CHIP_CSRCS += kinetis_pindbg.c
endif
ifeq ($(CONFIG_USBDEV),y)
arch/arm/src/kinetis/kinetis_clrpend.c
Executable → Regular
View File
arch/arm/src/kinetis/kinetis_config.h
Executable → Regular
View File
arch/arm/src/kinetis/kinetis_idle.c
Executable → Regular
View File
arch/arm/src/kinetis/kinetis_internal.h
+243 -275
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File diff suppressed because it is too large Load Diff
arch/arm/src/kinetis/kinetis_irq.c
Executable → Regular
+2 -18
View File
@@ -392,11 +392,11 @@ void up_irqinitialize(void)
#endif
/* Initialize logic to support a second level of interrupt decoding for
* GPIO pins.
* configured pin interrupts.
*/
#ifdef CONFIG_GPIO_IRQ
kinetis_gpioirqinitialize();
kinetis_pinirqinitialize();
#endif
/* And finally, enable interrupts */
@@ -429,14 +429,6 @@ void up_disable_irq(int irq)
regval &= ~bit;
putreg32(regval, regaddr);
}
#ifdef CONFIG_GPIO_IRQ
else
{
/* Maybe it is a (derived) GPIO IRQ */
kinetis_gpioirqdisable(irq);
}
#endif
kinetis_dumpnvic("disable", irq);
}
@@ -462,14 +454,6 @@ void up_enable_irq(int irq)
regval |= bit;
putreg32(regval, regaddr);
}
#ifdef CONFIG_GPIO_IRQ
else
{
/* Maybe it is a (derived) GPIO IRQ */
kinetis_gpioirqenable(irq);
}
#endif
kinetis_dumpnvic("enable", irq);
}
arch/arm/src/kinetis/kinetis_k40pinmux.h
+433 -433
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File diff suppressed because it is too large Load Diff
arch/arm/src/kinetis/kinetis_k60pinmux.h
+391 -391
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File diff suppressed because it is too large Load Diff
arch/arm/src/kinetis/kinetis_lowputc.c
Executable → Regular
+12 -12
View File
@@ -226,28 +226,28 @@ void kinetis_lowsetup(void)
/* Configure UART pins for the all enabled UARTs */
#ifdef CONFIG_KINETIS_UART0
kinetis_configgpio(GPIO_UART0_TX);
kinetis_configgpio(GPIO_UART0_RX);
kinetis_pinconfig(PIN_UART0_TX);
kinetis_pinconfig(PIN_UART0_RX);
#endif
#ifdef CONFIG_KINETIS_UART1
kinetis_configgpio(GPIO_UART1_TX);
kinetis_configgpio(GPIO_UART1_RX);
kinetis_pinconfig(PIN_UART1_TX);
kinetis_pinconfig(PIN_UART1_RX);
#endif
#ifdef CONFIG_KINETIS_UART2
kinetis_configgpio(GPIO_UART2_TX);
kinetis_configgpio(GPIO_UART2_RX);
kinetis_pinconfig(PIN_UART2_TX);
kinetis_pinconfig(PIN_UART2_RX);
#endif
#ifdef CONFIG_KINETIS_UART3
kinetis_configgpio(GPIO_UART3_TX);
kinetis_configgpio(GPIO_UART3_RX);
kinetis_pinconfig(PIN_UART3_TX);
kinetis_pinconfig(PIN_UART3_RX);
#endif
#ifdef CONFIG_KINETIS_UART4
kinetis_configgpio(GPIO_UART4_TX);
kinetis_configgpio(GPIO_UART4_RX);
kinetis_pinconfig(PIN_UART4_TX);
kinetis_pinconfig(PIN_UART4_RX);
#endif
#ifdef CONFIG_KINETIS_UART5
kinetis_configgpio(GPIO_UART5_TX);
kinetis_configgpio(GPIO_UART5_RX);
kinetis_pinconfig(PIN_UART5_TX);
kinetis_pinconfig(PIN_UART5_RX);
#endif
/* Configure the console (only) now. Other UARTs will be configured
arch/arm/src/kinetis/kinetis_gpio.c → arch/arm/src/kinetis/kinetis_pin.c
+22 -105
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_gpio.c
* arch/arm/src/kinetis/kinetis_pin.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@@ -70,14 +70,15 @@
****************************************************************************/
/****************************************************************************
* Name: kinetis_configgpio
* Name: kinetis_pinconfig
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
* Configure a PIN based on bit-encoded description of the pin. NOTE that
* DMA/interrupts are disabled at the initial PIN configuratin.
*
****************************************************************************/
int kinetis_configgpio(uint32_t cfgset)
int kinetis_pinconfig(uint32_t cfgset)
{
uintptr_t base;
uint32_t regval;
@@ -87,8 +88,8 @@ int kinetis_configgpio(uint32_t cfgset)
/* Get the port number and pin number */
port = (cfgset & _GPIO_PORT_MASK) >> _GPIO_PORT_SHIFT;
pin = (cfgset & _GPIO_PIN_MASK) >> _GPIO_PIN_SHIFT;
port = (cfgset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (cfgset & _PIN_MASK) >> _PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
@@ -99,13 +100,13 @@ int kinetis_configgpio(uint32_t cfgset)
/* Get the port mode */
mode = (cfgset & _GPIO_MODE_MASK) >> _GPIO_MODE_SHIFT;
mode = (cfgset & _PIN_MODE_MASK) >> _PIN_MODE_SHIFT;
/* Special case analog port mode. In this case, not of the digital
* options are applicable.
*/
if (mode == _GPIO_MODE_ANALOG)
if (mode == _PIN_MODE_ANALOG)
{
/* Set the analog mode with all digital options zeroed */
@@ -117,44 +118,40 @@ int kinetis_configgpio(uint32_t cfgset)
/* Configure the digital pin options */
regval = (mode << PORT_PCR_MUX_SHIFT);
if ((cfgset & _GPIO_IO_MASK) == _GPIO_INPUT)
if ((cfgset & _PIN_IO_MASK) == _PIN_INPUT)
{
/* Handle input-only digital options */
/* Check for pull-up or pull-down */
if ((cfgset & _GPIO_INPUT_PULLMASK) == _GPIO_INPUT_PULLDOWN)
if ((cfgset & _PIN_INPUT_PULLMASK) == _PIN_INPUT_PULLDOWN)
{
regval |= PORT_PCR_PE;
}
else if ((cfgset & _GPIO_INPUT_PULLMASK) == _GPIO_INPUT_PULLUP)
else if ((cfgset & _PIN_INPUT_PULLMASK) == _PIN_INPUT_PULLUP)
{
regval |= (PORT_PCR_PE | PORT_PCR_PS);
}
# warning "Missing interrupt configuration logic"
}
else
{
/* Handle output-only digital options */
/* Check for slow slew rate setting */
if ((cfgset & _GPIO_OUTPUT_SLEW_MASK) == _GPIO_OUTPUT_SLOW)
if ((cfgset & _PIN_OUTPUT_SLEW_MASK) == _PIN_OUTPUT_SLOW)
{
regval |= PORT_PCR_SRE;
}
/* Check for open drain output */
if ((cfgset & _GPIO_OUTPUT_OD_MASK) == _GPIO_OUTPUT_OPENDRAIN)
if ((cfgset & _PIN_OUTPUT_OD_MASK) == _PIN_OUTPUT_OPENDRAIN)
{
regval |= PORT_PCR_ODE;
}
/* Check for high drive output */
if ((cfgset & _GPIO_OUTPUT_DRIVE_MASK) == _GPIO_OUTPUT_HIGHDRIVE)
if ((cfgset & _PIN_OUTPUT_DRIVE_MASK) == _PIN_OUTPUT_HIGHDRIVE)
{
regval |= PORT_PCR_DSE;
}
@@ -164,7 +161,7 @@ int kinetis_configgpio(uint32_t cfgset)
* is valid in all digital pin muxing modes.
*/
if ((cfgset & GPIO_PASV_FILTER) != 0)
if ((cfgset & PIN_PASV_FILTER) != 0)
{
regval |= PORT_PCR_PFE;
}
@@ -178,7 +175,7 @@ int kinetis_configgpio(uint32_t cfgset)
*/
regval = getreg32(base + KINETIS_PORT_DFER_OFFSET);
if ((cfgset & GPIO_DIG_FILTER) != 0)
if ((cfgset & PIN_DIG_FILTER) != 0)
{
regval |= (1 << pin);
}
@@ -190,20 +187,20 @@ int kinetis_configgpio(uint32_t cfgset)
/* Additional configuration for the case of Alternative 1 (GPIO) modes */
if (mode == _GPIO_MODE_GPIO)
if (mode == _PIN_MODE_GPIO)
{
/* Set the GPIO port direction */
base = KINETIS_GPIO_BASE(port);
regval = getreg32(base + KINETIS_GPIO_PDDR_OFFSET);
if ((cfgset & _GPIO_IO_MASK) == _GPIO_INPUT)
if ((cfgset & _PIN_IO_MASK) == _PIN_INPUT)
{
/* Select GPIO input */
regval &= ~(1 << pin);
putreg32(regval, base + KINETIS_GPIO_PDDR_OFFSET);
}
else /* if ((cfgset & _GPIO_IO_MASK) == _GPIO_OUTPUT) */
else /* if ((cfgset & _PIN_IO_MASK) == _PIN_OUTPUT) */
{
/* Select GPIO input */
@@ -223,7 +220,7 @@ int kinetis_configgpio(uint32_t cfgset)
}
/************************************************************************************
* Name: kinetis_configfilter
* Name: kinetis_pinfilter
*
* Description:
* Configure the digital filter associated with a port. The digital filter
@@ -237,7 +234,7 @@ int kinetis_configgpio(uint32_t cfgset)
*
************************************************************************************/
int kinetis_configfilter(unsigned int port, bool lpo, unsigned int width)
int kinetis_pinfilter(unsigned int port, bool lpo, unsigned int width)
{
uintptr_t base;
uint32_t regval;
@@ -262,83 +259,3 @@ int kinetis_configfilter(unsigned int port, bool lpo, unsigned int width)
}
return -EINVAL;
}
/****************************************************************************
* Name: kinetis_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void kinetis_gpiowrite(uint32_t pinset, bool value)
{
uintptr_t base;
unsigned int port;
unsigned int pin;
DEBUGASSERT((pinset & _GPIO_IO_MASK) == _GPIO_OUTPUT);
/* Get the port number and pin number */
port = (pinset & _GPIO_PORT_MASK) >> _GPIO_PORT_SHIFT;
pin = (pinset & _GPIO_PIN_MASK) >> _GPIO_PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of GPIO block for this port */
base = KINETIS_GPIO_BASE(port);
/* Set or clear the output */
if (value)
{
putreg32((1 << pin), base + KINETIS_GPIO_PSOR_OFFSET);
}
else
{
putreg32((1 << pin), base + KINETIS_GPIO_PCOR_OFFSET);
}
}
}
/****************************************************************************
* Name: kinetis_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool kinetis_gpioread(uint32_t pinset)
{
uintptr_t base;
uint32_t regval;
unsigned int port;
unsigned int pin;
bool ret = false;
DEBUGASSERT((pinset & _GPIO_IO_MASK) == _GPIO_INPUT);
/* Get the port number and pin number */
port = (pinset & _GPIO_PORT_MASK) >> _GPIO_PORT_SHIFT;
pin = (pinset & _GPIO_PIN_MASK) >> _GPIO_PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of GPIO block for this port */
base = KINETIS_GPIO_BASE(port);
/* return the state of the pin */
regval = getreg32(base + KINETIS_GPIO_PDIR_OFFSET);
ret = ((regval & (1 << pin)) != 0);
}
return ret;
}
arch/arm/src/kinetis/kinetis_pindma.c
+146
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@@ -0,0 +1,146 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_pindma.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/board/board.h>
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include "up_internal.h"
#ifdef CONFIG_KINETIS_DMA
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/************************************************************************************
* Name: kinetis_pindmaenable
*
* Description:
* Enable DMA for specified pin
*
************************************************************************************/
void kinetis_pindmaenable(uint32_t pinset)
{
uintptr_t base;
uint32_t regval;
unsigned int port;
unsigned int pin;
/* Get the port number and pin number */
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Modify the IRQC field of the port PCR register in order to enable DMA. */
regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
regval &= ~PORT_PCR_IRQC_MASK;
switch (pinset & _PIN_INT_MASK)
{
case PIN_DMA_RISING : /* DMA Request on rising edge */
regval |= PORT_PCR_IRQC_DMARISING;
break;
case PIN_DMA_FALLING : /* DMA Request on falling edge */
regval |= PORT_PCR_IRQC_DMAFALLING;
break;
case PIN_DMA_BOTH : /* DMA Request on either edge */
regval |= PORT_PCR_IRQC_DMABOTH;
break;
default:
return;
}
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
}
}
/************************************************************************************
* Name: kinetis_pindmadisable
*
* Description:
* Disable DMA for specified pin
*
************************************************************************************/
void kinetis_pindmadisable(uint32_t pinset)
{
uintptr_t base;
uint32_t regval;
unsigned int port;
unsigned int pin;
/* Get the port number and pin number */
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Clear the IRQC field of the port PCR register in order to disable DMA. */
regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
regval &= ~PORT_PCR_IRQC_MASK;
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
}
}
#endif
arch/arm/src/kinetis/kinetis_pingpio.c
+151
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@@ -0,0 +1,151 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_pingpio.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include <assert.h>
#include <errno.h>
#include <nuttx/arch.h>
#include "up_arch.h"
#include "up_internal.h"
#include "kinetis_memorymap.h"
#include "kinetis_internal.h"
#include "kinetis_gpio.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: kinetis_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void kinetis_gpiowrite(uint32_t pinset, bool value)
{
uintptr_t base;
unsigned int port;
unsigned int pin;
DEBUGASSERT((pinset & _PIN_MODE_MASK) == _PIN_MODE_GPIO);
DEBUGASSERT((pinset & _PIN_IO_MASK) == _PIN_OUTPUT);
/* Get the port number and pin number */
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of GPIO block for this port */
base = KINETIS_GPIO_BASE(port);
/* Set or clear the output */
if (value)
{
putreg32((1 << pin), base + KINETIS_GPIO_PSOR_OFFSET);
}
else
{
putreg32((1 << pin), base + KINETIS_GPIO_PCOR_OFFSET);
}
}
}
/****************************************************************************
* Name: kinetis_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool kinetis_gpioread(uint32_t pinset)
{
uintptr_t base;
uint32_t regval;
unsigned int port;
unsigned int pin;
bool ret = false;
DEBUGASSERT((pinset & _PIN_MODE_MASK) == _PIN_MODE_GPIO);
DEBUGASSERT((pinset & _PIN_IO_MASK) == _PIN_INPUT);
/* Get the port number and pin number */
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of GPIO block for this port */
base = KINETIS_GPIO_BASE(port);
/* return the state of the pin */
regval = getreg32(base + KINETIS_GPIO_PDIR_OFFSET);
ret = ((regval & (1 << pin)) != 0);
}
return ret;
}
arch/arm/src/kinetis/kinetis_pinirq.c
+211
View File
@@ -0,0 +1,211 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_pinirq.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/board/board.h>
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include "up_internal.h"
#ifdef CONFIG_GPIO_IRQ
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifdndef CONFIG_KINESIS_NGPIOIRQS
# define CONFIG_KINESIS_NGPIOIRQS 8
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/************************************************************************************
* Name: kinetis_pinirqinitialize
*
* Description:
* Initialize logic to support a second level of interrupt decoding for GPIO pins.
*
************************************************************************************/
void kinetis_pinirqinitialize(void)
{
# warning "Missing logic"
}
/************************************************************************************
* Name: kinetis_pinirqconfig
*
* Description:
* Sets/clears PIN and interrupt triggers. On return PIN interrupts are always
* disabled.
*
* Parameters:
* - pinset: Pin configuration
* - pinisr: Pin interrupt service routine
*
* Returns:
* The previous value of the interrupt handler function pointer. This value may,
* for example, be used to restore the previous handler when multiple handlers are
* used.
*
************************************************************************************/
xcpt_t kinetis_pinirqconfig(uint32_t pinset, xcpt_t pinisr)
{
/* It only makes sense to call this function for input pins that are configured
* as interrupts.
*/
DEBUGASSERT((pinset & _PIN_INTDMA_MASK) == _PIN_INTERRUPT);
DEBUGASSERT((pinset & _PIN_IO_MASK) == _PIN_INPUT);
# warning "Missing logic"
return NULL;
}
/************************************************************************************
* Name: kinetis_pinirqenable
*
* Description:
* Enable the interrupt for specified pin IRQ
*
************************************************************************************/
void kinetis_pinirqenable(uint32_t pinset)
{
uintptr_t base;
uint32_t regval;
unsigned int port;
unsigned int pin;
/* Get the port number and pin number */
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Modify the IRQC field of the port PCR register in order to enable
* the interrupt.
*/
regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
regval &= ~PORT_PCR_IRQC_MASK;
switch (pinset & _PIN_INT_MASK)
{
case PIN_INT_ZERO : /* Interrupt when logic zero */
regval |= PORT_PCR_IRQC_ZERO;
break;
case PIN_INT_RISING : /* Interrupt on rising edge*/
regval |= PORT_PCR_IRQC_RISING;
break;
case PIN_INT_BOTH : /* Interrupt on falling edge */
regval |= PORT_PCR_IRQC_FALLING;
break;
case PIN_DMA_FALLING : /* nterrupt on either edge */
regval |= PORT_PCR_IRQC_BOTH;
break;
case PIN_INT_ONE : /* IInterrupt when logic one */
regval |= PORT_PCR_IRQC_ONE;
break;
default:
return;
}
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
}
}
/************************************************************************************
* Name: kinetis_pinirqdisable
*
* Description:
* Disable the interrupt for specified pin
*
************************************************************************************/
void kinetis_pinirqdisable(uint32_t pinset)
{
uintptr_t base;
uint32_t regval;
unsigned int port;
unsigned int pin;
/* Get the port number and pin number */
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Clear the IRQC field of the port PCR register in order to disable
* the interrupt.
*/
regval = getreg32(base + KINETIS_PORT_PCR_OFFSET(pin));
regval &= ~PORT_PCR_IRQC_MASK;
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
}
}
#endif /* CONFIG_GPIO_IRQ */
arch/arm/src/kinetis/kinetis_start.c
Executable → Regular
View File
arch/arm/src/kinetis/kinetis_timerisr.c
Executable → Regular
View File
arch/arm/src/kinetis/kinetis_vectors.S
Executable → Regular
View File
arch/arm/src/stm32/stm32_gpio.c
-3
View File
@@ -608,9 +608,6 @@ bool stm32_gpioread(uint32_t pinset)
* Description:
* Sets/clears GPIO based event and interrupt triggers.
*
* Limitations:
* Presently single gpio can configured on the same EXTI line.
*
* Parameters:
* - pinset: gpio pin configuration
* - rising/falling edge: enables
arch/arm/src/stm32/stm32_gpio.h
-3
View File
@@ -229,9 +229,6 @@ EXTERN bool stm32_gpioread(uint32_t pinset);
* Description:
* Sets/clears GPIO based event and interrupt triggers.
*
* Limitations:
* Presently single gpio can configured on the same EXTI line.
*
* Parameters:
* - pinset: gpio pin configuration
* - rising/falling edge: enables