diff --git a/arch/arm/include/bcm2708/irq.h b/arch/arm/include/bcm2708/irq.h index eae44042592..b576a60dd83 100644 --- a/arch/arm/include/bcm2708/irq.h +++ b/arch/arm/include/bcm2708/irq.h @@ -131,13 +131,26 @@ #define BCM_IRQ_PCM (IPR2_IRQ_FIRST + 23) /* Bit 23: 55 PCM interrupt */ #define BCM_IRQ_UART (IPR2_IRQ_FIRST + 24) /* Bit 24: 57 UART interrupt */ -#define IPR2_BIT_IRQMASK 0x01ff6800 /* Mask of defined interrupts */ -#define IPR2_IRQ_LAST BCM_IRQ_UART /* IRQ of last defined bit */ -#define IPR2_BIT_LAST (24) /* Last defined bit */ +#define IPR2_BIT_IRQMASK 0x01ff6800 /* Mask of defined interrupts */ +#define IPR2_IRQ_LAST BCM_IRQ_UART /* IRQ of last defined bit */ +#define IPR2_BIT_LAST (24) /* Last defined bit */ /* Number of interrupts */ -#define NR_IRQS (IPR2_IRQ_LAST + 1) +#define NR_INTERRUPTS (IPR2_IRQ_LAST + 1) + +/* Second level GPIO interrupts */ + +#ifdef CONFIG_BCM2708_GPIO_IRQ +# define BCM_IRQ_GPIO(n) (NR_INTERRUPTS + (n)) +# define NR_GPIOINTS (54) +#else +# define NR_GPIOINTS (0) +#endif + +/* Number of supported IRQs */ + +#define NR_IRQS (NR_INTERRUPTS + NR_GPIOINTS) #else # error Unrecognized BCM2708 chip diff --git a/arch/arm/src/bcm2708/Kconfig b/arch/arm/src/bcm2708/Kconfig index 32c0351ccf6..cdadfbd7f61 100644 --- a/arch/arm/src/bcm2708/Kconfig +++ b/arch/arm/src/bcm2708/Kconfig @@ -15,4 +15,10 @@ config ARCH_CHIP_BCM2835 bool "Broadcom BCM2835" endchoice # BCM2708 Configuration Option + +menuconfig BCM2708_GPIO_IRQ + bool "GPIO pin interrupts" + ---help--- + Enable support for interrupting GPIO pins + endif # ARCH_CHIP_BCM2708 diff --git a/arch/arm/src/bcm2708/bcm_gpio.h b/arch/arm/src/bcm2708/bcm_gpio.h new file mode 100644 index 00000000000..4720bea3626 --- /dev/null +++ b/arch/arm/src/bcm2708/bcm_gpio.h @@ -0,0 +1,309 @@ +/************************************************************************************ + * arch/arm/src/bcm2708/bcm_gpio.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_BCM2708_BCM_GPIO_H +#define __ARCH_ARM_SRC_BCM2708_BCM_GPIO_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Bit-encoded input to bcm_configgpio() ********************************************/ + +/* 32-bit Encoding: + * + * .... .... .... .MMM PPII IIII V.BB BBBB + */ + +/* Input/Output mode: + * + * .... .... .... .MMM .... .... .... .... + */ + +#define GPIO_MODE_SHIFT (16) /* Bits 16-18: GPIO mode */ +#define GPIO_MODE_MASK (7 << GPIO_MODE_SHIFT) +# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* PIO Input */ +# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* PIO Output */ +# define GPIO_ALT0 (4 << GPIO_MODE_SHIFT) /* Alternate function 0 */ +# define GPIO_ALT1 (5 << GPIO_MODE_SHIFT) /* Alternate function 1 */ +# define GPIO_ALT2 (6 << GPIO_MODE_SHIFT) /* Alternate function 2 */ +# define GPIO_ALT3 (7 << GPIO_MODE_SHIFT) /* Alternate function 3 */ +# define GPIO_ALT4 (3 << GPIO_MODE_SHIFT) /* Alternate function 4 */ +# define GPIO_ALT5 (2 << GPIO_MODE_SHIFT) /* Alternate function 5 */ + +/* These bits set the pull up/down configuration of the pin: + * + * .... .... .... .... PP.. .... .... .... + */ + +#define GPIO_PUD_SHIFT (14) /* Bits 14-16: GPIO configuration bits */ +#define GPIO_PUD_MASK (3 << GPIO_PUD_SHIFT) +# define GPIO_PUD_NONE (0 << GPIO_PUD_SHIFT) /* Default, no pull */ +# define GPIO_PUD_PULLDOWN (1 << GPIO_PUD_SHIFT) /* Enable pull down */ +# define GPIO_PUD_PULLUP (2 << GPIO_PUD_SHIFT) /* Enable pull up */ + +/* Interrupt detection modes: + * + * .... .... .... .... ..II IIII .... .... + */ + +#define GPIO_INT_SHIFT (8) /* Bits 8-13: GPIO interrupt bits */ +#define GPIO_INT_MASK (0x3f << GPIO_INT_SHIFT) +# define GPIO_INT_NONE (0 << GPIO_INT_SHIFT) +# define GPIO_INT_RISING (1 << GPIO_INT_SHIFT) +# define GPIO_INT_FALLING (2 << GPIO_INT_SHIFT) +# define GPIO_INT_BOTHEDGES (GPIO_INT_RISING | GPIO_INT_FALLING) + +# define GPIO_INT_ASYNCHRISING (4 << GPIO_INT_SHIFT) +# define GPIO_INT_ASYNCHFALLING (8 << GPIO_INT_SHIFT) +# define GPIO_INT_ASYNCHBOTH (GPIO_INT_ASYNCHRISING | GPIO_INT_ASYNCHFALLING) + +# define GPIO_INT_HIGHLEVEL (16 << GPIO_INT_SHIFT) +# define GPIO_INT_LOWLEVEL (32 << GPIO_INT_SHIFT) +# define GPIO_INT_LEVELBOTH (GPIO_INT_HIGHLEVEL | GPIO_INT_LOWLEVEL) + +/* If the pin is an GPIO output, then this identifies the initial output value: + * + * .... .... .... .... .... .... V... .... + */ + +#define GPIO_OUTPUT_SET (1 << 7) /* Bit 7: Initial value of output */ +#define GPIO_OUTPUT_CLEAR (0) + +/* This identifies the bit in the port: + * + * ..... .... ... .... .... ..BB BBBB + */ + +#define GPIO_PIN_SHIFT (0) /* Bits 0-5: GPIO number: 0-31 */ +#define GPIO_PIN_MASK (63 << GPIO_PIN_SHIFT) +#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) +#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) +#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) +#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) +#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) +#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) +#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) +#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) +#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) +#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) +#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) +#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) +#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) +#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) +#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) +#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) +#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) +#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) +#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) +#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) +#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) +#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) +#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) +#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) +#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) +#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) +#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) +#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) +#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) +#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) +#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) +#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) +#define GPIO_PIN32 (32 << GPIO_PIN_SHIFT) +#define GPIO_PIN33 (33 << GPIO_PIN_SHIFT) +#define GPIO_PIN34 (34 << GPIO_PIN_SHIFT) +#define GPIO_PIN35 (35 << GPIO_PIN_SHIFT) +#define GPIO_PIN36 (36 << GPIO_PIN_SHIFT) +#define GPIO_PIN37 (37 << GPIO_PIN_SHIFT) +#define GPIO_PIN38 (38 << GPIO_PIN_SHIFT) +#define GPIO_PIN39 (39 << GPIO_PIN_SHIFT) +#define GPIO_PIN40 (40 << GPIO_PIN_SHIFT) +#define GPIO_PIN41 (41 << GPIO_PIN_SHIFT) +#define GPIO_PIN42 (42 << GPIO_PIN_SHIFT) +#define GPIO_PIN43 (43 << GPIO_PIN_SHIFT) +#define GPIO_PIN44 (44 << GPIO_PIN_SHIFT) +#define GPIO_PIN45 (45 << GPIO_PIN_SHIFT) +#define GPIO_PIN46 (46 << GPIO_PIN_SHIFT) +#define GPIO_PIN47 (47 << GPIO_PIN_SHIFT) +#define GPIO_PIN48 (48 << GPIO_PIN_SHIFT) +#define GPIO_PIN49 (49 << GPIO_PIN_SHIFT) +#define GPIO_PIN50 (50 << GPIO_PIN_SHIFT) +#define GPIO_PIN51 (51 << GPIO_PIN_SHIFT) +#define GPIO_PIN52 (52 << GPIO_PIN_SHIFT) +#define GPIO_PIN53 (53 << GPIO_PIN_SHIFT) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* Must be big enough to hold the 32-bit encoding */ + +typedef uint32_t gpio_pinset_t; + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Function: bcm_gpio_initialize + * + * Description: + * Based on configuration within the .config file, it does: + * - Remaps positions of alternative functions for GPIO. + * + * Typically called from bcm_start(). + * + ************************************************************************************/ + +void bcm_gpio_initialize(void); + +/************************************************************************************ + * Name: bcm_gpio_irqinitialize + * + * Description: + * Initialize logic to support a second level of interrupt decoding for GPIO pins. + * + ************************************************************************************/ + +#ifdef CONFIG_BCM2708_GPIO_IRQ +void bcm_gpio_irqinitialize(void); +#else +# define bcm_gpio_irqinitialize() +#endif + +/************************************************************************************ + * Name: bcm_configgpio + * + * Description: + * Configure a GPIO pin based on bit-encoded description of the pin. + * + ************************************************************************************/ + +int bcm_configgpio(gpio_pinset_t cfgset); + +/************************************************************************************ + * Name: bcm_gpiowrite + * + * Description: + * Write one or zero to the selected GPIO pin + * + ************************************************************************************/ + +void bcm_gpiowrite(gpio_pinset_t pinset, bool value); + +/************************************************************************************ + * Name: bcm_gpioread + * + * Description: + * Read one or zero from the selected GPIO pin + * + ************************************************************************************/ + +bool bcm_gpioread(gpio_pinset_t pinset); + +/************************************************************************************ + * Name: bcm_gpioirq + * + * Description: + * Configure an interrupt for the specified GPIO pin. + * + ************************************************************************************/ + +#ifdef CONFIG_BCM2708_GPIO_IRQ +void bcm_gpioirq(gpio_pinset_t pinset); +#else +# define bcm_gpioirq(pinset) +#endif + +/************************************************************************************ + * Name: bcm_gpioirqenable + * + * Description: + * Enable the interrupt for specified GPIO IRQ + * + ************************************************************************************/ + +#ifdef CONFIG_BCM2708_GPIO_IRQ +void bcm_gpioirqenable(int irq); +#else +# define bcm_gpioirqenable(irq) +#endif + +/************************************************************************************ + * Name: bcm_gpioirqdisable + * + * Description: + * Disable the interrupt for specified GPIO IRQ + * + ************************************************************************************/ + +#ifdef CONFIG_BCM2708_GPIO_IRQ +void bcm_gpioirqdisable(int irq); +#else +# define bcm_gpioirqdisable(irq) +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_BCM2708_BCM_GPIO_H */ diff --git a/arch/arm/src/bcm2708/bcm_irq.c b/arch/arm/src/bcm2708/bcm_irq.c index 1fcb53c0cbc..3a25871f572 100644 --- a/arch/arm/src/bcm2708/bcm_irq.c +++ b/arch/arm/src/bcm2708/bcm_irq.c @@ -52,6 +52,7 @@ #include "up_internal.h" #include "group/group.h" +#include "bcm_gpio.h" #include "chip/bcm2708_irq.h" /**************************************************************************** @@ -92,6 +93,12 @@ void up_irqinitialize(void) CURRENT_REGS = NULL; +#ifdef CONFIG_BCM2708_GPIO_IRQ + /* Initialize GPIO interrrupts */ + + bcm_gpio_irqinitialize(); +#endif + #ifndef CONFIG_SUPPRESS_INTERRUPTS /* And finally, enable interrupts */