diff --git a/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h b/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h index 763c257ccb8..f60b0095f54 100644 --- a/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h +++ b/arch/arm/src/imxrt/hardware/rt117x/imxrt117x_ccm.h @@ -754,7 +754,7 @@ #define CCM_CCGR_MU_A 20 #define CCM_CCGR_MU_B 21 #define CCM_CCGR_EDMA 22 -#define CCM_CCGR_DMA 22 //Note Added CTRL for compatiblity +#define CCM_CCGR_DMA 22 /* Note Added CTRL for compatiblity */ #define CCM_CCGR_EDMA_LPSR 23 #define CCM_CCGR_ROMCP 24 #define CCM_CCGR_OCRAM 25 @@ -770,10 +770,10 @@ #define CCM_CCGR_IEE 35 #define CCM_CCGR_KEY_MANAGER 36 #define CCM_CCGR_PUF 36 -#define CCM_CCGR_OCOTP_CTRL 37 //Note Added CTRL for compatiblity +#define CCM_CCGR_OCOTP_CTRL 37 /* Note Added CTRL for compatiblity */ #define CCM_CCGR_SNVS_HP 38 #define CCM_CCGR_SNVS 39 -#define CCM_CCGR_SNVS_LP 39 //Note Added CTRL for compatiblity +#define CCM_CCGR_SNVS_LP 39 /* Note Added CTRL for compatiblity */ #define CCM_CCGR_CAAM 40 #define CCM_CCGR_JTAG_MUX 41 #define CCM_CCGR_CSTRACE 42 @@ -796,7 +796,7 @@ #define CCM_CCGR_ACMP2 59 #define CCM_CCGR_ACMP3 60 #define CCM_CCGR_ACMP4 61 -#define CCM_CCGR_PIT 62 // Renamed from PIT1 to PIT for compatibility +#define CCM_CCGR_PIT 62 /* Renamed from PIT1 to PIT for compatibility */ #define CCM_CCGR_PIT2 63 #define CCM_CCGR_GPT1 64 #define CCM_CCGR_GPT2 65 diff --git a/arch/arm/src/nrf52/hardware/nrf52_temp.h b/arch/arm/src/nrf52/hardware/nrf52_temp.h index 850d70bdc9e..439739ef67e 100644 --- a/arch/arm/src/nrf52/hardware/nrf52_temp.h +++ b/arch/arm/src/nrf52/hardware/nrf52_temp.h @@ -95,4 +95,4 @@ #define NRF52_TEMP_INTENCLR_DATARDY (1 << 0) /* Read: Enabled */ -#endif // __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TEMP_H +#endif /* __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TEMP_H */ diff --git a/arch/arm/src/nrf52/nrf52_ppi.h b/arch/arm/src/nrf52/nrf52_ppi.h index f7b82b839b2..f51d6e066d8 100644 --- a/arch/arm/src/nrf52/nrf52_ppi.h +++ b/arch/arm/src/nrf52/nrf52_ppi.h @@ -171,4 +171,4 @@ void nrf52_ppi_grp_enable(uint8_t group, bool enable); } #endif -#endif // __ARCH_ARM_SRC_NRF52_NRF52_PPI_H +#endif /* __ARCH_ARM_SRC_NRF52_NRF52_PPI_H */ diff --git a/arch/arm/src/nrf53/hardware/nrf53_temp.h b/arch/arm/src/nrf53/hardware/nrf53_temp.h index 24f6e12ca1a..2b0a1910cd3 100644 --- a/arch/arm/src/nrf53/hardware/nrf53_temp.h +++ b/arch/arm/src/nrf53/hardware/nrf53_temp.h @@ -94,4 +94,4 @@ #define NRF53_TEMP_INTENCLR_DATARDY (1 << 0) /* Read: Enabled */ -#endif // __ARCH_ARM_SRC_NRF53_HARDWARE_NRF53_TEMP_H +#endif /* __ARCH_ARM_SRC_NRF53_HARDWARE_NRF53_TEMP_H */ diff --git a/arch/arm/src/str71x/str71x_map.h b/arch/arm/src/str71x/str71x_map.h index ad40e6f30a9..597520a7b81 100644 --- a/arch/arm/src/str71x/str71x_map.h +++ b/arch/arm/src/str71x/str71x_map.h @@ -81,4 +81,4 @@ * Public Functions Prototypes ****************************************************************************/ -#endif // __ARCH_ARM_SRC_STR71X_STR71X_MAP_H +#endif /* __ARCH_ARM_SRC_STR71X_STR71X_MAP_H */ diff --git a/arch/arm/src/tiva/hardware/tiva_adc.h b/arch/arm/src/tiva/hardware/tiva_adc.h index 78836b77a90..c1dc1005348 100644 --- a/arch/arm/src/tiva/hardware/tiva_adc.h +++ b/arch/arm/src/tiva/hardware/tiva_adc.h @@ -943,4 +943,4 @@ #define ADC_CC_CS_PIOSC (0x001) /* PIOSC */ #define ADC_CC_CS_MOSC (0x002) /* MOSC */ -#endif // __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADC_H +#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_ADC_H */ diff --git a/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h b/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h index ead5615d208..5cc4d1d9099 100644 --- a/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h +++ b/arch/arm/src/tiva/hardware/tm4c/tm4c_flash.h @@ -415,4 +415,4 @@ /* Flash Memory Protection Program Enable 0-15 (32-bit, bit-encoded) */ -#endif // __ARCH_ARM_SRC_TIVA_HARDWARE_TM4C_TM4C_FLASH_H +#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TM4C_TM4C_FLASH_H */ diff --git a/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c b/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c index 0dd7b0dc2a3..f33434a66c5 100644 --- a/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c +++ b/arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c @@ -109,7 +109,7 @@ #define DEFAULT_LISTEN_INTERVAL CONFIG_EXAMPLE_WIFI_LISTEN_INTERVAL -#define RTC_CLK_CAL_FRACT 19 //!< Number of fractional bits in values returned by rtc_clk_cal +#define RTC_CLK_CAL_FRACT 19 /* Number of fractional bits in values returned by rtc_clk_cal */ #define ets_timer _ETSTIMER_ diff --git a/include/nuttx/timers/pl031.h b/include/nuttx/timers/pl031.h index 15a52908119..6f041d4a6e4 100644 --- a/include/nuttx/timers/pl031.h +++ b/include/nuttx/timers/pl031.h @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_TIMER_PL031_H -#define __INCLUDE_NUTTX_TIMER_PL031_H +#ifndef __INCLUDE_NUTTX_TIMERS_PL031_H +#define __INCLUDE_NUTTX_TIMERS_PL031_H /**************************************************************************** * Public Function Prototypes @@ -35,4 +35,4 @@ FAR struct rtc_lowerhalf_s *pl031_initialize(uintptr_t base, int irq); -#endif //__INCLUDE_NUTTX_TIMER_PL031_H +#endif /* __INCLUDE_NUTTX_TIMERS_PL031_H */