diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c
index 777f624aa4d..b5033b0576b 100644
--- a/arch/arm/src/stm32/stm32_adc.c
+++ b/arch/arm/src/stm32/stm32_adc.c
@@ -694,10 +694,10 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
 
       case 4: /* TimerX TRGO event */
         {
-#warning "TRGO support not yet implemented"
-
+          /* TODO: TRGO support not yet implemented */
           /* Set the event TRGO */
 
+          ccenable = 0;
           egr      = GTIM_EGR_TG;
 
           /* Set the duty cycle by writing to the CCR register for this channel */
@@ -971,7 +971,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
   avdbg("intf: ADC%d\n", priv->intf);
   flags = irqsave();
 
-  /* Enable  ADC reset state */
+  /* Enable ADC reset state */
 
   adc_rccreset(priv, true);
 
@@ -1164,6 +1164,10 @@ static int adc_setup(FAR struct adc_dev_s *dev)
   ret = irq_attach(priv->irq, priv->isr);
   if (ret == OK)
     {
+      /* Make sure that the ADC device is in the powered up, reset state */
+
+      adc_reset(dev);
+
       /* Enable the ADC interrupt */
 
       avdbg("Enable the ADC interrupt: irq=%d\n", priv->irq);
diff --git a/arch/arm/src/stm32/stm32_adc.h b/arch/arm/src/stm32/stm32_adc.h
index 34f29020c7f..060fcdfb90c 100644
--- a/arch/arm/src/stm32/stm32_adc.h
+++ b/arch/arm/src/stm32/stm32_adc.h
@@ -287,7 +287,7 @@
 
 #if defined(ADC1_HAVE_TIMER) || defined(ADC2_HAVE_TIMER) || defined(ADC3_HAVE_TIMER)
 #  define ADC_HAVE_TIMER 1
-#  if defined(CONFIG_STM32_STM32F10XX) && defined(CONFIG_STM32_FORCEPOWER)
+#  if defined(CONFIG_STM32_STM32F10XX) && !defined(CONFIG_STM32_FORCEPOWER)
 #    warning "CONFIG_STM32_FORCEPOWER must be defined to enable the timer(s)"
 #  endif
 #else