diff --git a/arch/arm/src/armv8-r/arm_cache.c b/arch/arm/src/armv8-r/arm_cache.c
index 7b123f94546..6a8f081e3ba 100644
--- a/arch/arm/src/armv8-r/arm_cache.c
+++ b/arch/arm/src/armv8-r/arm_cache.c
@@ -308,7 +308,7 @@ void up_invalidate_dcache_all(void)
 
 void up_clean_dcache(uintptr_t start, uintptr_t end)
 {
-  if ((end - start) < cp15_cache_size())
+  if ((end - start) < cp15_dcache_size())
     {
       cp15_clean_dcache(start, end);
     }
@@ -372,7 +372,7 @@ void up_clean_dcache_all(void)
 
 void up_flush_dcache(uintptr_t start, uintptr_t end)
 {
-  if ((end - start) < cp15_cache_size())
+  if ((end - start) < cp15_dcache_size())
     {
       cp15_flush_dcache(start, end);
     }
diff --git a/arch/arm/src/armv8-r/cp15_cacheops.c b/arch/arm/src/armv8-r/cp15_cacheops.c
index 13c1a577fec..c45ec97f7c5 100644
--- a/arch/arm/src/armv8-r/cp15_cacheops.c
+++ b/arch/arm/src/armv8-r/cp15_cacheops.c
@@ -28,6 +28,12 @@
 
 #include "cp15_cacheops.h"
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define NVIC_CSSELR_IND (1 << 0)
+
 /****************************************************************************
  * Private Functions
  ****************************************************************************/
@@ -44,9 +50,17 @@ static inline uint32_t ilog2(uint32_t u)
   return i;
 }
 
-static inline uint32_t cp15_cache_get_info(uint32_t *sets, uint32_t *ways)
+static inline uint32_t cp15_cache_get_info(uint32_t *sets, uint32_t *ways,
+                                           bool icache)
 {
-  uint32_t ccsidr = CP15_GET(CCSIDR);
+  uint32_t ccsidr;
+  uint32_t csselr;
+
+  csselr = CP15_GET(CSSELR);
+
+  CP15_SET(CSSELR, (csselr & ~NVIC_CSSELR_IND) | (icache & NVIC_CSSELR_IND));
+
+  ccsidr = CP15_GET(CCSIDR);
 
   if (sets)
     {
@@ -58,6 +72,8 @@ static inline uint32_t cp15_cache_get_info(uint32_t *sets, uint32_t *ways)
       *ways = ((ccsidr >> 3) & 0x3ff) + 1;
     }
 
+  CP15_SET(CSSELR, csselr);   /* restore csselr */
+
   return (1 << ((ccsidr & 0x7) + 2)) * 4;
 }
 
@@ -93,7 +109,7 @@ static void cp15_dcache_op_mva(uintptr_t start, uintptr_t end, int op)
 {
   uint32_t line;
 
-  line = cp15_cache_get_info(NULL, NULL);
+  line = cp15_dcache_linesize();
 
   ARM_DSB();
 
@@ -158,7 +174,7 @@ void cp15_dcache_op_level(uint32_t level, int op)
 
   /* Get cache info */
 
-  line = cp15_cache_get_info(&sets, &ways);
+  line = cp15_cache_get_info(&sets, &ways, false);
 
   way_shift = 32 - ilog2(ways);
   set_shift = ilog2(line);
@@ -209,7 +225,7 @@ void cp15_invalidate_icache(uintptr_t start, uintptr_t end)
 {
   uint32_t line;
 
-  line = cp15_cache_get_info(NULL, NULL);
+  line = cp15_icache_linesize();
   start &= ~(line - 1);
 
   ARM_DSB();
diff --git a/arch/arm/src/armv8-r/cp15_cacheops.h b/arch/arm/src/armv8-r/cp15_cacheops.h
index 78e607df834..6e1b31d635b 100644
--- a/arch/arm/src/armv8-r/cp15_cacheops.h
+++ b/arch/arm/src/armv8-r/cp15_cacheops.h
@@ -1114,7 +1114,7 @@ void cp15_flush_dcache_all(void);
 uint32_t cp15_icache_size(void);
 
 /****************************************************************************
- * Name: cp15_cache_size
+ * Name: cp15_dcache_size
  *
  * Description:
  *   Get cp15 dcache size in byte