mirror of
https://github.com/apache/nuttx.git
synced 2026-06-01 16:59:28 +08:00
All linker scripts: Preface all _ebss defininitions with . = ALIGN(4). Otherwise, the last bytes in the .bss section will not be initialized properly. Also convert all linker scripts that use TABs to spaces.
This commit is contained in:
Gregory Nutt
@@ -37,103 +37,103 @@ OUTPUT_ARCH(m32c)
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ENTRY(_stext)
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SECTIONS
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{
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/* "Far" flash memory begins at address 0xf0000 for the M20262F8 part and
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* ends at address 0xfffff (all parts). The program entry point is
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* the first address in flash
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*/
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/* "Far" flash memory begins at address 0xf0000 for the M20262F8 part and
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* ends at address 0xfffff (all parts). The program entry point is
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* the first address in flash
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*/
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. = 0xf0000;
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.text : {
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_stext = ABSOLUTE(.);
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*(.text)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata)
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*(.glue_7)
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*(.glue_7t)
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*(.got) /* Global offset table */
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_etext = ABSOLUTE(.);
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}
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. = 0xf0000;
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.text : {
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_stext = ABSOLUTE(.);
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*(.text)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata)
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*(.glue_7)
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*(.glue_7t)
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*(.got) /* Global offset table */
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_etext = ABSOLUTE(.);
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}
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_enronly = ABSOLUTE(.); /* End of read-only values */
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/* .ndata will be relocated */
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/* from this address */
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_enronly = ABSOLUTE(.); /* End of read-only values */
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/* .ndata will be relocated */
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/* from this address */
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/* The "variable" vector table will be fixed at the following address */
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/* The "variable" vector table will be fixed at the following address */
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. = 0xffd00;
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.varvect : {
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_svarvect = ABSOLUTE(.);
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*(.varvect)
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_evarvect = ABSOLUTE(.);
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}
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. = 0xffd00;
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.varvect : {
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_svarvect = ABSOLUTE(.);
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*(.varvect)
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_evarvect = ABSOLUTE(.);
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}
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/* Followed by the special page/fixed vector table. */
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/* Followed by the special page/fixed vector table. */
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. = 0xffe00;
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.specpg : {
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_sspecpg = ABSOLUTE(.);
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*(.specpg)
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_especpg = ABSOLUTE(.);
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}
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. = 0xffe00;
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.specpg : {
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_sspecpg = ABSOLUTE(.);
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*(.specpg)
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_especpg = ABSOLUTE(.);
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}
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. = 0xfffdc;
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.fixvect : {
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_sfixvect = ABSOLUTE(.);
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*(.fixvect)
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_efixvect = ABSOLUTE(.);
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}
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. = 0xfffdc;
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.fixvect : {
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_sfixvect = ABSOLUTE(.);
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*(.fixvect)
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_efixvect = ABSOLUTE(.);
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}
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/* Internal "near" RAM begins at address 0x00400 (all parts) and ends at
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* address 0x00bff (M20262F6 and M20262F8 parts). With the RAM
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* region, used is .data followed by .bss. The remainder of RAM
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* carved up by the start-up code into stacks and heaps.
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*/
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/* Internal "near" RAM begins at address 0x00400 (all parts) and ends at
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* address 0x00bff (M20262F6 and M20262F8 parts). With the RAM
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* region, used is .data followed by .bss. The remainder of RAM
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* carved up by the start-up code into stacks and heaps.
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*/
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. = 0x00400;
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. = 0x00400;
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.ndata : {
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_sndata = ABSOLUTE(.);
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*(.data)
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CONSTRUCTORS
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_endata = ABSOLUTE(.);
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}
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.ndata : {
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_sndata = ABSOLUTE(.);
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*(.data)
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CONSTRUCTORS
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_endata = ABSOLUTE(.);
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}
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.nbss : { /* BSS */
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_snbss = ABSOLUTE(.);
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*(.bss)
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*(COMMON)
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_enbss = ABSOLUTE(.);
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}
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.nbss : { /* BSS */
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_snbss = ABSOLUTE(.);
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*(.bss)
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*(COMMON)
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_enbss = ABSOLUTE(.);
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}
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/* "Far" RAM begins at 0x10000. The SKP16C26 has no far RAM */
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/* "Far" RAM begins at 0x10000. The SKP16C26 has no far RAM */
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. = 0x10000;
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. = 0x10000;
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.fdata : {
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_sfdata = ABSOLUTE(.);
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*(.fdata)
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CONSTRUCTORS
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_efdata = ABSOLUTE(.);
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}
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.fdata : {
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_sfdata = ABSOLUTE(.);
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*(.fdata)
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CONSTRUCTORS
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_efdata = ABSOLUTE(.);
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}
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.fbss : { /* BSS */
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_sfbss = ABSOLUTE(.);
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*(.fbss)
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*(COMMON)
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_efbss = ABSOLUTE(.);
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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.fbss : { /* BSS */
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_sfbss = ABSOLUTE(.);
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*(.fbss)
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*(COMMON)
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_efbss = ABSOLUTE(.);
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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@@ -73,6 +73,7 @@ SECTIONS
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.bss : ALIGN(4) { /* BSS */
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_sbss = ABSOLUTE(.);
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*(.bss)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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}
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@@ -37,55 +37,56 @@ OUTPUT_ARCH(sh)
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ENTRY(_stext)
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SECTIONS
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{
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/* The us7032evb1 has CMON in PROM beginning at address 0x00000000 and
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* either 64Kb or 256Kb of SRAM beginning at 0x0a000000. Neither the
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* PROM nor the first 8Kb of SRAM are avaible to the devoleper as these
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* are used by CMON. The next 1Kb of SRAM is dedicated to relocated
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* interrupt vectors.
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*/
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/* The us7032evb1 has CMON in PROM beginning at address 0x00000000 and
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* either 64Kb or 256Kb of SRAM beginning at 0x0a000000. Neither the
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* PROM nor the first 8Kb of SRAM are avaible to the devoleper as these
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* are used by CMON. The next 1Kb of SRAM is dedicated to relocated
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* interrupt vectors.
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*/
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. = 0x0a002000;
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.text : {
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_svect = ABSOLUTE(.);
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*(.vects); /* Relocated interrupt vectors */
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_evect = ABSOLUTE(.);
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_stext = ABSOLUTE(.);
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*(.reset) /* Reset/IRQ code */
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*(.text) /* Code */
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*(.fixup)
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*(.gnu.warning)
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*(.rodata) /* Read-only data */
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*(.rodata.str1.4)
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*(.glue_7)
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*(.glue_7t)
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*(.got) /* Global offset table */
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_etext = ABSOLUTE(.);
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}
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. = 0x0a002000;
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.text : {
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_svect = ABSOLUTE(.);
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*(.vects); /* Relocated interrupt vectors */
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_evect = ABSOLUTE(.);
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_stext = ABSOLUTE(.);
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*(.reset) /* Reset/IRQ code */
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*(.text) /* Code */
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*(.fixup)
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*(.gnu.warning)
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*(.rodata) /* Read-only data */
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*(.rodata.str1.4)
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*(.glue_7)
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*(.glue_7t)
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*(.got) /* Global offset table */
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_etext = ABSOLUTE(.);
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}
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data) /* Modifiable data */
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CONSTRUCTORS
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_edata = ABSOLUTE(.);
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}
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data) /* Modifiable data */
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CONSTRUCTORS
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_edata = ABSOLUTE(.);
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}
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.bss : { /* BSS */
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_sbss = ABSOLUTE(.);
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*(.bss)
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*(COMMON)
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_ebss = ABSOLUTE(.);
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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.bss : { /* BSS */
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_sbss = ABSOLUTE(.);
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*(.bss)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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