mirror of
https://github.com/apache/nuttx.git
synced 2026-05-28 20:08:15 +08:00
All linker scripts: Preface all _ebss defininitions with . = ALIGN(4). Otherwise, the last bytes in the .bss section will not be initialized properly. Also convert all linker scripts that use TABs to spaces.
This commit is contained in:
Gregory Nutt
File diff suppressed because it is too large
Load Diff
@@ -37,57 +37,57 @@
|
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MEMORY
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{
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
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* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
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*/
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
|
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* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
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||||
*/
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||||
|
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kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
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||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
|
||||
|
||||
/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
|
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* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
|
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* all other accesses are in KSEG0.
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*
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* REGION PHYSICAL KSEG SIZE
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* DESCRIPTION START ADDR (BYTES)
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* --------------- ---------- ------ ----------------------
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* Exceptions:*
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* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
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* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
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* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
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* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
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* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
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* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
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* JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb)
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* Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb)
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* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
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*
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* Exceptions assume:
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*
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* STATUS: BEV=0/1 and EXL=0
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* CAUSE: IV=1
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* JTAG: ProbEn=0
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* And multi-vector support disabled
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*/
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/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
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* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
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* all other accesses are in KSEG0.
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*
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* REGION PHYSICAL KSEG SIZE
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* DESCRIPTION START ADDR (BYTES)
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* --------------- ---------- ------ ----------------------
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* Exceptions:*
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* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
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* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
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* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
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* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
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* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
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* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
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* JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb)
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* Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb)
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* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
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*
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* Exceptions assume:
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*
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* STATUS: BEV=0/1 and EXL=0
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* CAUSE: IV=1
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* JTAG: ProbEn=0
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* And multi-vector support disabled
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*/
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kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
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kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
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kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
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kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
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kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
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kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
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kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
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kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16
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kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
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kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
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kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
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kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
|
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kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
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kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
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kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16
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||||
kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
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||||
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
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* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
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* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
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||||
* at the beginning of this region for use by MPLAB.
|
||||
*/
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
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* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
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* always accessed through KSEG1.
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||||
*
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* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
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* at the beginning of this region for use by MPLAB.
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*/
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kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K
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kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K
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}
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OUTPUT_FORMAT("elf32-tradlittlemips")
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@@ -96,221 +96,222 @@ ENTRY(__start)
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SECTIONS
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{
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/* Boot FLASH sections */
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/* Boot FLASH sections */
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|
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.reset :
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{
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KEEP (*(.reset))
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} > kseg1_reset
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.reset :
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{
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KEEP (*(.reset))
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} > kseg1_reset
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|
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/* Exception handlers. The following is assumed:
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*
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* STATUS: BEV=1 and EXL=0
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* CAUSE: IV=1
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* JTAG: ProbEn=0
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* And multi-vector support disabled
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*
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* In that configuration, the vector locations become:
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*
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* Reset, Soft Reset bfc0:0000
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* TLB Refill bfc0:0200
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* Cache Error bfc0:0300
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* All others bfc0:0380
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* Interrupt bfc0:0400
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* EJTAG Debug bfc0:0480
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*/
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||||
/* Exception handlers. The following is assumed:
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||||
*
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||||
* STATUS: BEV=1 and EXL=0
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||||
* CAUSE: IV=1
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||||
* JTAG: ProbEn=0
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||||
* And multi-vector support disabled
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||||
*
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||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
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||||
* All others bfc0:0380
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||||
* Interrupt bfc0:0400
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||||
* EJTAG Debug bfc0:0480
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||||
*/
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||||
|
||||
/* KSEG1 exception handler "trampolines" */
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||||
/* KSEG1 exception handler "trampolines" */
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||||
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.gen_excpt :
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{
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KEEP (*(.gen_excpt))
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} > kseg1_genexcpt
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.gen_excpt :
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{
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KEEP (*(.gen_excpt))
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} > kseg1_genexcpt
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.ebase_excpt :
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{
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KEEP (*(.ebase_excpt))
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} > kseg1_ebexcpt
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.ebase_excpt :
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{
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||||
KEEP (*(.ebase_excpt))
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} > kseg1_ebexcpt
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|
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.bev_excpt :
|
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{
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KEEP (*(.bev_excpt))
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} > kseg1_bevexcpt
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||||
.bev_excpt :
|
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{
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KEEP (*(.bev_excpt))
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} > kseg1_bevexcpt
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||||
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.int_excpt :
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{
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KEEP (*(.int_excpt))
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||||
} > kseg1_intexcpt
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
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||||
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
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.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
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||||
|
||||
.start :
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||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
|
||||
*(.start)
|
||||
*(.start)
|
||||
|
||||
/* KSEG0 exception handlers */
|
||||
/* KSEG0 exception handlers */
|
||||
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
|
||||
.devcfg :
|
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{
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||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
|
||||
/* Program FLASH sections */
|
||||
/* Program FLASH sections */
|
||||
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
|
||||
/* Read-only data is included in the text section */
|
||||
/* Read-only data is included in the text section */
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
|
||||
/* Small initialized constant global and static data */
|
||||
/* Small initialized constant global and static data */
|
||||
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
|
||||
/* Uninitialized constant global and static data */
|
||||
/* Uninitialized constant global and static data */
|
||||
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
|
||||
/* Initialization data begins here in progmem */
|
||||
/* Initialization data begins here in progmem */
|
||||
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
|
||||
/* This causes failures if there are no RAM functions
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
*/
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
|
||||
/* Stabs debugging sections */
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions */
|
||||
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2 */
|
||||
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
@@ -37,55 +37,55 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
|
||||
|
||||
/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
|
||||
* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
|
||||
* all other accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* --------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
|
||||
* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
|
||||
* Debug code 0x1fc00480 KSEG1 3072-1152-16 3056 (2.984Kb)
|
||||
* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
|
||||
* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
|
||||
* all other accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* --------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
|
||||
* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
|
||||
* Debug code 0x1fc00480 KSEG1 3072-1152-16 3056 (2.984Kb)
|
||||
* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
|
||||
kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 3072-1152-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
|
||||
kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 3072-1152-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
|
||||
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* at the beginning of this region for use by MPLAB.
|
||||
*/
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* at the beginning of this region for use by MPLAB.
|
||||
*/
|
||||
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlemips")
|
||||
@@ -94,221 +94,222 @@ ENTRY(__start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Boot FLASH sections */
|
||||
/* Boot FLASH sections */
|
||||
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
|
||||
/* Program FLASH sections */
|
||||
/* Program FLASH sections */
|
||||
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
|
||||
*(.start)
|
||||
*(.start)
|
||||
|
||||
/* KSEG0 exception handlers */
|
||||
/* KSEG0 exception handlers */
|
||||
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_progmem
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_progmem
|
||||
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
|
||||
/* Read-only data is included in the text section */
|
||||
/* Read-only data is included in the text section */
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
|
||||
/* Small initialized constant global and static data */
|
||||
/* Small initialized constant global and static data */
|
||||
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
|
||||
/* Uninitialized constant global and static data */
|
||||
/* Uninitialized constant global and static data */
|
||||
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
|
||||
/* Initialization data begins here in progmem */
|
||||
/* Initialization data begins here in progmem */
|
||||
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
|
||||
/* This causes failures if there are no RAM functions
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
*/
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
|
||||
/* Stabs debugging sections */
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions */
|
||||
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2 */
|
||||
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
@@ -37,57 +37,57 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
|
||||
|
||||
/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
|
||||
* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
|
||||
* all other accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* --------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
|
||||
* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb)
|
||||
* Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb)
|
||||
* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
|
||||
* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
|
||||
* all other accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* --------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
|
||||
* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168 (1.141Kb)
|
||||
* Exceptions 0x1fc00490 KSEG0 3072-1168-16 3056 (2.984Kb)
|
||||
* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
|
||||
kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
|
||||
kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 3072-1168-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
|
||||
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* at the beginning of this region for use by MPLAB.
|
||||
*/
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* at the beginning of this region for use by MPLAB.
|
||||
*/
|
||||
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlemips")
|
||||
@@ -96,221 +96,222 @@ ENTRY(__start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Boot FLASH sections */
|
||||
/* Boot FLASH sections */
|
||||
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
|
||||
*(.start)
|
||||
*(.start)
|
||||
|
||||
/* KSEG0 exception handlers */
|
||||
/* KSEG0 exception handlers */
|
||||
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
|
||||
/* Program FLASH sections */
|
||||
/* Program FLASH sections */
|
||||
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
|
||||
/* Read-only data is included in the text section */
|
||||
/* Read-only data is included in the text section */
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
|
||||
/* Small initialized constant global and static data */
|
||||
/* Small initialized constant global and static data */
|
||||
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
|
||||
/* Uninitialized constant global and static data */
|
||||
/* Uninitialized constant global and static data */
|
||||
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
|
||||
/* Initialization data begins here in progmem */
|
||||
/* Initialization data begins here in progmem */
|
||||
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
|
||||
/* This causes failures if there are no RAM functions
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
*/
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
|
||||
/* Stabs debugging sections */
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions */
|
||||
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2 */
|
||||
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
@@ -37,55 +37,55 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
/* The PIC32MX250F128D has 128Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
|
||||
kseg0_program_mem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
|
||||
kseg0_program_mem (rx) : ORIGIN = 0x9d000000, LENGTH = 128K
|
||||
|
||||
/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
|
||||
* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
|
||||
* all other accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* --------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
|
||||
* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
|
||||
* Debug code 0x1fc00480 KSEG1 3072-1152-16 3056 (2.984Kb)
|
||||
* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
/* The PIC32MX250F128D has 3Kb of boot FLASH at physical addresses
|
||||
* 0x1fc00000-0x1fc00c00. The initial reset vector is in KSEG1, but
|
||||
* all other accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* --------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 384 384 (0.375Kb)
|
||||
* Gen exception 0x1fc00000 KSEG1 128 512 (0.500Kb)
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768 (0.750Kb)
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896 (0.875Kb)
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1.000Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152 (1.125Kb)
|
||||
* Debug code 0x1fc00480 KSEG1 3072-1152-16 3056 (2.984Kb)
|
||||
* DEVCFG3-0 0x1fc00bf0 KSEG1 16 3072 (3Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
|
||||
kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 3072-1152-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 256
|
||||
kseg1_cacherr (rx) : ORIGIN = 0xbfc00300, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 3072-1152-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc00bf0, LENGTH = 16
|
||||
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* at the beginning of this region for use by MPLAB.
|
||||
*/
|
||||
/* The PIC32MX250F128D has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* NOTE: When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* at the beginning of this region for use by MPLAB.
|
||||
*/
|
||||
|
||||
kseg1_data_mem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
kseg1_data_mem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT("elf32-tradlittlemips")
|
||||
@@ -94,221 +94,222 @@ ENTRY(__start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Boot FLASH sections */
|
||||
/* Boot FLASH sections */
|
||||
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
|
||||
/* Program FLASH sections */
|
||||
/* Program FLASH sections */
|
||||
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
|
||||
*(.start)
|
||||
*(.start)
|
||||
|
||||
/* KSEG0 exception handlers */
|
||||
/* KSEG0 exception handlers */
|
||||
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_program_mem
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_program_mem
|
||||
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
|
||||
/* Read-only data is included in the text section */
|
||||
/* Read-only data is included in the text section */
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
|
||||
/* Small initialized constant global and static data */
|
||||
/* Small initialized constant global and static data */
|
||||
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
|
||||
/* Uninitialized constant global and static data */
|
||||
/* Uninitialized constant global and static data */
|
||||
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_program_mem
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_program_mem
|
||||
|
||||
/* Initialization data begins here in progmem */
|
||||
/* Initialization data begins here in progmem */
|
||||
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
|
||||
/* This causes failures if there are no RAM functions
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_data_mem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_data_mem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_data_mem) ;
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_data_mem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_data_mem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_data_mem) ;
|
||||
*/
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_data_mem AT > kseg0_program_mem
|
||||
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_data_mem AT>kseg0_program_mem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_data_mem AT>kseg0_program_mem
|
||||
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_data_mem
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_data_mem
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_data_mem
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_data_mem
|
||||
|
||||
/* Stabs debugging sections */
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
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||||
.comment 0 : { *(.comment) }
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
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||||
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||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
.debug 0 : { *(.debug) }
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||||
.line 0 : { *(.line) }
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||||
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions */
|
||||
|
||||
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||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
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||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2 */
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||||
|
||||
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.debug_pubnames 0 : { *(.debug_pubnames) }
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||||
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||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
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/* DWARF 2 */
|
||||
/* DWARF 2 */
|
||||
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
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|
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|
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|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
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||||
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|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -37,57 +37,57 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* The PIC32MX440F512H has 512Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
/* The PIC32MX440F512H has 512Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
|
||||
|
||||
/* The PIC32MX440F512H has 12Kb of boot FLASH at physical address
|
||||
* 0x1fc00000. The initial reset vector is in KSEG1, but all other
|
||||
* accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* ------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 512 512
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168
|
||||
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
|
||||
* Debug code 0x1fc02000 KSEG1 4096-16 12272
|
||||
* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
/* The PIC32MX440F512H has 12Kb of boot FLASH at physical address
|
||||
* 0x1fc00000. The initial reset vector is in KSEG1, but all other
|
||||
* accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* ------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 512 512
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168
|
||||
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
|
||||
* Debug code 0x1fc02000 KSEG1 4096-16 12272
|
||||
* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168
|
||||
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168
|
||||
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
||||
|
||||
/* The PIC32MX440F512H has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* for use by MPLAB.
|
||||
*/
|
||||
/* The PIC32MX440F512H has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* for use by MPLAB.
|
||||
*/
|
||||
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT("elf32-tradlittlemips")
|
||||
@@ -96,223 +96,224 @@ ENTRY(__start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Boot FLASH sections */
|
||||
/* Boot FLASH sections */
|
||||
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
|
||||
*(.start)
|
||||
*(.start)
|
||||
|
||||
/* KSEG0 exception handlers */
|
||||
/* KSEG0 exception handlers */
|
||||
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
|
||||
.dbg_code = ORIGIN(kseg1_dbgcode);
|
||||
.dbg_code = ORIGIN(kseg1_dbgcode);
|
||||
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
|
||||
/* Program FLASH sections */
|
||||
/* Program FLASH sections */
|
||||
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
|
||||
/* Read-only data is included in the text section */
|
||||
/* Read-only data is included in the text section */
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
|
||||
/* Small initialized constant global and static data */
|
||||
/* Small initialized constant global and static data */
|
||||
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
|
||||
/* Uninitialized constant global and static data */
|
||||
/* Uninitialized constant global and static data */
|
||||
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
|
||||
/* Initialization data begins here in progmem */
|
||||
/* Initialization data begins here in progmem */
|
||||
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
|
||||
/* This causes failures if there are no RAM functions
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
*/
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
|
||||
/* Stabs debugging sections */
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions */
|
||||
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2 */
|
||||
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -37,57 +37,57 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* The PIC32MX460F512L has 512Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
/* The PIC32MX460F512L has 512Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
|
||||
|
||||
/* The PIC32MX460F512L has 12Kb of boot FLASH at physical address
|
||||
* 0x1fc00000. The initial reset vector is in KSEG1, but all other
|
||||
* accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* ------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 512 512
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168
|
||||
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
|
||||
* Debug code 0x1fc02000 KSEG1 4096-16 12272
|
||||
* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
/* The PIC32MX460F512L has 12Kb of boot FLASH at physical address
|
||||
* 0x1fc00000. The initial reset vector is in KSEG1, but all other
|
||||
* accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* ------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 512 512
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168
|
||||
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
|
||||
* Debug code 0x1fc02000 KSEG1 4096-16 12272
|
||||
* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168
|
||||
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168
|
||||
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
||||
|
||||
/* The PIC32MX460F512L has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* for use by MPLAB.
|
||||
*/
|
||||
/* The PIC32MX460F512L has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* for use by MPLAB.
|
||||
*/
|
||||
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT("elf32-tradlittlemips")
|
||||
@@ -96,223 +96,224 @@ ENTRY(__start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Boot FLASH sections */
|
||||
/* Boot FLASH sections */
|
||||
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
|
||||
*(.start)
|
||||
*(.start)
|
||||
|
||||
/* KSEG0 exception handlers */
|
||||
/* KSEG0 exception handlers */
|
||||
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
|
||||
.dbg_code = ORIGIN(kseg1_dbgcode);
|
||||
.dbg_code = ORIGIN(kseg1_dbgcode);
|
||||
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
|
||||
/* Program FLASH sections */
|
||||
/* Program FLASH sections */
|
||||
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
|
||||
/* Read-only data is included in the text section */
|
||||
/* Read-only data is included in the text section */
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
|
||||
/* Small initialized constant global and static data */
|
||||
/* Small initialized constant global and static data */
|
||||
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
|
||||
/* Uninitialized constant global and static data */
|
||||
/* Uninitialized constant global and static data */
|
||||
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
|
||||
/* Initialization data begins here in progmem */
|
||||
/* Initialization data begins here in progmem */
|
||||
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
|
||||
/* This causes failures if there are no RAM functions
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
*/
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
|
||||
/* Stabs debugging sections */
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions */
|
||||
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2 */
|
||||
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
@@ -37,57 +37,57 @@
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* The PIC32MX460F512L has 512Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
/* The PIC32MX460F512L has 512Kb of program FLASH at physical address
|
||||
* 0x1d000000 but is always accessed at KSEG0 address 0x9d00:0000
|
||||
*/
|
||||
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
|
||||
kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 512K
|
||||
|
||||
/* The PIC32MX460F512L has 12Kb of boot FLASH at physical address
|
||||
* 0x1fc00000. The initial reset vector is in KSEG1, but all other
|
||||
* accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* ------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 512 512
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168
|
||||
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
|
||||
* Debug code 0x1fc02000 KSEG1 4096-16 12272
|
||||
* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
/* The PIC32MX460F512L has 12Kb of boot FLASH at physical address
|
||||
* 0x1fc00000. The initial reset vector is in KSEG1, but all other
|
||||
* accesses are in KSEG0.
|
||||
*
|
||||
* REGION PHYSICAL KSEG SIZE
|
||||
* DESCRIPTION START ADDR (BYTES)
|
||||
* ------------- ---------- ------ ----------------------
|
||||
* Exceptions:*
|
||||
* Reset 0x1fc00000 KSEG1 512 512
|
||||
* TLB Refill 0x1fc00200 KSEG1 256 768
|
||||
* Cache Error 0x1fc00300 KSEG1 128 896
|
||||
* Others 0x1fc00380 KSEG1 128 1024 (1Kb)
|
||||
* Interrupt 0x1fc00400 KSEG1 128 1152
|
||||
* JTAG 0x1fc00480 KSEG1 16 1168
|
||||
* Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb)
|
||||
* Debug code 0x1fc02000 KSEG1 4096-16 12272
|
||||
* DEVCFG3-0 0x1fc02ff0 KSEG1 16 12288 (12Kb)
|
||||
*
|
||||
* Exceptions assume:
|
||||
*
|
||||
* STATUS: BEV=0/1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*/
|
||||
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168
|
||||
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384
|
||||
kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128
|
||||
kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128
|
||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 8192-1168
|
||||
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
||||
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
||||
|
||||
/* The PIC32MX460F512L has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* for use by MPLAB.
|
||||
*/
|
||||
/* The PIC32MX460F512L has 32Kb of data memory at physical address
|
||||
* 0x00000000. Since the PIC32MX has no data cache, this memory is
|
||||
* always accessed through KSEG1.
|
||||
*
|
||||
* When used with MPLAB, we need to set aside 512 bytes of memory
|
||||
* for use by MPLAB.
|
||||
*/
|
||||
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
kseg1_datamem (w!x) : ORIGIN = 0xa0000200, LENGTH = 32K - 512
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlemips")
|
||||
@@ -96,223 +96,224 @@ ENTRY(__start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* Boot FLASH sections */
|
||||
/* Boot FLASH sections */
|
||||
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
.reset :
|
||||
{
|
||||
KEEP (*(.reset))
|
||||
} > kseg1_reset
|
||||
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
/* Exception handlers. The following is assumed:
|
||||
*
|
||||
* STATUS: BEV=1 and EXL=0
|
||||
* CAUSE: IV=1
|
||||
* JTAG: ProbEn=0
|
||||
* And multi-vector support disabled
|
||||
*
|
||||
* In that configuration, the vector locations become:
|
||||
*
|
||||
* Reset, Soft Reset bfc0:0000
|
||||
* TLB Refill bfc0:0200
|
||||
* Cache Error bfc0:0300
|
||||
* All others bfc0:0380
|
||||
* Interrupt bfc0:0400
|
||||
* EJTAG Debug bfc0:0480
|
||||
*/
|
||||
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
/* KSEG1 exception handler "trampolines" */
|
||||
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
.gen_excpt :
|
||||
{
|
||||
KEEP (*(.gen_excpt))
|
||||
} > kseg1_genexcpt
|
||||
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
.ebase_excpt :
|
||||
{
|
||||
KEEP (*(.ebase_excpt))
|
||||
} > kseg1_ebexcpt
|
||||
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
.bev_excpt :
|
||||
{
|
||||
KEEP (*(.bev_excpt))
|
||||
} > kseg1_bevexcpt
|
||||
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
.int_excpt :
|
||||
{
|
||||
KEEP (*(.int_excpt))
|
||||
} > kseg1_intexcpt
|
||||
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
.start :
|
||||
{
|
||||
/* KSEG0 Reset startup logic */
|
||||
|
||||
*(.start)
|
||||
*(.start)
|
||||
|
||||
/* KSEG0 exception handlers */
|
||||
/* KSEG0 exception handlers */
|
||||
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
*(.nmi_handler)
|
||||
*(.bev_handler)
|
||||
*(.int_handler)
|
||||
} > kseg0_bootmem
|
||||
|
||||
.dbg_code = ORIGIN(kseg1_dbgcode);
|
||||
.dbg_code = ORIGIN(kseg1_dbgcode);
|
||||
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
.devcfg :
|
||||
{
|
||||
KEEP (*(.devcfg))
|
||||
} > kseg1_devcfg
|
||||
|
||||
/* Program FLASH sections */
|
||||
/* Program FLASH sections */
|
||||
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
.text :
|
||||
{
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.stub)
|
||||
KEEP (*(.text.*personality*))
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.mips16.fn.*)
|
||||
*(.mips16.call.*)
|
||||
|
||||
/* Read-only data is included in the text section */
|
||||
/* Read-only data is included in the text section */
|
||||
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata1)
|
||||
*(.gnu.linkonce.r.*)
|
||||
|
||||
/* Small initialized constant global and static data */
|
||||
/* Small initialized constant global and static data */
|
||||
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.sdata2 .sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
|
||||
/* Uninitialized constant global and static data */
|
||||
/* Uninitialized constant global and static data */
|
||||
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
*(.sbss2 .sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > kseg0_progmem
|
||||
|
||||
/* Initialization data begins here in progmem */
|
||||
/* Initialization data begins here in progmem */
|
||||
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
_data_loaddr = LOADADDR(.data);
|
||||
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) }
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
/* RAM functions are positioned at the beginning of RAM so that
|
||||
* they can be guaranteed to satisfy the 2Kb alignment requirement.
|
||||
*/
|
||||
|
||||
/* This causes failures if there are no RAM functions
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.ramfunc ALIGN(2K) :
|
||||
{
|
||||
_sramfunc = ABSOLUTE(.);
|
||||
*(.ramfunc .ramfunc.*)
|
||||
_eramfunc = ABSOLUTE(.);
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
_ramfunc_loadaddr = LOADADDR(.ramfunc);
|
||||
_ramfunc_sizeof = SIZEOF(.ramfunc);
|
||||
_bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ;
|
||||
_bmxdudba_address = LENGTH(kseg1_datamem) ;
|
||||
_bmxdupba_address = LENGTH(kseg1_datamem) ;
|
||||
*/
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.data :
|
||||
{
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
*(.data1)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
|
||||
_gp = ALIGN(16) + 0x7FF0 ;
|
||||
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.got :
|
||||
{
|
||||
*(.got.plt) *(.got)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.sdata :
|
||||
{
|
||||
*(.sdata .sdata.* .gnu.linkonce.s.*)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
.lit8 :
|
||||
{
|
||||
*(.lit8)
|
||||
} > kseg1_datamem AT > kseg0_progmem
|
||||
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
.lit4 :
|
||||
{
|
||||
*(.lit4)
|
||||
_edata = ABSOLUTE(.);
|
||||
} >kseg1_datamem AT>kseg0_progmem
|
||||
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
.sbss :
|
||||
{
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss .sbss.* .gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
} >kseg1_datamem
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > kseg1_datamem
|
||||
|
||||
/* Stabs debugging sections */
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
/* DWARF debug sections */
|
||||
/* DWARF 1 */
|
||||
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
/* GNU DWARF 1 extensions */
|
||||
/* GNU DWARF 1 extensions */
|
||||
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
|
||||
/* DWARF 2 */
|
||||
/* DWARF 2 */
|
||||
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user