From 0bae8bdda1a4ac0509c3c6439df7553c826a7144 Mon Sep 17 00:00:00 2001 From: Xiang Xiao Date: Fri, 23 Oct 2020 11:46:53 +0800 Subject: [PATCH] arch: Initialize the idle thread stack info directly Change-Id: I99d04ced96e09f006768997f23d738eab3a720d9 Signed-off-by: Xiang Xiao --- arch/arm/src/arm/arm_initialstate.c | 6 +++-- arch/arm/src/armv6-m/arm_initialstate.c | 6 +++-- arch/arm/src/armv7-a/arm_initialstate.c | 6 +++-- arch/arm/src/armv7-m/arm_initialstate.c | 6 +++-- arch/arm/src/armv7-r/arm_initialstate.c | 6 +++-- arch/arm/src/armv8-m/arm_initialstate.c | 6 +++-- arch/avr/src/avr/up_initialstate.c | 6 +++-- arch/avr/src/avr32/up_initialstate.c | 6 +++-- arch/hc/src/m9s12/m9s12_initialstate.c | 22 ++++++++++--------- arch/mips/src/mips32/mips_initialstate.c | 6 +++-- arch/misoc/src/lm32/lm32_initialstate.c | 6 +++-- arch/misoc/src/minerva/minerva_initialstate.c | 6 +++-- arch/or1k/src/common/up_initialstate.c | 6 +++-- arch/renesas/src/m16c/m16c_initialstate.c | 6 +++-- arch/renesas/src/rx65n/rx65n_initialstate.c | 6 +++-- arch/renesas/src/sh1/sh1_initialstate.c | 6 +++-- arch/risc-v/src/rv32im/riscv_initialstate.c | 6 +++-- arch/risc-v/src/rv64gc/riscv_initialstate.c | 6 +++-- arch/sim/src/sim/up_initialstate.c | 6 +++-- arch/x86/src/i486/up_initialstate.c | 6 +++-- arch/x86_64/src/intel64/up_initialstate.c | 6 +++-- arch/xtensa/src/common/xtensa_initialstate.c | 5 ++++- arch/z80/src/z180/z180_initialstate.c | 6 +++-- arch/z80/src/z80/z80_initialstate.c | 6 +++-- 24 files changed, 104 insertions(+), 55 deletions(-) diff --git a/arch/arm/src/arm/arm_initialstate.c b/arch/arm/src/arm/arm_initialstate.c index 13c9c928891..54d21eba18c 100644 --- a/arch/arm/src/arm/arm_initialstate.c +++ b/arch/arm/src/arm/arm_initialstate.c @@ -75,8 +75,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/arm/src/armv6-m/arm_initialstate.c b/arch/arm/src/armv6-m/arm_initialstate.c index 25ccafa5de7..01163e6223d 100644 --- a/arch/arm/src/armv6-m/arm_initialstate.c +++ b/arch/arm/src/armv6-m/arm_initialstate.c @@ -77,8 +77,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/arm/src/armv7-a/arm_initialstate.c b/arch/arm/src/armv7-a/arm_initialstate.c index 7d2a1bb0e89..7a9ba0886ca 100644 --- a/arch/arm/src/armv7-a/arm_initialstate.c +++ b/arch/arm/src/armv7-a/arm_initialstate.c @@ -60,8 +60,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/arm/src/armv7-m/arm_initialstate.c b/arch/arm/src/armv7-m/arm_initialstate.c index 0a02a4c9a1a..6420de8f801 100644 --- a/arch/arm/src/armv7-m/arm_initialstate.c +++ b/arch/arm/src/armv7-m/arm_initialstate.c @@ -63,8 +63,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/arm/src/armv7-r/arm_initialstate.c b/arch/arm/src/armv7-r/arm_initialstate.c index 4f6ba899210..8a29029939a 100644 --- a/arch/arm/src/armv7-r/arm_initialstate.c +++ b/arch/arm/src/armv7-r/arm_initialstate.c @@ -60,8 +60,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/arm/src/armv8-m/arm_initialstate.c b/arch/arm/src/armv8-m/arm_initialstate.c index 459303990ea..a34c853c4de 100644 --- a/arch/arm/src/armv8-m/arm_initialstate.c +++ b/arch/arm/src/armv8-m/arm_initialstate.c @@ -63,8 +63,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/avr/src/avr/up_initialstate.c b/arch/avr/src/avr/up_initialstate.c index 9f975138800..d88f7c0c122 100644 --- a/arch/avr/src/avr/up_initialstate.c +++ b/arch/avr/src/avr/up_initialstate.c @@ -75,8 +75,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure. Zeroing diff --git a/arch/avr/src/avr32/up_initialstate.c b/arch/avr/src/avr32/up_initialstate.c index 4383a2f11fe..26c60779ee7 100644 --- a/arch/avr/src/avr32/up_initialstate.c +++ b/arch/avr/src/avr32/up_initialstate.c @@ -73,8 +73,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure. Zeroing diff --git a/arch/hc/src/m9s12/m9s12_initialstate.c b/arch/hc/src/m9s12/m9s12_initialstate.c index 4359cb46dd6..f98bff34532 100644 --- a/arch/hc/src/m9s12/m9s12_initialstate.c +++ b/arch/hc/src/m9s12/m9s12_initialstate.c @@ -72,8 +72,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ @@ -98,14 +100,14 @@ void up_initial_state(struct tcb_s *tcb) /* Condition code register: * - * Bit 0: C — Carry/Borrow status bit - * Bit 1: V — Two’s complement overflow status bit - * Bit 2: Z — Zero status bit - * Bit 3: N — Negative status bit - * Bit 4: I — Maskable interrupt control bit - * Bit 5: H — Half-carry status bit - * Bit 6: X — Non-maskable interrupt control bit - * Bit 7: S — STOP instruction control bit + * Bit 0: C Carry/Borrow status bit + * Bit 1: V Two's complement overflow status bit + * Bit 2: Z Zero status bit + * Bit 3: N Negative status bit + * Bit 4: I Maskable interrupt control bit + * Bit 5: H Half-carry status bit + * Bit 6: X Non-maskable interrupt control bit + * Bit 7: S STOP instruction control bit */ # ifdef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/mips/src/mips32/mips_initialstate.c b/arch/mips/src/mips32/mips_initialstate.c index 9b02f5b94fe..2fe0f2c2946 100644 --- a/arch/mips/src/mips32/mips_initialstate.c +++ b/arch/mips/src/mips32/mips_initialstate.c @@ -77,8 +77,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/misoc/src/lm32/lm32_initialstate.c b/arch/misoc/src/lm32/lm32_initialstate.c index 9a9c000a141..180ca8b6e30 100644 --- a/arch/misoc/src/lm32/lm32_initialstate.c +++ b/arch/misoc/src/lm32/lm32_initialstate.c @@ -75,8 +75,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/misoc/src/minerva/minerva_initialstate.c b/arch/misoc/src/minerva/minerva_initialstate.c index bcc0621f779..59d08c66e9f 100644 --- a/arch/misoc/src/minerva/minerva_initialstate.c +++ b/arch/misoc/src/minerva/minerva_initialstate.c @@ -79,8 +79,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/or1k/src/common/up_initialstate.c b/arch/or1k/src/common/up_initialstate.c index 667a7cf4f5d..25ad7876466 100644 --- a/arch/or1k/src/common/up_initialstate.c +++ b/arch/or1k/src/common/up_initialstate.c @@ -77,8 +77,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/renesas/src/m16c/m16c_initialstate.c b/arch/renesas/src/m16c/m16c_initialstate.c index f77d61894d7..4f651b727cf 100644 --- a/arch/renesas/src/m16c/m16c_initialstate.c +++ b/arch/renesas/src/m16c/m16c_initialstate.c @@ -74,8 +74,10 @@ void up_initial_state(FAR struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (FAR void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/renesas/src/rx65n/rx65n_initialstate.c b/arch/renesas/src/rx65n/rx65n_initialstate.c index 6bb18cd2672..e371367289c 100644 --- a/arch/renesas/src/rx65n/rx65n_initialstate.c +++ b/arch/renesas/src/rx65n/rx65n_initialstate.c @@ -65,8 +65,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/renesas/src/sh1/sh1_initialstate.c b/arch/renesas/src/sh1/sh1_initialstate.c index 045a9975c89..d43b71d0044 100644 --- a/arch/renesas/src/sh1/sh1_initialstate.c +++ b/arch/renesas/src/sh1/sh1_initialstate.c @@ -92,8 +92,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/risc-v/src/rv32im/riscv_initialstate.c b/arch/risc-v/src/rv32im/riscv_initialstate.c index 0aad94dafb4..8c59d638a92 100644 --- a/arch/risc-v/src/rv32im/riscv_initialstate.c +++ b/arch/risc-v/src/rv32im/riscv_initialstate.c @@ -76,8 +76,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/risc-v/src/rv64gc/riscv_initialstate.c b/arch/risc-v/src/rv64gc/riscv_initialstate.c index b0ebd1d7dbd..2fd491320ae 100644 --- a/arch/risc-v/src/rv64gc/riscv_initialstate.c +++ b/arch/risc-v/src/rv64gc/riscv_initialstate.c @@ -76,8 +76,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/sim/src/sim/up_initialstate.c b/arch/sim/src/sim/up_initialstate.c index f48f71f0937..5fe2dd4c8eb 100644 --- a/arch/sim/src/sim/up_initialstate.c +++ b/arch/sim/src/sim/up_initialstate.c @@ -71,8 +71,10 @@ void up_initial_state(struct tcb_s *tcb) { if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(sim_getsp() - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(sim_getsp() - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)sim_getsp(); + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } memset(&tcb->xcp, 0, sizeof(struct xcptcontext)); diff --git a/arch/x86/src/i486/up_initialstate.c b/arch/x86/src/i486/up_initialstate.c index 2a788098d00..c0f495c8e85 100644 --- a/arch/x86/src/i486/up_initialstate.c +++ b/arch/x86/src/i486/up_initialstate.c @@ -73,8 +73,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/x86_64/src/intel64/up_initialstate.c b/arch/x86_64/src/intel64/up_initialstate.c index caa7de3c964..ce1af4bb166 100644 --- a/arch/x86_64/src/intel64/up_initialstate.c +++ b/arch/x86_64/src/intel64/up_initialstate.c @@ -62,8 +62,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, (void *)(g_idle_topstack - - CONFIG_IDLETHREAD_STACKSIZE), CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)(g_idle_topstack - + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_ptr = (void *)g_idle_topstack; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/xtensa/src/common/xtensa_initialstate.c b/arch/xtensa/src/common/xtensa_initialstate.c index a6cc3c7720a..41b987f46a5 100644 --- a/arch/xtensa/src/common/xtensa_initialstate.c +++ b/arch/xtensa/src/common/xtensa_initialstate.c @@ -77,7 +77,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, g_idlestack, IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = g_idlestack; + tcb->adj_stack_ptr = (char *)g_idlestack + + CONFIG_IDLETHREAD_STACKSIZE; + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/z80/src/z180/z180_initialstate.c b/arch/z80/src/z180/z180_initialstate.c index fb883fb3d73..43f4c5281e7 100644 --- a/arch/z80/src/z180/z180_initialstate.c +++ b/arch/z80/src/z180/z180_initialstate.c @@ -57,8 +57,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, - (void *)CONFIG_STACK_BASE, CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)CONFIG_STACK_BASE; + tcb->adj_stack_ptr = (void *)(CONFIG_STACK_BASE + + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */ diff --git a/arch/z80/src/z80/z80_initialstate.c b/arch/z80/src/z80/z80_initialstate.c index a068a3977ba..05c2df32076 100644 --- a/arch/z80/src/z80/z80_initialstate.c +++ b/arch/z80/src/z80/z80_initialstate.c @@ -57,8 +57,10 @@ void up_initial_state(struct tcb_s *tcb) if (tcb->pid == 0) { - up_use_stack(tcb, - (void *)CONFIG_STACK_BASE, CONFIG_IDLETHREAD_STACKSIZE); + tcb->stack_alloc_ptr = (void *)CONFIG_STACK_BASE; + tcb->adj_stack_ptr = (void *)(CONFIG_STACK_BASE + + CONFIG_IDLETHREAD_STACKSIZE); + tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE; } /* Initialize the initial exception register context structure */