diff --git a/FlatLibs.mk b/FlatLibs.mk index 69fe6a9fa06..0a05e84c493 100644 --- a/FlatLibs.mk +++ b/FlatLibs.mk @@ -118,6 +118,12 @@ ifeq ($(CONFIG_WIRELESS),y) NUTTXLIBS += lib$(DELIM)libwireless$(LIBEXT) endif +# Add C++ library + +ifeq ($(CONFIG_HAVE_CXX),y) +NUTTXLIBS += lib$(DELIM)libcxx$(LIBEXT) +endif + # Export all libraries EXPORTLIBS = $(NUTTXLIBS) diff --git a/Kconfig b/Kconfig index 4d7949d4e31..1116ba6ccc5 100644 --- a/Kconfig +++ b/Kconfig @@ -732,6 +732,38 @@ config DEBUG_NET_INFO endif # DEBUG_NET +config DEBUG_WIRELESS + bool "Wireless Debug Features" + default n + depends on WIRELESS || DRIVERS_WIRELESS + ---help--- + Enable DEBUG_WIRELESS debug features. + +if DEBUG_WIRELESS + +config DEBUG_WIRELESS_ERROR + bool "Wireless Error Output" + default n + depends on DEBUG_ERROR + ---help--- + Enable wireless error output to SYSLOG. + +config DEBUG_WIRELESS_WARN + bool "Wireless Warnings Output" + default n + depends on DEBUG_WARN + ---help--- + Enable wireless warning output to SYSLOG. + +config DEBUG_WIRELESS_INFO + bool "Wireless Informational Output" + default n + depends on DEBUG_INFO + ---help--- + Enable wireless informational output to SYSLOG. + +endif # DEBUG_WIRELESS + config DEBUG_SCHED bool "Scheduler Debug Features" default n diff --git a/KernelLibs.mk b/KernelLibs.mk index 719430b6c9b..b1da6dbd0b9 100644 --- a/KernelLibs.mk +++ b/KernelLibs.mk @@ -113,6 +113,12 @@ ifeq ($(CONFIG_WIRELESS),y) NUTTXLIBS += lib$(DELIM)libwireless$(LIBEXT) endif +# Add C++ library + +ifeq ($(CONFIG_HAVE_CXX),y) +NUTTXLIBS += lib$(DELIM)libcxx$(LIBEXT) +endif + # Export only the user libraries EXPORTLIBS = $(USERLIBS) diff --git a/ProtectedLibs.mk b/ProtectedLibs.mk index 4f2e2c6072d..5dd45a6fab8 100644 --- a/ProtectedLibs.mk +++ b/ProtectedLibs.mk @@ -123,6 +123,12 @@ ifeq ($(CONFIG_WIRELESS),y) NUTTXLIBS += lib$(DELIM)libwireless$(LIBEXT) endif +# Add C++ library + +ifeq ($(CONFIG_HAVE_CXX),y) +NUTTXLIBS += lib$(DELIM)libcxx$(LIBEXT) +endif + # Export only the user libraries EXPORTLIBS = $(USERLIBS) diff --git a/TODO b/TODO index 8ab2b48b50f..ad47655bf40 100644 --- a/TODO +++ b/TODO @@ -1,4 +1,4 @@ -NuttX TODO List (Last updated March 7, 2017) +NuttX TODO List (Last updated March 14, 2017) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This file summarizes known NuttX bugs, limitations, inconsistencies with @@ -19,7 +19,7 @@ nuttx/: (8) Kernel/Protected Build (3) C++ Support (6) Binary loaders (binfmt/) - (13) Network (net/, drivers/net) + (14) Network (net/, drivers/net) (4) USB (drivers/usbdev, drivers/usbhost) (0) Other drivers (drivers/) (12) Libraries (libc/, libm/) @@ -507,7 +507,7 @@ o Kernel/Protected Build in the nuttx/ directory. However, the user interfaces must be moved into a NuttX library or into apps/. Currently applications calls to the NxTerm user interfaces are - undefined. + undefined in the Kernel/Protected builds. Status: Open Priority: Medium @@ -1065,6 +1065,20 @@ o Network (net/, drivers/net) Status: Open Priority: High if you happen to be using Ethernet in this configuration. + Title: REPARTITION DRIVER FUNCTIONALITY + Description: Every network driver performs the first level of packet decoding. + It examines the packet header and calls ipv4_input(), ipv6_input(). + icmp_input(), etc. as appropriate. This is a maintenance problem + because it means that any changes to the network input interfaces + affects all drivers. + + A better, more maintainable solution would use a single net_input() + function that would receive all incoming packets. This function + would then perform that common packet decoding logic that is + currently implemented in every network driver. + Status: Open + Priority: Low. Really just as aesthetic maintainability issue. + o USB (drivers/usbdev, drivers/usbhost) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fd44dcff077..9be59af0009 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -156,7 +156,7 @@ config ARCH_CHIP_NUC1XX select ARCH_CORTEXM0 select ARCH_HAVE_CMNVECTOR ---help--- - NPX LPC43XX architectures (ARM Cortex-M4). + Nuvoton NUC100/120 architectures (ARM Cortex-M0). config ARCH_CHIP_SAMA5 bool "Atmel SAMA5" diff --git a/arch/arm/src/a1x/a1x_irq.c b/arch/arm/src/a1x/a1x_irq.c index ecabb5ff4d6..21c074d83ca 100644 --- a/arch/arm/src/a1x/a1x_irq.c +++ b/arch/arm/src/a1x/a1x_irq.c @@ -159,16 +159,6 @@ void up_irqinitialize(void) (void)getreg32(A1X_INTC_IRQ_PEND(i)); /* Reading status clears pending interrupts */ } - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* Set the interrupt base address to zero. We do not use the vectored * interrupts. */ diff --git a/arch/arm/src/armv7-m/gnu/up_exception.S b/arch/arm/src/armv7-m/gnu/up_exception.S index 0010136b035..4f2927b421e 100644 --- a/arch/arm/src/armv7-m/gnu/up_exception.S +++ b/arch/arm/src/armv7-m/gnu/up_exception.S @@ -323,7 +323,7 @@ exception_common: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/armv7-m/gnu/up_lazyexception.S b/arch/arm/src/armv7-m/gnu/up_lazyexception.S index 08ce8be75cc..0a0e088a620 100644 --- a/arch/arm/src/armv7-m/gnu/up_lazyexception.S +++ b/arch/arm/src/armv7-m/gnu/up_lazyexception.S @@ -235,7 +235,7 @@ exception_common: * * Here: * r0 = Address of the register save area - + * * NOTE: It is a requirement that up_restorefpu() preserve the value of * r0! */ @@ -355,7 +355,7 @@ exception_common: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c index 70d83a83a58..4503e15532e 100644 --- a/arch/arm/src/common/up_createstack.c +++ b/arch/arm/src/common/up_createstack.c @@ -66,22 +66,11 @@ # define HAVE_KERNEL_HEAP 1 #endif -/* ARM requires at least a 4-byte stack alignment. For use with EABI and - * floating point, the stack must be aligned to 8-byte addresses. +/* For use with EABI and floating point, the stack must be aligned to 8-byte + * addresses. */ -#ifndef CONFIG_STACK_ALIGNMENT - -/* The symbol __ARM_EABI__ is defined by GCC if EABI is being used. If you - * are not using GCC, make sure that CONFIG_STACK_ALIGNMENT is set correctly! - */ - -# ifdef __ARM_EABI__ -# define CONFIG_STACK_ALIGNMENT 8 -# else -# define CONFIG_STACK_ALIGNMENT 4 -# endif -#endif +#define CONFIG_STACK_ALIGNMENT 8 /* Stack alignment macros */ @@ -233,9 +222,9 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4; - /* The ARM stack must be aligned; 4 byte alignment for OABI and - * 8-byte alignment for EABI. If necessary top_of_stack must be - * rounded down to the next boundary + /* The ARM stack must be aligned to 8-byte alignment for EABI. + * If necessary top_of_stack must be rounded down to the next + * boundary */ top_of_stack = STACK_ALIGN_DOWN(top_of_stack); diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/up_initialize.c index 5182598246a..ff11e45170d 100644 --- a/arch/arm/src/common/up_initialize.c +++ b/arch/arm/src/common/up_initialize.c @@ -100,7 +100,7 @@ static void up_calibratedelay(void) * ****************************************************************************/ -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 +#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 7 static inline void up_color_intstack(void) { uint32_t *ptr = (uint32_t *)&g_intstackalloc; diff --git a/arch/arm/src/common/up_stackframe.c b/arch/arm/src/common/up_stackframe.c index b5712b2a291..dace2e9239f 100644 --- a/arch/arm/src/common/up_stackframe.c +++ b/arch/arm/src/common/up_stackframe.c @@ -53,22 +53,11 @@ * Pre-processor Macros ****************************************************************************/ -/* ARM requires at least a 4-byte stack alignment. For use with EABI and - * floating point, the stack must be aligned to 8-byte addresses. +/* For use with EABI and floating point, the stack must be aligned to 8-byte + * addresses. */ -#ifndef CONFIG_STACK_ALIGNMENT - -/* The symbol __ARM_EABI__ is defined by GCC if EABI is being used. If you - * are not using GCC, make sure that CONFIG_STACK_ALIGNMENT is set correctly! - */ - -# ifdef __ARM_EABI__ -# define CONFIG_STACK_ALIGNMENT 8 -# else -# define CONFIG_STACK_ALIGNMENT 4 -# endif -#endif +#define CONFIG_STACK_ALIGNMENT 8 /* Stack alignment macros */ diff --git a/arch/arm/src/common/up_usestack.c b/arch/arm/src/common/up_usestack.c index 887387976ae..f8072a66d4e 100644 --- a/arch/arm/src/common/up_usestack.c +++ b/arch/arm/src/common/up_usestack.c @@ -56,22 +56,11 @@ * Pre-processor Macros ****************************************************************************/ -/* ARM requires at least a 4-byte stack alignment. For use with EABI and - * floating point, the stack must be aligned to 8-byte addresses. +/* For use with EABI and floating point, the stack must be aligned to 8-byte + * addresses. */ -#ifndef CONFIG_STACK_ALIGNMENT - -/* The symbol __ARM_EABI__ is defined by GCC if EABI is being used. If you - * are not using GCC, make sure that CONFIG_STACK_ALIGNMENT is set correctly! - */ - -# ifdef __ARM_EABI__ -# define CONFIG_STACK_ALIGNMENT 8 -# else -# define CONFIG_STACK_ALIGNMENT 4 -# endif -#endif +#define CONFIG_STACK_ALIGNMENT 8 /* Stack alignment macros */ @@ -143,9 +132,9 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size) top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4; - /* The ARM stack must be aligned; 4 byte alignment for OABI and 8-byte - * alignment for EABI. If necessary top_of_stack must be rounded down - * to the next boundary + /* The ARM stack must be aligned to 8-byte alignment for EABI. + * If necessary top_of_stack must be rounded down to the next + * boundary */ top_of_stack = STACK_ALIGN_DOWN(top_of_stack); diff --git a/arch/arm/src/common/up_vfork.c b/arch/arm/src/common/up_vfork.c index e655ab15b43..5a69e310e38 100644 --- a/arch/arm/src/common/up_vfork.c +++ b/arch/arm/src/common/up_vfork.c @@ -56,22 +56,11 @@ * Pre-processor Definitions ****************************************************************************/ -/* ARM requires at least a 4-byte stack alignment. For use with EABI and - * floating point, the stack must be aligned to 8-byte addresses. +/* For use with EABI and floating point, the stack must be aligned to 8-byte + * addresses. */ -#ifndef CONFIG_STACK_ALIGNMENT - -/* The symbol __ARM_EABI__ is defined by GCC if EABI is being used. If you - * are not using GCC, make sure that CONFIG_STACK_ALIGNMENT is set correctly! - */ - -# ifdef __ARM_EABI__ -# define CONFIG_STACK_ALIGNMENT 8 -# else -# define CONFIG_STACK_ALIGNMENT 4 -# endif -#endif +#define CONFIG_STACK_ALIGNMENT 8 /**************************************************************************** * Public Functions diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c index 859860d0725..254d196f125 100644 --- a/arch/arm/src/efm32/efm32_irq.c +++ b/arch/arm/src/efm32/efm32_irq.c @@ -319,16 +319,6 @@ void up_irqinitialize(void) putreg32(0xffffffff, NVIC_IRQ_CLEAR(i)); } -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - /* Colorize the interrupt stack for debug purposes */ - - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* Make sure that we are using the correct vector table. The default * vector address is 0x0000:0000 but if we are executing code that is * positioned in SRAM or in external FLASH, then we may need to reset diff --git a/arch/arm/src/imx6/imx_irq.c b/arch/arm/src/imx6/imx_irq.c index b15a9a4e6dd..d5248ef40f1 100644 --- a/arch/arm/src/imx6/imx_irq.c +++ b/arch/arm/src/imx6/imx_irq.c @@ -93,16 +93,6 @@ void up_irqinitialize(void) * access to the GIC. */ - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* Initialize the Generic Interrupt Controller (GIC) for CPU0 */ arm_gic0_initialize(); /* Initialization unique to CPU0 */ diff --git a/arch/arm/src/kinetis/chip.h b/arch/arm/src/kinetis/chip.h index c16f31b14d9..262ad555573 100644 --- a/arch/arm/src/kinetis/chip.h +++ b/arch/arm/src/kinetis/chip.h @@ -52,7 +52,7 @@ /* If the common ARMv7-M vector handling logic is used, then it expects the * following definition in this file that provides the number of supported external - * interrupts which, for this architecture, is provided in the arch/stm32f7/chip.h + * interrupts which, for this architecture, is provided in the arch/kinetis/chip.h * header file. */ diff --git a/arch/arm/src/kinetis/kinetis_clrpend.c b/arch/arm/src/kinetis/kinetis_clrpend.c index faf35271d8f..aad182df369 100644 --- a/arch/arm/src/kinetis/kinetis_clrpend.c +++ b/arch/arm/src/kinetis/kinetis_clrpend.c @@ -1,6 +1,5 @@ /**************************************************************************** * arch/arm/src/kinetis/kinetis_clrpend.c - * arch/arm/src/chip/kinetis_clrpend.c * * Copyright (C) 2011 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/arch/arm/src/kinetis/kinetis_start.c b/arch/arm/src/kinetis/kinetis_start.c index 6747ce24e88..f7445c5cde0 100644 --- a/arch/arm/src/kinetis/kinetis_start.c +++ b/arch/arm/src/kinetis/kinetis_start.c @@ -1,6 +1,5 @@ /**************************************************************************** * arch/arm/src/kinetis/kinetis_start.c - * arch/arm/src/chip/kinetis_start.c * * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -327,6 +326,7 @@ void __start(void) * can get debug output as soon as possible (This depends on clock * configuration). */ + kinetis_fpuconfig(); kinetis_lowsetup(); #ifdef USE_EARLYSERIALINIT diff --git a/arch/arm/src/kinetis/kinetis_vectors.S b/arch/arm/src/kinetis/kinetis_vectors.S index 48c74c70597..30940199af7 100644 --- a/arch/arm/src/kinetis/kinetis_vectors.S +++ b/arch/arm/src/kinetis/kinetis_vectors.S @@ -484,7 +484,7 @@ exception_common: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/lpc17xx/lpc17_vectors.S b/arch/arm/src/lpc17xx/lpc17_vectors.S index 6cee7d97316..bf37fc9e81f 100644 --- a/arch/arm/src/lpc17xx/lpc17_vectors.S +++ b/arch/arm/src/lpc17xx/lpc17_vectors.S @@ -348,7 +348,7 @@ exception_common: * * Here: * r0 = Address of the register save area - + * * NOTE: It is a requirement that up_restorefpu() preserve the value of * r0! */ @@ -468,7 +468,7 @@ exception_common: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c index eb6b1747059..24d08cff921 100644 --- a/arch/arm/src/sam34/sam_irq.c +++ b/arch/arm/src/sam34/sam_irq.c @@ -385,16 +385,6 @@ void up_irqinitialize(void) putreg32(0, regaddr); } - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* Make sure that we are using the correct vector table. The default * vector address is 0x0000:0000 but if we are executing code that is * positioned in SRAM or in external FLASH, then we may need to reset diff --git a/arch/arm/src/sam34/sam_vectors.S b/arch/arm/src/sam34/sam_vectors.S index 9765f614749..9d2b5e6b313 100644 --- a/arch/arm/src/sam34/sam_vectors.S +++ b/arch/arm/src/sam34/sam_vectors.S @@ -362,7 +362,7 @@ exception_common: * * Here: * r0 = Address of the register save area - + * * NOTE: It is a requirement that up_restorefpu() preserve the value of * r0! */ @@ -482,7 +482,7 @@ exception_common: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/sama5/sam_irq.c b/arch/arm/src/sama5/sam_irq.c index c8cf1f5cd54..fd4dfd8c5cc 100644 --- a/arch/arm/src/sama5/sam_irq.c +++ b/arch/arm/src/sama5/sam_irq.c @@ -431,16 +431,6 @@ void up_irqinitialize(void) * access to the AIC. */ - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* Redirect all interrupts to the AIC if so configured */ sam_aic_redirection(); diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c index f2e44893298..15910d24d6f 100644 --- a/arch/arm/src/samv7/sam_irq.c +++ b/arch/arm/src/samv7/sam_irq.c @@ -381,16 +381,6 @@ void up_irqinitialize(void) putreg32(0, regaddr); } - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* Make sure that we are using the correct vector table. The default * vector address is 0x0000:0000 but if we are executing code that is * positioned in SRAM or in external FLASH, then we may need to reset diff --git a/arch/arm/src/stm32/chip/stm32f33xxx_adc.h b/arch/arm/src/stm32/chip/stm32f33xxx_adc.h index ddfbd97d1f2..b6609d08280 100644 --- a/arch/arm/src/stm32/chip/stm32f33xxx_adc.h +++ b/arch/arm/src/stm32/chip/stm32f33xxx_adc.h @@ -49,13 +49,13 @@ * Pre-processor Definitions ****************************************************************************************************/ -#define STM32_ADC1_BASE_OFFSET 0x0000 -#define STM32_ADC2_BASE_OFFSET 0x0100 -#define STM32_ADC12_BASE_OFFSET 0x0300 +#define STM32_ADC1_OFFSET 0x0000 +#define STM32_ADC2_OFFSET 0x0100 +#define STM32_ADC12_CMN_OFFSET 0x0300 -#define STM32_ADC1_BASE (STM32_ADC1_BASE_OFFSET+STM32_ADC12_BASE) /* ADC1 Master ADC */ -#define STM32_ADC2_BASE (STM32_ADC1_BASE_OFFSET+STM32_ADC12_BASE) /* ADC2 Slave ADC */ -#define STM32_ADC12_BASE (STM32_ADC1_BASE_OFFSET+STM32_ADC12_BASE) /* ADC1, ADC2 common */ +#define STM32_ADC1_BASE (STM32_ADC1_OFFSET+STM32_ADC12_BASE) /* ADC1 Master ADC */ +#define STM32_ADC2_BASE (STM32_ADC2_OFFSET+STM32_ADC12_BASE) /* ADC2 Slave ADC */ +#define STM32_ADC12_CMN_BASE (STM32_ADC12_CMN_OFFSET+STM32_ADC12_BASE) /* ADC1, ADC2 common */ /* Register Offsets *********************************************************************************/ @@ -151,9 +151,9 @@ #define STM32_ADC2_DIFSEL (STM32_ADC2_BASE+STM32_ADC_DIFSEL_OFFSET) #define STM32_ADC2_CALFACT (STM32_ADC2_BASE+STM32_ADC_CALFACT_OFFSET) -#define STM32_ADC12_CSR (STM32_ADC12_BASE+STM32_ADC_CSR_OFFSET) -#define STM32_ADC12_CCR (STM32_ADC12_BASE+STM32_ADC_CCR_OFFSET) -#define STM32_ADC12_CDR (STM32_ADC12_BASE+STM32_ADC_CDR_OFFSET) +#define STM32_ADC12_CSR (STM32_ADC12_CMN_BASE+STM32_ADC_CSR_OFFSET) +#define STM32_ADC12_CCR (STM32_ADC12_CMN_BASE+STM32_ADC_CCR_OFFSET) +#define STM32_ADC12_CDR (STM32_ADC12_CMN_BASE+STM32_ADC_CDR_OFFSET) /* Register Bitfield Definitions ********************************************************************/ /* ADC interrupt and status register (ISR) and ADC interrupt enable register (IER) */ diff --git a/arch/arm/src/stm32/gnu/stm32_vectors.S b/arch/arm/src/stm32/gnu/stm32_vectors.S index 31f62c8d112..c961781f331 100644 --- a/arch/arm/src/stm32/gnu/stm32_vectors.S +++ b/arch/arm/src/stm32/gnu/stm32_vectors.S @@ -497,7 +497,7 @@ exception_common: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/stm32/iar/stm32_vectors.S b/arch/arm/src/stm32/iar/stm32_vectors.S index cf83e7b8bff..f46cb7c57ba 100644 --- a/arch/arm/src/stm32/iar/stm32_vectors.S +++ b/arch/arm/src/stm32/iar/stm32_vectors.S @@ -1055,7 +1055,7 @@ l5: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/stm32/stm32_i2c.c b/arch/arm/src/stm32/stm32_i2c.c index 2110a4847f2..666ad304ad3 100644 --- a/arch/arm/src/stm32/stm32_i2c.c +++ b/arch/arm/src/stm32/stm32_i2c.c @@ -729,6 +729,10 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) start = clock_systimer(); do { + /* Calculate the elapsed time */ + + elapsed = clock_systimer() - start; + /* Check for STOP condition */ cr1 = stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET); @@ -744,10 +748,6 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) { return; } - - /* Calculate the elapsed time */ - - elapsed = clock_systimer() - start; } /* Loop until the stop is complete or a timeout occurs. */ diff --git a/arch/arm/src/stm32/stm32_i2c_alt.c b/arch/arm/src/stm32/stm32_i2c_alt.c index 1501df0c27c..9112b084076 100644 --- a/arch/arm/src/stm32/stm32_i2c_alt.c +++ b/arch/arm/src/stm32/stm32_i2c_alt.c @@ -737,6 +737,10 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) start = clock_systimer(); do { + /* Calculate the elapsed time */ + + elapsed = clock_systimer() - start; + /* Check for STOP condition */ cr1 = stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET); @@ -752,10 +756,6 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) { return; } - - /* Calculate the elapsed time */ - - elapsed = clock_systimer() - start; } /* Loop until the stop is complete or a timeout occurs. */ diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c index 051c9829794..2a51836a52a 100644 --- a/arch/arm/src/stm32/stm32_irq.c +++ b/arch/arm/src/stm32/stm32_irq.c @@ -310,16 +310,6 @@ void up_irqinitialize(void) putreg32(0xffffffff, NVIC_IRQ_CLEAR(i)); } - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* The standard location for the vector table is at the beginning of FLASH * at address 0x0800:0000. If we are using the STMicro DFU bootloader, then * the vector table will be offset to a different location in FLASH and we diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c index 2c6bda67732..c8ce6a2dd8a 100644 --- a/arch/arm/src/stm32/stm32_otgfshost.c +++ b/arch/arm/src/stm32/stm32_otgfshost.c @@ -212,6 +212,7 @@ struct stm32_chan_s uint8_t eptype; /* See OTGFS_EPTYPE_* definitions */ uint8_t funcaddr; /* Device function address */ uint8_t speed; /* Device speed */ + uint8_t interval; /* Interrupt/isochronous EP polling interval */ uint8_t pid; /* Data PID */ uint8_t npackets; /* Number of packets (for data toggle) */ bool inuse; /* True: This channel is "in use" */ @@ -1210,6 +1211,7 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTGFS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1234,6 +1236,7 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTGFS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1363,6 +1366,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = epdesc->xfrtype; chan->funcaddr = hport->funcaddr; chan->speed = hport->speed; + chan->interval = epdesc->interval; chan->maxpacket = epdesc->mxpacketsize; chan->indata1 = false; chan->outdata1 = false; @@ -1893,6 +1897,8 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, } else { + useconds_t delay; + /* Get the elapsed time. Has the timeout elapsed? * if not then try again. */ @@ -1906,6 +1912,54 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, return (ssize_t)ret; } + + /* Wait a bit before retrying after a NAK. */ + + if (chan->eptype == OTGFS_HCCHAR_EPTYP_INTR) + { + /* For interrupt (and isochronous) endpoints, the + * polling rate is determined by the bInterval field + * of the endpoint descriptor (in units of frames + * which we treat as milliseconds here). + */ + + if (chan->interval > 0) + { + /* Convert the delay to units of microseconds */ + + delay = (useconds_t)chan->interval * 1000; + } + else + { + /* Out of range! For interrupt endpoints, the valid + * range is 1-255 frames. Assume one frame. + */ + + delay = 1000; + } + } + else + { + /* For Isochronous endpoints, bInterval must be 1. Bulk + * endpoints do not have a polling interval. Rather, + * the should wait until data is received. + * + * REVISIT: For bulk endpoints this 1 msec delay is only + * intended to give the CPU a break from the bulk EP tight + * polling loop. But are there performance issues? + */ + + delay = 1000; + } + + /* Wait for the next polling interval. + * + * REVISIT: This delay could require more resolution than + * is provided by the system timer. In that case, the + * delay could be significantly longer than required. + */ + + usleep(delay); } } else diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c index 97474f2f435..ba02546aac6 100644 --- a/arch/arm/src/stm32/stm32_otghsdev.c +++ b/arch/arm/src/stm32/stm32_otghsdev.c @@ -5319,20 +5319,22 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) stm32_putreg(0xbfffffff, STM32_OTGHS_GINTSTS); +#ifndef BOARD_ENABLE_USBOTG_HSULPI /* Disable the ULPI Clock enable in RCC AHB1 Register. This must * be done because if both the ULPI and the FS PHY clock enable bits * are set at the same time, the ARM never awakens from WFI due to * some bug / errata in the chip. */ - regval = stm32_getreg(STM32_RCC_AHB1LPENR); + regval = stm32_getreg(STM32_RCC_AHB1LPENR); regval &= ~RCC_AHB1ENR_OTGHSULPIEN; stm32_putreg(regval, STM32_RCC_AHB1LPENR); +#endif /* Enable the interrupts in the INTMSK */ - regval = (OTGHS_GINT_RXFLVL | OTGHS_GINT_USBSUSP | OTGHS_GINT_ENUMDNE | - OTGHS_GINT_IEP | OTGHS_GINT_OEP | OTGHS_GINT_USBRST); + regval = (OTGHS_GINT_RXFLVL | OTGHS_GINT_USBSUSP | OTGHS_GINT_ENUMDNE | + OTGHS_GINT_IEP | OTGHS_GINT_OEP | OTGHS_GINT_USBRST); #ifdef CONFIG_USBDEV_ISOCHRONOUS regval |= (OTGHS_GINT_IISOIXFR | OTGHS_GINT_IISOOXFR); diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c index 71f46ff4a35..090ef4292be 100644 --- a/arch/arm/src/stm32/stm32_otghshost.c +++ b/arch/arm/src/stm32/stm32_otghshost.c @@ -217,6 +217,7 @@ struct stm32_chan_s uint8_t eptype; /* See OTGHS_EPTYPE_* definitions */ uint8_t funcaddr; /* Device function address */ uint8_t speed; /* Device speed */ + uint8_t interval; /* Interrupt/isochronous EP polling interval */ uint8_t pid; /* Data PID */ uint8_t npackets; /* Number of packets (for data toggle) */ bool inuse; /* True: This channel is "in use" */ @@ -1215,6 +1216,7 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTGHS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1239,6 +1241,7 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTGHS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1368,6 +1371,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = epdesc->xfrtype; chan->funcaddr = hport->funcaddr; chan->speed = hport->speed; + chan->interval = epdesc->interval; chan->maxpacket = epdesc->mxpacketsize; chan->indata1 = false; chan->outdata1 = false; @@ -1898,6 +1902,8 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, } else { + useconds_t delay; + /* Get the elapsed time. Has the timeout elapsed? * if not then try again. */ @@ -1911,6 +1917,54 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, return (ssize_t)ret; } + + /* Wait a bit before retrying after a NAK. */ + + if (chan->eptype == OTGFS_HCCHAR_EPTYP_INTR) + { + /* For interrupt (and isochronous) endpoints, the + * polling rate is determined by the bInterval field + * of the endpoint descriptor (in units of frames + * which we treat as milliseconds here). + */ + + if (chan->interval > 0) + { + /* Convert the delay to units of microseconds */ + + delay = (useconds_t)chan->interval * 1000; + } + else + { + /* Out of range! For interrupt endpoints, the valid + * range is 1-255 frames. Assume one frame. + */ + + delay = 1000; + } + } + else + { + /* For Isochronous endpoints, bInterval must be 1. Bulk + * endpoints do not have a polling interval. Rather, + * the should wait until data is received. + * + * REVISIT: For bulk endpoints this 1 msec delay is only + * intended to give the CPU a break from the bulk EP tight + * polling loop. But are there performance issues? + */ + + delay = 1000; + } + + /* Wait for the next polling interval. + * + * REVISIT: This delay could require more resolution than + * is provided by the system timer. In that case, the + * delay could be significantly longer than required. + */ + + usleep(delay); } } else diff --git a/arch/arm/src/stm32/stm32f20xxx_rcc.c b/arch/arm/src/stm32/stm32f20xxx_rcc.c index a45241ed85b..fac0dc911d0 100644 --- a/arch/arm/src/stm32/stm32f20xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f20xxx_rcc.c @@ -193,10 +193,16 @@ static inline void rcc_enableahb1(void) #endif #ifdef CONFIG_STM32_OTGHS - /* USB OTG HS */ +#ifdef BOARD_ENABLE_USBOTG_HSULPI + /* Enable clocking for USB OTG HS and external PHY */ regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN); +#else + /* Enable only clocking for USB OTG HS */ + + regval |= (RCC_AHB1ENR_OTGHSEN); #endif +#endif /* CONFIG_STM32_OTGHS */ putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */ } diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c index 487a8c07118..ba7c02ea651 100644 --- a/arch/arm/src/stm32/stm32f30xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c @@ -844,6 +844,10 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) start = clock_systimer(); do { + /* Calculate the elapsed time */ + + elapsed = clock_systimer() - start; + /* Check for STOP condition */ cr = stm32_i2c_getreg32(priv, STM32_I2C_CR2_OFFSET); @@ -860,9 +864,6 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) return; } - /* Calculate the elapsed time */ - - elapsed = clock_systimer() - start; } /* Loop until the stop is complete or a timeout occurs. */ diff --git a/arch/arm/src/stm32/stm32f40xxx_i2c.c b/arch/arm/src/stm32/stm32f40xxx_i2c.c index 29a8b449c80..c0d1a2d6fd0 100644 --- a/arch/arm/src/stm32/stm32f40xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f40xxx_i2c.c @@ -731,6 +731,10 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) start = clock_systimer(); do { + /* Calculate the elapsed time */ + + elapsed = clock_systimer() - start; + /* Check for STOP condition */ cr1 = stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET); @@ -747,9 +751,6 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) return; } - /* Calculate the elapsed time */ - - elapsed = clock_systimer() - start; } /* Loop until the stop is complete or a timeout occurs. */ diff --git a/arch/arm/src/stm32/stm32f40xxx_rcc.c b/arch/arm/src/stm32/stm32f40xxx_rcc.c index adda863ccae..dfed9d8fcea 100644 --- a/arch/arm/src/stm32/stm32f40xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f40xxx_rcc.c @@ -215,10 +215,15 @@ static inline void rcc_enableahb1(void) #endif #ifdef CONFIG_STM32_OTGHS - /* USB OTG HS */ +#ifdef BOARD_ENABLE_USBOTG_HSULPI + /* Enable clocking for USB OTG HS and external PHY */ + + regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN); +#else + /* Enable only clocking for USB OTG HS */ regval |= RCC_AHB1ENR_OTGHSEN; - +#endif #endif /* CONFIG_STM32_OTGHS */ #ifdef CONFIG_STM32_DMA2D diff --git a/arch/arm/src/stm32f7/stm32_i2c.c b/arch/arm/src/stm32f7/stm32_i2c.c index 50ae643876e..f87633364c6 100644 --- a/arch/arm/src/stm32f7/stm32_i2c.c +++ b/arch/arm/src/stm32f7/stm32_i2c.c @@ -7,7 +7,7 @@ * * With extensions and modifications for the F1, F2, and F4 by: * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. * Authors: Gregroy Nutt * John Wharington * David Sidrane @@ -1034,6 +1034,10 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) start = clock_systimer(); do { + /* Calculate the elapsed time */ + + elapsed = clock_systimer() - start; + /* Check for STOP condition */ cr = stm32_i2c_getreg32(priv, STM32_I2C_CR2_OFFSET); @@ -1050,9 +1054,6 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv) return; } - /* Calculate the elapsed time */ - - elapsed = clock_systimer() - start; } /* Loop until the stop is complete or a timeout occurs. */ diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c index b2407501036..fc6a207854a 100644 --- a/arch/arm/src/stm32f7/stm32_irq.c +++ b/arch/arm/src/stm32f7/stm32_irq.c @@ -415,16 +415,6 @@ void up_irqinitialize(void) putreg32(0, regaddr); } - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* Make sure that we are using the correct vector table. The default * vector address is 0x0000:0000 but if we are executing code that is * positioned in SRAM or in external FLASH, then we may need to reset diff --git a/arch/arm/src/stm32f7/stm32_otgdev.c b/arch/arm/src/stm32f7/stm32_otgdev.c index ff2a6e026ee..1ee746da2dc 100644 --- a/arch/arm/src/stm32f7/stm32_otgdev.c +++ b/arch/arm/src/stm32f7/stm32_otgdev.c @@ -5446,7 +5446,7 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) regval &= OTG_GINT_RESERVED; stm32_putreg(regval | OTG_GINT_RC_W1, STM32_OTG_GINTSTS); -#if defined(CONFIG_STM32F7_OTGHS) +#if defined(CONFIG_STM32F7_OTGHS) && !defined(BOARD_ENABLE_USBOTG_HSULPI) /* Disable the ULPI Clock enable in RCC AHB1 Register. This must * be done because if both the ULPI and the FS PHY clock enable bits * are set at the same time, the ARM never awakens from WFI due to diff --git a/arch/arm/src/stm32f7/stm32_otghost.c b/arch/arm/src/stm32f7/stm32_otghost.c index 48e44185398..29de1826ed1 100644 --- a/arch/arm/src/stm32f7/stm32_otghost.c +++ b/arch/arm/src/stm32f7/stm32_otghost.c @@ -214,6 +214,7 @@ struct stm32_chan_s uint8_t eptype; /* See OTG_EPTYPE_* definitions */ uint8_t funcaddr; /* Device function address */ uint8_t speed; /* Device speed */ + uint8_t interval; /* Interrupt/isochronous EP polling interval */ uint8_t pid; /* Data PID */ uint8_t npackets; /* Number of packets (for data toggle) */ bool inuse; /* True: This channel is "in use" */ @@ -1209,6 +1210,7 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTG_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1233,6 +1235,7 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTG_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1362,6 +1365,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = epdesc->xfrtype; chan->funcaddr = hport->funcaddr; chan->speed = hport->speed; + chan->interval = epdesc->interval; chan->maxpacket = epdesc->mxpacketsize; chan->indata1 = false; chan->outdata1 = false; @@ -1892,6 +1896,8 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, } else { + useconds_t delay; + /* Get the elapsed time. Has the timeout elapsed? * if not then try again. */ @@ -1905,6 +1911,54 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, return (ssize_t)ret; } + + /* Wait a bit before retrying after a NAK. */ + + if (chan->eptype == OTGFS_HCCHAR_EPTYP_INTR) + { + /* For interrupt (and isochronous) endpoints, the + * polling rate is determined by the bInterval field + * of the endpoint descriptor (in units of frames + * which we treat as milliseconds here). + */ + + if (chan->interval > 0) + { + /* Convert the delay to units of microseconds */ + + delay = (useconds_t)chan->interval * 1000; + } + else + { + /* Out of range! For interrupt endpoints, the valid + * range is 1-255 frames. Assume one frame. + */ + + delay = 1000; + } + } + else + { + /* For Isochronous endpoints, bInterval must be 1. Bulk + * endpoints do not have a polling interval. Rather, + * the should wait until data is received. + * + * REVISIT: For bulk endpoints this 1 msec delay is only + * intended to give the CPU a break from the bulk EP tight + * polling loop. But are there performance issues? + */ + + delay = 1000; + } + + /* Wait for the next polling interval. + * + * REVISIT: This delay could require more resolution than + * is provided by the system timer. In that case, the + * delay could be significantly longer than required. + */ + + usleep(delay); } } else diff --git a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c index a10c399f887..7a36d7c7eed 100644 --- a/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f74xx75xx_rcc.c @@ -225,10 +225,15 @@ static inline void rcc_enableahb1(void) #endif #ifdef CONFIG_STM32F7_OTGHS - /* USB OTG HS */ +#ifdef BOARD_ENABLE_USBOTG_HSULPI + /* Enable clocking for USB OTG HS and external PHY */ + + regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN); +#else + /* Enable only clocking for USB OTG HS */ regval |= RCC_AHB1ENR_OTGHSEN; - +#endif #endif /* CONFIG_STM32F7_OTGHS */ putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */ diff --git a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c index b390d422b4d..5a08806eb3a 100644 --- a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c @@ -221,10 +221,15 @@ static inline void rcc_enableahb1(void) #endif #ifdef CONFIG_STM32F7_OTGHS - /* USB OTG HS */ +#ifdef BOARD_ENABLE_USBOTG_HSULPI + /* Enable clocking for USB OTG HS and external PHY */ + + regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN); +#else + /* Enable only clocking for USB OTG HS */ regval |= RCC_AHB1ENR_OTGHSEN; - +#endif #endif /* CONFIG_STM32F7_OTGHS */ putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */ diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c index b6ee80df8b0..3468af22be2 100644 --- a/arch/arm/src/stm32l4/stm32l4_i2c.c +++ b/arch/arm/src/stm32l4/stm32l4_i2c.c @@ -788,6 +788,10 @@ static inline void stm32l4_i2c_sem_waitstop(FAR struct stm32l4_i2c_priv_s *priv) start = clock_systimer(); do { + /* Calculate the elapsed time */ + + elapsed = clock_systimer() - start; + /* Check for STOP condition */ cr = stm32l4_i2c_getreg32(priv, STM32L4_I2C_CR2_OFFSET); @@ -804,9 +808,6 @@ static inline void stm32l4_i2c_sem_waitstop(FAR struct stm32l4_i2c_priv_s *priv) return; } - /* Calculate the elapsed time */ - - elapsed = clock_systimer() - start; } /* Loop until the stop is complete or a timeout occurs. */ diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c index 7a0ed88bd37..4b401d88301 100644 --- a/arch/arm/src/stm32l4/stm32l4_irq.c +++ b/arch/arm/src/stm32l4/stm32l4_irq.c @@ -304,16 +304,6 @@ void up_irqinitialize(void) putreg32(0xffffffff, NVIC_IRQ_CLEAR(i)); } - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - { - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); - } -#endif - /* The standard location for the vector table is at the beginning of FLASH * at address 0x0800:0000. If we are using the STMicro DFU bootloader, then * the vector table will be offset to a different location in FLASH and we diff --git a/arch/arm/src/stm32l4/stm32l4_otgfshost.c b/arch/arm/src/stm32l4/stm32l4_otgfshost.c index 33f283e167c..b24026370db 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfshost.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfshost.c @@ -213,6 +213,7 @@ struct stm32l4_chan_s uint8_t eptype; /* See OTGFS_EPTYPE_* definitions */ uint8_t funcaddr; /* Device function address */ uint8_t speed; /* Device speed */ + uint8_t interval; /* Interrupt/isochronous EP polling interval */ uint8_t pid; /* Data PID */ uint8_t npackets; /* Number of packets (for data toggle) */ bool inuse; /* True: This channel is "in use" */ @@ -1212,6 +1213,7 @@ static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv, chan->eptype = OTGFS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32L4_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1236,6 +1238,7 @@ static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv, chan->eptype = OTGFS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; + chan->interval = 0; chan->maxpacket = STM32L4_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; @@ -1365,6 +1368,7 @@ static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv, chan->eptype = epdesc->xfrtype; chan->funcaddr = hport->funcaddr; chan->speed = hport->speed; + chan->interval = epdesc->interval; chan->maxpacket = epdesc->mxpacketsize; chan->indata1 = false; chan->outdata1 = false; @@ -1897,6 +1901,8 @@ static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, } else { + useconds_t delay; + /* Get the elapsed time. Has the timeout elapsed? * if not then try again. */ @@ -1910,6 +1916,54 @@ static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, return (ssize_t)ret; } + + /* Wait a bit before retrying after a NAK. */ + + if (chan->eptype == OTGFS_HCCHAR_EPTYP_INTR) + { + /* For interrupt (and isochronous) endpoints, the + * polling rate is determined by the bInterval field + * of the endpoint descriptor (in units of frames + * which we treat as milliseconds here). + */ + + if (chan->interval > 0) + { + /* Convert the delay to units of microseconds */ + + delay = (useconds_t)chan->interval * 1000; + } + else + { + /* Out of range! For interrupt endpoints, the valid + * range is 1-255 frames. Assume one frame. + */ + + delay = 1000; + } + } + else + { + /* For Isochronous endpoints, bInterval must be 1. Bulk + * endpoints do not have a polling interval. Rather, + * the should wait until data is received. + * + * REVISIT: For bulk endpoints this 1 msec delay is only + * intended to give the CPU a break from the bulk EP tight + * polling loop. But are there performance issues? + */ + + delay = 1000; + } + + /* Wait for the next polling interval. + * + * REVISIT: This delay could require more resolution than + * is provided by the system timer. In that case, the + * delay could be significantly longer than required. + */ + + usleep(delay); } } else diff --git a/arch/arm/src/tiva/tiva_vectors.S b/arch/arm/src/tiva/tiva_vectors.S index 4f56269ba44..89c9c38e826 100644 --- a/arch/arm/src/tiva/tiva_vectors.S +++ b/arch/arm/src/tiva/tiva_vectors.S @@ -339,7 +339,7 @@ exception_common: * * Here: * r0 = Address of the register save area - + * * NOTE: It is a requirement that up_restorefpu() preserve the value of * r0! */ @@ -459,7 +459,7 @@ exception_common: .global g_intstackbase .align 8 g_intstackalloc: - .skip (CONFIG_ARCH_INTERRUPTSTACK & ~7) + .skip ((CONFIG_ARCH_INTERRUPTSTACK + 4) & ~7) g_intstackbase: .size g_intstackalloc, .-g_intstackalloc #endif diff --git a/arch/arm/src/tms570/tms570_irq.c b/arch/arm/src/tms570/tms570_irq.c index 99032611997..11d606d637e 100644 --- a/arch/arm/src/tms570/tms570_irq.c +++ b/arch/arm/src/tms570/tms570_irq.c @@ -115,14 +115,6 @@ void up_irqinitialize(void) FAR uintptr_t *vimram; int i; - /* Colorize the interrupt stack for debug purposes */ - -#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3 - size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3); - up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size), - intstack_size); -#endif - /* Initialize VIM RAM vectors. These vectors are not used in the current * interrupt handler logic. */ diff --git a/configs/Kconfig b/configs/Kconfig index 2043e646ef3..d5016d9b7ce 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -956,6 +956,17 @@ config ARCH_BOARD_SPARK (http://www.spark.io). This board features the STM32103CBT6 MCU from STMicro. +config ARCH_BOARD_PHOTON + bool "Photon wifi board" + depends on ARCH_CHIP_STM32F205RG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + A configuration for the Photon from Particle Devices + (https://www.particle.io). This board features the STM32F205RGY6 + MCU from STMicro. + config ARCH_BOARD_STM32_BUTTERFLY2 bool "Kamami STM32Butterfly2 development board" depends on ARCH_CHIP_STM32F107VC @@ -1489,6 +1500,7 @@ config ARCH_BOARD default "shenzhou" if ARCH_BOARD_SHENZHOU default "skp16c26" if ARCH_BOARD_SKP16C26 default "spark" if ARCH_BOARD_SPARK + default "photon" if ARCH_BOARD_PHOTON default "stm32butterfly2" if ARCH_BOARD_STM32_BUTTERFLY2 default "stm32_tiny" if ARCH_BOARD_STM32_TINY default "stm32f103-minimum" if ARCH_BOARD_STM32F103_MINIMUM @@ -1837,6 +1849,9 @@ endif if ARCH_BOARD_SPARK source "configs/spark/Kconfig" endif +if ARCH_BOARD_PHOTON +source "configs/photon/Kconfig" +endif if ARCH_BOARD_STM32_BUTTERFLY2 source "configs/stm32butterfly2/Kconfig" endif diff --git a/configs/README.txt b/configs/README.txt index a4ce0ded195..b883163e718 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -519,6 +519,11 @@ configs/p112 Dave Brooks was successfully funded through Kickstarter for and another run of P112 boards in November of 2012. +configs/photon + A configuration for the Photon Wifi board from Particle Devices + (https://www.particle.io). This board features the STM32F205RGY6 MCU from + STMicro. + configs/pic32mx-starterkit This directory contains the port of NuttX to the Microchip PIC32 Ethernet Starter Kit (DM320004) with the Multimedia Expansion Board (MEB, DM320005). diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig index 0b02b897d03..328b1ffd43c 100644 --- a/configs/dk-tm4c129x/ipv6/defconfig +++ b/configs/dk-tm4c129x/ipv6/defconfig @@ -700,6 +700,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -998,7 +999,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig index bce75ec938e..1032d725802 100644 --- a/configs/dk-tm4c129x/nsh/defconfig +++ b/configs/dk-tm4c129x/nsh/defconfig @@ -702,6 +702,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1008,7 +1009,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/freedom-k64f/netnsh/defconfig b/configs/freedom-k64f/netnsh/defconfig index 25f75a4e2ad..c94d75f4385 100644 --- a/configs/freedom-k64f/netnsh/defconfig +++ b/configs/freedom-k64f/netnsh/defconfig @@ -684,6 +684,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1011,7 +1012,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/freedom-k66f/netnsh/defconfig b/configs/freedom-k66f/netnsh/defconfig index 47ed5776193..67c13b30892 100644 --- a/configs/freedom-k66f/netnsh/defconfig +++ b/configs/freedom-k66f/netnsh/defconfig @@ -712,6 +712,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1040,7 +1041,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/olimex-stm32-p407/README.txt b/configs/olimex-stm32-p407/README.txt index 8ec5c47938d..0302020f0b6 100644 --- a/configs/olimex-stm32-p407/README.txt +++ b/configs/olimex-stm32-p407/README.txt @@ -20,25 +20,43 @@ Board Support The following peripherals are available in this configuration. - - LEDs: show the sytem status + - LEDs: Show the sytem status - Buttons: TAMPER-button, WKUP-button, J1-Joystick (consists of RIGHT-, - UP-, LEFT-, DOWN-, and CENTER-button). Built in app - 'buttons' works. + UP-, LEFT-, DOWN-, and CENTER-button). - ADC: ADC1 samples the red trim potentiometer AN_TR Built in app 'adc' works. - USB-FS-OTG: There is a USB-A-connector (host) connected to the full - speed STM32 inputs. + speed STM32 OTG inputs. - USB-HS-OTG: The other connector (device) is connected to the high speed - STM32 inputs. + STM32 OTG inputs. - - CAN: Built in app 'can' works, but apart from that not really tested. + - CAN: Built in app 'can' works, but apart from that not really + tested. - Ethernet: Ping to other station on the network works. + - microSD: Not fully functional. See below. + + - LCD: Nokia 6610. This is similar the Nokia 6100 LCD used on other + Olimex boards. There is a driver for that LCD at + drivers/lcd/nokia6100.c, however, it is not properly + integrated. It uses a 9-bit SPI interface which is difficult + to get working properly. + +- External Support is included for the onboard SRAM. It uses SRAM + SRAM: settings from another board that might need to be tweaked. + Difficult to test because the SRAM conflicts with both + RS232 ports. + +- Other: Buzzer, Camera, Temperature sensor, audio have not been + tested. + + If so, then it requires a 9-bit + microSD Card Interface ====================== @@ -205,6 +223,13 @@ OTGFS Host CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 + STATUS: The MSC configurations seems fully functional. The HIDKBD seems rather + flaky. Sometimes the LEDs become very bright (indicating that it is being + swamped with interrupts). Data input is not clean with apps/examples/hidkbd: + There are missing characters and sometimes duplicated characters. This implies + some logic issues, probably in drivers/usbhost/usbhost_hidkbd, with polling and + data filtering. + Configurations ============== @@ -404,7 +429,7 @@ STATUS feature configurations. CCM memory is not included in the heap (CONFIG_STM32_CCMEXCLUDE=y) because - it does no suport DMA, leaving only 128KiB for program usage. + it does not suport DMA, leaving only 128KiB for program usage. 2107-01-23: Added the the knsh configuration and support for the PROTECTED build mode. diff --git a/configs/photon/Kconfig b/configs/photon/Kconfig new file mode 100644 index 00000000000..f76203d6c05 --- /dev/null +++ b/configs/photon/Kconfig @@ -0,0 +1,58 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_PHOTON + +config PHOTON_DFU_BOOTLOADER + bool "Stock photon bootloader support" + select STM32_DFU + ---help--- + Build image that can be uploaded using stock DFU bootloader. + +config PHOTON_WDG + bool + +config PHOTON_IWDG + bool "Photon iwdg kicker support" + depends on STM32_IWDG + depends on WATCHDOG + select PHOTON_WDG + +config PHOTON_IWDG_TIMEOUT + int "Photon iwdg Timeout (ms)" + default 32000 + depends on PHOTON_IWDG + ---help--- + Watchdog timeout value in milliseconds. + +if PHOTON_WDG +config PHOTON_WDG_THREAD + bool "Watchdog Deamon Thread" + +if PHOTON_WDG_THREAD +config PHOTON_WDG_THREAD_NAME + string "Watchdog Thread Name" + default "wdog" + +config PHOTON_WDG_THREAD_INTERVAL + int "Watchdog Thread Interval (ms)" + default 2500 + +config PHOTON_WDG_THREAD_PRIORITY + int "Watchdog Thread Priority" + default 200 + +config PHOTON_WDG_THREAD_STACKSIZE + int "Watchdog Thread Stacksize" + default 1024 + +endif # PHOTON_WDG_THREAD +endif # PHOTON_WDG + +config PHOTON_WLAN + bool "Enable WLAN chip support" + depends on IEEE80211_BROADCOM_FULLMAC_SDIO + +endif diff --git a/configs/photon/include/board.h b/configs/photon/include/board.h new file mode 100644 index 00000000000..8c2fc655e3f --- /dev/null +++ b/configs/photon/include/board.h @@ -0,0 +1,244 @@ +/************************************************************************************ + * configs/photon/include/board.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIG_PHOTON_INCLUDE_BOARD_H +#define __CONFIG_PHOTON_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" +#include "stm32.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ +/* The Particle photon board features a single 26MHz crystal. + * + * This is the canonical configuration: + * System Clock source : PLL (HSE) + * SYSCLK(Hz) : 120000000 Determined by PLL configuration + * HCLK(Hz) : 120000000 (STM32_RCC_CFGR_HPRE) + * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE) + * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1) + * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2) + * HSE Frequency(Hz) : 26000000 (STM32_BOARD_XTAL) + * PLLM : 26 (STM32_PLLCFG_PLLM) + * PLLN : 240 (STM32_PLLCFG_PLLN) + * PLLP : 2 (STM32_PLLCFG_PLLP) + * PLLQ : 5 (STM32_PLLCFG_PLLQ) + * Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK + * Flash Latency(WS) : 3 + * Prefetch Buffer : OFF + * Instruction cache : ON + * Data cache : ON + * Require 48MHz for USB OTG HS : Enabled + * SDIO and RNG clock + */ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - On-board crystal frequency is 26MHz + * LSE - 32.768 kHz + */ + +#define STM32_BOARD_XTAL 26000000ul + +#define STM32_HSI_FREQUENCY 16000000ul +#define STM32_LSI_FREQUENCY 32000 +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 32768 + +/* Main PLL Configuration. + * + * PLL source is HSE + * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN + * = (26,000,000 / 26) * 240 + * = 240,000,000 + * SYSCLK = PLL_VCO / PLLP + * = 240,000,000 / 2 = 120,000,000 + * USB OTG FS, SDIO and RNG Clock + * = PLL_VCO / PLLQ + * = 48,000,000 + */ + +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(26) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(240) +#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(5) + +#define STM32_SYSCLK_FREQUENCY 120000000ul + +/* AHB clock (HCLK) is SYSCLK (120MHz) */ + +#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) + +/* Timers driven from APB1 will be twice PCLK1 */ + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK/2 (60MHz) */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ +#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +/* Timers driven from APB2 will be twice PCLK2 */ + +#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) +#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) + +/* USB OTG HS definitions ***********************************************************/ +/* Do not enable external PHY clock or OTG_HS module will not work */ + +#undef BOARD_ENABLE_USBOTG_HSULPI + +/* LED definitions ******************************************************************/ + +#define BOARD_LED1 0 +#define BOARD_NLEDS 1 +#define BOARD_LED1_BIT (1 << BOARD_LED1) + +/* Button definitions ***************************************************************/ + +#define BOARD_BUTTON1 0 +#define NUM_BUTTONS 1 +#define BOARD_BUTTON1_BIT (1 << BOARD_BUTTON1) + +/* Alternate function pin selections ************************************************/ +/* UART1 */ + +#ifdef CONFIG_STM32_USART1 +# define GPIO_USART1_RX GPIO_USART1_RX_1 +# define GPIO_USART1_TX GPIO_USART1_TX_1 +#endif + +/* SDIO definitions *****************************************************************/ + +/* Note that slower clocking is required when DMA is disabled in order + * to avoid RX overrun/TX underrun errors due to delayed responses + * to service FIFOs in interrupt driven mode. + * + * These values have not been tuned!!! + * + * SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz + */ + +#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT) + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz + * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz + */ + +#ifdef CONFIG_SDIO_DMA +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) +#else +# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +#endif + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIG_PHOTON_INCLUDE_BOARD_H */ diff --git a/configs/photon/nsh/Make.defs b/configs/photon/nsh/Make.defs new file mode 100644 index 00000000000..b6f58f29439 --- /dev/null +++ b/configs/photon/nsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/photon/nsh/Make.defs +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_PHOTON_DFU_BOOTLOADER),y) +LDSCRIPT = photon_dfu.ld +else +LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/photon/nsh/defconfig b/configs/photon/nsh/defconfig new file mode 100644 index 00000000000..9e808a75f34 --- /dev/null +++ b/configs/photon/nsh/defconfig @@ -0,0 +1,1276 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_MISOC is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM23 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM33 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +CONFIG_ARCH_CHIP_STM32F205RG=y +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F334K4 is not set +# CONFIG_ARCH_CHIP_STM32F334K6 is not set +# CONFIG_ARCH_CHIP_STM32F334K8 is not set +# CONFIG_ARCH_CHIP_STM32F334C4 is not set +# CONFIG_ARCH_CHIP_STM32F334C6 is not set +# CONFIG_ARCH_CHIP_STM32F334C8 is not set +# CONFIG_ARCH_CHIP_STM32F334R4 is not set +# CONFIG_ARCH_CHIP_STM32F334R6 is not set +# CONFIG_ARCH_CHIP_STM32F334R8 is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +CONFIG_STM32_STM32F205=y +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F33XX is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_HRTIM1 is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +# CONFIG_STM32_HAVE_SDADC1 is not set +# CONFIG_STM32_HAVE_SDADC2 is not set +# CONFIG_STM32_HAVE_SDADC3 is not set +# CONFIG_STM32_HAVE_SDADC1_DMA is not set +# CONFIG_STM32_HAVE_SDADC2_DMA is not set +# CONFIG_STM32_HAVE_SDADC3_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +# CONFIG_STM32_HAVE_COMP2 is not set +# CONFIG_STM32_HAVE_COMP4 is not set +# CONFIG_STM32_HAVE_COMP6 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_HAVE_OPAMP is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +# CONFIG_STM32_OTGHS is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +CONFIG_STM32_IWDG=y +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set +# CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set +# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_PHOTON=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="photon" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +CONFIG_PHOTON_DFU_BOOTLOADER=y +CONFIG_PHOTON_WDG=y +CONFIG_PHOTON_IWDG=y +CONFIG_PHOTON_IWDG_TIMEOUT=32000 +CONFIG_PHOTON_WDG_THREAD=y +CONFIG_PHOTON_WDG_THREAD_NAME="wdog" +CONFIG_PHOTON_WDG_THREAD_INTERVAL=2500 +CONFIG_PHOTON_WDG_THREAD_PRIORITY=200 +CONFIG_PHOTON_WDG_THREAD_STACKSIZE=1024 +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_ARCH_HAVE_TIMEKEEPING=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 +# CONFIG_PTHREAD_CLEANUP is not set +# CONFIG_CANCELLATION_POINTS is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +# CONFIG_RTC is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_PSEUDOFS_SOFTLINKS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# + +# +# Standard C I/O +# +# CONFIG_STDIO_DISABLE_BUFFERING is not set +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_SCANSET is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_MEMCPY_VIK is not set +# CONFIG_LIBM is not set + +# +# Architecture-Specific Support +# +CONFIG_ARCH_LOWPUTC=y +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_LIBC_ARCH_MEMCPY is not set +# CONFIG_LIBC_ARCH_MEMCMP is not set +# CONFIG_LIBC_ARCH_MEMMOVE is not set +# CONFIG_LIBC_ARCH_MEMSET is not set +# CONFIG_LIBC_ARCH_STRCHR is not set +# CONFIG_LIBC_ARCH_STRCMP is not set +# CONFIG_LIBC_ARCH_STRCPY is not set +# CONFIG_LIBC_ARCH_STRNCPY is not set +# CONFIG_LIBC_ARCH_STRLEN is not set +# CONFIG_LIBC_ARCH_STRNLEN is not set +# CONFIG_LIBC_ARCH_ELF is not set +# CONFIG_ARMV7M_MEMCPY is not set + +# +# stdlib Options +# +CONFIG_LIB_RAND_ORDER=1 +CONFIG_LIB_HOMEDIR="/" + +# +# Program Execution Options +# +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + +# +# errno Decode Support +# +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set + +# +# memcpy/memset Options +# +# CONFIG_MEMSET_OPTSPEED is not set +# CONFIG_LIBC_DLLFCN is not set +# CONFIG_LIBC_MODLIB is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set + +# +# Time/Time Zone Support +# +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_ARCH_HAVE_TLS=y + +# +# Thread Local Storage (TLS) +# +# CONFIG_TLS is not set + +# +# Network-Related Options +# +# CONFIG_LIBC_IPv4_ADDRCONV is not set +# CONFIG_LIBC_IPv6_ADDRCONV is not set +# CONFIG_LIBC_NETDB is not set + +# +# NETDB Support +# +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# LLVM C++ Library (libcxx) +# +# CONFIG_LIBCXX is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# NxWidgets/NxWM +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CCTYPE is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_STAT is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PRINTF=y +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +# CONFIG_NSH_CMDOPT_DD_STATS is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/photon/nsh/setenv.sh b/configs/photon/nsh/setenv.sh new file mode 100755 index 00000000000..dae53bd4787 --- /dev/null +++ b/configs/photon/nsh/setenv.sh @@ -0,0 +1,84 @@ +#!/bin/bash +# configs/photon/nsh/setenv.sh +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/photon/scripts/ld.script b/configs/photon/scripts/ld.script new file mode 100644 index 00000000000..01309314fef --- /dev/null +++ b/configs/photon/scripts/ld.script @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/photon/scripts/ld.script + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F205RG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 112Kb of SRAM. + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/photon/scripts/photon_dfu.ld b/configs/photon/scripts/photon_dfu.ld new file mode 100644 index 00000000000..e59f501210c --- /dev/null +++ b/configs/photon/scripts/photon_dfu.ld @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/photon/scripts/photon_dfu.ld + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F205RG has 1024Kb of FLASH beginning at address 0x0800:0000 and + * 112Kb of SRAM. + * + * Bootloader jumps at 0x0802:0000. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08020000, LENGTH = 896K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +EXTERN(dfu_sign) + +SECTIONS +{ + .firmware_start : { + _firmware_start = ABSOLUTE(.); + } > flash + + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.dfu_signature) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .firmware_end : { + _firmware_end = ABSOLUTE(.); + } > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/photon/src/Makefile b/configs/photon/src/Makefile new file mode 100644 index 00000000000..5d9501759c7 --- /dev/null +++ b/configs/photon/src/Makefile @@ -0,0 +1,68 @@ +############################################################################ +# configs/photon/src/Makefile +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c + +ifeq ($(CONFIG_PHOTON_DFU_BOOTLOADER),y) +CSRCS += dfu_signature.c +endif + +ifeq ($(CONFIG_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_USERLED),y) +CSRCS += stm32_leds.c +endif + +ifeq ($(CONFIG_PHOTON_WDG),y) +CSRCS += stm32_wdt.c +endif + +ifeq ($(CONFIG_PHOTON_WLAN),y) +CSRCS += stm32_wlan.c +endif + +ifeq ($(CONFIG_STM32_OTGHS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_NSH_LIBRARY),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/photon/src/dfu_signature.c b/configs/photon/src/dfu_signature.c new file mode 100644 index 00000000000..a6eb0b49195 --- /dev/null +++ b/configs/photon/src/dfu_signature.c @@ -0,0 +1,77 @@ +/**************************************************************************** + * configs/photon/src/dfu_signature.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +__attribute__((packed)) struct dfu_signature +{ + uint32_t linker_start_address; + uint32_t linker_end_address; + uint8_t reserved[4]; + uint16_t board_id; + uint8_t firmware_type1; + uint8_t firmware_type2; + uint8_t reserved2[8]; +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +extern uint32_t _firmware_start; +extern uint32_t _firmware_end; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +__attribute__((externally_visible, section(".dfu_signature"))) + const struct dfu_signature dfu_sign = +{ + (uint32_t)&_firmware_start, /* Flash image start address */ + (uint32_t)&_firmware_end, /* Flash image end address */ + {0, 0, 0, 0}, /* reserved */ + 6, /* Current board is photon */ + 4, 1, /* Firmware is "system-part1" */ + {0, 0, 0, 0, 0, 0, 0, 0} /* reserved */ +}; diff --git a/configs/photon/src/photon.h b/configs/photon/src/photon.h new file mode 100644 index 00000000000..4e0f312b6c4 --- /dev/null +++ b/configs/photon/src/photon.h @@ -0,0 +1,142 @@ +/**************************************************************************** + * configs/photon/src/photon.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_PHOTON_SRC_PHOTON_H +#define __CONFIGS_PHOTON_SRC_PHOTON_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LEDs */ + +#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN13) + +/* BUTTONS -- EXTI interrupts are available on Photon board button */ + +#define MIN_IRQBUTTON BOARD_BUTTON1 +#define MAX_IRQBUTTON BOARD_BUTTON1 +#define NUM_IRQBUTTONS 1 + +#define GPIO_BUTTON1 (GPIO_INPUT|GPIO_PULLUP|GPIO_EXTI|GPIO_PORTC|GPIO_PIN7) + +/* WLAN chip */ + +#define SDIO_WLAN0_SLOTNO 0 /* Photon board has only one sdio device */ +#define SDIO_WLAN0_MINOR 0 /* Register "wlan0" device */ + +#define GPIO_WLAN0_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN1) + +#define GPIO_WLAN0_32K_CLK (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN1) + +#define GPIO_WLAN0_OOB_INT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\ + GPIO_PORTB|GPIO_PIN0) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: photon_watchdog_initialize() + * + * Description: + * Perform architecture-specific initialization of the Watchdog hardware. + * + * Input parameters: + * None + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_PHOTON_WDG +int photon_watchdog_initialize(void); +#endif + +/**************************************************************************** + * Name: photon_wlan_initialize + * + * Description: + * Initialize wlan hardware and driver for Photon board. + * + * Input parameters: + * None + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_PHOTON_WLAN +int photon_wlan_initialize(void); +#endif + +/**************************************************************************** + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in initialization to setup + * USB-related GPIO pins for the Photon board. + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_OTGHS +void weak_function stm32_usbinitialize(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_PHOTON_SRC_PHOTON_H */ diff --git a/configs/photon/src/stm32_appinit.c b/configs/photon/src/stm32_appinit.c new file mode 100644 index 00000000000..dc2899789fe --- /dev/null +++ b/configs/photon/src/stm32_appinit.c @@ -0,0 +1,151 @@ +/**************************************************************************** + * config/photon/src/stm32_appinit.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include + +#include "photon.h" +#include "stm32_wdg.h" +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ + int ret = OK; + +#ifdef CONFIG_USERLED +#ifdef CONFIG_USERLED_LOWER + /* Register the LED driver */ + + ret = userled_lower_initialize("/dev/userleds"); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret); + return ret; + } +#else + board_userled_initialize(); +#endif /* CONFIG_USERLED_LOWER */ +#endif /* CONFIG_USERLED */ + +#ifdef CONFIG_BUTTONS +#ifdef CONFIG_BUTTONS_LOWER + /* Register the BUTTON driver */ + + ret = btn_lower_initialize("/dev/buttons"); + if (ret != OK) + { + syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret); + return ret; + } +#else + board_button_initialize(); +#endif /* CONFIG_BUTTONS_LOWER */ +#endif /* CONFIG_BUTTONS */ + +#ifdef CONFIG_STM32_IWDG + stm32_iwdginitialize("/dev/watchdog0", STM32_LSI_FREQUENCY); +#endif + +#ifdef CONFIG_PHOTON_WDG + + /* Start WDG kicker thread */ + + ret = photon_watchdog_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "Failed to start watchdog thread: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_PHOTON_WLAN + + /* Initialize wlan driver and hardware */ + + ret = photon_wlan_initialize(); + if (ret != OK) + { + syslog(LOG_ERR, "Failed to initialize wlan: %d\n", ret); + return ret; + } +#endif + + return ret; +} diff --git a/configs/photon/src/stm32_boot.c b/configs/photon/src/stm32_boot.c new file mode 100644 index 00000000000..c9dfe28729a --- /dev/null +++ b/configs/photon/src/stm32_boot.c @@ -0,0 +1,76 @@ +/************************************************************************************ + * configs/photon/src/stm32_boot.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include "up_arch.h" +#include "photon.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32_boardinitialize(void) +{ +#ifdef CONFIG_STM32_OTGHS + /* Initialize USB if the 1) OTG HS controller is in the configuration and 2) + * disabled, and 3) the weak function stm32_usbinitialize() has been brought + * into the build. Presumably either CONFIG_USBDEV or CONFIG_USBHOST is also + * selected. + */ + + if (stm32_usbinitialize) + { + stm32_usbinitialize(); + } +#endif +} diff --git a/configs/photon/src/stm32_buttons.c b/configs/photon/src/stm32_buttons.c new file mode 100644 index 00000000000..7c695dd5efa --- /dev/null +++ b/configs/photon/src/stm32_buttons.c @@ -0,0 +1,100 @@ +/**************************************************************************** + * configs/photon/src/stm32_buttons.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include "photon.h" + +#include "stm32_gpio.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + ****************************************************************************/ + +void board_button_initialize(void) +{ + /* Configure Photon button gpio as input */ + + stm32_configgpio(GPIO_BUTTON1); +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + /* Check the state of the only button */ + + if (stm32_gpioread(GPIO_BUTTON1)) + { + return BOARD_BUTTON1_BIT; + } + + return 0; +} + +/**************************************************************************** + * Name: board_button_irq + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) +{ + if (id != BOARD_BUTTON1) + { + /* Invalid button id */ + + return -EINVAL; + } + + /* Configure interrupt on falling edge only */ + + return stm32_gpiosetevent(GPIO_BUTTON1, false, true, false, + irqhandler, arg); +} +#endif /* CONFIG_ARCH_IRQBUTTONS */ diff --git a/configs/photon/src/stm32_leds.c b/configs/photon/src/stm32_leds.c new file mode 100644 index 00000000000..076df40ad6c --- /dev/null +++ b/configs/photon/src/stm32_leds.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * configs/photon/src/stm32_leds.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include "photon.h" + +#include "stm32_gpio.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +void board_userled_initialize(void) +{ + /* Configure Photon LED gpio as output */ + + stm32_configgpio(GPIO_LED1); +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + if (led == BOARD_LED1) + { + stm32_gpiowrite(GPIO_LED1, ledon); + } +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint8_t ledset) +{ + stm32_gpiowrite(GPIO_LED1, !!(ledset & BOARD_LED1_BIT)); +} diff --git a/configs/photon/src/stm32_usb.c b/configs/photon/src/stm32_usb.c new file mode 100644 index 00000000000..5dc24d5ed84 --- /dev/null +++ b/configs/photon/src/stm32_usb.c @@ -0,0 +1,91 @@ +/************************************************************************************ + * configs/photon/src/stm32_usb.c + * + * Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "photon.h" +#include + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_usbinitialize + * + * Description: + * Called from stm32_usbinitialize very early in inialization to setup USB-related + * GPIO pins for the Photon board. + * + ************************************************************************************/ + +void stm32_usbinitialize(void) +{ +} + +/************************************************************************************ + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +#ifdef CONFIG_USBDEV +void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + uinfo("resume: %d\n", resume); +} +#endif diff --git a/configs/photon/src/stm32_wdt.c b/configs/photon/src/stm32_wdt.c new file mode 100644 index 00000000000..1df96707c6d --- /dev/null +++ b/configs/photon/src/stm32_wdt.c @@ -0,0 +1,179 @@ +/************************************************************************************ + * configs/photon/src/stm32_wdt.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration *******************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/* Watchdog daemon thread */ + +#if defined(CONFIG_PHOTON_WDG_THREAD) + +static int wdog_daemon(int argc, char *argv[]) +{ + int fd; + int ret; + + /* Open watchdog device */ + + fd = open(CONFIG_WATCHDOG_DEVPATH, O_RDONLY); + + if (fd < 0) + { + wderr("ERROR: open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno); + return ERROR; + } + + /* Start watchdog timer */ + + ret = ioctl(fd, WDIOC_START, 0); + + if (ret < 0) + { + wderr("ERROR: ioctl(WDIOC_START) failed: %d\n", errno); + goto exit_close_dev; + } + + while(1) + { + usleep((CONFIG_PHOTON_WDG_THREAD_INTERVAL)*1000); + + /* Send keep alive ioctl */ + + ret = ioctl(fd, WDIOC_KEEPALIVE, 0); + + if (ret < 0) + { + wderr("ERROR: ioctl(WDIOC_KEEPALIVE) failed: %d\n", errno); + break; + } + } + +exit_close_dev: + + /* Close watchdog device and exit. */ + close(fd); + return ret; +} + +#endif /* CONFIG_PHOTON_WDG_THREAD */ + +/**************************************************************************** + * Name: photon_watchdog_initialize() + * + * Description: + * Perform architecture-specific initialization of the Watchdog hardware. + * This interface must be provided by all configurations using + * apps/examples/watchdog + * + ****************************************************************************/ + +int photon_watchdog_initialize(void) +{ + int fd; + int ret = 0; + + /* Open the watchdog device */ + + fd = open(CONFIG_WATCHDOG_DEVPATH, O_RDONLY); + if (fd < 0) + { + wderr("ERROR: open %s failed: %d\n", CONFIG_WATCHDOG_DEVPATH, errno); + return ERROR; + } + + /* Set the watchdog timeout */ + +#ifdef CONFIG_PHOTON_IWDG + wdinfo("Timeout = %d.\n", CONFIG_PHOTON_IWDG_TIMEOUT); + ret = ioctl(fd, WDIOC_SETTIMEOUT, (unsigned long)CONFIG_PHOTON_IWDG_TIMEOUT); +#else +# error "No watchdog configured" +#endif + + /* Close watchdog as it is not needed here anymore */ + + close(fd); + + if (ret < 0) + { + wderr("ERROR: watchdog configuration failed: %d\n", errno); + return ret; + } + +#if defined(CONFIG_PHOTON_WDG_THREAD) + + /* Spawn wdog deamon thread */ + + int taskid = kernel_thread(CONFIG_PHOTON_WDG_THREAD_NAME, + CONFIG_PHOTON_WDG_THREAD_PRIORITY, + CONFIG_PHOTON_WDG_THREAD_STACKSIZE, + (main_t)wdog_daemon, (FAR char * const *)NULL); + + if (taskid <= 0) + { + wderr("ERROR: cannot spawn wdog_daemon thread\n"); + return ERROR; + } + +#endif /* CONFIG_PHOTON_WDG_THREAD */ + + return OK; +} diff --git a/configs/photon/src/stm32_wlan.c b/configs/photon/src/stm32_wlan.c new file mode 100644 index 00000000000..a0b19e4e0fb --- /dev/null +++ b/configs/photon/src/stm32_wlan.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * configs/photon/src/stm32_wlan.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include "photon.h" + +#include "stm32_gpio.h" +#include "stm32_sdio.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: bcmf_board_reset + ****************************************************************************/ + +void bcmf_board_reset(int minor, bool reset) +{ + if (minor != SDIO_WLAN0_MINOR) + { + return; + } + + stm32_gpiowrite(GPIO_WLAN0_RESET, !reset); +} + +/**************************************************************************** + * Name: bcmf_board_power + ****************************************************************************/ + +void bcmf_board_power(int minor, bool power) +{ + /* Power signal is not used on Photon board */ +} + +/**************************************************************************** + * Name: bcmf_board_initialize + ****************************************************************************/ + +void bcmf_board_initialize(int minor) +{ + if (minor != SDIO_WLAN0_MINOR) + { + return; + } + + /* Configure reset pin */ + + stm32_configgpio(GPIO_WLAN0_RESET); + + /* Put wlan chip in reset state */ + + bcmf_board_reset(minor, true); +} + +/**************************************************************************** + * Name: photon_wlan_initialize + ****************************************************************************/ + +int photon_wlan_initialize() +{ + int ret; + struct sdio_dev_s *sdio_dev; + + /* Initialize sdio interface */ + _info("Initializing SDIO slot %d\n", SDIO_WLAN0_SLOTNO); + + sdio_dev = sdio_initialize(SDIO_WLAN0_SLOTNO); + + if (!sdio_dev) + { + _err("ERROR: Failed to initialize SDIO with slot %d\n", + SDIO_WLAN0_SLOTNO); + return ERROR; + } + + /* Bind the SDIO interface to the bcmf driver */ + ret = bcmf_sdio_initialize(SDIO_WLAN0_MINOR, sdio_dev); + + if (ret != OK) + { + _err("ERROR: Failed to bind SDIO to bcmf driver\n"); + /* FIXME deinitialize sdio device */ + return ERROR; + } + return OK; +} diff --git a/configs/photon/usbnsh/Make.defs b/configs/photon/usbnsh/Make.defs new file mode 100644 index 00000000000..cb2820a9cb4 --- /dev/null +++ b/configs/photon/usbnsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/photon/usbnsh/Make.defs +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_PHOTON_DFU_BOOTLOADER),y) +LDSCRIPT = photon_dfu.ld +else +LDSCRIPT = ld.script +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/photon/usbnsh/defconfig b/configs/photon/usbnsh/defconfig new file mode 100644 index 00000000000..c6326b54df0 --- /dev/null +++ b/configs/photon/usbnsh/defconfig @@ -0,0 +1,1319 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_MISOC is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM23 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM33 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +CONFIG_ARCH_CHIP_STM32F205RG=y +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F334K4 is not set +# CONFIG_ARCH_CHIP_STM32F334K6 is not set +# CONFIG_ARCH_CHIP_STM32F334K8 is not set +# CONFIG_ARCH_CHIP_STM32F334C4 is not set +# CONFIG_ARCH_CHIP_STM32F334C6 is not set +# CONFIG_ARCH_CHIP_STM32F334C8 is not set +# CONFIG_ARCH_CHIP_STM32F334R4 is not set +# CONFIG_ARCH_CHIP_STM32F334R6 is not set +# CONFIG_ARCH_CHIP_STM32F334R8 is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +# CONFIG_STM32_STM32F10XX is not set +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +CONFIG_STM32_STM32F20XX=y +CONFIG_STM32_STM32F205=y +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F33XX is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +CONFIG_STM32_DFU=y + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_HRTIM1 is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +CONFIG_STM32_HAVE_USART6=y +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +CONFIG_STM32_HAVE_TIM9=y +CONFIG_STM32_HAVE_TIM10=y +CONFIG_STM32_HAVE_TIM11=y +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +# CONFIG_STM32_HAVE_SDADC1 is not set +# CONFIG_STM32_HAVE_SDADC2 is not set +# CONFIG_STM32_HAVE_SDADC3 is not set +# CONFIG_STM32_HAVE_SDADC1_DMA is not set +# CONFIG_STM32_HAVE_SDADC2_DMA is not set +# CONFIG_STM32_HAVE_SDADC3_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +# CONFIG_STM32_HAVE_COMP2 is not set +# CONFIG_STM32_HAVE_COMP4 is not set +# CONFIG_STM32_HAVE_COMP6 is not set +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +CONFIG_STM32_HAVE_RNG=y +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +CONFIG_STM32_HAVE_I2C3=y +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_HAVE_OPAMP is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_I2C3 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_OTGHS=y +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_RNG is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM9 is not set +# CONFIG_STM32_TIM10 is not set +# CONFIG_STM32_TIM11 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USART6 is not set +CONFIG_STM32_IWDG=y +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +# CONFIG_STM32_TIM9_CAP is not set +# CONFIG_STM32_TIM10_CAP is not set +# CONFIG_STM32_TIM11_CAP is not set +# CONFIG_STM32_TIM12_CAP is not set +# CONFIG_STM32_TIM13_CAP is not set +# CONFIG_STM32_TIM14_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set +# CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +# CONFIG_STM32_HAVE_RTC_COUNTER is not set +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set +# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=16717 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=114688 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_PHOTON=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="photon" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +CONFIG_PHOTON_DFU_BOOTLOADER=y +CONFIG_PHOTON_WDG=y +CONFIG_PHOTON_IWDG=y +CONFIG_PHOTON_IWDG_TIMEOUT=32000 +CONFIG_PHOTON_WDG_THREAD=y +CONFIG_PHOTON_WDG_THREAD_NAME="wdog" +CONFIG_PHOTON_WDG_THREAD_INTERVAL=2500 +CONFIG_PHOTON_WDG_THREAD_PRIORITY=200 +CONFIG_PHOTON_WDG_THREAD_STACKSIZE=1024 +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_ARCH_HAVE_TIMEKEEPING=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 +# CONFIG_PTHREAD_CLEANUP is not set +# CONFIG_CANCELLATION_POINTS is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +# CONFIG_RTC is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +CONFIG_SERIAL=y +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_SERIAL_CONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +# CONFIG_USART1_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_PSEUDOTERM is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +CONFIG_CDCACM_CONSOLE=y +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=257 +CONFIG_CDCACM_TXBUFSIZE=193 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_SERIAL_CONSOLE is not set +CONFIG_SYSLOG_CHAR=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +CONFIG_SYSLOG_CHAR_CRLF=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_PSEUDOFS_SOFTLINKS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# + +# +# Standard C I/O +# +# CONFIG_STDIO_DISABLE_BUFFERING is not set +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_SCANSET is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_MEMCPY_VIK is not set +# CONFIG_LIBM is not set + +# +# Architecture-Specific Support +# +CONFIG_ARCH_LOWPUTC=y +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_LIBC_ARCH_MEMCPY is not set +# CONFIG_LIBC_ARCH_MEMCMP is not set +# CONFIG_LIBC_ARCH_MEMMOVE is not set +# CONFIG_LIBC_ARCH_MEMSET is not set +# CONFIG_LIBC_ARCH_STRCHR is not set +# CONFIG_LIBC_ARCH_STRCMP is not set +# CONFIG_LIBC_ARCH_STRCPY is not set +# CONFIG_LIBC_ARCH_STRNCPY is not set +# CONFIG_LIBC_ARCH_STRLEN is not set +# CONFIG_LIBC_ARCH_STRNLEN is not set +# CONFIG_LIBC_ARCH_ELF is not set +# CONFIG_ARMV7M_MEMCPY is not set + +# +# stdlib Options +# +CONFIG_LIB_RAND_ORDER=1 +CONFIG_LIB_HOMEDIR="/" + +# +# Program Execution Options +# +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + +# +# errno Decode Support +# +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set + +# +# memcpy/memset Options +# +# CONFIG_MEMSET_OPTSPEED is not set +# CONFIG_LIBC_DLLFCN is not set +# CONFIG_LIBC_MODLIB is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set + +# +# Time/Time Zone Support +# +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_ARCH_HAVE_TLS=y + +# +# Thread Local Storage (TLS) +# +# CONFIG_TLS is not set + +# +# Network-Related Options +# +# CONFIG_LIBC_IPv4_ADDRCONV is not set +# CONFIG_LIBC_IPv6_ADDRCONV is not set +# CONFIG_LIBC_NETDB is not set + +# +# NETDB Support +# +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# LLVM C++ Library (libcxx) +# +# CONFIG_LIBCXX is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# NxWidgets/NxWM +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CCTYPE is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_STAT is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PRINTF=y +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +# CONFIG_NSH_CMDOPT_DD_STATS is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CDCACM is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/photon/usbnsh/setenv.sh b/configs/photon/usbnsh/setenv.sh new file mode 100755 index 00000000000..40ce3699641 --- /dev/null +++ b/configs/photon/usbnsh/setenv.sh @@ -0,0 +1,84 @@ +#!/bin/bash +# configs/photon/usbnsh/setenv.sh +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/same70-xplained/netnsh/defconfig b/configs/same70-xplained/netnsh/defconfig index 454ec965689..d472559ad8c 100644 --- a/configs/same70-xplained/netnsh/defconfig +++ b/configs/same70-xplained/netnsh/defconfig @@ -793,6 +793,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1121,7 +1122,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/samv71-xult/netnsh/defconfig b/configs/samv71-xult/netnsh/defconfig index 393cbaf43df..a38656d9c1a 100644 --- a/configs/samv71-xult/netnsh/defconfig +++ b/configs/samv71-xult/netnsh/defconfig @@ -796,6 +796,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1125,7 +1126,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/samv71-xult/vnc/defconfig b/configs/samv71-xult/vnc/defconfig index 4fe8613005a..00e4ca6bcac 100644 --- a/configs/samv71-xult/vnc/defconfig +++ b/configs/samv71-xult/vnc/defconfig @@ -797,6 +797,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1216,7 +1217,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/samv71-xult/vnxwm/defconfig b/configs/samv71-xult/vnxwm/defconfig index ef011a531f4..2606fbbcabb 100644 --- a/configs/samv71-xult/vnxwm/defconfig +++ b/configs/samv71-xult/vnxwm/defconfig @@ -800,6 +800,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1258,7 +1259,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/stm32f4discovery/netnsh/defconfig b/configs/stm32f4discovery/netnsh/defconfig index 80b45e3a8d2..f564769ca08 100644 --- a/configs/stm32f4discovery/netnsh/defconfig +++ b/configs/stm32f4discovery/netnsh/defconfig @@ -988,6 +988,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -1329,7 +1330,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set diff --git a/configs/tm4c1294-launchpad/ipv6/defconfig b/configs/tm4c1294-launchpad/ipv6/defconfig index 6fa9c161073..df9138c1115 100644 --- a/configs/tm4c1294-launchpad/ipv6/defconfig +++ b/configs/tm4c1294-launchpad/ipv6/defconfig @@ -661,6 +661,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -957,7 +958,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/configs/tm4c1294-launchpad/nsh/defconfig b/configs/tm4c1294-launchpad/nsh/defconfig index 379b3df3596..5690209be44 100644 --- a/configs/tm4c1294-launchpad/nsh/defconfig +++ b/configs/tm4c1294-launchpad/nsh/defconfig @@ -663,6 +663,7 @@ CONFIG_NET_ETHERNET=y # # Network Device Operations # +CONFIG_NETDEV_IOCTL=y CONFIG_NETDEV_PHY_IOCTL=y # @@ -969,7 +970,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NETTEST is not set -# CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set diff --git a/drivers/wireless/Kconfig b/drivers/wireless/Kconfig index a3537b85cf1..a3bab81d211 100644 --- a/drivers/wireless/Kconfig +++ b/drivers/wireless/Kconfig @@ -26,6 +26,15 @@ menuconfig DRIVERS_IEEE802154 source drivers/wireless/ieee802154/Kconfig +menuconfig DRIVERS_IEEE80211 + bool "IEEE 802.11 Device Support" + default n + depends on EXPERIMENTAL + ---help--- + This directory holds implementations of IEEE802.11 device drivers. + +source drivers/wireless/ieee80211/Kconfig + config WL_NRF24L01 bool "nRF24l01+ transceiver support" default n diff --git a/drivers/wireless/Make.defs b/drivers/wireless/Make.defs index 14ffb312083..d6f1df53726 100644 --- a/drivers/wireless/Make.defs +++ b/drivers/wireless/Make.defs @@ -41,6 +41,12 @@ ifeq ($(CONFIG_DRIVERS_IEEE802154),y) include wireless$(DELIM)ieee802154$(DELIM)Make.defs endif +# Include IEEE 802.11 support + +ifeq ($(CONFIG_DRIVERS_IEEE80211),y) +include wireless$(DELIM)ieee80211$(DELIM)Make.defs +endif + # Include wireless drivers ifeq ($(CONFIG_WL_CC1101),y) diff --git a/drivers/wireless/ieee80211/Kconfig b/drivers/wireless/ieee80211/Kconfig new file mode 100644 index 00000000000..ec3952c1291 --- /dev/null +++ b/drivers/wireless/ieee80211/Kconfig @@ -0,0 +1,20 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if DRIVERS_IEEE80211 + +config IEEE80211_BROADCOM_FULLMAC + bool + +config IEEE80211_BROADCOM_FULLMAC_SDIO + bool "Broadcom FullMAC driver on SDIO bus" + depends on ARCH_HAVE_SDIO + select IEEE80211_BROADCOM_FULLMAC + default n + ---help--- + This selection enables support for broadcom + FullMAC-compliant devices using SDIO bus. + +endif # DRIVERS_IEEE80211 diff --git a/drivers/wireless/ieee80211/Make.defs b/drivers/wireless/ieee80211/Make.defs new file mode 100644 index 00000000000..712ce5d1dac --- /dev/null +++ b/drivers/wireless/ieee80211/Make.defs @@ -0,0 +1,53 @@ +############################################################################ +# drivers/wireless/ieee80211/Make.defs +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +# Include nothing if IEEE 802.11 is disabled + +ifeq ($(CONFIG_DRIVERS_IEEE80211),y) + +# Include common IEEE 802.11 files into the build + +# Include IEEE 802.11 drivers into the build + +ifeq ($(CONFIG_IEEE80211_BROADCOM_FULLMAC_SDIO),y) + CSRCS += bcmf_sdio.c +endif + +# Include IEEE 802.11 build support + +DEPPATH += --dep-path wireless$(DELIM)ieee80211 +VPATH += :wireless$(DELIM)ieee80211 +CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)wireless$(DELIM)ieee80211} + +endif # CONFIG_DRIVERS_IEEE80211 diff --git a/drivers/wireless/ieee80211/bcmf_sdio.c b/drivers/wireless/ieee80211/bcmf_sdio.c new file mode 100644 index 00000000000..b1ea523ba25 --- /dev/null +++ b/drivers/wireless/ieee80211/bcmf_sdio.c @@ -0,0 +1,271 @@ +/**************************************************************************** + * drivers/wireless/ieee80211/bcmf_sdio.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define BCMF_DEVICE_RESET_DELAY_MS 10 +#define BCMF_DEVICE_START_DELAY_MS 10 +#define BCMF_DEVICE_IDLE_DELAY_MS 50 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure is contains the unique state of the Broadcom FullMAC driver */ + +struct bcmf_dev_s +{ + FAR struct sdio_dev_s *sdio_dev; /* The SDIO device bound to this instance */ + int minor; /* Device minor number */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int bcmf_sendcmdpoll(FAR struct bcmf_dev_s *priv, + uint32_t cmd, uint32_t arg); + +static int bcmf_probe(FAR struct bcmf_dev_s *priv); +static int bcmf_hwinitialize(FAR struct bcmf_dev_s *priv); +static void bcmf_hwuninitialize(FAR struct bcmf_dev_s *priv); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: bcmf_sendcmdpoll + ****************************************************************************/ + +int bcmf_sendcmdpoll(FAR struct bcmf_dev_s *priv, uint32_t cmd, uint32_t arg) +{ + int ret; + + /* Send the command */ + + ret = SDIO_SENDCMD(priv->sdio_dev, cmd, arg); + if (ret == OK) + { + /* Then poll-wait until the response is available */ + + ret = SDIO_WAITRESPONSE(priv->sdio_dev, cmd); + if (ret != OK) + { + _err("ERROR: Wait for response to cmd: %08x failed: %d\n", + cmd, ret); + } + } + + return ret; +} + +/**************************************************************************** + * Name: bcmf_probe + ****************************************************************************/ + +int bcmf_probe(FAR struct bcmf_dev_s *priv) +{ + int ret; + uint32_t data = 0; + + /* Set device state from reset to idle */ + + bcmf_sendcmdpoll(priv, MMCSD_CMD0, 0); + up_mdelay(BCMF_DEVICE_START_DELAY_MS); + + /* Send IO_SEND_OP_COND command */ + + ret = bcmf_sendcmdpoll(priv, SDIO_CMD5, 0); + + if (ret != OK) + { + goto exit_error; + } + + /* Receive R4 response */ + + ret = SDIO_RECVR4(priv->sdio_dev, SDIO_CMD5, &data); + + if (ret != OK) + { + goto exit_error; + } + + /* Broadcom chips have 2 additional functions and wide voltage range */ + + if ((((data >> 28) & 7) != 2) || + (((data >> 8) & 0xff80) != 0xff80)) + { + goto exit_error; + } + + return OK; + +exit_error: + + _err("ERROR: failed to probe device %d\n", priv->minor); + return ret; +} + +/**************************************************************************** + * Name: bcmf_hwinitialize + ****************************************************************************/ + +int bcmf_hwinitialize(FAR struct bcmf_dev_s *priv) +{ + /* Attach and prepare SDIO interrupts */ + + SDIO_ATTACH(priv->sdio_dev); + + /* Set ID mode clocking (<400KHz) */ + + SDIO_CLOCK(priv->sdio_dev, CLOCK_IDMODE); + + /* Configure hardware */ + + bcmf_board_initialize(priv->minor); + + /* Reset and power device */ + + bcmf_board_reset(priv->minor, true); + bcmf_board_power(priv->minor, true); + up_mdelay(BCMF_DEVICE_RESET_DELAY_MS); + bcmf_board_reset(priv->minor, false); + + /* Wait for device to start */ + + up_mdelay(BCMF_DEVICE_START_DELAY_MS); + + return OK; +} + +/**************************************************************************** + * Name: bcmf_hwuninitialize + ****************************************************************************/ + +void bcmf_hwuninitialize(FAR struct bcmf_dev_s *priv) +{ + /* Shutdown device */ + + bcmf_board_power(priv->minor, false); + bcmf_board_reset(priv->minor, true); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: bcmf_sdio_initialize + ****************************************************************************/ + +int bcmf_sdio_initialize(int minor, FAR struct sdio_dev_s *dev) +{ + FAR struct bcmf_dev_s *priv; + int ret; + + _info("minor: %d\n", minor); + + /* Allocate a bcmf device structure */ + + priv = (FAR struct bcmf_dev_s *)kmm_malloc(sizeof(*priv)); + + if (!priv) + { + return -ENOMEM; + } + + /* Initialize bcmf device structure */ + + memset(priv, 0, sizeof(*priv)); + priv->sdio_dev = dev; + priv->minor = minor; + + /* Initialize device hardware */ + + ret = bcmf_hwinitialize(priv); + + if (ret != OK) + { + goto exit_free_priv; + } + + /* Probe device */ + + ret = bcmf_probe(priv); + + if (ret != OK) + { + goto exit_uninit_hw; + } + + /* TODO Create a wlan device name and register network driver here */ + + return OK; + +exit_uninit_hw: + bcmf_hwuninitialize(priv); + +exit_free_priv: + kmm_free(priv); + return ret; +} diff --git a/drivers/wireless/nrf24l01.c b/drivers/wireless/nrf24l01.c index 61378b19287..ae0d29b483c 100644 --- a/drivers/wireless/nrf24l01.c +++ b/drivers/wireless/nrf24l01.c @@ -42,7 +42,6 @@ * Todo: * - Add support for payloads in ACK packets (?) * - Add compatibility with nRF24L01 (not +) hardware (?) - * */ /**************************************************************************** @@ -73,6 +72,8 @@ * Pre-processor Definitions ****************************************************************************/ +/* Configuration ************************************************************/ + #ifndef CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH # define CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH 5 #endif @@ -81,28 +82,48 @@ # define CONFIG_WL_NRF24L01_RXFIFO_LEN 128 #endif +#if defined(CONFIG_WL_NRF24L01_RXSUPPORT) && !defined(CONFIG_SCHED_HPWORK) +# error RX support requires CONFIG_SCHED_HPWORK +#endif + #ifdef CONFIG_WL_NRF24L01_CHECK_PARAMS # define CHECK_ARGS(cond) do { if (!(cond)) return -EINVAL; } while (0) #else # define CHECK_ARGS(cond) #endif -/* Default SPI bus frequency (in Hz) */ -#define NRF24L01_SPIFREQ 9000000 /* Can go up to 10 Mbs according to datasheet */ +/* NRF24L01 Definitions *****************************************************/ + +/* Default SPI bus frequency (in Hz). + * Can go up to 10 Mbs according to datasheet. + */ + +#define NRF24L01_SPIFREQ 9000000 + +/* power-down -> standby transition timing (in us). Note: this value is + * probably larger than required. + */ -/* power-down -> standby transition timing (in us). Note: this value is probably larger than required. */ #define NRF24L01_TPD2STBY_DELAY 4500 +/* Max time to wait for TX irq (in ms) */ + +#define NRF24L01_MAX_TX_IRQ_WAIT 2000 + #define FIFO_PKTLEN_MASK 0x1F /* 5 ls bits used to store packet length */ #define FIFO_PKTLEN_SHIFT 0 #define FIFO_PIPENO_MASK 0xE0 /* 3 ms bits used to store pipe # */ #define FIFO_PIPENO_SHIFT 4 -#define FIFO_PKTLEN(dev) (((dev->rx_fifo[dev->nxt_read] & FIFO_PKTLEN_MASK) >> FIFO_PKTLEN_SHIFT) + 1) -#define FIFO_PIPENO(dev) (((dev->rx_fifo[dev->nxt_read] & FIFO_PIPENO_MASK) >> FIFO_PIPENO_SHIFT)) -#define FIFO_HEADER(pktlen,pipeno) ((pktlen - 1) | (pipeno << FIFO_PIPENO_SHIFT)) +#define FIFO_PKTLEN(dev) \ + (((dev->rx_fifo[dev->nxt_read] & FIFO_PKTLEN_MASK) >> FIFO_PKTLEN_SHIFT) + 1) +#define FIFO_PIPENO(dev) \ + (((dev->rx_fifo[dev->nxt_read] & FIFO_PIPENO_MASK) >> FIFO_PIPENO_SHIFT)) +#define FIFO_HEADER(pktlen,pipeno) \ + ((pktlen - 1) | (pipeno << FIFO_PIPENO_SHIFT)) -#define DEV_NAME "/dev/nrf24l01" +#define DEV_NAME "/dev/nrf24l01" +#define FL_AA_ENABLED (1 << 0) /**************************************************************************** * Private Data Types @@ -114,14 +135,12 @@ typedef enum MODE_WRITE } nrf24l01_access_mode_t; -#define FL_AA_ENABLED (1 << 0) - struct nrf24l01_dev_s { FAR struct spi_dev_s *spi; /* Reference to SPI bus device */ FAR struct nrf24l01_config_s *config; /* Board specific GPIO functions */ - nrf24l01_state_t state; /* Current state of the nRF24L01 */ + nrf24l01_state_t state; /* Current state of the nRF24L01 */ uint8_t en_aa; /* Cache EN_AA register value */ uint8_t en_pipes; /* Cache EN_RXADDR register value */ @@ -134,6 +153,8 @@ struct nrf24l01_dev_s uint8_t last_recvpipeno; sem_t sem_tx; + bool tx_pending; /* Is userspace waiting for TX IRQ? - accessor + * needs to hold lock on SPI bus */ #ifdef CONFIG_WL_NRF24L01_RXSUPPORT uint8_t *rx_fifo; /* Circular RX buffer. [pipe# / pkt_len] [packet data...] */ @@ -156,6 +177,7 @@ struct nrf24l01_dev_s /**************************************************************************** * Private Function Prototypes ****************************************************************************/ + /* Low-level SPI helpers */ static inline void nrf24l01_configspi(FAR struct spi_dev_s *spi); @@ -192,13 +214,15 @@ static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, static int nrf24l01_unregister(FAR struct nrf24l01_dev_s *dev); #ifdef CONFIG_WL_NRF24L01_RXSUPPORT - -void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, +static void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, FAR uint8_t *buffer, uint8_t buflen); -uint8_t fifoget(struct nrf24l01_dev_s *dev, FAR uint8_t *buffer, +static uint8_t fifoget(struct nrf24l01_dev_s *dev, FAR uint8_t *buffer, uint8_t buflen, FAR uint8_t *pipeno); static void nrf24l01_worker(FAR void *arg); +#endif +#ifdef CONFIG_DEBUG_WIRELESS +static void binarycvt(char *deststr, const uint8_t *srcbin, size_t srclen) #endif /* POSIX API */ @@ -211,8 +235,10 @@ static ssize_t nrf24l01_write(FAR struct file *filep, FAR const char *buffer, size_t buflen); static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifndef CONFIG_DISABLE_POLL static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup); +#endif /**************************************************************************** * Private Data @@ -225,12 +251,12 @@ static const struct file_operations nrf24l01_fops = nrf24l01_read, /* read */ nrf24l01_write, /* write */ NULL, /* seek */ - nrf24l01_ioctl, /* ioctl */ + nrf24l01_ioctl /* ioctl */ #ifndef CONFIG_DISABLE_POLL - nrf24l01_poll, /* poll */ + , nrf24l01_poll /* poll */ #endif #ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS - NULL /* unlink */ + , NULL /* unlink */ #endif }; @@ -238,6 +264,10 @@ static const struct file_operations nrf24l01_fops = * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: nrf24l01_lock + ****************************************************************************/ + static void nrf24l01_lock(FAR struct spi_dev_s *spi) { /* Lock the SPI bus because there are multiple devices competing for the @@ -311,18 +341,31 @@ static inline void nrf24l01_configspi(FAR struct spi_dev_s *spi) SPI_SELECT(spi, SPIDEV_WIRELESS, false); } +/**************************************************************************** + * Name: nrf24l01_select + ****************************************************************************/ + static inline void nrf24l01_select(struct nrf24l01_dev_s * dev) { SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true); } +/**************************************************************************** + * Name: nrf24l01_deselect + ****************************************************************************/ + static inline void nrf24l01_deselect(struct nrf24l01_dev_s * dev) { SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false); } +/**************************************************************************** + * Name: nrf24l01_access + ****************************************************************************/ + static uint8_t nrf24l01_access(FAR struct nrf24l01_dev_s *dev, - nrf24l01_access_mode_t mode, uint8_t cmd, FAR uint8_t *buf, int length) + nrf24l01_access_mode_t mode, uint8_t cmd, + FAR uint8_t *buf, int length) { uint8_t status; @@ -352,52 +395,92 @@ static uint8_t nrf24l01_access(FAR struct nrf24l01_dev_s *dev, return status; } +/**************************************************************************** + * Name: nrf24l01_flush_rx + ****************************************************************************/ + static inline uint8_t nrf24l01_flush_rx(struct nrf24l01_dev_s *dev) { return nrf24l01_access(dev, MODE_WRITE, NRF24L01_FLUSH_RX, NULL, 0); } +/**************************************************************************** + * Name: nrf24l01_flush_tx + ****************************************************************************/ + static inline uint8_t nrf24l01_flush_tx(struct nrf24l01_dev_s *dev) { return nrf24l01_access(dev, MODE_WRITE, NRF24L01_FLUSH_TX, NULL, 0); } -/* Read register from nrf24l01 */ +/**************************************************************************** + * Name: nrf24l01_readreg + * + * Description: + * Read register from nrf24l01 + * + ****************************************************************************/ -static inline uint8_t nrf24l01_readreg(struct nrf24l01_dev_s *dev, uint8_t reg, - uint8_t *value, int len) +static inline uint8_t nrf24l01_readreg(struct nrf24l01_dev_s *dev, + uint8_t reg, FAR uint8_t *value, + int len) { - return nrf24l01_access(dev, MODE_READ, reg | NRF24L01_R_REGISTER, value, len); + return nrf24l01_access(dev, MODE_READ, reg | NRF24L01_R_REGISTER, + value, len); } -/* Read single byte value from a register of nrf24l01 */ +/**************************************************************************** + * Name: nrf24l01_readregbyte + * + * Description: + * Read single byte value from a register of nrf24l01 + * + ****************************************************************************/ static inline uint8_t nrf24l01_readregbyte(struct nrf24l01_dev_s *dev, - uint8_t reg) + uint8_t reg) { uint8_t val; nrf24l01_readreg(dev, reg, &val, 1); return val; } -/* Write value to a register of nrf24l01 */ +/**************************************************************************** + * Name: nrf24l01_writereg + * + * Description: + * Write value to a register of nrf24l01 + * + ****************************************************************************/ -static inline int nrf24l01_writereg(FAR struct nrf24l01_dev_s *dev, uint8_t reg, - FAR const uint8_t *value, int len) +static inline int nrf24l01_writereg(FAR struct nrf24l01_dev_s *dev, + uint8_t reg, FAR const uint8_t *value, + int len) { - return nrf24l01_access(dev, MODE_WRITE, reg | NRF24L01_W_REGISTER, (FAR uint8_t *)value, len); + return nrf24l01_access(dev, MODE_WRITE, reg | NRF24L01_W_REGISTER, + (FAR uint8_t *)value, len); } -/* Write single byte value to a register of nrf24l01 */ +/**************************************************************************** + * Name: nrf24l01_writeregbyte + * + * Description: + * Write single byte value to a register of nrf24l01 + * + ****************************************************************************/ -static inline void nrf24l01_writeregbyte(struct nrf24l01_dev_s *dev, uint8_t reg, - uint8_t value) +static inline void nrf24l01_writeregbyte(FAR struct nrf24l01_dev_s *dev, + uint8_t reg, uint8_t value) { nrf24l01_writereg(dev, reg, &value, 1); } -static uint8_t nrf24l01_setregbit(struct nrf24l01_dev_s *dev, uint8_t reg, - uint8_t value, bool set) +/**************************************************************************** + * Name: nrf24l01_setregbit + ****************************************************************************/ + +static uint8_t nrf24l01_setregbit(FAR struct nrf24l01_dev_s *dev, + uint8_t reg, uint8_t value, bool set) { uint8_t val; @@ -415,11 +498,17 @@ static uint8_t nrf24l01_setregbit(struct nrf24l01_dev_s *dev, uint8_t reg, return val; } +/**************************************************************************** + * Name: fifoput + * + * Description: + * RX fifo mgt + * + ****************************************************************************/ + #ifdef CONFIG_WL_NRF24L01_RXSUPPORT - -/* RX fifo mgt */ - -void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, uint8_t *buffer, uint8_t buflen) +static void fifoput(FAR struct nrf24l01_dev_s *dev, uint8_t pipeno, + FAR uint8_t *buffer, uint8_t buflen) { sem_wait(&dev->sem_fifo); while (dev->fifo_len + buflen + 1 > CONFIG_WL_NRF24L01_RXFIFO_LEN) @@ -447,14 +536,27 @@ void fifoput(struct nrf24l01_dev_s *dev, uint8_t pipeno, uint8_t *buffer, uint8_ sem_post(&dev->sem_fifo); } -uint8_t fifoget(struct nrf24l01_dev_s *dev, uint8_t *buffer, uint8_t buflen, uint8_t *pipeno) +/**************************************************************************** + * Name: fifoget + ****************************************************************************/ + +static uint8_t fifoget(FAR struct nrf24l01_dev_s *dev, FAR uint8_t *buffer, + uint8_t buflen, uint8_t *pipeno) { uint8_t pktlen; uint8_t i; sem_wait(&dev->sem_fifo); - ASSERT(dev->fifo_len > 0); + /* sem_rx contains count of inserted packets in FIFO, but FIFO can + * overflow - fail smart. + */ + + if (dev->fifo_len == 0) + { + pktlen = 0; + goto no_data; + } pktlen = FIFO_PKTLEN(dev); if (NULL != pipeno) @@ -479,25 +581,27 @@ uint8_t fifoget(struct nrf24l01_dev_s *dev, uint8_t *buffer, uint8_t buflen, uin dev->fifo_len -= (pktlen + 1); + no_data: sem_post(&dev->sem_fifo); return pktlen; } - #endif +/**************************************************************************** + * Name: nrf24l01_irqhandler + ****************************************************************************/ + static int nrf24l01_irqhandler(int irq, FAR void *context, FAR void *arg) { FAR struct nrf24l01_dev_s *dev = (FAR struct nrf24l01_dev_s *)arg; - winfo("*IRQ*"); + wlinfo("*IRQ*\n"); #ifdef CONFIG_WL_NRF24L01_RXSUPPORT - /* If RX is enabled we delegate the actual work to bottom-half handler */ work_queue(HPWORK, &dev->irq_work, nrf24l01_worker, dev, 0); #else - /* Otherwise we simply wake up the send function */ sem_post(&dev->sem_tx); /* Wake up the send function */ @@ -506,7 +610,13 @@ static int nrf24l01_irqhandler(int irq, FAR void *context, FAR void *arg) return OK; } -/* Configure IRQ pin (falling edge) */ +/**************************************************************************** + * Name: nrf24l01_attachirq + * + * Description: + * Configure IRQ pin (falling edge) + * + ****************************************************************************/ static inline int nrf24l01_attachirq(FAR struct nrf24l01_dev_s *dev, xcpt_t isr, FAR void *arg) @@ -514,7 +624,12 @@ static inline int nrf24l01_attachirq(FAR struct nrf24l01_dev_s *dev, xcpt_t isr, return dev->config->irqattach(isr, arg); } -static inline bool nrf24l01_chipenable(FAR struct nrf24l01_dev_s *dev, bool enable) +/**************************************************************************** + * Name: nrf24l01_chipenable + ****************************************************************************/ + +static inline bool nrf24l01_chipenable(FAR struct nrf24l01_dev_s *dev, + bool enable) { if (dev->ce_enabled != enable) { @@ -528,8 +643,11 @@ static inline bool nrf24l01_chipenable(FAR struct nrf24l01_dev_s *dev, bool enab } } -#ifdef CONFIG_WL_NRF24L01_RXSUPPORT +/**************************************************************************** + * Name: nrf24l01_worker + ****************************************************************************/ +#ifdef CONFIG_WL_NRF24L01_RXSUPPORT static void nrf24l01_worker(FAR void *arg) { FAR struct nrf24l01_dev_s *dev = (FAR struct nrf24l01_dev_s *) arg; @@ -542,11 +660,14 @@ static void nrf24l01_worker(FAR void *arg) if (status & NRF24L01_RX_DR) { - /* put CE low */ + /* Put CE low */ bool ce = nrf24l01_chipenable(dev, false); +#ifndef CONFIG_DISABLE_POLL + bool has_data = false; +#endif - winfo("RX_DR is set!\n"); + wlinfo("RX_DR is set!\n"); /* Read and store all received payloads */ @@ -563,28 +684,56 @@ static void nrf24l01_worker(FAR void *arg) */ pipeno = (status & NRF24L01_RX_P_NO_MASK) >> NRF24L01_RX_P_NO_SHIFT; + if (pipeno >= NRF24L01_PIPE_COUNT) /* 6=invalid 7=fifo empty */ + { + wlerr("invalid pipe rx: %d\n", (int)pipeno); + nrf24l01_flush_rx(dev); + break; + } pktlen = dev->pipedatalen[pipeno]; if (NRF24L01_DYN_LENGTH == pktlen) { - /* If dynamic length payload need to use R_RX_PL_WID command to get actual length */ + /* If dynamic length payload need to use R_RX_PL_WID command + * to get actual length. + */ nrf24l01_access(dev, MODE_READ, NRF24L01_R_RX_PL_WID, &pktlen, 1); } + if (pktlen > NRF24L01_MAX_PAYLOAD_LEN) /* bad length */ + { + wlerr("invalid length in rx: %d\n", (int)pktlen); + nrf24l01_flush_rx(dev); + break; + } + /* Get payload content */ nrf24l01_access(dev, MODE_READ, NRF24L01_R_RX_PAYLOAD, buf, pktlen); fifoput(dev, pipeno, buf, pktlen); +#ifndef CONFIG_DISABLE_POLL + has_data = true; +#endif sem_post(&dev->sem_rx); /* Wake-up any thread waiting in recv */ status = nrf24l01_readreg(dev, NRF24L01_FIFO_STATUS, &fifo_status, 1); - winfo("FIFO_STATUS=%02x\n", fifo_status); - winfo("STATUS=%02x\n", status); + wlinfo("FIFO_STATUS=%02x\n", fifo_status); + wlinfo("STATUS=%02x\n", status); } - while (!(fifo_status | NRF24L01_RX_EMPTY)); + while ((fifo_status & NRF24L01_RX_EMPTY) == 0); + +#ifndef CONFIG_DISABLE_POLL + if (dev->pfd && has_data) + { + dev->pfd->revents |= POLLIN; /* Data available for input */ + + wlinfo("Wake up polled fd\n"); + sem_post(dev->pfd->sem); + } +#endif /* Clear interrupt sources */ @@ -593,37 +742,43 @@ static void nrf24l01_worker(FAR void *arg) /* Restore CE */ nrf24l01_chipenable(dev, ce); - -#ifndef CONFIG_DISABLE_POLL - if (dev->pfd) - { - dev->pfd->revents |= POLLIN; /* Data available for input */ - - winfo("Wake up polled fd"); - sem_post(dev->pfd->sem); - } -#endif } if (status & (NRF24L01_TX_DS | NRF24L01_MAX_RT)) { - /* The actual work is done in the send function */ + /* Confirm send */ - sem_post(&dev->sem_tx); + nrf24l01_chipenable(dev, false); + + if (dev->tx_pending) + { + /* The actual work is done in the send function */ + + sem_post(&dev->sem_tx); + } + else + { + wlerr("invalid length in rx: %d\n", (int)pktlen); + } } if (dev->state == ST_RX) { - /* re-enable CE (to go back to RX mode state) */ + /* Re-enable CE (to go back to RX mode state) */ nrf24l01_chipenable(dev, true); } + nrf24l01_unlock(dev->spi); } - #endif -static void nrf24l01_tostate(struct nrf24l01_dev_s *dev, nrf24l01_state_t state) +/**************************************************************************** + * Name: nrf24l01_tostate + ****************************************************************************/ + +static void nrf24l01_tostate(struct nrf24l01_dev_s *dev, + nrf24l01_state_t state) { nrf24l01_state_t oldstate = dev->state; @@ -634,7 +789,7 @@ static void nrf24l01_tostate(struct nrf24l01_dev_s *dev, nrf24l01_state_t state) if (oldstate == ST_POWER_DOWN) { - /* Leaving power down (note: new state cannot be power down here) */ + /* Leaving power down (note: new state cannot be power down here) */ nrf24l01_setregbit(dev, NRF24L01_CONFIG, NRF24L01_PWR_UP, true); usleep(NRF24L01_TPD2STBY_DELAY); @@ -646,6 +801,7 @@ static void nrf24l01_tostate(struct nrf24l01_dev_s *dev, nrf24l01_state_t state) { case ST_UNKNOWN: /* Power down the module here... */ + case ST_POWER_DOWN: nrf24l01_chipenable(dev, false); nrf24l01_setregbit(dev, NRF24L01_CONFIG, NRF24L01_PWR_UP, false); @@ -667,63 +823,82 @@ static void nrf24l01_tostate(struct nrf24l01_dev_s *dev, nrf24l01_state_t state) dev->state = state; } -static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_t datalen) +/**************************************************************************** + * Name: dosend + ****************************************************************************/ + +static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, + size_t datalen) { uint8_t status; uint8_t obsvalue; int result; - /* Store the current lifecycle state in order to restore it after transmit done */ + /* Store the current lifecycle state in order to restore it after transmit + * done. + */ nrf24l01_state_t prevstate = dev->state; nrf24l01_tostate(dev, ST_STANDBY); + /* Flush old - can't harm */ + + nrf24l01_flush_tx(dev); + /* Write payload */ - nrf24l01_access(dev, MODE_WRITE, NRF24L01_W_TX_PAYLOAD, (FAR uint8_t *)data, datalen); + nrf24l01_access(dev, MODE_WRITE, NRF24L01_W_TX_PAYLOAD, + (FAR uint8_t *)data, datalen); - /* Enable CE to start transmission */ - - nrf24l01_chipenable(dev, true); + dev->tx_pending = true; /* Free the SPI bus during the IRQ wait */ nrf24l01_unlock(dev->spi); - /* Wait for IRQ (TX_DS or MAX_RT) */ + /* Cause rising CE edge to start transmission */ - while (sem_wait(&dev->sem_tx) != 0) - { - /* Note that we really need to wait here, as the interrupt source - * (either TX_DS in case of success, or MAX_RT for failure) needs to be cleared. - */ + nrf24l01_chipenable(dev, true); - DEBUGASSERT(errno == EINTR); - } + /* Wait for IRQ (TX_DS or MAX_RT) - but don't hang on lost IRQ */ + + result = sem_tickwait(&dev->sem_tx, clock_systimer(), + MSEC2TICK(NRF24L01_MAX_TX_IRQ_WAIT)); /* Re-acquire the SPI bus */ nrf24l01_lock(dev->spi); + dev->tx_pending = false; + + if (result < 0) + { + wlerr("wait for irq failed\n"); + nrf24l01_flush_tx(dev); + goto out; + } + status = nrf24l01_readreg(dev, NRF24L01_OBSERVE_TX, &obsvalue, 1); if (status & NRF24L01_TX_DS) { - /* transmit OK */ + /* Transmit OK */ result = OK; dev->lastxmitcount = (obsvalue & NRF24L01_ARC_CNT_MASK) >> NRF24L01_ARC_CNT_SHIFT; - winfo("Transmission OK (lastxmitcount=%d)\n", dev->lastxmitcount); + wlinfo("Transmission OK (lastxmitcount=%d)\n", dev->lastxmitcount); } else if (status & NRF24L01_MAX_RT) { - winfo("MAX_RT!\n", dev->lastxmitcount); + wlinfo("MAX_RT! (lastxmitcount=%d)\n", dev->lastxmitcount); result = -ECOMM; dev->lastxmitcount = NRF24L01_XMIT_MAXRT; - /* If no ACK packet is received the payload remains in TX fifo. We need to flush it. */ + /* If no ACK packet is received the payload remains in TX fifo. We + * need to flush it. + */ nrf24l01_flush_tx(dev); } @@ -731,21 +906,51 @@ static int dosend(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_ { /* Unexpected... */ - werr("ERROR: No TX_DS nor MAX_RT bit set in STATUS reg!\n"); + wlerr("ERROR: No TX_DS nor MAX_RT bit set in STATUS reg!\n"); result = -EIO; } +out: + /* Clear interrupt sources */ nrf24l01_writeregbyte(dev, NRF24L01_STATUS, NRF24L01_TX_DS | NRF24L01_MAX_RT); + /* Clear fifo */ + + nrf24l01_flush_tx(dev); + /* Restore state */ nrf24l01_tostate(dev, prevstate); return result; } -/* POSIX API */ +/**************************************************************************** + * Name: binarycvt + ****************************************************************************/ + +#ifdef CONFIG_DEBUG_WIRELESS +static void binarycvt(char *deststr, const uint8_t *srcbin, size_t srclen) +{ + int i = 0; + while (i < srclen) + { + sprintf(deststr + i*2, "%02x", srcbin[i]); + ++i; + } + + *(deststr + i*2) = '\0'; +} +#endif + +/**************************************************************************** + * POSIX API + ****************************************************************************/ + +/**************************************************************************** + * Name: nrf24l01_open + ****************************************************************************/ static int nrf24l01_open(FAR struct file *filep) { @@ -753,7 +958,7 @@ static int nrf24l01_open(FAR struct file *filep) FAR struct nrf24l01_dev_s *dev; int result; - winfo("Opening nRF24L01 dev\n"); + wlinfo("Opening nRF24L01 dev\n"); DEBUGASSERT(filep); inode = filep->f_inode; @@ -790,12 +995,16 @@ errout: return result; } +/**************************************************************************** + * Name: nrf24l01_close + ****************************************************************************/ + static int nrf24l01_close(FAR struct file *filep) { FAR struct inode *inode; FAR struct nrf24l01_dev_s *dev; - winfo("Closing nRF24L01 dev\n"); + wlinfo("Closing nRF24L01 dev\n"); DEBUGASSERT(filep); inode = filep->f_inode; @@ -819,7 +1028,12 @@ static int nrf24l01_close(FAR struct file *filep) return OK; } -static ssize_t nrf24l01_read(FAR struct file *filep, FAR char *buffer, size_t buflen) +/**************************************************************************** + * Name: nrf24l01_read + ****************************************************************************/ + +static ssize_t nrf24l01_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) { #ifndef CONFIG_WL_NRF24L01_RXSUPPORT return -ENOSYS; @@ -848,7 +1062,12 @@ static ssize_t nrf24l01_read(FAR struct file *filep, FAR char *buffer, size_t bu #endif } -static ssize_t nrf24l01_write(FAR struct file *filep, FAR const char *buffer, size_t buflen) +/**************************************************************************** + * Name: nrf24l01_write + ****************************************************************************/ + +static ssize_t nrf24l01_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) { FAR struct nrf24l01_dev_s *dev; FAR struct inode *inode; @@ -874,13 +1093,17 @@ static ssize_t nrf24l01_write(FAR struct file *filep, FAR const char *buffer, si return result; } +/**************************************************************************** + * Name: nrf24l01_ioctl + ****************************************************************************/ + static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode; FAR struct nrf24l01_dev_s *dev; int result = OK; - winfo("cmd: %d arg: %ld\n", cmd, arg); + wlinfo("cmd: %d arg: %ld\n", cmd, arg); DEBUGASSERT(filep); inode = filep->f_inode; @@ -901,7 +1124,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) switch (cmd) { - case WLIOC_SETRADIOFREQ: /* Set radio frequency. Arg: Pointer to uint32_t frequency value */ + case WLIOC_SETRADIOFREQ: /* Set radio frequency. Arg: Pointer to + * uint32_t frequency value */ { FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg); DEBUGASSERT(ptr != NULL); @@ -910,7 +1134,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case WLIOC_GETRADIOFREQ: /* Get current radio frequency. arg: Pointer to uint32_t frequency value */ + case WLIOC_GETRADIOFREQ: /* Get current radio frequency. arg: Pointer + * to uint32_t frequency value */ { FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg); DEBUGASSERT(ptr != NULL); @@ -918,7 +1143,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case NRF24L01IOC_SETTXADDR: /* Set current TX addr. arg: Pointer to uint8_t array defining the address */ + case NRF24L01IOC_SETTXADDR: /* Set current TX addr. arg: Pointer to + * uint8_t array defining the address */ { FAR const uint8_t *addr = (FAR const uint8_t *)(arg); DEBUGASSERT(addr != NULL); @@ -926,7 +1152,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case NRF24L01IOC_GETTXADDR: /* Get current TX addr. arg: Pointer to uint8_t array defining the address */ + case NRF24L01IOC_GETTXADDR: /* Get current TX addr. arg: Pointer to + * uint8_t array defining the address */ { FAR uint8_t *addr = (FAR uint8_t *)(arg); DEBUGASSERT(addr != NULL); @@ -934,7 +1161,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case WLIOC_SETTXPOWER: /* Set current radio frequency. arg: Pointer to int32_t, output power */ + case WLIOC_SETTXPOWER: /* Set current radio frequency. arg: Pointer + * to int32_t, output power */ { FAR int32_t *ptr = (FAR int32_t *)(arg); DEBUGASSERT(ptr != NULL); @@ -942,7 +1170,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case WLIOC_GETTXPOWER: /* Get current radio frequency. arg: Pointer to int32_t, output power */ + case WLIOC_GETTXPOWER: /* Get current radio frequency. arg: Pointer + * to int32_t, output power */ { FAR int32_t *ptr = (FAR int32_t *)(arg); DEBUGASSERT(ptr != NULL); @@ -950,7 +1179,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case NRF24L01IOC_SETRETRCFG: /* Set retransmit params. arg: Pointer to nrf24l01_retrcfg_t */ + case NRF24L01IOC_SETRETRCFG: /* Set retransmit params. arg: Pointer + * to nrf24l01_retrcfg_t */ { FAR nrf24l01_retrcfg_t *ptr = (FAR nrf24l01_retrcfg_t *)(arg); DEBUGASSERT(ptr != NULL); @@ -958,7 +1188,8 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; - case NRF24L01IOC_GETRETRCFG: /* Get retransmit params. arg: Pointer to nrf24l01_retrcfg_t */ + case NRF24L01IOC_GETRETRCFG: /* Get retransmit params. arg: Pointer + * to nrf24l01_retrcfg_t */ result = -ENOSYS; /* TODO */ break; @@ -1098,13 +1329,17 @@ static int nrf24l01_ioctl(FAR struct file *filep, int cmd, unsigned long arg) return result; } -#ifndef CONFIG_DISABLE_POLL +/**************************************************************************** + * Name: nrf24l01_poll + ****************************************************************************/ +#ifndef CONFIG_DISABLE_POLL static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds, - bool setup) + bool setup) { #ifndef CONFIG_WL_NRF24L01_RXSUPPORT /* Polling is currently implemented for data input only */ + return -ENOSYS; #else @@ -1112,7 +1347,7 @@ static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds, FAR struct nrf24l01_dev_s *dev; int result = OK; - winfo("setup: %d\n", (int)setup); + wlinfo("setup: %d\n", (int)setup); DEBUGASSERT(filep && fds); inode = filep->f_inode; @@ -1142,7 +1377,8 @@ static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds, } /* Check if we can accept this poll. - * For now, only one thread can poll the device at any time (shorter / simpler code) + * For now, only one thread can poll the device at any time + * (shorter / simpler code) */ if (dev->pfd) @@ -1152,8 +1388,21 @@ static int nrf24l01_poll(FAR struct file *filep, FAR struct pollfd *fds, } dev->pfd = fds; + + /* Is there is already data in the fifo? then trigger POLLIN now - + * don't wait for RX. + */ + + sem_wait(&dev->sem_fifo); + if (dev->fifo_len > 0) + { + dev->pfd->revents |= POLLIN; /* Data available for input */ + sem_post(dev->pfd->sem); + } + + sem_post(&dev->sem_fifo); } - else /* Tear it down */ + else /* Tear it down */ { dev->pfd = NULL; } @@ -1163,9 +1412,12 @@ errout: return result; #endif } - #endif +/**************************************************************************** + * Name: nrf24l01_unregister + ****************************************************************************/ + static int nrf24l01_unregister(FAR struct nrf24l01_dev_s *dev) { CHECK_ARGS(dev); @@ -1188,7 +1440,12 @@ static int nrf24l01_unregister(FAR struct nrf24l01_dev_s *dev) * Public Functions ****************************************************************************/ -int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *cfg) +/**************************************************************************** + * Name: nrf24l01_register + ****************************************************************************/ + +int nrf24l01_register(FAR struct spi_dev_s *spi, + FAR struct nrf24l01_config_s *cfg) { FAR struct nrf24l01_dev_s *dev; int result = OK; @@ -1204,18 +1461,18 @@ int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *c return -ENOMEM; } - dev->spi = spi; - dev->config = cfg; + dev->spi = spi; + dev->config = cfg; - dev->state = ST_UNKNOWN; - dev->en_aa = 0; + dev->state = ST_UNKNOWN; + dev->en_aa = 0; dev->ce_enabled = false; sem_init(&(dev->devsem), 0, 1); - dev->nopens = 0; + dev->nopens = 0; #ifndef CONFIG_DISABLE_POLL - dev->pfd = NULL; + dev->pfd = NULL; #endif sem_init(&dev->sem_tx, 0, 0); @@ -1228,10 +1485,10 @@ int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *c return -ENOMEM; } - dev->rx_fifo = rx_fifo; - dev->nxt_read = 0; - dev->nxt_write = 0; - dev->fifo_len = 0; + dev->rx_fifo = rx_fifo; + dev->nxt_read = 0; + dev->nxt_write = 0; + dev->fifo_len = 0; sem_init(&(dev->sem_fifo), 0, 1); sem_init(&(dev->sem_rx), 0, 0); @@ -1244,19 +1501,25 @@ int nrf24l01_register(FAR struct spi_dev_s *spi, FAR struct nrf24l01_config_s *c /* Register the device as an input device */ - winfo("Registering " DEV_NAME "\n"); + wlinfo("Registering " DEV_NAME "\n"); result = register_driver(DEV_NAME, &nrf24l01_fops, 0666, dev); if (result < 0) { - werr("ERROR: register_driver() failed: %d\n", result); + wlerr("ERROR: register_driver() failed: %d\n", result); nrf24l01_unregister(dev); } return result; } -/* (re)set the device in a default initial state */ +/**************************************************************************** + * Name: nrf24l01_init + * + * Description: + * (Re)set the device in a default initial state + * + ****************************************************************************/ int nrf24l01_init(FAR struct nrf24l01_dev_s *dev) { @@ -1288,7 +1551,9 @@ int nrf24l01_init(FAR struct nrf24l01_dev_s *dev) features = nrf24l01_readregbyte(dev, NRF24L01_FEATURE); if (0 == features) { - /* If FEATURES reg is still unset here, consider there is no actual hardware */ + /* If FEATURES reg is still unset here, consider there is no + * actual hardware. + */ result = -ENODEV; goto out; @@ -1307,7 +1572,8 @@ int nrf24l01_init(FAR struct nrf24l01_dev_s *dev) /* Set addr width to default */ dev->addrlen = CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH; - nrf24l01_writeregbyte(dev, NRF24L01_SETUP_AW, CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH - 2); + nrf24l01_writeregbyte(dev, NRF24L01_SETUP_AW, + CONFIG_WL_NRF24L01_DFLT_ADDR_WIDTH - 2); /* Get pipe #0 addr */ @@ -1330,11 +1596,17 @@ out: return result; } -int nrf24l01_setpipeconfig(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, - FAR const nrf24l01_pipecfg_t *pipecfg) +/**************************************************************************** + * Name: nrf24l01_setpipeconfig + ****************************************************************************/ + +int nrf24l01_setpipeconfig(FAR struct nrf24l01_dev_s *dev, + unsigned int pipeno, + FAR const nrf24l01_pipecfg_t *pipecfg) { bool dynlength; bool en_aa; + int addrlen; CHECK_ARGS(dev && pipecfg && pipeno < NRF24L01_PIPE_COUNT); @@ -1346,10 +1618,13 @@ int nrf24l01_setpipeconfig(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, nrf24l01_lock(dev->spi); - /* Set addr */ + /* Set addr + * Pipe 0 & 1 are the only ones to have a full length address. + */ - int addrlen = (pipeno <= 1) ? dev->addrlen : 1; /* Pipe 0 & 1 are the only ones to have a full length address */ - nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0 + pipeno, pipecfg->rx_addr, addrlen); + addrlen = (pipeno <= 1) ? dev->addrlen : 1; + nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0 + pipeno, pipecfg->rx_addr, + addrlen); /* Auto ack */ @@ -1369,27 +1644,38 @@ int nrf24l01_setpipeconfig(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, nrf24l01_setregbit(dev, NRF24L01_DYNPD, 1 << pipeno, dynlength); if (!dynlength) { - nrf24l01_writeregbyte(dev, NRF24L01_RX_PW_P0 + pipeno, pipecfg->payload_length); + nrf24l01_writeregbyte(dev, NRF24L01_RX_PW_P0 + pipeno, + pipecfg->payload_length); } + nrf24l01_unlock(dev->spi); dev->pipedatalen[pipeno] = pipecfg->payload_length; return OK; } -int nrf24l01_getpipeconfig(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, - FAR nrf24l01_pipecfg_t *pipecfg) +/**************************************************************************** + * Name: nrf24l01_getpipeconfig + ****************************************************************************/ + +int nrf24l01_getpipeconfig(FAR struct nrf24l01_dev_s *dev, + unsigned int pipeno, + FAR nrf24l01_pipecfg_t *pipecfg) { bool dynlength; + int addrlen; CHECK_ARGS(dev && pipecfg && pipeno < NRF24L01_PIPE_COUNT); nrf24l01_lock(dev->spi); - /* Get pipe address */ + /* Get pipe address. + * Pipe 0 & 1 are the only ones to have a full length address. + */ - int addrlen = (pipeno <= 1) ? dev->addrlen : 1; /* Pipe 0 & 1 are the only ones to have a full length address */ - nrf24l01_readreg(dev, NRF24L01_RX_ADDR_P0 + pipeno, pipecfg->rx_addr, addrlen); + addrlen = (pipeno <= 1) ? dev->addrlen : 1; + nrf24l01_readreg(dev, NRF24L01_RX_ADDR_P0 + pipeno, pipecfg->rx_addr, + addrlen); /* Auto ack */ @@ -1413,7 +1699,12 @@ int nrf24l01_getpipeconfig(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, return OK; } -int nrf24l01_enablepipe(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, bool enable) +/**************************************************************************** + * Name: nrf24l01_enablepipe + ****************************************************************************/ + +int nrf24l01_enablepipe(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, + bool enable) { CHECK_ARGS(dev && pipeno < NRF24L01_PIPE_COUNT); @@ -1445,7 +1736,12 @@ int nrf24l01_enablepipe(FAR struct nrf24l01_dev_s *dev, unsigned int pipeno, boo return OK; } -int nrf24l01_settxaddr(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *txaddr) +/**************************************************************************** + * Name: nrf24l01_settxaddr + ****************************************************************************/ + +int nrf24l01_settxaddr(FAR struct nrf24l01_dev_s *dev, + FAR const uint8_t *txaddr) { CHECK_ARGS(dev && txaddr); @@ -1456,6 +1752,10 @@ int nrf24l01_settxaddr(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *txaddr return OK; } +/**************************************************************************** + * Name: nrf24l01_gettxaddr + ****************************************************************************/ + int nrf24l01_gettxaddr(FAR struct nrf24l01_dev_s *dev, FAR uint8_t *txaddr) { CHECK_ARGS(dev && txaddr); @@ -1467,7 +1767,13 @@ int nrf24l01_gettxaddr(FAR struct nrf24l01_dev_s *dev, FAR uint8_t *txaddr) return OK; } -int nrf24l01_setretransmit(FAR struct nrf24l01_dev_s *dev, nrf24l01_retransmit_delay_t retrdelay, uint8_t retrcount) +/**************************************************************************** + * Name: nrf24l01_setretransmit + ****************************************************************************/ + +int nrf24l01_setretransmit(FAR struct nrf24l01_dev_s *dev, + nrf24l01_retransmit_delay_t retrdelay, + uint8_t retrcount) { uint8_t val; @@ -1482,12 +1788,16 @@ int nrf24l01_setretransmit(FAR struct nrf24l01_dev_s *dev, nrf24l01_retransmit_d return OK; } +/**************************************************************************** + * Name: nrf24l01_settxpower + ****************************************************************************/ + int nrf24l01_settxpower(FAR struct nrf24l01_dev_s *dev, int outpower) { uint8_t value; uint8_t hwpow; - /** RF_PWR value <-> Output power in dBm + /* RF_PWR value <-> Output power in dBm * * '00' – -18dBm * '01' – -12dBm @@ -1529,6 +1839,10 @@ int nrf24l01_settxpower(FAR struct nrf24l01_dev_s *dev, int outpower) return OK; } +/**************************************************************************** + * Name: nrf24l01_gettxpower + ****************************************************************************/ + int nrf24l01_gettxpower(FAR struct nrf24l01_dev_s *dev) { uint8_t value; @@ -1543,7 +1857,12 @@ int nrf24l01_gettxpower(FAR struct nrf24l01_dev_s *dev) return powers[value]; } -int nrf24l01_setdatarate(FAR struct nrf24l01_dev_s *dev, nrf24l01_datarate_t datarate) +/**************************************************************************** + * Name: nrf24l01_setdatarate + ****************************************************************************/ + +int nrf24l01_setdatarate(FAR struct nrf24l01_dev_s *dev, + nrf24l01_datarate_t datarate) { uint8_t value; @@ -1571,6 +1890,10 @@ int nrf24l01_setdatarate(FAR struct nrf24l01_dev_s *dev, nrf24l01_datarate_t dat return OK; } +/**************************************************************************** + * Name: nrf24l01_setradiofreq + ****************************************************************************/ + int nrf24l01_setradiofreq(FAR struct nrf24l01_dev_s *dev, uint32_t freq) { uint8_t value; @@ -1584,6 +1907,10 @@ int nrf24l01_setradiofreq(FAR struct nrf24l01_dev_s *dev, uint32_t freq) return OK; } +/**************************************************************************** + * Name: nrf24l01_getradiofreq + ****************************************************************************/ + uint32_t nrf24l01_getradiofreq(FAR struct nrf24l01_dev_s *dev) { int rffreq; @@ -1597,9 +1924,14 @@ uint32_t nrf24l01_getradiofreq(FAR struct nrf24l01_dev_s *dev) return rffreq + NRF24L01_MIN_FREQ; } +/**************************************************************************** + * Name: nrf24l01_setaddrwidth + ****************************************************************************/ + int nrf24l01_setaddrwidth(FAR struct nrf24l01_dev_s *dev, uint32_t width) { - CHECK_ARGS(dev && width <= NRF24L01_MAX_ADDR_LEN && width >= NRF24L01_MIN_ADDR_LEN); + CHECK_ARGS(dev && width <= NRF24L01_MAX_ADDR_LEN && + width >= NRF24L01_MIN_ADDR_LEN); nrf24l01_lock(dev->spi); nrf24l01_writeregbyte(dev, NRF24L01_SETUP_AW, width-2); @@ -1608,6 +1940,10 @@ int nrf24l01_setaddrwidth(FAR struct nrf24l01_dev_s *dev, uint32_t width) return OK; } +/**************************************************************************** + * Name: nrf24l01_changestate + ****************************************************************************/ + int nrf24l01_changestate(FAR struct nrf24l01_dev_s *dev, nrf24l01_state_t state) { nrf24l01_lock(dev->spi); @@ -1616,7 +1952,12 @@ int nrf24l01_changestate(FAR struct nrf24l01_dev_s *dev, nrf24l01_state_t state) return OK; } -int nrf24l01_send(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_t datalen) +/**************************************************************************** + * Name: nrf24l01_send + ****************************************************************************/ + +int nrf24l01_send(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, + size_t datalen) { int result; @@ -1630,8 +1971,12 @@ int nrf24l01_send(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, size_ return result; } +/**************************************************************************** + * Name: nrf24l01_sendto + ****************************************************************************/ + int nrf24l01_sendto(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, - size_t datalen, FAR const uint8_t *destaddr) + size_t datalen, FAR const uint8_t *destaddr) { bool pipeaddrchg = false; int result; @@ -1645,8 +1990,9 @@ int nrf24l01_sendto(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, if ((dev->en_aa & 1) && (memcmp(destaddr, dev->pipe0addr, dev->addrlen))) { - winfo("Change pipe #0 addr to dest addr\n"); - nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0, destaddr, NRF24L01_MAX_ADDR_LEN); + wlinfo("Change pipe #0 addr to dest addr\n"); + nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0, destaddr, + NRF24L01_MAX_ADDR_LEN); pipeaddrchg = true; } @@ -1656,51 +2002,50 @@ int nrf24l01_sendto(FAR struct nrf24l01_dev_s *dev, FAR const uint8_t *data, { /* Restore pipe #0 addr */ - nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0, dev->pipe0addr, NRF24L01_MAX_ADDR_LEN); - winfo("Pipe #0 default addr restored\n"); + nrf24l01_writereg(dev, NRF24L01_RX_ADDR_P0, dev->pipe0addr, + NRF24L01_MAX_ADDR_LEN); + wlinfo("Pipe #0 default addr restored\n"); } nrf24l01_unlock(dev->spi); return result; } +/**************************************************************************** + * Name: nrf24l01_lastxmitcount + ****************************************************************************/ + int nrf24l01_lastxmitcount(FAR struct nrf24l01_dev_s *dev) { return dev->lastxmitcount; } -#ifdef CONFIG_WL_NRF24L01_RXSUPPORT +/**************************************************************************** + * Name: nrf24l01_recv + ****************************************************************************/ +#ifdef CONFIG_WL_NRF24L01_RXSUPPORT ssize_t nrf24l01_recv(struct nrf24l01_dev_s *dev, uint8_t *buffer, - size_t buflen, uint8_t *recvpipe) + size_t buflen, uint8_t *recvpipe) { if (sem_wait(&dev->sem_rx) != 0) { - /* This should only happen if the wait was canceled by an signal */ + /* This should only happen if the wait was canceled by an signal */ - DEBUGASSERT(errno == EINTR); - return -EINTR; + DEBUGASSERT(errno == EINTR); + return -EINTR; } return fifoget(dev, buffer, buflen, recvpipe); } - #endif -#ifdef NRF24L01_DEBUG -static void binarycvt(char *deststr, const uint8_t *srcbin, size_t srclen) -{ - int i = 0; - while (i < srclen) - { - sprintf(deststr + i*2, "%02x", srcbin[i]); - ++i; - } - - *(deststr + i*2) = '\0'; -} +/**************************************************************************** + * Name: nrf24l01_dumpregs + ****************************************************************************/ +#ifdef CONFIG_DEBUG_WIRELESS void nrf24l01_dumpregs(struct nrf24l01_dev_s *dev) { uint8_t addr[NRF24L01_MAX_ADDR_LEN]; @@ -1752,14 +2097,17 @@ void nrf24l01_dumpregs(struct nrf24l01_dev_s *dev) syslog(LOG_INFO, "FEATURE: %02x\n", nrf24l01_readregbyte(dev, NRF24L01_FEATURE)); } +#endif /* CONFIG_DEBUG_WIRELESS */ -#ifdef CONFIG_WL_NRF24L01_RXSUPPORT +/**************************************************************************** + * Name: nrf24l01_dumprxfifo + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_WIRELESS) && defined(CONFIG_WL_NRF24L01_RXSUPPORT) void nrf24l01_dumprxfifo(struct nrf24l01_dev_s *dev) { syslog(LOG_INFO, "bytes count: %d\n", dev->fifo_len); syslog(LOG_INFO, "next read: %d, next write: %d\n", dev->nxt_read, dev-> nxt_write); } -#endif - -#endif +#endif /* CONFIG_DEBUG_WIRELESS && CONFIG_WL_NRF24L01_RXSUPPORT */ diff --git a/fs/smartfs/smartfs_smart.c b/fs/smartfs/smartfs_smart.c index 23f36860fe8..60a539c10f6 100644 --- a/fs/smartfs/smartfs_smart.c +++ b/fs/smartfs/smartfs_smart.c @@ -1044,7 +1044,7 @@ static off_t smartfs_seek_internal(struct smartfs_mountpt_s *fs, break; case SEEK_END: - newpos = sf->entry.datlen - offset; + newpos = sf->entry.datlen + offset; break; } diff --git a/include/debug.h b/include/debug.h index 0bde25605be..64352dad34c 100644 --- a/include/debug.h +++ b/include/debug.h @@ -233,6 +233,24 @@ # define ninfo(x...) #endif +#ifdef CONFIG_DEBUG_WIRELESS_ERROR +# define wlerr(format, ...) _err(format, ##__VA_ARGS__) +#else +# define wlerr(x...) +#endif + +#ifdef CONFIG_DEBUG_WIRELESS_WARN +# define wlwarn(format, ...) _warn(format, ##__VA_ARGS__) +#else +# define wlwarn(x...) +#endif + +#ifdef CONFIG_DEBUG_WIRELESS_INFO +# define wlinfo(format, ...) _info(format, ##__VA_ARGS__) +#else +# define wlinfo(x...) +#endif + #ifdef CONFIG_DEBUG_FS_ERROR # define ferr(format, ...) _err(format, ##__VA_ARGS__) #else @@ -777,6 +795,24 @@ # define ninfo (void) #endif +#ifdef CONFIG_DEBUG_WIRELESS_ERROR +# define wlerr _err +#else +# define wlerr (void) +#endif + +#ifdef CONFIG_DEBUG_WIRELESS_WARN +# define wlwarn _warn +#else +# define wlwarn (void) +#endif + +#ifdef CONFIG_DEBUG_WIRELESS_INFO +# define wlinfo _info +#else +# define wlinfo (void) +#endif + #ifdef CONFIG_DEBUG_FS_ERROR # define ferr _err #else @@ -1267,6 +1303,14 @@ # define ninfodumpbuffer(m,b,n) #endif +#ifdef CONFIG_DEBUG_WIRELESS +# define wlerrdumpbuffer(m,b,n) errdumpbuffer(m,b,n) +# define wlinfodumpbuffer(m,b,n) infodumpbuffer(m,b,n) +#else +# define wlerrdumpbuffer(m,b,n) +# define wlinfodumpbuffer(m,b,n) +#endif + #ifdef CONFIG_DEBUG_FS # define ferrdumpbuffer(m,b,n) errdumpbuffer(m,b,n) # define finfodumpbuffer(m,b,n) infodumpbuffer(m,b,n) diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index c5d25cd2120..5582ccd0fee 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -85,7 +85,7 @@ #define _I2CBASE (0x2000) /* I2C driver commands */ #define _SPIBASE (0x2100) /* SPI driver commands */ #define _GPIOBASE (0x2200) /* GPIO driver commands */ -#define _CLIOCBASE (0x1200) /* Contactless modules ioctl commands */ +#define _CLIOCBASE (0x2300) /* Contactless modules ioctl commands */ /* boardctl() commands share the same number space */ diff --git a/include/nuttx/net/ioctl.h b/include/nuttx/net/ioctl.h index a20d5e231b2..c6180284055 100644 --- a/include/nuttx/net/ioctl.h +++ b/include/nuttx/net/ioctl.h @@ -109,84 +109,22 @@ #define SIOCADDRT _SIOC(0x001f) /* Add an entry to the routing table */ #define SIOCDELRT _SIOC(0x0020) /* Delete an entry from the routing table */ -/* Wireless ioctl commands **************************************************/ -/* Not currently used */ - -#define SIOCSIWCOMMIT _SIOC(0x0021) /* Commit pending changes to driver */ -#define SIOCGIWNAME _SIOC(0x0022) /* Get name of wireless protocol */ - -#define SIOCSIWNWID _SIOC(0x0023) /* Set network ID (pre-802.11) */ -#define SIOCGIWNWID _SIOC(0x0024) /* Get network ID (the cell) */ -#define SIOCSIWFREQ _SIOC(0x0025) /* Set channel/frequency (Hz) */ -#define SIOCGIWFREQ _SIOC(0x0026) /* Get channel/frequency (Hz) */ -#define SIOCSIWMODE _SIOC(0x0027) /* Set operation mode */ -#define SIOCGIWMODE _SIOC(0x0028) /* Get operation mode */ -#define SIOCSIWSENS _SIOC(0x0029) /* Set sensitivity (dBm) */ -#define SIOCGIWSENS _SIOC(0x002a) /* Get sensitivity (dBm) */ - -#define SIOCGIWRANGE _SIOC(0x002b) /* Get range of parameters */ -#define SIOCGIWPRIV _SIOC(0x002c) /* Get private ioctl interface info */ -#define SIOCGIWSTATS _SIOC(0x002d) /* Get wireless stats */ - -#define SIOCSIWSPY _SIOC(0x002e) /* Set spy addresses */ -#define SIOCGIWSPY _SIOC(0x002f) /* Get spy info (quality of link) */ -#define SIOCSIWTHRSPY _SIOC(0x0030) /* Set spy threshold (spy event) */ -#define SIOCGIWTHRSPY _SIOC(0x0031) /* Get spy threshold */ - -#define SIOCSIWAP _SIOC(0x0032) /* Set access point MAC addresses */ -#define SIOCGIWAP _SIOC(0x0033) /* Get access point MAC addresses */ -#define SIOCGIWAPLIST _SIOC(0x0034) /* Deprecated in favor of scanning */ -#define SIOCSIWSCAN _SIOC(0x0035) /* Trigger scanning (list cells) */ -#define SIOCGIWSCAN _SIOC(0x0036) /* Get scanning results */ - -#define SIOCSIWESSID _SIOC(0x0037) /* Set ESSID (network name) */ -#define SIOCGIWESSID _SIOC(0x0038) /* Get ESSID */ -#define SIOCSIWNICKN _SIOC(0x0039) /* Set node name/nickname */ -#define SIOCGIWNICKN _SIOC(0x003a) /* Get node name/nickname */ - -#define SIOCSIWRATE _SIOC(0x003b) /* Set default bit rate (bps) */ -#define SIOCGIWRATE _SIOC(0x003c) /* Get default bit rate (bps) */ -#define SIOCSIWRTS _SIOC(0x003d) /* Set RTS/CTS threshold (bytes) */ -#define SIOCGIWRTS _SIOC(0x003e) /* Get RTS/CTS threshold (bytes) */ -#define SIOCSIWFRAG _SIOC(0x003f) /* Set fragmentation thr (bytes) */ -#define SIOCGIWFRAG _SIOC(0x0040) /* Get fragmentation thr (bytes) */ -#define SIOCSIWTXPOW _SIOC(0x0041) /* Set transmit power (dBm) */ -#define SIOCGIWTXPOW _SIOC(0x0042) /* Get transmit power (dBm) */ -#define SIOCSIWRETRY _SIOC(0x0043) /* Set retry limits and lifetime */ -#define SIOCGIWRETRY _SIOC(0x0044) /* Get retry limits and lifetime */ - -#define SIOCSIWPOWER _SIOC(0x0045) /* Set Power Management settings */ -#define SIOCGIWPOWER _SIOC(0x0046) /* Get Power Management settings */ - -#define SIOCSIWGENIE _SIOC(0x0047) /* Set generic IE */ -#define SIOCGIWGENIE _SIOC(0x0048) /* Get generic IE */ - -#define SIOCSIWMLME _SIOC(0x0049) /* Request MLME operation */ - -#define SIOCSIWAUTH _SIOC(0x004a) /* Set authentication mode params */ -#define SIOCGIWAUTH _SIOC(0x004b) /* Get authentication mode params */ - -#define SIOCSIWENCODEEXT _SIOC(0x004c) /* Set encoding token & mode */ -#define SIOCGIWENCODEEXT _SIOC(0x004d) /* Get encoding token & mode */ - -#define SIOCSIWPMKSA _SIOC(0x004e) /* PMKSA cache operation */ - /* MDIO/MCD *****************************************************************/ -#define SIOCMIINOTIFY _SIOC(0x004f) /* Receive notificaion via signal on +#define SIOCMIINOTIFY _SIOC(0x0021) /* Receive notificaion via signal on * PHY state change */ -#define SIOCGMIIPHY _SIOC(0x0050) /* Get address of MII PHY in use */ -#define SIOCGMIIREG _SIOC(0x0051) /* Get a MII register via MDIO */ -#define SIOCSMIIREG _SIOC(0x0052) /* Set a MII register via MDIO */ +#define SIOCGMIIPHY _SIOC(0x0022) /* Get address of MII PHY in use */ +#define SIOCGMIIREG _SIOC(0x0023) /* Get a MII register via MDIO */ +#define SIOCSMIIREG _SIOC(0x0024) /* Set a MII register via MDIO */ /* Unix domain sockets ******************************************************/ -#define SIOCINQ _SIOC(0x0053) /* Returns the amount of queued unread +#define SIOCINQ _SIOC(0x0025) /* Returns the amount of queued unread * data in the receive */ /* Telnet driver ************************************************************/ -#define SIOCTELNET _SIOC(0x0054) /* Create a Telnet sessions. +#define SIOCTELNET _SIOC(0x0026) /* Create a Telnet sessions. * See include/nuttx/net/telnet.h */ /**************************************************************************** diff --git a/include/nuttx/net/net.h b/include/nuttx/net/net.h index 54f5c83273c..1c64351fe2e 100644 --- a/include/nuttx/net/net.h +++ b/include/nuttx/net/net.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/nuttx/net/net.h * - * Copyright (C) 2007, 2009-2014, 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2009-2014, 2016-2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -67,7 +67,10 @@ /**************************************************************************** * Public Types ****************************************************************************/ -/* Data link layer type */ + +/* Data link layer type. This type is used with netdev_register in order to + * identify the type of the network driver. + */ enum net_lltype_e { @@ -75,7 +78,8 @@ enum net_lltype_e NET_LL_LOOPBACK, /* Local loopback */ NET_LL_SLIP, /* Serial Line Internet Protocol (SLIP) */ NET_LL_TUN, /* TUN Virtual Network Device */ - NET_LL_6LOWPAN /* IEEE 802.15.4 6LoWPAN*/ + NET_LL_IEEE80211, /* IEEE 802.11 */ + NET_LL_6LOWPAN /* IEEE 802.15.4 6LoWPAN */ }; /* This defines a bitmap big enough for one bit for each socket option */ diff --git a/include/nuttx/net/netdev.h b/include/nuttx/net/netdev.h index aceab4d083d..6a529fb3686 100644 --- a/include/nuttx/net/netdev.h +++ b/include/nuttx/net/netdev.h @@ -330,7 +330,7 @@ struct net_driver_s int (*d_addmac)(FAR struct net_driver_s *dev, FAR const uint8_t *mac); int (*d_rmmac)(FAR struct net_driver_s *dev, FAR const uint8_t *mac); #endif -#ifdef CONFIG_NETDEV_PHY_IOCTL +#ifdef CONFIG_NETDEV_IOCTL int (*d_ioctl)(FAR struct net_driver_s *dev, int cmd, long arg); #endif diff --git a/include/nuttx/wireless/ieee80211/bcmf_board.h b/include/nuttx/wireless/ieee80211/bcmf_board.h new file mode 100644 index 00000000000..7ae0c21dc22 --- /dev/null +++ b/include/nuttx/wireless/ieee80211/bcmf_board.h @@ -0,0 +1,110 @@ +/**************************************************************************** + * include/nuttx/wireless/ieee80211/bcmf_board.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_WIRELESS_IEEE80211_BCMF_BOARD_H +#define __INCLUDE_NUTTX_WIRELESS_IEEE80211_BCMF_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/************************************************************************************ + * Function: bcmf_board_initialize + * + * Description: + * Board specific function called from Broadcom FullMAC driver + * that must be implemented to configure WLAN chip GPIOs + * + * Parameters: + * minor - zero based minor device number which is unique + * for each wlan device. + ************************************************************************************/ + +void bcmf_board_initialize(int minor); + +/************************************************************************************ + * Function: bcmf_board_power + * + * Description: + * Board specific function called from Broadcom FullMAC driver + * that must be implemented to power WLAN chip + * + * Parameters: + * minor - zero based minor device number which is unique + * for each wlan device. + * power - true to power WLAN chip else false + ************************************************************************************/ + +void bcmf_board_power(int minor, bool power); + +/************************************************************************************ + * Function: bcmf_board_reset + * + * Description: + * Board specific function called from Broadcom FullMAC driver + * that must be implemented to reset WLAN chip + * + * Parameters: + * minor - zero based minor device number which is unique + * for each wlan device. + * reset - true to set WLAN chip in reset state else false + ************************************************************************************/ + +void bcmf_board_reset(int minor, bool reset); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_WIRELESS_IEEE80211_BCMF_BOARD_H */ diff --git a/include/nuttx/wireless/ieee80211/bcmf_sdio.h b/include/nuttx/wireless/ieee80211/bcmf_sdio.h new file mode 100644 index 00000000000..09c5733f3a4 --- /dev/null +++ b/include/nuttx/wireless/ieee80211/bcmf_sdio.h @@ -0,0 +1,86 @@ +/**************************************************************************** + * include/nuttx/wireless/ieee80211/bcmf_sdio.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Simon Piriou + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_WIRELESS_IEEE80211_BCMF_SDIO_H +#define __INCLUDE_NUTTX_WIRELESS_IEEE80211_BCMF_SDIO_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Function: bcmf_sdio_initialize + * + * Description: + * Initialize Broadcom FullMAC driver. + * + * Parameters: + * minor - zero based minor device number which is unique + * for each wlan device. + * dev - SDIO device used to communicate with the wlan chip + * + * Returned Value: + * OK on success; Negated errno on failure. + * + * Assumptions: + * + ****************************************************************************/ + +int bcmf_sdio_initialize(int minor, FAR struct sdio_dev_s *dev); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_WIRELESS_IEEE80211_BCMF_SDIO_H */ diff --git a/include/nuttx/wireless/nrf24l01.h b/include/nuttx/wireless/nrf24l01.h index af17428d237..610b3c36821 100644 --- a/include/nuttx/wireless/nrf24l01.h +++ b/include/nuttx/wireless/nrf24l01.h @@ -64,8 +64,6 @@ #define NRF24L01_DYN_LENGTH 33 /* Specific length value to use to enable dynamic packet length */ #define NRF24L01_XMIT_MAXRT 255 /* Specific value returned by Number of available pipes */ -/* #define NRF24L01_DEBUG 1 */ - /* IOCTL commands */ #define NRF24L01IOC_SETRETRCFG _WLIOC(NRF24L01_FIRST+0) /* arg: Pointer to nrf24l01_retrcfg_t structure */ @@ -88,18 +86,6 @@ #define NRF24L01IOC_SETTXADDR WLIOC_SETADDR #define NRF24L01IOC_GETTXADDR WLIOC_GETADDR -/* NRF24L01 debug */ - -#ifdef NRF24L01_DEBUG -# define werr(format, ...) _err(format, ##__VA_ARGS__) -# define werr(format, ...) _err(format, ##__VA_ARGS__) -# define winfo(format, ...) _info(format, ##__VA_ARGS__) -#else -# define werr(x...) -# define werr(x...) -# define winfo(x...) -#endif - /**************************************************************************** * Public Data Types ****************************************************************************/ @@ -507,12 +493,9 @@ ssize_t nrf24l01_recv(struct nrf24l01_dev_s *dev, uint8_t *buffer, #endif -#ifdef NRF24L01_DEBUG - +#ifdef CONFIG_DEBUG_WIRELESS void nrf24l01_dumpregs(FAR struct nrf24l01_dev_s *dev); - void nrf24l01_dumprxfifo(FAR struct nrf24l01_dev_s *dev); - #endif #undef EXTERN diff --git a/include/nuttx/wireless/wireless.h b/include/nuttx/wireless/wireless.h index f1726691140..6ab0b0b3d11 100644 --- a/include/nuttx/wireless/wireless.h +++ b/include/nuttx/wireless/wireless.h @@ -45,6 +45,11 @@ ************************************************************************************/ #include + +#include +#include + +#include #include #ifdef CONFIG_DRIVERS_WIRELESS @@ -53,18 +58,127 @@ * Pre-processor Definitions ************************************************************************************/ -/* IOCTL Commands *******************************************************************/ -/* Common wireless IOCTL commands */ +/* Network Driver IOCTL Commands ****************************************************/ +/* Use of these IOCTL commands requires a socket descriptor created by the socket() + * interface. + */ -#define WLIOC_SETRADIOFREQ _WLIOC(0x0001) /* arg: Pointer to uint32_t, frequency value (in Mhz) */ -#define WLIOC_GETRADIOFREQ _WLIOC(0x0002) /* arg: Pointer to uint32_t, frequency value (in Mhz) */ -#define WLIOC_SETADDR _WLIOC(0x0003) /* arg: Pointer to address value, format of the address is driver specific */ -#define WLIOC_GETADDR _WLIOC(0x0004) /* arg: Pointer to address value, format of the address is driver specific */ -#define WLIOC_SETTXPOWER _WLIOC(0x0005) /* arg: Pointer to int32_t, output power (in dBm) */ -#define WLIOC_GETTXPOWER _WLIOC(0x0006) /* arg: Pointer to int32_t, output power (in dBm) */ +/* Wireless identification */ -#define WL_FIRST 0x0001 /* First common command */ -#define WL_NCMDS 6 /* Six common commands */ +#define SIOCSIWCOMMIT _WLIOC(0x0001) /* Commit pending changes to driver */ +#define SIOCGIWNAME _WLIOC(0x0002) /* Get name of wireless protocol */ + +/* Basic Operations */ + +#define SIOCSIWNWID _WLIOC(0x0003) /* Set network ID (pre-802.11) */ +#define SIOCGIWNWID _WLIOC(0x0004) /* Get network ID (the cell) */ +#define SIOCSIWFREQ _WLIOC(0x0005) /* Set channel/frequency (Hz) */ +#define SIOCGIWFREQ _WLIOC(0x0006) /* Get channel/frequency (Hz) */ +#define SIOCSIWMODE _WLIOC(0x0007) /* Set operation mode */ +#define SIOCGIWMODE _WLIOC(0x0008) /* Get operation mode */ +#define SIOCSIWSENS _WLIOC(0x0009) /* Set sensitivity (dBm) */ +#define SIOCGIWSENS _WLIOC(0x000a) /* Get sensitivity (dBm) */ + +/* Informational */ + +#define SIOCGIWRANGE _WLIOC(0x000b) /* Get range of parameters */ +#define SIOCGIWPRIV _WLIOC(0x000c) /* Get private ioctl interface info */ +#define SIOCGIWRANGE _WLIOC(0x000d) /* Get range of parameters */ +#define SIOCGIWPRIV _WLIOC(0x000e) /* Get private ioctl interface info */ +#define SIOCGIWSTATS _WLIOC(0x000f) /* Get wireless stats */ + +/* Spy support (statistics per MAC address - used for Mobile IP support) */ + +#define SIOCSIWSPY _WLIOC(0x0010) /* Set spy addresses */ +#define SIOCGIWSPY _WLIOC(0x0011) /* Get spy info (quality of link) */ +#define SIOCSIWTHRSPY _WLIOC(0x0012) /* Set spy threshold (spy event) */ +#define SIOCGIWTHRSPY _WLIOC(0x0013) /* Get spy threshold */ + +/* Access point manipulation */ + +#define SIOCSIWAP _WLIOC(0x0014) /* Set access point MAC addresses */ +#define SIOCGIWAP _WLIOC(0x0015) /* Get access point MAC addresses */ +#define SIOCGIWAPLIST _WLIOC(0x0016) /* Deprecated in favor of scanning */ +#define SIOCSIWSCAN _WLIOC(0x0017) /* Trigger scanning (list cells) */ +#define SIOCGIWSCAN _WLIOC(0x0018) /* Get scanning results */ + +/* 802.11 specific support */ + +#define SIOCSIWESSID _WLIOC(0x0019) /* Set ESSID (network name) */ +#define SIOCGIWESSID _WLIOC(0x001a) /* Get ESSID */ +#define SIOCSIWNICKN _WLIOC(0x001b) /* Set node name/nickname */ +#define SIOCGIWNICKN _WLIOC(0x001c) /* Get node name/nickname */ + +#define SIOCSIWRATE _WLIOC(0x001d) /* Set default bit rate (bps) */ +#define SIOCGIWRATE _WLIOC(0x001e) /* Get default bit rate (bps) */ +#define SIOCSIWRTS _WLIOC(0x001f) /* Set RTS/CTS threshold (bytes) */ +#define SIOCGIWRTS _WLIOC(0x0010) /* Get RTS/CTS threshold (bytes) */ +#define SIOCSIWFRAG _WLIOC(0x0011) /* Set fragmentation thr (bytes) */ +#define SIOCGIWFRAG _WLIOC(0x0022) /* Get fragmentation thr (bytes) */ +#define SIOCSIWTXPOW _WLIOC(0x0023) /* Set transmit power (dBm) */ +#define SIOCGIWTXPOW _WLIOC(0x0024) /* Get transmit power (dBm) */ +#define SIOCSIWRETRY _WLIOC(0x0025) /* Set retry limits and lifetime */ +#define SIOCGIWRETRY _WLIOC(0x0026) /* Get retry limits and lifetime */ + +/* Encoding */ + +#define SIOCSIWENCODE _WLIOC(0x0027) /* Set encoding token & mode */ +#define SIOCGIWENCODE _WLIOC(0x0028) /* Get encoding token & mode */ + +/* Power saving */ + +#define SIOCSIWPOWER _WLIOC(0x0029) /* Set Power Management settings */ +#define SIOCGIWPOWER _WLIOC(0x002a) /* Get Power Management settings */ + +/* WPA : Generic IEEE 802.11 information element */ + +#define SIOCSIWGENIE _WLIOC(0x002b) /* Set generic IE */ +#define SIOCGIWGENIE _WLIOC(0x002c) /* Get generic IE */ + +/* WPA : IEEE 802.11 MLME requests */ + +#define SIOCSIWMLME _WLIOC(0x002d) /* Request MLME operation */ + +/* WPA : Authentication mode parameters */ + +#define SIOCSIWAUTH _WLIOC(0x002e) /* Set authentication mode params */ +#define SIOCGIWAUTH _WLIOC(0x002f) /* Get authentication mode params */ + +/* WPA : Extended version of encoding configuration */ + +#define SIOCSIWENCODEEXT _WLIOC(0x0030) /* Set encoding token & mode */ +#define SIOCGIWENCODEEXT _WLIOC(0x0031) /* Get encoding token & mode */ + +/* WPA2 : PMKSA cache management */ + +#define SIOCSIWPMKSA _WLIOC(0x0032) /* PMKSA cache operation */ + +#define WL_FIRSTCHAR 0x0033 +#define WL_NNETCMDS 0x0032 + +/* Character Driver IOCTL commands *************************************************/ +/* Non-compatible, NuttX only IOCTL definitions for use with low-level wireless + * drivers that are accessed via a character device. Use of these IOCTL commands + * requires a file descriptor created by the open() interface. + */ + +#define WLIOC_SETRADIOFREQ _WLIOC(0x0033) /* arg: Pointer to uint32_t, frequency + * value (in Mhz) */ +#define WLIOC_GETRADIOFREQ _WLIOC(0x0034) /* arg: Pointer to uint32_t, frequency + * value (in Mhz) */ +#define WLIOC_SETADDR _WLIOC(0x0035) /* arg: Pointer to address value, format + * of the address is driver specific */ +#define WLIOC_GETADDR _WLIOC(0x0036) /* arg: Pointer to address value, format + * of the address is driver specific */ +#define WLIOC_SETTXPOWER _WLIOC(0x0037) /* arg: Pointer to int32_t, output power + * (in dBm) */ +#define WLIOC_GETTXPOWER _WLIOC(0x0038) /* arg: Pointer to int32_t, output power + * (in dBm) */ + +/* Device-specific IOCTL commands **************************************************/ + +#define WL_FIRST 0x0001 /* First common command */ +#define WL_NCMDS 0x0038 /* Number of common commands */ /* User defined ioctl commands are also supported. These will be forwarded * by the upper-half QE driver to the lower-half QE driver via the ioctl() @@ -75,13 +189,123 @@ /* See include/nuttx/wireless/cc3000.h */ -#define CC3000_FIRST (WL_FIRST + WL_NCMDS) -#define CC3000_NCMDS 7 +#define CC3000_FIRST (WL_FIRST + WL_NCMDS) +#define CC3000_NCMDS 7 /* See include/nuttx/wireless/nrf24l01.h */ -#define NRF24L01_FIRST (CC3000_FIRST + CC3000_NCMDS) -#define NRF24L01_NCMDS 14 +#define NRF24L01_FIRST (CC3000_FIRST + CC3000_NCMDS) +#define NRF24L01_NCMDS 14 + +/* Other Common Wireless Definitions ***********************************************/ + +/* Maximum size of the ESSID and NICKN strings */ + +#define IW_ESSID_MAX_SIZE 32 + +/************************************************************************************ + * Public Types + ************************************************************************************/ +/* TODO: + * + * - Add types for statistics (struct iw_statistics and related) + * - Add struct iw_range for use with IOCTL commands that need exchange mode data + * that could not fit in iwreq. + * - Private IOCTL data support (struct iw_priv_arg) + * - Quality + * - WPA support. + * - Wireless events. + * - Various flag definitions. + * + * These future additions will all need to be compatible with BSD/Linux definitions. + */ + +/* Generic format for most parameters that fit in a int32_t */ + +struct iw_param +{ + int32_t value; /* The value of the parameter itself */ + uint8_t fixed; /* Hardware should not use auto select */ + uint8_t disabled; /* Disable the feature */ + uint16_t flags; /* Optional flags */ +}; + +/* Large data reference. For all data larger than 16 octets, we need to use a + * pointer to memory allocated in user space. + */ + +struct iw_point +{ + FAR void *pointer; /* Pointer to the data (in user space) */ + uint16_t length; /* number of fields or size in bytes */ + uint16_t flags; /* Optional flags */ +}; + +/* For numbers lower than 10^9, we encode the number in 'm' and set 'e' to 0 + * For number greater than 10^9, we divide it by the lowest power of 10 to + * get 'm' lower than 10^9, with 'm'= f / (10^'e')... + * The power of 10 is in 'e', the result of the division is in 'm'. + */ + +struct iw_freq +{ + int32_t m; /* Mantissa */ + int16_t e; /* Exponent */ + uint8_t i; /* List index (when in range struct) */ + uint8_t flags; /* Flags (fixed/auto) */ +}; + +/* Quality of the link */ + +struct iw_quality +{ + uint8_t qual; /* link quality (%retries, SNR, + * %missed beacons or better...) */ + uint8_t level; /* signal level (dBm) */ + uint8_t noise; /* noise level (dBm) */ + uint8_t updated; /* Flags to know if updated */ +}; + +/* This union defines the data payload of an ioctl, and is used in struct iwreq + * below. + */ + +union iwreq_data +{ + char name[IFNAMSIZ]; /* Network interface name */ + struct iw_point essid; /* Extended network name */ + struct iw_param nwid; /* Network id (or domain - the cell) */ + struct iw_freq freq; /* frequency or channel : + * 0-1000 = channel + * > 1000 = frequency in Hz */ + struct iw_param sens; /* signal level threshold */ + struct iw_param bitrate; /* default bit rate */ + struct iw_param txpower; /* default transmit power */ + struct iw_param rts; /* RTS threshold threshold */ + struct iw_param frag; /* Fragmentation threshold */ + uint32_t mode; /* Operation mode */ + struct iw_param retry; /* Retry limits & lifetime */ + + struct iw_point encoding; /* Encoding stuff : tokens */ + struct iw_param power; /* PM duration/timeout */ + struct iw_quality qual; /* Quality part of statistics */ + + struct sockaddr ap_addr; /* Access point address */ + struct sockaddr addr; /* Destination address (hw/mac) */ + + struct iw_param param; /* Other small parameters */ + struct iw_point data; /* Other large parameters */ +}; + +/* This is the structure used to exchange data in wireless IOCTLs. This structure + * is the same as 'struct ifreq', but defined for use with wireless IOCTLs. + */ + +struct iwreq +{ + char ifrn_name[IFNAMSIZ]; /* Interface name, e.g. "eth0" */ + union iwreq_data u; /* Data payload */ +}; #endif /* CONFIG_DRIVERS_WIRELESS */ #endif /* __INCLUDE_NUTTX_WIRELESS_H */ diff --git a/include/semaphore.h b/include/semaphore.h index 8821b129d09..0056909db6a 100644 --- a/include/semaphore.h +++ b/include/semaphore.h @@ -93,7 +93,7 @@ struct sem_s # if CONFIG_SEM_PREALLOCHOLDERS > 0 FAR struct semholder_s *hhead; /* List of holders of semaphore counts */ # else - struct semholder_s holder; /* Single holder */ + struct semholder_s holder[2]; /* Slot for old and new holder */ # endif #endif }; @@ -104,12 +104,15 @@ typedef struct sem_s sem_t; #ifdef CONFIG_PRIORITY_INHERITANCE # if CONFIG_SEM_PREALLOCHOLDERS > 0 -# define SEM_INITIALIZER(c) {(c), 0, NULL} /* semcount, flags, hhead */ +# define SEM_INITIALIZER(c) \ + {(c), 0, NULL} /* semcount, flags, hhead */ # else -# define SEM_INITIALIZER(c) {(c), 0, SEMHOLDER_INITIALIZER} /* semcount, flags, holder */ +# define SEM_INITIALIZER(c) \ + {(c), 0, {SEMHOLDER_INITIALIZER, SEMHOLDER_INITIALIZER}} /* semcount, flags, holder[2] */ # endif #else -# define SEM_INITIALIZER(c) {(c)} /* semcount */ +# define SEM_INITIALIZER(c) \ + {(c)} /* semcount */ #endif /**************************************************************************** diff --git a/libc/pthread/pthread_condattr_init.c b/libc/pthread/pthread_condattr_init.c index 7f5602ce761..8532bc9a612 100644 --- a/libc/pthread/pthread_condattr_init.c +++ b/libc/pthread/pthread_condattr_init.c @@ -81,5 +81,3 @@ int pthread_condattr_init(FAR pthread_condattr_t *attr) linfo("Returning %d\n", ret); return ret; } - - diff --git a/libc/pthread/pthread_mutexattr_init.c b/libc/pthread/pthread_mutexattr_init.c index 01c3bb867d1..f1b6bca9c7c 100644 --- a/libc/pthread/pthread_mutexattr_init.c +++ b/libc/pthread/pthread_mutexattr_init.c @@ -1,7 +1,7 @@ /**************************************************************************** * libc/pthread/pthread_mutexattr_init.c * - * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2011, 2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -76,6 +76,9 @@ int pthread_mutexattr_init(FAR pthread_mutexattr_t *attr) else { attr->pshared = 0; +#ifdef CONFIG_PRIORITY_INHERITANCE + attr->proto = SEM_PRIO_INHERIT; +#endif #ifdef CONFIG_MUTEX_TYPES attr->type = PTHREAD_MUTEX_DEFAULT; #endif diff --git a/libc/semaphore/sem_init.c b/libc/semaphore/sem_init.c index f4037d342ce..ec7de2730a5 100644 --- a/libc/semaphore/sem_init.c +++ b/libc/semaphore/sem_init.c @@ -83,17 +83,19 @@ int sem_init(FAR sem_t *sem, int pshared, unsigned int value) { /* Initialize the seamphore count */ - sem->semcount = (int16_t)value; + sem->semcount = (int16_t)value; /* Initialize to support priority inheritance */ #ifdef CONFIG_PRIORITY_INHERITANCE - sem->flags = 0; + sem->flags = 0; # if CONFIG_SEM_PREALLOCHOLDERS > 0 - sem->hhead = NULL; + sem->hhead = NULL; # else - sem->holder.htcb = NULL; - sem->holder.counts = 0; + sem->holder[0].htcb = NULL; + sem->holder[0].counts = 0; + sem->holder[1].htcb = NULL; + sem->holder[1].counts = 0; # endif #endif return OK; diff --git a/net/netdev/Kconfig b/net/netdev/Kconfig index fb441f0d26a..f63cfd35bce 100644 --- a/net/netdev/Kconfig +++ b/net/netdev/Kconfig @@ -5,10 +5,23 @@ menu "Network Device Operations" +config NETDEV_IOCTL + bool + default n + config NETDEV_PHY_IOCTL bool "Enable PHY ioctl()" default n + select NETDEV_IOCTL ---help--- - Enable support for ioctl() commands to access PHY registers" + Enable support for ioctl() commands to access PHY registers + +config NETDEV_WIRELESS_IOCTL + bool "Enable Wireless ioctl()" + default n + select NETDEV_IOCTL + depends on DRIVERS_WIRELESS + ---help--- + Enable support for wireless device ioctl() commands endmenu # Network Device Operations diff --git a/net/netdev/netdev_ioctl.c b/net/netdev/netdev_ioctl.c index 10d9bf2df69..a9a70191fdb 100644 --- a/net/netdev/netdev_ioctl.c +++ b/net/netdev/netdev_ioctl.c @@ -1,7 +1,7 @@ /**************************************************************************** * net/netdev/netdev_ioctl.c * - * Copyright (C) 2007-2012, 2015-2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2012, 2015-2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -60,8 +60,12 @@ #include #ifdef CONFIG_NET_IGMP -# include "sys/sockio.h" -# include "nuttx/net/igmp.h" +# include +# include +#endif + +#ifdef CONFIG_NETDEV_WIRELESS_IOCTL +# include #endif #include "arp/arp.h" @@ -311,6 +315,80 @@ static void ioctl_setipv6addr(FAR net_ipv6addr_t outaddr, } #endif +/**************************************************************************** + * Name: netdev_wifrdev + * + * Description: + * Verify the struct iwreq and get the Wireless device. + * + * Parameters: + * req - The argument of the ioctl cmd + * + * Return: + * A pointer to the driver structure on success; NULL on failure. + * + ****************************************************************************/ + +#if defined(CONFIG_NETDEV_IOCTL) && defined(CONFIG_NETDEV_WIRELESS_IOCTL) +static FAR struct net_driver_s *netdev_wifrdev(FAR struct iwreq *req) +{ + if (req != NULL) + { + /* Find the network device associated with the device name + * in the request data. + */ + + return netdev_findbyname(req->ifrn_name); + } + + return NULL; +} +#endif + +/**************************************************************************** + * Name: netdev_wifrioctl + * + * Description: + * Perform wireless network device specific operations. + * + * Parameters: + * psock Socket structure + * dev Ethernet driver device structure + * cmd The ioctl command + * req The argument of the ioctl cmd + * + * Return: + * >=0 on success (positive non-zero values are cmd-specific) + * Negated errno returned on failure. + * + ****************************************************************************/ + +#if defined(CONFIG_NETDEV_IOCTL) && defined(CONFIG_NETDEV_WIRELESS_IOCTL) +static int netdev_wifrioctl(FAR struct socket *psock, int cmd, + FAR struct iwreq *req) +{ + FAR struct net_driver_s *dev; + int ret = -ENOTTY; + + /* Verify that this is a valid wireless network IOCTL command */ + + if (_WLIOCVALID(cmd) && (unsigned)_IOC_NR(cmd) <= WL_NNETCMDS) + { + /* Get the wireless device associated with the IOCTL command */ + + dev = netdev_wifrdev(req); + if (dev) + { + /* Just forward the IOCTL to the wireless driver */ + + ret = dev->d_ioctl(dev, cmd, ((long)(uintptr_t)req)); + } + } + + return ret; +} +#endif + /**************************************************************************** * Name: netdev_ifrdev * @@ -327,16 +405,16 @@ static void ioctl_setipv6addr(FAR net_ipv6addr_t outaddr, static FAR struct net_driver_s *netdev_ifrdev(FAR struct ifreq *req) { - if (!req) + if (req != NULL) { - return NULL; + /* Find the network device associated with the device name + * in the request data. + */ + + return netdev_findbyname(req->ifr_name); } - /* Find the network device associated with the device name - * in the request data. - */ - - return netdev_findbyname(req->ifr_name); + return NULL; } /**************************************************************************** @@ -347,7 +425,6 @@ static FAR struct net_driver_s *netdev_ifrdev(FAR struct ifreq *req) * * Parameters: * psock Socket structure - * dev Ethernet driver device structure * cmd The ioctl command * req The argument of the ioctl cmd * @@ -676,7 +753,7 @@ static int netdev_ifrioctl(FAR struct socket *psock, int cmd, } break; -#ifdef CONFIG_NETDEV_PHY_IOCTL +#if defined(CONFIG_NETDEV_IOCTL) && defined(CONFIG_NETDEV_PHY_IOCTL) #ifdef CONFIG_ARCH_PHY_INTERRUPT case SIOCMIINOTIFY: /* Set up for PHY event notifications */ { @@ -1079,10 +1156,19 @@ int psock_ioctl(FAR struct socket *psock, int cmd, unsigned long arg) goto errout; } - /* Execute the command */ + /* Execute the command. First check for a standard network IOCTL command. */ ret = netdev_ifrioctl(psock, cmd, (FAR struct ifreq *)((uintptr_t)arg)); +#if defined(CONFIG_NETDEV_IOCTL) && defined(CONFIG_NETDEV_WIRELESS_IOCTL) + /* Check a wireless network command */ + + if (ret == -ENOTTY) + { + ret = netdev_wifrioctl(psock, cmd, (FAR struct iwreq *)((uintptr_t)arg)); + } +#endif + #ifdef CONFIG_NET_IGMP /* Check for address filtering commands */ @@ -1174,7 +1260,7 @@ void netdev_ifup(FAR struct net_driver_s *dev) { /* Make sure that the device supports the d_ifup() method */ - if (dev->d_ifup) + if (dev->d_ifup != NULL) { /* Is the interface already up? */ @@ -1196,7 +1282,7 @@ void netdev_ifdown(FAR struct net_driver_s *dev) { /* Check sure that the device supports the d_ifdown() method */ - if (dev->d_ifdown) + if (dev->d_ifdown != NULL) { /* Is the interface already down? */ diff --git a/net/netdev/netdev_register.c b/net/netdev/netdev_register.c index a2144d2288b..dafc17dcc3a 100644 --- a/net/netdev/netdev_register.c +++ b/net/netdev/netdev_register.c @@ -1,7 +1,7 @@ /**************************************************************************** * net/netdev/netdev_register.c * - * Copyright (C) 2007-2012, 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2012, 2014-2015, 2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -63,14 +63,17 @@ #define NETDEV_ETH_FORMAT "eth%d" #define NETDEV_LO_FORMAT "lo" -#define NETDEV_WPAN_FORMAT "wpan%d" #define NETDEV_SLIP_FORMAT "sl%d" #define NETDEV_TUN_FORMAT "tun%d" +#define NETDEV_WLAN_FORMAT "wlan%d" +#define NETDEV_WPAN_FORMAT "wpan%d" #if defined(CONFIG_NET_SLIP) # define NETDEV_DEFAULT_FORMAT NETDEV_SLIP_FORMAT #elif defined(CONFIG_NET_ETHERNET) # define NETDEV_DEFAULT_FORMAT NETDEV_ETH_FORMAT +#elif defined(CONFIG_DRIVERS_IEEE80211) +# define NETDEV_DEFAULT_FORMAT NETDEV_WLAN_FORMAT #elif defined(CONFIG_NET_6LOWPAN) # define NETDEV_DEFAULT_FORMAT NETDEV_WPAN_FORMAT #else /* if defined(CONFIG_NET_LOOPBACK) */ @@ -213,6 +216,17 @@ int netdev_register(FAR struct net_driver_s *dev, enum net_lltype_e lltype) break; #endif +#ifdef CONFIG_DRIVERS_IEEE80211 + case NET_LL_IEEE80211: /* IEEE 802.11 */ + dev->d_llhdrlen = ETH_HDRLEN; + dev->d_mtu = CONFIG_NET_ETH_MTU; +#ifdef CONFIG_NET_TCP + dev->d_recvwndo = CONFIG_NET_ETH_TCP_RECVWNDO; +#endif + devfmt = NETDEV_LPAN_FORMAT; + break; +#endif + #ifdef CONFIG_NET_6LOWPAN case NET_LL_6LOWPAN: /* IEEE 802.15.4 */ dev->d_llhdrlen = 0; /* REVISIT */ diff --git a/sched/semaphore/sem_holder.c b/sched/semaphore/sem_holder.c index 6b9f05af3ec..eaf443342db 100644 --- a/sched/semaphore/sem_holder.c +++ b/sched/semaphore/sem_holder.c @@ -93,7 +93,7 @@ static inline FAR struct semholder_s *sem_allocholder(sem_t *sem) #if CONFIG_SEM_PREALLOCHOLDERS > 0 pholder = g_freeholders; - if (pholder) + if (pholder != NULL) { /* Remove the holder from the free list an put it into the semaphore's * holder list @@ -108,18 +108,24 @@ static inline FAR struct semholder_s *sem_allocholder(sem_t *sem) pholder->counts = 0; } #else - if (!sem->holder.htcb) + if (sem->holder[0].htcb == NULL) { - pholder = &sem->holder; + pholder = &sem->holder[0]; + pholder->counts = 0; + } + else if (sem->holder[1].htcb == NULL) + { + pholder = &sem->holder[1]; pholder->counts = 0; } #endif else { serr("ERROR: Insufficient pre-allocated holders\n"); - pholder = NULL; + pholder = NULL; } + DEBUGASSERT(pholder != NULL); return pholder; } @@ -132,15 +138,12 @@ static FAR struct semholder_s *sem_findholder(sem_t *sem, { FAR struct semholder_s *pholder; +#if CONFIG_SEM_PREALLOCHOLDERS > 0 /* Try to find the holder in the list of holders associated with this * semaphore */ -#if CONFIG_SEM_PREALLOCHOLDERS > 0 - for (pholder = sem->hhead; pholder; pholder = pholder->flink) -#else - pholder = &sem->holder; -#endif + for (pholder = sem->hhead; pholder != NULL; pholder = pholder->flink) { if (pholder->htcb == htcb) { @@ -149,6 +152,23 @@ static FAR struct semholder_s *sem_findholder(sem_t *sem, return pholder; } } +#else + int i; + pholder = NULL; + + /* We have two hard-allocated holder structuse in sem_t */ + + for (i = 0; i < 2; i++) + { + pholder = &sem->holder[i]; + if (pholder->htcb == htcb) + { + /* Got it! */ + + return pholder; + } + } +#endif /* The holder does not appear in the list */ @@ -194,11 +214,11 @@ static inline void sem_freeholder(sem_t *sem, FAR struct semholder_s *pholder) curr && curr != pholder; prev = curr, curr = curr->flink); - if (curr) + if (curr != NULL) { /* Remove the holder from the list */ - if (prev) + if (prev != NULL) { prev->flink = pholder->flink; } @@ -223,31 +243,47 @@ static int sem_foreachholder(FAR sem_t *sem, holderhandler_t handler, FAR void *arg) { FAR struct semholder_s *pholder; -#if CONFIG_SEM_PREALLOCHOLDERS > 0 - FAR struct semholder_s *next; -#endif int ret = 0; #if CONFIG_SEM_PREALLOCHOLDERS > 0 + FAR struct semholder_s *next; + for (pholder = sem->hhead; pholder && ret == 0; pholder = next) -#else - pholder = &sem->holder; -#endif { -#if CONFIG_SEM_PREALLOCHOLDERS > 0 /* In case this holder gets deleted */ next = pholder->flink; -#endif - /* The initial "built-in" container may hold a NULL holder */ - if (pholder->htcb) + /* Check if there is a handler... there should always be one + * in this configuration. + */ + + if (pholder->htcb != NULL) { /* Call the handler */ ret = handler(pholder, sem, arg); } } +#else + int i; + + /* We have two hard-allocated holder structures in sem_t */ + + for (i = 0; i < 2; i++) + { + pholder = &sem->holder[i]; + + /* The hard-allocated containers may hold a NULL holder */ + + if (pholder->htcb != NULL) + { + /* Call the handler */ + + ret = handler(pholder, sem, arg); + } + } +#endif return ret; } @@ -284,11 +320,11 @@ static int sem_boostholderprio(FAR struct semholder_s *pholder, if (!sched_verifytcb(htcb)) { serr("ERROR: TCB 0x%08x is a stale handle, counts lost\n", htcb); + DEBUGASSERT(!sched_verifytcb(htcb)); sem_freeholder(sem, pholder); } #if CONFIG_SEM_NNESTPRIO > 0 - /* If the priority of the thread that is waiting for a count is greater * than the base priority of the thread holding a count, then we may need * to adjust the holder's priority now or later to that priority. @@ -322,6 +358,7 @@ static int sem_boostholderprio(FAR struct semholder_s *pholder, else { serr("ERROR: CONFIG_SEM_NNESTPRIO exceeded\n"); + DEBUGASSERT(htcb->npend_reprio < CONFIG_SEM_NNESTPRIO); } } @@ -342,8 +379,16 @@ static int sem_boostholderprio(FAR struct semholder_s *pholder, * saved priority and not to the base priority. */ - htcb->pend_reprios[htcb->npend_reprio] = rtcb->sched_priority; - htcb->npend_reprio++; + if (htcb->npend_reprio < CONFIG_SEM_NNESTPRIO) + { + htcb->pend_reprios[htcb->npend_reprio] = rtcb->sched_priority; + htcb->npend_reprio++; + } + else + { + serr("ERROR: CONFIG_SEM_NNESTPRIO exceeded\n"); + DEBUGASSERT(htcb->npend_reprio < CONFIG_SEM_NNESTPRIO); + } } } @@ -435,6 +480,7 @@ static int sem_restoreholderprio(FAR struct semholder_s *pholder, if (!sched_verifytcb(htcb)) { serr("ERROR: TCB 0x%08x is a stale handle, counts lost\n", htcb); + DEBUGASSERT(!sched_verifytcb(htcb)); sem_freeholder(sem, pholder); } @@ -637,7 +683,7 @@ static inline void sem_restorebaseprio_irq(FAR struct tcb_s *stcb, * next highest pending priority. */ - if (stcb) + if (stcb != NULL) { /* Drop the priority of all holder threads */ @@ -701,7 +747,7 @@ static inline void sem_restorebaseprio_task(FAR struct tcb_s *stcb, * next highest pending priority. */ - if (stcb) + if (stcb != NULL) { /* The currently executed thread should be the lower priority * thread that just posted the count and caused this action. @@ -736,7 +782,7 @@ static inline void sem_restorebaseprio_task(FAR struct tcb_s *stcb, */ pholder = sem_findholder(sem, rtcb); - if (pholder) + if (pholder != NULL) { /* When no more counts are held, remove the holder from the list. The * count was decremented in sem_releaseholder. @@ -817,18 +863,21 @@ void sem_destroyholder(FAR sem_t *sem) */ #if CONFIG_SEM_PREALLOCHOLDERS > 0 - if (sem->hhead) + if (sem->hhead != NULL) { serr("ERROR: Semaphore destroyed with holders\n"); + DEBUGASSERT(sem->hhead != NULL); (void)sem_foreachholder(sem, sem_recoverholders, NULL); } #else - if (sem->holder.htcb) + if (sem->holder[0].htcb != NULL || sem->holder[0].htcb != NULL) { + DEBUGASSERT(sem->holder[0].htcb != NULL || sem->holder[0].htcb != NULL); serr("ERROR: Semaphore destroyed with holder\n"); } - sem->holder.htcb = NULL; + sem->holder[0].htcb = NULL; + sem->holder[1].htcb = NULL; #endif } @@ -952,7 +1001,7 @@ void sem_releaseholder(FAR sem_t *sem) /* Find the container for this holder */ pholder = sem_findholder(sem, rtcb); - if (pholder && pholder->counts > 0) + if (pholder != NULL && pholder->counts > 0) { /* Decrement the counts on this holder -- the holder will be freed * later in sem_restorebaseprio. diff --git a/sched/wqueue/kwork_inherit.c b/sched/wqueue/kwork_inherit.c index b6d98c7b406..a960480bd05 100644 --- a/sched/wqueue/kwork_inherit.c +++ b/sched/wqueue/kwork_inherit.c @@ -110,6 +110,11 @@ static void lpwork_boostworker(pid_t wpid, uint8_t reqprio) wtcb->pend_reprios[wtcb->npend_reprio] = wtcb->sched_priority; wtcb->npend_reprio++; } + else + { + serr("ERROR: CONFIG_SEM_NNESTPRIO exceeded\n"); + DEBUGASSERT(wtcb->npend_reprio < CONFIG_SEM_NNESTPRIO); + } } /* Raise the priority of the worker. This cannot cause a context @@ -129,8 +134,16 @@ static void lpwork_boostworker(pid_t wpid, uint8_t reqprio) * saved priority and not to the base priority. */ - wtcb->pend_reprios[wtcb->npend_reprio] = reqprio; - wtcb->npend_reprio++; + if (wtcb->npend_reprio < CONFIG_SEM_NNESTPRIO) + { + wtcb->pend_reprios[wtcb->npend_reprio] = reqprio; + wtcb->npend_reprio++; + } + else + { + serr("ERROR: CONFIG_SEM_NNESTPRIO exceeded\n"); + DEBUGASSERT(wtcb->npend_reprio < CONFIG_SEM_NNESTPRIO); + } } } #else diff --git a/syscall/Makefile b/syscall/Makefile index 14c0c4dea50..94fa8cdfdb9 100644 --- a/syscall/Makefile +++ b/syscall/Makefile @@ -39,7 +39,7 @@ DELIM ?= $(strip /) include proxies$(DELIM)Make.defs include stubs$(DELIM)Make.defs -MKSYSCALL = "$(TOPDIR)$(DELIM)tools$(DELIM)mksyscall$(EXEEXT)" +MKSYSCALL = "$(TOPDIR)$(DELIM)tools$(DELIM)mksyscall$(HOSTEXEEXT)" CSVFILE = "$(TOPDIR)$(DELIM)syscall$(DELIM)syscall.csv" STUB_SRCS += syscall_funclookup.c syscall_stublookup.c syscall_nparms.c diff --git a/tools/testbuild.sh b/tools/testbuild.sh index 0d10702c756..e0ceb13bb1e 100755 --- a/tools/testbuild.sh +++ b/tools/testbuild.sh @@ -57,6 +57,7 @@ function showusage { echo " -s Use C++ unsigned long size_t in new operator. Default unsigned int" echo " -a provides the relative path to the apps/ directory. Default ../apps" echo " -n provides the relative path to the NxWidgets/ directory. Default ../NxWidgets" + echo " -d enables script debug output" echo " -h will show this help test and terminate" echo " selects the list of configurations to test. No default" echo "" @@ -80,6 +81,9 @@ while [ ! -z "$1" ]; do host=windows wenv=cygwin ;; + -d ) + set -x + ;; -u ) host=windows wenv=ubuntu diff --git a/wireless/ieee802154/Kconfig b/wireless/ieee802154/Kconfig index 18d5a8753c3..1b443ff9797 100644 --- a/wireless/ieee802154/Kconfig +++ b/wireless/ieee802154/Kconfig @@ -3,12 +3,12 @@ # see the file kconfig-language.txt in the NuttX tools repository. # -config IEEE802154 +config WIRELESS_IEEE802154 bool "IEEE 802.15.4 Wireless Support" default n depends on EXPERIMENTAL ---help--- - Enables support for the IEEE 802.14.5Wireless library. + Enables support for the IEEE 802.14.5 Wireless library. if IEEE802154 diff --git a/wireless/ieee802154/Make.defs b/wireless/ieee802154/Make.defs index 9e0c66391b4..200d948dd79 100644 --- a/wireless/ieee802154/Make.defs +++ b/wireless/ieee802154/Make.defs @@ -33,7 +33,7 @@ # ############################################################################ -ifeq ($(CONFIG_IEEE802154),y) +ifeq ($(CONFIG_WIRELESS_IEEE802154),y) # Include IEEE 802.15.4 support @@ -43,4 +43,4 @@ DEPPATH += --dep-path wireless/ieee802154 VPATH += :wireless/ieee802154 CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)wireless$(DELIM)ieee802154} -endif # CONFIG_IEEE802154 +endif # CONFIG_WIRELESS_IEEE802154