Initial support for the LPC4357-EVB provided by Toby Duckworth

This commit is contained in:
Gregory Nutt
2014-11-26 15:18:24 -06:00
parent f6f8575de3
commit 0a57df4410
21 changed files with 4201 additions and 1 deletions
+2
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checksum nuttx.bin -p LPC4357 -v
srec_cat nuttx.bin -binary -offset 0x1a000000 -o nuttx.hex -intel --line-length=44
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#!/bin/bash
####################################################################################
# configs/lpc4357-evb/scripts/flash.sh
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
####################################################################################
set -x
USAGE="$0 <nuttx-path>"
# LPCXpresso 3.6 installed at /cygdrive/c/nxp/lpcxpresso_3.6"
BINDIR="/cygdrive/c/nxp/LPCXpresso_4.2.3_292/lpcxpresso/bin"
# RedSuite with LPC43xx support installed at /cygdrive/c/code_red/RedSuite_4.2.3_379 "
#BINDIR="/cygdrive/c/code_red/RedSuite_4.2.3_379/redsuite/bin"
TARGET=LPC4357
echo "############################################################################"
echo "# Assumptions:"
echo "#"
echo "# - Windows 7"
echo "# - Binaries installed at ${BINDIR}"
echo "# - AXF image built with Code Red"
echo "# - ${TARGET}"
echo "#"
echo "# You will need to edit this is any of the above are false"
echo "#"
echo "############################################################################"
echo ""
# This is the default install location for binaries on Windows (note that this
# path could change with the Code Red version number)
if [ ! -d "${BINDIR}" ]; then
echo "Directory ${BINDIR} does not exist"
exit 1
fi
# This is the relative path to the booLPCXpresso utility.
BOOTLPC="Scripts/bootLPCXpresso.cmd"
if [ ! -x "${BINDIR}/${BOOTLPC}" ]; then
echo "No executable at ${BINDIR}/${BOOTLPC}"
exit 1
fi
# bootLPCXpresso arguments
BOOTLPC_ARG=winusb # Win7
# Use the LPC18xx/LPC43xx flash utility
FLASHUTIL="crt_emu_lpc18_43_nxp" # for LPC18xx/LPC43xx parts
if [ ! -x "${BINDIR}/${FLASHUTIL}" ]; then
echo "No executable file at ${BINDIR}/${FLASHUTIL}"
exit 1
fi
# FLUSHUTIL arguements
WIRE="-wire=winusb" # for LPC-Link on Windows Vista/Windows 7)
# The nuttx directory must be provided as an argument
NUTTX=$1
if [ -z "${NUTTX}" ]; then
echo "Missing argument"
echo $USAGE
exit 1
fi
if [ ! -d "${NUTTX}" ]; then
echo "Directory ${NUTTX} does not exist"
echo $USAGE
exit 1
fi
# The binary to download:
if [ ! -f "${NUTTX}/nuttx.axf" ]; then
if [ -f "${NUTTX}/nuttx" ]; then
echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf"
mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf
fi
else
if [ -f "${NUTTX}/nuttx" ]; then
echo "Both ${NUTTX}/nuttx ${NUTTX}/nuttx.axf exist.."
echo " Deleting ${NUTTX}/nuttx.axf"
rm -f ${NUTTX}/nuttx.axf
echo "Renaming ${NUTTX}/nuttx to ${NUTTX}/nuttx.axf"
mv ${NUTTX}/nuttx ${NUTTX}/nuttx.axf
fi
fi
NUTTXPATH=`cygpath -w "${NUTTX}/nuttx.axf"`
# First of all boot the LPC-Link using the script: ${BINDIR}/${BOOTLPC}
cd ${BINDIR} || \
{ echo "Failed to CD to ${BINDIR}"; exit 1; }
./${BOOTLPC} ${BOOTLPC_ARG} || \
{ echo "'${BOOTLPC} ${BOOTLPC_ARG}' Failed"; }
echo ""
echo "Wait a bit"
echo "5..."
sleep 1
echo "4..."
sleep 1
echo "3..."
sleep 1
echo "2..."
sleep 1
echo "1..."
sleep 1
echo "0..."
echo ""
# Then program the FLASH
cd ${BINDIR} || \
{ echo "Failed to CD to ${BINDIR}"; exit 1; }
./${FLASHUTIL} ${WIRE} -p${TARGET} -flash-load-exec="${NUTTXPATH}"
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/****************************************************************************
* configs/lpc4357-evb/scripts/flashconfig.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/*
* Power-Up Reset Overview
* -----------------------
*
* The ARM core starts executing code on reset with the program counter set
* to 0x0000 0000. The LPC43xx contains a shadow pointer register that
* allows areas of memory to be mapped to address 0x0000 0000. The default,
* reset value of the shadow pointer is 0x1040 0000 so that on reset code in
* the boot ROM is always executed first.
*
* The boot starts after reset is released. The IRC is selected as CPU clock
* and the Cortex-M4 starts the boot loader. By default the JTAG access to the
* chip is disabled at reset. The boot ROM determines the boot mode based on
* the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part
* boots from internal flash by default. Otherwse, the boot ROM copies the
* image to internal SRAM at location 0x1000 0000, sets the ARM's shadow
* pointer to 0x1000 0000, and jumps to that location.
*
* However, using JTAG the executable image can be also loaded directly into
* and executed from SRAM.
*/
/* The LPC4357 on the LPC4357-EVB has the following memory resources:
*
* SRAM:
* a. 32kB of SRAM mapped at 0x10000000
* b. 40kB of SRAM mapped at 0x10080000
* Internal flash:
* a. 512kB of flash (bank A) at 0x1a000000
* b. 512kB of flash (bank B) at 0x1b000000
* External flash:
* a. 4MB of SPIFl flash at 0x14000000
*
* Here we assume that:
*
* 1. We will be running out of SRAM at 0x1000:0000, and
* 2. All .data and .bss will all fit into the 72KB SRAM block.
*
* NOTE: That initialized data is kept in the program memory SRAM and copied
* to .data SRAM. This is wasteful and unnecessary but provides a good test
* for future, FLASH-resident code.
*/
MEMORY
{
progmem (rx) : ORIGIN = 0x1A000000, LENGTH = 256K
datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 72K
}
OUTPUT_ARCH(arm)
ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* Force the vectors to be included in the output */
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > progmem
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > progmem
.ARM.extab : {
*(.ARM.extab*)
} > progmem
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > progmem
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > datamem AT > progmem
.bss : { /* BSS */
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > datamem
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
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/****************************************************************************
* configs/lpc4357-evb/scripts/ramconfig.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/*
* Power-Up Reset Overview
* -----------------------
*
* The ARM core starts executing code on reset with the program counter set
* to 0x0000 0000. The LPC43xx contains a shadow pointer register that
* allows areas of memory to be mapped to address 0x0000 0000. The default,
* reset value of the shadow pointer is 0x1040 0000 so that on reset code in
* the boot ROM is always executed first.
*
* The boot starts after reset is released. The IRC is selected as CPU clock
* and the Cortex-M4 starts the boot loader. By default the JTAG access to the
* chip is disabled at reset. The boot ROM determines the boot mode based on
* the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part
* boots from internal flash by default. Otherwse, the boot ROM copies the
* image to internal SRAM at location 0x1000 0000, sets the ARM's shadow
* pointer to 0x1000 0000, and jumps to that location.
*
* However, using JTAG the executable image can be also loaded directly into
* and executed from SRAM.
*/
/* Here we assume that:
*
* 1. We will be running out of SRAM at 0x1000:0000, and
* 2. All .data and .bss will all fit into the 72KB SRAM block.
*
* NOTE: That initialized data is kept in the program memory SRAM and copied
* to .data SRAM. This is wasteful and unnecessary but provides a good test
* for future, FLASH-resident code.
*/
MEMORY
{
progmem (rx) : ORIGIN = 0x10000000, LENGTH = 128K
datamem (rwx) : ORIGIN = 0x10080000, LENGTH = 72K
}
OUTPUT_ARCH(arm)
ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* Force the vectors to be included in the output */
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > progmem
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > progmem
.ARM.extab : {
*(.ARM.extab*)
} > progmem
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > progmem
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > datamem AT > progmem
.bss : { /* BSS */
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > datamem
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
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/****************************************************************************
* configs/lpc4357-evb/scripts/spificonfig.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/*
* Power-Up Reset Overview
* -----------------------
*
* The ARM core starts executing code on reset with the program counter set
* to 0x0000 0000. The LPC43xx contains a shadow pointer register that
* allows areas of memory to be mapped to address 0x0000 0000. The default,
* reset value of the shadow pointer is 0x1040 0000 so that on reset code in
* the boot ROM is always executed first.
*
* The boot starts after reset is released. The IRC is selected as CPU clock
* and the Cortex-M4 starts the boot loader. By default the JTAG access to the
* chip is disabled at reset. The boot ROM determines the boot mode based on
* the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part
* boots from internal flash by default. Otherwise, the boot ROM copies the
* image to internal SRAM at location 0x1000 0000, sets the ARM's shadow
* pointer to 0x1000 0000, and jumps to that location.
*
* Of course, using JTAG the executable image can be also loaded directly
* into and executed from SRAM.
*/
MEMORY
{
progmem (rx) : ORIGIN = 0x14000000, LENGTH = 1024K
datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
}
OUTPUT_ARCH(arm)
ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* Force the vectors to be included in the output */
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > progmem
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > progmem
.ARM.extab : {
*(.ARM.extab*)
} > progmem
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > progmem
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > datamem AT > progmem
.bss : { /* BSS */
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > datamem
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}