diff --git a/arch/arm/src/stm32h7/stm32_rcc.c b/arch/arm/src/stm32h7/stm32_rcc.c index 5f0f41e7d7d..3042f0e6d71 100644 --- a/arch/arm/src/stm32h7/stm32_rcc.c +++ b/arch/arm/src/stm32h7/stm32_rcc.c @@ -66,7 +66,7 @@ #define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC) /**************************************************************************** - * Private Functions + * Included Files ****************************************************************************/ /* Include chip-specific clocking initialization logic */ @@ -92,8 +92,8 @@ * and enable peripheral clocking for all peripherals enabled in the NuttX * configuration file. * - * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking - * will be enabled by an externally provided, board-specific function called + * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking will be + * enabled by an externally provided, board-specific function called * stm32_board_clockconfig(). * * Input Parameters: @@ -102,7 +102,7 @@ * Returned Value: * None * - ************************************************************************************/ + ****************************************************************************/ void stm32_clockconfig(void) { @@ -125,7 +125,9 @@ void stm32_clockconfig(void) #else - /* Invoke standard, fixed clock configuration based on definitions in board.h */ + /* Invoke standard, fixed clock configuration based on definitions in + * board.h + */ stm32_stdclockconfig(); @@ -136,21 +138,21 @@ void stm32_clockconfig(void) rcc_enableperipherals(); } -/************************************************************************************ +/**************************************************************************** * Name: stm32_clockenable * * Description: - * Re-enable the clock and restore the clock settings based on settings in board.h. - * This function is only available to support low-power modes of operation: When - * re-awakening from deep-sleep modes, it is necessary to re-enable/re-start the - * PLL + * Re-enable the clock and restore the clock settings based on settings in + * board.h. This function is only available to support low-power modes of + * operation: When re-awakening from deep-sleep modes, it is necessary to + * re-enable/re-start the PLL * * This functional performs a subset of the operations performed by - * stm32_clockconfig(): It does not reset any devices, and it does not reset the - * currently enabled peripheral clocks. + * stm32_clockconfig(): It does not reset any devices, and it does not + * reset the currently enabled peripheral clocks. * - * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking will be enabled - * by an externally provided, board-specific function called + * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking will be + * enabled by an externally provided, board-specific function called * stm32_board_clockconfig(). * * Input Parameters: @@ -159,7 +161,7 @@ void stm32_clockconfig(void) * Returned Value: * None * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_PM void stm32_clockenable(void) @@ -172,7 +174,9 @@ void stm32_clockenable(void) #else - /* Invoke standard, fixed clock configuration based on definitions in board.h */ + /* Invoke standard, fixed clock configuration based on definitions in + * board.h + */ stm32_stdclockconfig(); diff --git a/arch/arm/src/stm32h7/stm32_rcc.h b/arch/arm/src/stm32h7/stm32_rcc.h index d2f04eee9b4..583121a5cdf 100644 --- a/arch/arm/src/stm32h7/stm32_rcc.h +++ b/arch/arm/src/stm32h7/stm32_rcc.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/arm/src/stm32h7/stm32_rcc.h * * Licensed to the Apache Software Foundation (ASF) under one or more @@ -16,14 +16,14 @@ * License for the specific language governing permissions and limitations * under the License. * - ************************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_ARM_SRC_STM32H7_STM32_RCC_H #define __ARCH_ARM_SRC_STM32H7_STM32_RCC_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include @@ -31,9 +31,9 @@ #include "hardware/stm32_rcc.h" -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLY__ @@ -46,29 +46,30 @@ extern "C" #define EXTERN extern #endif -/************************************************************************************ +/**************************************************************************** * Public Data - ************************************************************************************/ + ****************************************************************************/ -/* This symbol references the Cortex-M7 vector table (as positioned by the linker - * script). The standard location for the vector table is at the beginning of FLASH - * at address 0x0800:0000. If we are using the STMicro DFU bootloader, then the - * vector table will be offset to a different location in FLASH and we will need to - * set the NVIC vector location to this alternative location. +/* This symbol references the Cortex-M7 vector table (as positioned by the + * linker script). The standard location for the vector table is at the + * beginning of FLASH at address 0x0800:0000. If we are using the STMicro + * DFU bootloader, then the vector table will be offset to a different + * location in FLASH and we will need to set the NVIC vector location to + * this alternative location. */ extern uint32_t _vectors[]; /* See armv7-m/arm_vectors.c */ -/************************************************************************************ +/**************************************************************************** * Inline Functions - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Name: stm32_mco1config * * Description: - * Selects the clock source to output on MCO1 pin (PA8). PA8 should be configured - * in alternate function mode. + * Selects the clock source to output on MCO1 pin (PA8). PA8 should be + * configured in alternate function mode. * * Input Parameters: * source - One of the definitions for the RCC_CFGR_MCO1 definitions from @@ -81,24 +82,24 @@ extern uint32_t _vectors[]; /* See armv7-m/arm_vectors.c */ * Returned Value: * None * - ************************************************************************************/ + ****************************************************************************/ static inline void stm32_mco1config(uint32_t source, uint32_t div) { uint32_t regval; regval = getreg32(STM32_RCC_CFGR); - regval &= ~(RCC_CFGR_MCO1_MASK|RCC_CFGR_MCO1PRE_MASK); + regval &= ~(RCC_CFGR_MCO1_MASK | RCC_CFGR_MCO1PRE_MASK); regval |= (source | div); putreg32(regval, STM32_RCC_CFGR); } -/************************************************************************************ +/**************************************************************************** * Name: stm32_mco2config * * Description: - * Selects the clock source to output on MCO2 pin (PC9). PC9 should be configured - * in alternate function mode. + * Selects the clock source to output on MCO2 pin (PC9). PC9 should be + * configured in alternate function mode. * * Input Parameters: * source - One of the definitions for the RCC_CFGR_MCO2 definitions from @@ -111,33 +112,33 @@ static inline void stm32_mco1config(uint32_t source, uint32_t div) * Returned Value: * None * - ************************************************************************************/ + ****************************************************************************/ static inline void stm32_mco2config(uint32_t source, uint32_t div) { uint32_t regval; regval = getreg32(STM32_RCC_CFGR); - regval &= ~(RCC_CFGR_MCO2_MASK|RCC_CFGR_MCO2PRE_MASK); + regval &= ~(RCC_CFGR_MCO2_MASK | RCC_CFGR_MCO2PRE_MASK); regval |= (source | div); putreg32(regval, STM32_RCC_CFGR); } -/************************************************************************************ +/**************************************************************************** * Public Function Prototypes - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Name: stm32_clockconfig * * Description: - * Called to establish the clock settings based on the values in board.h. This - * function (by default) will reset most everything, enable the PLL, and enable - * peripheral clocking for all peripherals enabled in the NuttX configuration - * file. + * Called to establish the clock settings based on the values in board.h. + * This function (by default) will reset most everything, enable the PLL, + * and enable peripheral clocking for all peripherals enabled in the NuttX + * configuration file. * - * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking will be enabled - * by an externally provided, board-specific function called + * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking will be + * enabled by an externally provided, board-specific function called * stm32_board_clockconfig(). * * Input Parameters: @@ -146,38 +147,38 @@ static inline void stm32_mco2config(uint32_t source, uint32_t div) * Returned Value: * None * - ************************************************************************************/ + ****************************************************************************/ void stm32_clockconfig(void); -/************************************************************************************ +/**************************************************************************** * Name: stm32_board_clockconfig * * Description: - * Any STM32 board may replace the "standard" board clock configuration logic with - * its own, custom clock configuration logic. + * Any STM32 board may replace the "standard" board clock configuration + * logic with its own, custom clock configuration logic. * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_STM32H7_CUSTOM_CLOCKCONFIG void stm32_board_clockconfig(void); #endif -/************************************************************************************ +/**************************************************************************** * Name: stm32_clockenable * * Description: - * Re-enable the clock and restore the clock settings based on settings in board.h. - * This function is only available to support low-power modes of operation: When - * re-awakening from deep-sleep modes, it is necessary to re-enable/re-start the - * PLL + * Re-enable the clock and restore the clock settings based on settings in + * board.h. This function is only available to support low-power modes of + * operation: When re-awakening from deep-sleep modes, it is necessary to + * re-enable/re-start the PLL * * This functional performs a subset of the operations performed by - * stm32_clockconfig(): It does not reset any devices, and it does not reset the - * currently enabled peripheral clocks. + * stm32_clockconfig(): It does not reset any devices, and it does not + * reset the currently enabled peripheral clocks. * - * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking will - * be enabled by an externally provided, board-specific function called + * If CONFIG_STM32H7_CUSTOM_CLOCKCONFIG is defined, then clocking will be + * enabled by an externally provided, board-specific function called * stm32_board_clockconfig(). * * Input Parameters: @@ -186,13 +187,13 @@ void stm32_board_clockconfig(void); * Returned Value: * None * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_PM void stm32_clockenable(void); #endif -/************************************************************************************ +/**************************************************************************** * Name: stm32_rcc_enablelse * * Description: @@ -204,7 +205,7 @@ void stm32_clockenable(void); * Returned Value: * None * - ************************************************************************************/ + ****************************************************************************/ void stm32_rcc_enablelse(void);