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Start data abort handler (not finished)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2861 42af7a65-404d-4744-a932-0658087f49c3
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@@ -1,7 +1,7 @@
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/****************************************************************************
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/****************************************************************************
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* arch/arm/src/arm/up_dataabort.c
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* arch/arm/src/arm/up_dataabort.c
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*
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*
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* Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
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* Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* Redistribution and use in source and binary forms, with or without
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@@ -74,11 +74,60 @@
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/****************************************************************************
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/****************************************************************************
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* Name: up_dataabort
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* Name: up_dataabort
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*
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* Description:
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* This is the data abort exception handler. The ARM data abort exception
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* occurs when a memory fault is detected during a data transfer.
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*
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****************************************************************************/
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****************************************************************************/
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void up_dataabort(uint32_t *regs)
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void up_dataabort(uint32_t *regs)
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{
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{
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lldbg("Data abort at 0x%x\n", regs[REG_PC]);
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/* Save the saved processor context in current_regs where it can be accessed
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* for register dumps and possibly context switching.
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*/
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current_regs = regs;
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current_regs = regs;
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PANIC(OSERR_ERREXCEPTION);
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#ifdef CONFIG_PAGING
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/* In the NuttX on-demand paging implementation, only the read-only, .text
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* section is paged. However, the ARM compiler generated PC-relative data
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* fetches from within the .text sections. Also, it is customary to locate
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* read-only data (.rodata) within the same section as .text so that it
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* does not require copying to RAM. Misses in either of these case should
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* cause a data abort.
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*/
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#warning "Lots of missing logic"
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#if 0
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/* Get the (virtual) address of instruction that caused the data abort.
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* When the exception occurred, this address was provide in the lr register
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* and this value was saved in the context save area as the PC at the
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* REG_R15 index.
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*/
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if (regs[REG_R15] >= CONFIG_PAGING_PAGEDBASE &&
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regs[REG_R15] < CONFIG_PAGING_PAGEDEND)
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{
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/* Call pg_miss() to schedule the page fill. A consequences of this
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* call are:
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*
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* (1) The currently executing task will be blocked and saved on
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* on the g_waitingforfill task list.
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* (2) An interrupt-level context switch will occur so that when
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* this function returns, it will return to a different task,
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* most likely the page fill worker thread.
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* (3) The page fill worker task has been signalled and should
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* execute immediately when we return from this exception.
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*/
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pg_miss();
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}
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else
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#endif
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#endif
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{
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lldbg("Data abort at 0x%x\n", regs[REG_PC]);
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PANIC(OSERR_ERREXCEPTION);
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}
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}
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}
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@@ -91,6 +91,12 @@
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/****************************************************************************
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/****************************************************************************
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* Name: up_prefetchabort
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* Name: up_prefetchabort
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*
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* Description;
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* This is the prefetch abort exception handler. The ARM prefetch abort
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* exception occurs when a memory fault is detected during an an
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* instruction fetch.
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*
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****************************************************************************/
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****************************************************************************/
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void up_prefetchabort(uint32_t *regs)
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void up_prefetchabort(uint32_t *regs)
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