diff --git a/arch/arm/src/samdl/sam_lowputc.c b/arch/arm/src/samdl/sam_lowputc.c index 5b7ebc2a0ff..64a3189ef01 100644 --- a/arch/arm/src/samdl/sam_lowputc.c +++ b/arch/arm/src/samdl/sam_lowputc.c @@ -310,7 +310,7 @@ int sam_usart_internal(const struct sam_usart_config_s * const config) sam_gclk_chan_enable(config->sercom + GCLK_CHAN_SERCOM0_CORE, config->gclkgen); #endif - sercom_slowclk_configure(config->sercom, BOARD_SERCOM_SLOW_GCLKGEN); + sercom_slowclk_configure(config->sercom, config->slowgen); /* Set USART configuration according to the board configuration */ diff --git a/arch/arm/src/samdl/sam_sercom.c b/arch/arm/src/samdl/sam_sercom.c index b024ea6ae1a..33ab89f367d 100644 --- a/arch/arm/src/samdl/sam_sercom.c +++ b/arch/arm/src/samdl/sam_sercom.c @@ -254,7 +254,7 @@ void sercom_slowclk_configure(int sercom, int gclkgen) break; #endif /* CONFIG_SAMDL_SERCOM5 */ - /* Unsupport or invalid SERCOM number provided */ + /* Unsupported or invalid SERCOM number provided */ default: DEBUGPANIC(); diff --git a/arch/arm/src/samdl/sam_spi.c b/arch/arm/src/samdl/sam_spi.c index 89a84ca1022..a90737debac 100644 --- a/arch/arm/src/samdl/sam_spi.c +++ b/arch/arm/src/samdl/sam_spi.c @@ -118,6 +118,7 @@ struct sam_spidev_s uint8_t irq; /* SERCOM IRQ number */ #endif uint8_t gclkgen; /* Source GCLK generator */ + uint8_t slowgen; /* Slow GCLK generator */ port_pinset_t pad0; /* Pin configuration for PAD0 */ port_pinset_t pad1; /* Pin configuration for PAD1 */ port_pinset_t pad2; /* Pin configuration for PAD2 */ @@ -269,6 +270,7 @@ static struct sam_spidev_s g_spi0dev = .irq = SAM_IRQ_SERCOM0, #endif .gclkgen = BOARD_SERCOM0_GCLKGEN, + .slowgen = BOARD_SERCOM0_SLOW_GCLKGEN, .pad0 = BOARD_SERCOM0_PINMAP_PAD0, .pad1 = BOARD_SERCOM0_PINMAP_PAD1, .pad2 = BOARD_SERCOM0_PINMAP_PAD2, @@ -321,6 +323,7 @@ static struct sam_spidev_s g_spi1dev = .irq = SAM_IRQ_SERCOM1, #endif .gclkgen = BOARD_SERCOM1_GCLKGEN, + .slowgen = BOARD_SERCOM1_SLOW_GCLKGEN, .pad0 = BOARD_SERCOM1_PINMAP_PAD0, .pad1 = BOARD_SERCOM1_PINMAP_PAD1, .pad2 = BOARD_SERCOM1_PINMAP_PAD2, @@ -373,6 +376,7 @@ static struct sam_spidev_s g_spi2dev = .irq = SAM_IRQ_SERCOM2, #endif .gclkgen = BOARD_SERCOM2_GCLKGEN, + .slowgen = BOARD_SERCOM2_SLOW_GCLKGEN, .pad0 = BOARD_SERCOM2_PINMAP_PAD0, .pad1 = BOARD_SERCOM2_PINMAP_PAD1, .pad2 = BOARD_SERCOM2_PINMAP_PAD2, @@ -425,6 +429,7 @@ static struct sam_spidev_s g_spi3dev = .irq = SAM_IRQ_SERCOM3, #endif .gclkgen = BOARD_SERCOM3_GCLKGEN, + .slowgen = BOARD_SERCOM3_SLOW_GCLKGEN, .pad0 = BOARD_SERCOM3_PINMAP_PAD0, .pad1 = BOARD_SERCOM3_PINMAP_PAD1, .pad2 = BOARD_SERCOM3_PINMAP_PAD2, @@ -477,6 +482,7 @@ static struct sam_spidev_s g_spi4dev = .irq = SAM_IRQ_SERCOM4, #endif .gclkgen = BOARD_SERCOM4_GCLKGEN, + .slowgen = BOARD_SERCOM4_SLOW_GCLKGEN, .pad0 = BOARD_SERCOM4_PINMAP_PAD0, .pad1 = BOARD_SERCOM4_PINMAP_PAD1, .pad2 = BOARD_SERCOM4_PINMAP_PAD2, @@ -529,6 +535,7 @@ static struct sam_spidev_s g_spi5dev = .irq = SAM_IRQ_SERCOM5, #endif .gclkgen = BOARD_SERCOM5_GCLKGEN, + .slowgen = BOARD_SERCOM5_SLOW_GCLKGEN, .pad0 = BOARD_SERCOM5_PINMAP_PAD0, .pad1 = BOARD_SERCOM5_PINMAP_PAD1, .pad2 = BOARD_SERCOM5_PINMAP_PAD2, @@ -1528,7 +1535,7 @@ struct spi_dev_s *up_spiinitialize(int port) /* Configure the GCLKs for the SERCOM module */ sercom_coreclk_configure(priv->sercom, priv->gclkgen, false); - sercom_slowclk_configure(priv->sercom, BOARD_SERCOM_SLOW_GCLKGEN); + sercom_slowclk_configure(priv->sercom, priv->slowgen); /* Set the SERCOM in SPI master mode (no address) */ diff --git a/arch/arm/src/samdl/sam_usart.c b/arch/arm/src/samdl/sam_usart.c index 431a4f28f3e..01a2d977c3d 100644 --- a/arch/arm/src/samdl/sam_usart.c +++ b/arch/arm/src/samdl/sam_usart.c @@ -63,7 +63,8 @@ const struct sam_usart_config_s g_usart0config = .parity = CONFIG_USART0_PARITY, .bits = CONFIG_USART0_BITS, .irq = SAM_IRQ_SERCOM0, - .gclkgen = BOARD_SERCOM0_GCLKGEN , + .gclkgen = BOARD_SERCOM0_GCLKGEN, + .slowgen = BOARD_SERCOM0_SLOW_GCLKGEN, .stopbits2 = CONFIG_USART0_2STOP, .baud = CONFIG_USART0_BAUD, .pad0 = BOARD_SERCOM0_PINMAP_PAD0, @@ -84,6 +85,7 @@ const struct sam_usart_config_s g_usart1config = .bits = CONFIG_USART1_BITS, .irq = SAM_IRQ_SERCOM1, .gclkgen = BOARD_SERCOM1_GCLKGEN, + .slowgen = BOARD_SERCOM1_SLOW_GCLKGEN, .stopbits2 = CONFIG_USART1_2STOP, .baud = CONFIG_USART1_BAUD, .pad0 = BOARD_SERCOM1_PINMAP_PAD0, @@ -104,6 +106,7 @@ const struct sam_usart_config_s g_usart2config = .bits = CONFIG_USART2_BITS, .irq = SAM_IRQ_SERCOM2, .gclkgen = BOARD_SERCOM2_GCLKGEN, + .slowgen = BOARD_SERCOM2_SLOW_GCLKGEN, .stopbits2 = CONFIG_USART2_2STOP, .baud = CONFIG_USART2_BAUD, .pad0 = BOARD_SERCOM2_PINMAP_PAD0, @@ -124,6 +127,7 @@ const struct sam_usart_config_s g_usart3config = .bits = CONFIG_USART3_BITS, .irq = SAM_IRQ_SERCOM3, .gclkgen = BOARD_SERCOM3_GCLKGEN, + .slowgen = BOARD_SERCOM3_SLOW_GCLKGEN, .stopbits2 = CONFIG_USART3_2STOP, .baud = CONFIG_USART3_BAUD, .pad0 = BOARD_SERCOM3_PINMAP_PAD0, @@ -144,6 +148,7 @@ const struct sam_usart_config_s g_usart4config = .bits = CONFIG_USART4_BITS, .irq = SAM_IRQ_SERCOM4, .gclkgen = BOARD_SERCOM4_GCLKGEN, + .slowgen = BOARD_SERCOM4_SLOW_GCLKGEN, .stopbits2 = CONFIG_USART4_2STOP, .baud = CONFIG_USART4_BAUD, .pad0 = BOARD_SERCOM4_PINMAP_PAD0, @@ -164,6 +169,7 @@ const struct sam_usart_config_s g_usart5config = .bits = CONFIG_USART5_BITS, .irq = SAM_IRQ_SERCOM5, .gclkgen = BOARD_SERCOM5_GCLKGEN, + .slowgen = BOARD_SERCOM5_SLOW_GCLKGEN, .stopbits2 = CONFIG_USART5_2STOP, .baud = CONFIG_USART5_BAUD, .pad0 = BOARD_SERCOM5_PINMAP_PAD0, diff --git a/arch/arm/src/samdl/sam_usart.h b/arch/arm/src/samdl/sam_usart.h index 640bb2af451..46ea9d25e14 100644 --- a/arch/arm/src/samdl/sam_usart.h +++ b/arch/arm/src/samdl/sam_usart.h @@ -91,6 +91,7 @@ struct sam_usart_config_s uint8_t bits; /* Number of bits (5-9) */ uint8_t irq; /* SERCOM IRQ number */ uint8_t gclkgen; /* Source GCLK generator */ + uint8_t slowgen; /* Slow GCLK generator */ bool stopbits2; /* True: Configure with 2 stop bits instead of 1 */ uint32_t baud; /* Configured baud */ port_pinset_t pad0; /* Pin configuration for PAD0 */