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Correct STM32 SPI3 bug reported by Uros

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3343 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2011-03-06 00:19:59 +00:00
parent aa147f7c1d
commit 0443335a11
3 changed files with 28 additions and 4 deletions
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ChangeLog
+2 -2
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@@ -1524,5 +1524,5 @@
arch/x86/include/qemu, arch/x86/src/i486, and arch/x86/src/qemu. arch/x86/include/qemu, arch/x86/src/i486, and arch/x86/src/qemu.
* configs/qemu-i486 - "Board" support configurations for verifying the QEME * configs/qemu-i486 - "Board" support configurations for verifying the QEME
i486 port. i486 port.
* arch/arm/src/stm32/stm32_spi.c -- Correct base address of SPI3 (reported by
Uros Platise).
Documentation/NuttX.html
+25 -1
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@@ -1378,7 +1378,7 @@
<tr> <tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td> <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1"> <td bgcolor="#5eaee1">
<b>8052 Microcontroller</b> <b>Intel 8052 Microcontroller</b>
</td> </td>
</tr> </tr>
<tr> <tr>
@@ -1401,6 +1401,28 @@
</ul> </ul>
</td> </td>
</tr> </tr>
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">
<b>Intel 80486 (i486) Microprocessor</b>
</td>
</tr>
<tr>
<td><br></td>
<td>
<p>
<b>QEMU i486</b>.
This port uses the <a href="http://wiki.qemu.org/Main_Page">QEMU</a> i486 and the native
Linux, Cywgin, MinGW the GCC toolchain under Linux or Cygwin.
</p>
<ul>
<p>
<b>STATUS:</b>
This port is code complete but not yet tested. Stayed tuned.
</p>
</ul>
</td>
</tr>
<tr> <tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td> <td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1"> <td bgcolor="#5eaee1">
@@ -2126,6 +2148,8 @@ nuttx-5.19 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
arch/x86/include/qemu, arch/x86/src/i486, and arch/x86/src/qemu. arch/x86/include/qemu, arch/x86/src/i486, and arch/x86/src/qemu.
* configs/qemu-i486 - "Board" support configurations for verifying the QEME * configs/qemu-i486 - "Board" support configurations for verifying the QEME
i486 port. i486 port.
* arch/arm/src/stm32/stm32_spi.c -- Correct base address of SPI3 (reported by
Uros Platise).
pascal-2.1 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt; pascal-2.1 2011-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
arch/arm/src/stm32/stm32_spi.c
+1 -1
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@@ -303,7 +303,7 @@ static const struct spi_ops_s g_sp3iops =
static struct stm32_spidev_s g_spi3dev = static struct stm32_spidev_s g_spi3dev =
{ {
.spidev = { &g_sp3iops }, .spidev = { &g_sp3iops },
.spibase = STM32_SPI2_BASE, .spibase = STM32_SPI3_BASE,
.spiclock = STM32_PCLK1_FREQUENCY, .spiclock = STM32_PCLK1_FREQUENCY,
#ifdef CONFIG_STM32_SPI_INTERRUPTS #ifdef CONFIG_STM32_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI3, .spiirq = STM32_IRQ_SPI3,