Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-06-06 00:14:22 +08:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

Misc costmetic changes from review of last PR

Browse Source
This commit is contained in:
Gregory Nutt
2016-03-25 14:35:35 -06:00
parent b2205c7b66
commit 03a31fca25
4 changed files with 111 additions and 99 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/stm32l4/Kconfig
+1 -1
View File
@@ -416,7 +416,7 @@ config STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG
instruction, the debugger will disconnect, terminating the debug session. instruction, the debugger will disconnect, terminating the debug session.
config ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG config ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG
bool "Custom clock configuration" bool "Custom clock configuration"
default n default n
---help--- ---help---
Enables special, board-specific STM32 clock configuration. Enables special, board-specific STM32 clock configuration.
arch/arm/src/stm32l4/chip/stm32l4_rng.h
+77 -77
View File
@@ -1,77 +1,77 @@
/************************************************************************************ /************************************************************************************
* arch/arm/src/stm32/chip/stm32l4_rng.h * arch/arm/src/stm32/chip/stm32l4_rng.h
* *
* Copyright (C) 2012 Max Holtzberg. All rights reserved. * Copyright (C) 2012 Max Holtzberg. All rights reserved.
* Author: Max Holtzberg <mh@uvc.de> * Author: Max Holtzberg <mh@uvc.de>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in * notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the * the documentation and/or other materials provided with the
* distribution. * distribution.
* 3. Neither the name NuttX nor the names of its contributors may be * 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software * used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
************************************************************************************/ ************************************************************************************/
#ifndef __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H #ifndef __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H
#define __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H #define __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H
/************************************************************************************ /************************************************************************************
* Included Files * Included Files
************************************************************************************/ ************************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include "chip.h" #include "chip.h"
/************************************************************************************ /************************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ************************************************************************************/
/* Register Offsets *****************************************************************/ /* Register Offsets *****************************************************************/
#define STM32L4_RNG_CR_OFFSET 0x0000 /* RNG Control Register */ #define STM32L4_RNG_CR_OFFSET 0x0000 /* RNG Control Register */
#define STM32L4_RNG_SR_OFFSET 0x0004 /* RNG Status Register */ #define STM32L4_RNG_SR_OFFSET 0x0004 /* RNG Status Register */
#define STM32L4_RNG_DR_OFFSET 0x0008 /* RNG Data Register */ #define STM32L4_RNG_DR_OFFSET 0x0008 /* RNG Data Register */
/* Register Addresses ***************************************************************/ /* Register Addresses ***************************************************************/
#define STM32L4_RNG_CR (STM32L4_RNG_BASE+STM32L4_RNG_CR_OFFSET) #define STM32L4_RNG_CR (STM32L4_RNG_BASE+STM32L4_RNG_CR_OFFSET)
#define STM32L4_RNG_SR (STM32L4_RNG_BASE+STM32L4_RNG_SR_OFFSET) #define STM32L4_RNG_SR (STM32L4_RNG_BASE+STM32L4_RNG_SR_OFFSET)
#define STM32L4_RNG_DR (STM32L4_RNG_BASE+STM32L4_RNG_DR_OFFSET) #define STM32L4_RNG_DR (STM32L4_RNG_BASE+STM32L4_RNG_DR_OFFSET)
/* Register Bitfield Definitions ****************************************************/ /* Register Bitfield Definitions ****************************************************/
/* RNG Control Register */ /* RNG Control Register */
#define RNG_CR_RNGEN (1 << 2) /* Bit 2: RNG enable */ #define RNG_CR_RNGEN (1 << 2) /* Bit 2: RNG enable */
#define RNG_CR_IE (1 << 3) /* Bit 3: Interrupt enable */ #define RNG_CR_IE (1 << 3) /* Bit 3: Interrupt enable */
/* RNG Status Register */ /* RNG Status Register */
#define RNG_SR_DRDY (1 << 0) /* Bit 0: Data ready */ #define RNG_SR_DRDY (1 << 0) /* Bit 0: Data ready */
#define RNG_SR_CECS (1 << 1) /* Bit 1: Clock error current status */ #define RNG_SR_CECS (1 << 1) /* Bit 1: Clock error current status */
#define RNG_SR_SECS (1 << 2) /* Bit 2: Seed error current status */ #define RNG_SR_SECS (1 << 2) /* Bit 2: Seed error current status */
#define RNG_SR_CEIS (1 << 5) /* Bit 5: Clock error interrupt status */ #define RNG_SR_CEIS (1 << 5) /* Bit 5: Clock error interrupt status */
#define RNG_SR_SEIS (1 << 6) /* Bit 6: Seed error interrupt status */ #define RNG_SR_SEIS (1 << 6) /* Bit 6: Seed error interrupt status */
#endif /* __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H */ #endif /* __ARCH_ARM_STC_STM32_CHIP_STM32L4_RNG_H */
arch/arm/src/stm32l4/stm32l4_rng.c
+22 -11
View File
@@ -95,13 +95,17 @@ static const struct file_operations g_rngops =
#ifndef CONFIG_DISABLE_POLL #ifndef CONFIG_DISABLE_POLL
, 0 /* poll */ , 0 /* poll */
#endif #endif
#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
, 0 /* unlink */
#endif
}; };
/**************************************************************************** /****************************************************************************
* Private functions * Private functions
****************************************************************************/ ****************************************************************************/
static int stm32l4_rnginitialize() static int stm32l4_rnginitialize(void)
{ {
uint32_t regval; uint32_t regval;
@@ -131,7 +135,7 @@ static int stm32l4_rnginitialize()
return OK; return OK;
} }
static void stm32l4_rngenable() static void stm32l4_rngenable(void)
{ {
uint32_t regval; uint32_t regval;
@@ -142,8 +146,8 @@ static void stm32l4_rngenable()
putreg32(regval, STM32L4_RNG_CR); putreg32(regval, STM32L4_RNG_CR);
/* XXX see stm32l4_rngdisable(), below; if interrupts are disabled there, /* XXX see stm32l4_rngdisable(), below; if interrupts are disabled there,
then they should also be enabled here (also, they should not be enabled * then they should also be enabled here (also, they should not be enabled
in stm32l4_rnginitialize()) * in stm32l4_rnginitialize())
*/ */
} }
@@ -155,10 +159,10 @@ static void stm32l4_rngdisable()
putreg32(regval, STM32L4_RNG_CR); putreg32(regval, STM32L4_RNG_CR);
/* XXX I believe it's appropriate to also disable the interrupt, and clear /* XXX I believe it's appropriate to also disable the interrupt, and clear
any interrupt pending bit. This 'disable' is called from within the * any interrupt pending bit. This 'disable' is called from within the
interrupt handler when the buffer has been finally filled, but if there * interrupt handler when the buffer has been finally filled, but if there
is still another interrupt pending, then the handler will be entered one * is still another interrupt pending, then the handler will be entered one
last time, and attempt to touch some now-invalid objects * last time, and attempt to touch some now-invalid objects
*/ */
} }
@@ -170,14 +174,18 @@ static int stm32l4_rnginterrupt(int irq, void *context)
rngsr = getreg32(STM32L4_RNG_SR); rngsr = getreg32(STM32L4_RNG_SR);
if (rngsr & RNG_SR_CEIS) /* Check for clock error int stat */ if (rngsr & RNG_SR_CEIS) /* Check for clock error int stat */
{ {
/* clear it, we will try again. */ /* Clear it, we will try again. */
putreg32(rngsr & ~RNG_SR_CEIS, STM32L4_RNG_SR); putreg32(rngsr & ~RNG_SR_CEIS, STM32L4_RNG_SR);
return OK; return OK;
} }
if (rngsr & RNG_SR_SEIS) /* Check for seed error in int stat */ if (rngsr & RNG_SR_SEIS) /* Check for seed error in int stat */
{ {
uint32_t crval; uint32_t crval;
/* clear seed error, then disable/enable the rng and try again. */
/* Clear seed error, then disable/enable the rng and try again. */
putreg32(rngsr & ~RNG_SR_SEIS, STM32L4_RNG_SR); putreg32(rngsr & ~RNG_SR_SEIS, STM32L4_RNG_SR);
crval = getreg32(STM32L4_RNG_CR); crval = getreg32(STM32L4_RNG_CR);
crval &= ~RNG_CR_RNGEN; crval &= ~RNG_CR_RNGEN;
@@ -186,9 +194,11 @@ static int stm32l4_rnginterrupt(int irq, void *context)
putreg32(crval, STM32L4_RNG_CR); putreg32(crval, STM32L4_RNG_CR);
return OK; return OK;
} }
if (!(rngsr & RNG_SR_DRDY)) /* Data ready must be set */ if (!(rngsr & RNG_SR_DRDY)) /* Data ready must be set */
{ {
/* This random value is not valid, we will try again. */ /* This random value is not valid, we will try again. */
return OK; return OK;
} }
@@ -276,7 +286,8 @@ static ssize_t stm32l4_rngread(struct file *filep, char *buffer, size_t buflen)
sem_wait(&g_rngdev.rd_readsem); sem_wait(&g_rngdev.rd_readsem);
/* done with the operation semaphore */ /* Done with the operation semaphore */
sem_destroy(&g_rngdev.rd_readsem); sem_destroy(&g_rngdev.rd_readsem);
/* Free RNG via the device semaphore for next use */ /* Free RNG via the device semaphore for next use */
arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
+11 -10
View File
@@ -689,7 +689,9 @@ static void stm32l4_stdclockconfig(void)
/* XXX The choice of clock source to PLL (all three) is independent /* XXX The choice of clock source to PLL (all three) is independent
* of the sys clock source choice, review the STM32L4_BOARD_USEHSI * of the sys clock source choice, review the STM32L4_BOARD_USEHSI
* name; probably split it into two, one for PLL source and one * name; probably split it into two, one for PLL source and one
* for sys clock source */ * for sys clock source.
*/
#ifdef STM32L4_BOARD_USEHSI #ifdef STM32L4_BOARD_USEHSI
regval |= RCC_PLLCFG_PLLSRC_HSI; regval |= RCC_PLLCFG_PLLSRC_HSI;
#else /* if STM32L4_BOARD_USEHSE */ #else /* if STM32L4_BOARD_USEHSE */
@@ -743,7 +745,6 @@ static void stm32l4_stdclockconfig(void)
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0) while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0)
{ {
} }
#endif #endif
#ifdef CONFIG_STM32L4_SAI2PLL #ifdef CONFIG_STM32L4_SAI2PLL
@@ -754,8 +755,8 @@ static void stm32l4_stdclockconfig(void)
/* Enable the SAI2 PLL */ /* Enable the SAI2 PLL */
/* Set the PLL dividers and multipliers to configure the SAI2 PLL */ /* Set the PLL dividers and multipliers to configure the SAI2 PLL */
regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP |
| STM32L4_PLLSAI2CFG_PLLR); STM32L4_PLLSAI2CFG_PLLR);
#ifdef STM32L4_PLLSAI2CFG_PLLP_ENABLED #ifdef STM32L4_PLLSAI2CFG_PLLP_ENABLED
regval |= RCC_PLLSAI2CFG_PLLPEN; regval |= RCC_PLLSAI2CFG_PLLPEN;
@@ -777,7 +778,6 @@ static void stm32l4_stdclockconfig(void)
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0) while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0)
{ {
} }
#endif #endif
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
@@ -819,18 +819,19 @@ static void stm32l4_stdclockconfig(void)
#endif #endif
#if defined(STM32L4_USE_CLK48) #if defined(STM32L4_USE_CLK48)
/*XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source /* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better * and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages */ * warning messages
/*XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already *
* enabled ZZZ */ * XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
* enabled ZZZ
*/
regval = getreg32(STM32L4_RCC_CCIPR); regval = getreg32(STM32L4_RCC_CCIPR);
regval &= RCC_CCIPR_CLK48SEL_MASK; regval &= RCC_CCIPR_CLK48SEL_MASK;
regval |= STM32L4_CLK48_SEL; regval |= STM32L4_CLK48_SEL;
putreg32(regval, STM32L4_RCC_CCIPR); putreg32(regval, STM32L4_RCC_CCIPR);
#endif #endif
} }
} }
#endif #endif