Misc costmetic changes from review of last PR

arch/arm/src/stm32l4/stm32l4_rng.c

@@ -95,13 +95,17 @@ static const struct file_operations g_rngops =
 #ifndef CONFIG_DISABLE_POLL
   , 0              /* poll */
 #endif
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , 0              /* unlink */
+#endif
+
 };
 
 /****************************************************************************
  * Private functions
  ****************************************************************************/
 
-static int stm32l4_rnginitialize()
+static int stm32l4_rnginitialize(void)
 {
   uint32_t regval;
 
@@ -131,7 +135,7 @@ static int stm32l4_rnginitialize()
   return OK;
 }
 
-static void stm32l4_rngenable()
+static void stm32l4_rngenable(void)
 {
   uint32_t regval;
 
@@ -142,8 +146,8 @@ static void stm32l4_rngenable()
   putreg32(regval, STM32L4_RNG_CR);
 
   /* XXX see stm32l4_rngdisable(), below; if interrupts are disabled there,
-    then they should also be enabled here (also, they should not be enabled
+   * then they should also be enabled here (also, they should not be enabled
-    in stm32l4_rnginitialize())
+   * in stm32l4_rnginitialize())
    */
 }
 
@@ -155,10 +159,10 @@ static void stm32l4_rngdisable()
   putreg32(regval, STM32L4_RNG_CR);
 
   /* XXX I believe it's appropriate to also disable the interrupt, and clear
-    any interrupt pending bit.  This 'disable' is called from within the
+   * any interrupt pending bit.  This 'disable' is called from within the
-    interrupt handler when the buffer has been finally filled, but if there
+   * interrupt handler when the buffer has been finally filled, but if there
-    is still another interrupt pending, then the handler will be entered one
+   * is still another interrupt pending, then the handler will be entered one
-    last time, and attempt to touch some now-invalid objects
+   * last time, and attempt to touch some now-invalid objects
    */
 }
 
@@ -170,14 +174,18 @@ static int stm32l4_rnginterrupt(int irq, void *context)
   rngsr = getreg32(STM32L4_RNG_SR);
   if (rngsr & RNG_SR_CEIS) /* Check for clock error int stat */
     {
-      /* clear it, we will try again. */
+      /* Clear it, we will try again. */
+
       putreg32(rngsr & ~RNG_SR_CEIS, STM32L4_RNG_SR);
       return OK;
     }
+
   if (rngsr & RNG_SR_SEIS) /* Check for seed error in int stat */
     {
       uint32_t crval;
-      /* clear seed error, then disable/enable the rng and try again. */
+
+      /* Clear seed error, then disable/enable the rng and try again. */
+
       putreg32(rngsr & ~RNG_SR_SEIS, STM32L4_RNG_SR);
       crval = getreg32(STM32L4_RNG_CR);
       crval &= ~RNG_CR_RNGEN;
@@ -186,9 +194,11 @@ static int stm32l4_rnginterrupt(int irq, void *context)
       putreg32(crval, STM32L4_RNG_CR);
       return OK;
     }
+
   if (!(rngsr & RNG_SR_DRDY)) /* Data ready must be set */
     {
       /* This random value is not valid, we will try again. */
+
       return OK;
     }
 
@@ -276,7 +286,8 @@ static ssize_t stm32l4_rngread(struct file *filep, char *buffer, size_t buflen)
 
       sem_wait(&g_rngdev.rd_readsem);
 
-      /* done with the operation semaphore */
+      /* Done with the operation semaphore */
+
       sem_destroy(&g_rngdev.rd_readsem);
 
       /* Free RNG via the device semaphore for next use */

arch/arm/src/stm32l4/stm32l4x6xx_rcc.c

@@ -689,7 +689,9 @@ static void stm32l4_stdclockconfig(void)
       /* XXX The choice of clock source to PLL (all three) is independent
        * of the sys clock source choice, review the STM32L4_BOARD_USEHSI
        * name; probably split it into two, one for PLL source and one
-       * for sys clock source */
+       * for sys clock source.
+       */
+
 #ifdef STM32L4_BOARD_USEHSI
       regval |= RCC_PLLCFG_PLLSRC_HSI;
 #else /* if STM32L4_BOARD_USEHSE */
@@ -743,7 +745,6 @@ static void stm32l4_stdclockconfig(void)
       while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0)
         {
         }
-
 #endif
 
 #ifdef CONFIG_STM32L4_SAI2PLL
@@ -754,8 +755,8 @@ static void stm32l4_stdclockconfig(void)
       /* Enable the SAI2 PLL */
       /* Set the PLL dividers and multipliers to configure the SAI2 PLL */
 
-      regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP
+      regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP |
-                 | STM32L4_PLLSAI2CFG_PLLR);
+                STM32L4_PLLSAI2CFG_PLLR);
 
 #ifdef STM32L4_PLLSAI2CFG_PLLP_ENABLED
       regval |= RCC_PLLSAI2CFG_PLLPEN;
@@ -777,7 +778,6 @@ static void stm32l4_stdclockconfig(void)
       while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0)
         {
         }
-
 #endif
 
       /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
@@ -819,18 +819,19 @@ static void stm32l4_stdclockconfig(void)
 #endif
 
 #if defined(STM32L4_USE_CLK48)
-      /*XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
+      /* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
        * and then we can also do away with STM32L4_USE_CLK48, and give better
-       * warning messages */
+       * warning messages
-      /*XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
+       *
-       * enabled ZZZ */
+       * XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
+       * enabled ZZZ
+       */
 
       regval  = getreg32(STM32L4_RCC_CCIPR);
       regval &= RCC_CCIPR_CLK48SEL_MASK;
       regval |= STM32L4_CLK48_SEL;
       putreg32(regval, STM32L4_RCC_CCIPR);
 #endif
-
     }
 }
 #endif