diff --git a/boards/arm/stm32/axoloti/include/board.h b/boards/arm/stm32/axoloti/include/board.h index a977016a6a5..ab47a71fc11 100644 --- a/boards/arm/stm32/axoloti/include/board.h +++ b/boards/arm/stm32/axoloti/include/board.h @@ -117,7 +117,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/b-g431b-esc1/include/board.h b/boards/arm/stm32/b-g431b-esc1/include/board.h index cb0ba422524..6a09afebd03 100644 --- a/boards/arm/stm32/b-g431b-esc1/include/board.h +++ b/boards/arm/stm32/b-g431b-esc1/include/board.h @@ -109,7 +109,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB1 clock (PCLK1) is HCLK (170MHz) */ diff --git a/boards/arm/stm32/b-g474e-dpow1/include/board.h b/boards/arm/stm32/b-g474e-dpow1/include/board.h index 3d7c988f1f2..4b4f25788a0 100644 --- a/boards/arm/stm32/b-g474e-dpow1/include/board.h +++ b/boards/arm/stm32/b-g474e-dpow1/include/board.h @@ -109,7 +109,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB1 clock (PCLK1) is HCLK (170MHz) */ diff --git a/boards/arm/stm32/clicker2-stm32/include/board.h b/boards/arm/stm32/clicker2-stm32/include/board.h index 53d7c5ac76c..dd9205db522 100644 --- a/boards/arm/stm32/clicker2-stm32/include/board.h +++ b/boards/arm/stm32/clicker2-stm32/include/board.h @@ -127,7 +127,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/cloudctrl/include/board.h b/boards/arm/stm32/cloudctrl/include/board.h index f185ce0e55f..9679cfa30db 100644 --- a/boards/arm/stm32/cloudctrl/include/board.h +++ b/boards/arm/stm32/cloudctrl/include/board.h @@ -83,7 +83,6 @@ #define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/fire-stm32v2/include/board.h b/boards/arm/stm32/fire-stm32v2/include/board.h index 669ff268aec..262346cb622 100644 --- a/boards/arm/stm32/fire-stm32v2/include/board.h +++ b/boards/arm/stm32/fire-stm32v2/include/board.h @@ -72,7 +72,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/hymini-stm32v/include/board.h b/boards/arm/stm32/hymini-stm32v/include/board.h index 5f146b56e87..849d8314485 100644 --- a/boards/arm/stm32/hymini-stm32v/include/board.h +++ b/boards/arm/stm32/hymini-stm32v/include/board.h @@ -56,7 +56,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/maple/include/board.h b/boards/arm/stm32/maple/include/board.h index 825d14a72cc..da1979d59d8 100644 --- a/boards/arm/stm32/maple/include/board.h +++ b/boards/arm/stm32/maple/include/board.h @@ -79,7 +79,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/mikroe-stm32f4/include/board.h b/boards/arm/stm32/mikroe-stm32f4/include/board.h index 2b39d9fd5fc..b5df55fbe05 100644 --- a/boards/arm/stm32/mikroe-stm32f4/include/board.h +++ b/boards/arm/stm32/mikroe-stm32f4/include/board.h @@ -102,7 +102,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/nucleo-f103rb/include/board.h b/boards/arm/stm32/nucleo-f103rb/include/board.h index 8aa99c6be02..23e3b7e2d4d 100644 --- a/boards/arm/stm32/nucleo-f103rb/include/board.h +++ b/boards/arm/stm32/nucleo-f103rb/include/board.h @@ -74,7 +74,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/nucleo-f207zg/include/board.h b/boards/arm/stm32/nucleo-f207zg/include/board.h index 23fb2256e33..ec5422481d2 100644 --- a/boards/arm/stm32/nucleo-f207zg/include/board.h +++ b/boards/arm/stm32/nucleo-f207zg/include/board.h @@ -93,7 +93,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/2 (25MHz) */ diff --git a/boards/arm/stm32/nucleo-f302r8/include/board.h b/boards/arm/stm32/nucleo-f302r8/include/board.h index bd8a9d7b310..d90ade45fa4 100644 --- a/boards/arm/stm32/nucleo-f302r8/include/board.h +++ b/boards/arm/stm32/nucleo-f302r8/include/board.h @@ -74,7 +74,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/nucleo-f303re/include/board.h b/boards/arm/stm32/nucleo-f303re/include/board.h index 2d76eeb389d..7f750307ea7 100644 --- a/boards/arm/stm32/nucleo-f303re/include/board.h +++ b/boards/arm/stm32/nucleo-f303re/include/board.h @@ -93,7 +93,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/nucleo-f303ze/include/board.h b/boards/arm/stm32/nucleo-f303ze/include/board.h index b9ef245daba..42de38701a0 100644 --- a/boards/arm/stm32/nucleo-f303ze/include/board.h +++ b/boards/arm/stm32/nucleo-f303ze/include/board.h @@ -75,7 +75,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/nucleo-f334r8/include/board.h b/boards/arm/stm32/nucleo-f334r8/include/board.h index 7a0565c17fe..d6a1098e040 100644 --- a/boards/arm/stm32/nucleo-f334r8/include/board.h +++ b/boards/arm/stm32/nucleo-f334r8/include/board.h @@ -74,7 +74,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/nucleo-f410rb/include/board.h b/boards/arm/stm32/nucleo-f410rb/include/board.h index 3b853883d47..f789b93650c 100644 --- a/boards/arm/stm32/nucleo-f410rb/include/board.h +++ b/boards/arm/stm32/nucleo-f410rb/include/board.h @@ -77,7 +77,7 @@ * * VCO input frequency = PLL input clock frequency / PLLM, * 2 <= PLLM <= 63 - * VCO output frequency = VCO input frequency × PLLN, + * VCO output frequency = VCO input frequency � PLLN, * 50 <= PLLN <= 432 * PLL output clock frequency = VCO frequency / PLLP, * PLLP = 2, 4, 6, or 8 @@ -110,7 +110,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/2 (50MHz) */ diff --git a/boards/arm/stm32/nucleo-f412zg/include/board.h b/boards/arm/stm32/nucleo-f412zg/include/board.h index bc1f785c9f1..6cccb250e17 100644 --- a/boards/arm/stm32/nucleo-f412zg/include/board.h +++ b/boards/arm/stm32/nucleo-f412zg/include/board.h @@ -90,7 +90,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/2 (48MHz) */ diff --git a/boards/arm/stm32/nucleo-f429zi/include/board.h b/boards/arm/stm32/nucleo-f429zi/include/board.h index fd727908e27..7d5209469e6 100644 --- a/boards/arm/stm32/nucleo-f429zi/include/board.h +++ b/boards/arm/stm32/nucleo-f429zi/include/board.h @@ -100,7 +100,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) diff --git a/boards/arm/stm32/nucleo-f446re/include/board.h b/boards/arm/stm32/nucleo-f446re/include/board.h index 3c1ef358d75..78867171336 100644 --- a/boards/arm/stm32/nucleo-f446re/include/board.h +++ b/boards/arm/stm32/nucleo-f446re/include/board.h @@ -118,7 +118,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/2 (52MHz) */ diff --git a/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f401re.h b/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f401re.h index d4f17d3a12c..62b59073a26 100644 --- a/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f401re.h +++ b/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f401re.h @@ -119,7 +119,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/2 (42MHz) */ diff --git a/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f411re.h b/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f411re.h index 4057b59c0d9..aeaab87b443 100644 --- a/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f411re.h +++ b/boards/arm/stm32/nucleo-f4x1re/include/nucleo-f411re.h @@ -116,7 +116,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/2 (52MHz) */ diff --git a/boards/arm/stm32/nucleo-g431rb/include/board.h b/boards/arm/stm32/nucleo-g431rb/include/board.h index ae7ea30204e..05b0d2e9b7c 100644 --- a/boards/arm/stm32/nucleo-g431rb/include/board.h +++ b/boards/arm/stm32/nucleo-g431rb/include/board.h @@ -109,7 +109,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB1 clock (PCLK1) is HCLK (170MHz) */ diff --git a/boards/arm/stm32/nucleo-l152re/include/board.h b/boards/arm/stm32/nucleo-l152re/include/board.h index ac79463f877..d1e29b4efe6 100644 --- a/boards/arm/stm32/nucleo-l152re/include/board.h +++ b/boards/arm/stm32/nucleo-l152re/include/board.h @@ -120,7 +120,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (32MHz) */ diff --git a/boards/arm/stm32/olimex-stm32-e407/include/board.h b/boards/arm/stm32/olimex-stm32-e407/include/board.h index 04c1b173d30..9bf3f76c50b 100644 --- a/boards/arm/stm32/olimex-stm32-e407/include/board.h +++ b/boards/arm/stm32/olimex-stm32-e407/include/board.h @@ -114,7 +114,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/olimex-stm32-h405/include/board.h b/boards/arm/stm32/olimex-stm32-h405/include/board.h index d287abee6b9..7e6c69b6cfb 100644 --- a/boards/arm/stm32/olimex-stm32-h405/include/board.h +++ b/boards/arm/stm32/olimex-stm32-h405/include/board.h @@ -77,7 +77,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ diff --git a/boards/arm/stm32/olimex-stm32-h407/include/board.h b/boards/arm/stm32/olimex-stm32-h407/include/board.h index 928c74ee775..dd963cf5509 100644 --- a/boards/arm/stm32/olimex-stm32-h407/include/board.h +++ b/boards/arm/stm32/olimex-stm32-h407/include/board.h @@ -114,7 +114,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/olimex-stm32-p107/include/board.h b/boards/arm/stm32/olimex-stm32-p107/include/board.h index b4292a89c3b..cba0b1219ec 100644 --- a/boards/arm/stm32/olimex-stm32-p107/include/board.h +++ b/boards/arm/stm32/olimex-stm32-p107/include/board.h @@ -65,7 +65,6 @@ #define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/olimex-stm32-p207/include/board.h b/boards/arm/stm32/olimex-stm32-p207/include/board.h index af8c80838a7..7475c68c88c 100644 --- a/boards/arm/stm32/olimex-stm32-p207/include/board.h +++ b/boards/arm/stm32/olimex-stm32-p207/include/board.h @@ -77,7 +77,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ diff --git a/boards/arm/stm32/olimex-stm32-p407/include/board.h b/boards/arm/stm32/olimex-stm32-p407/include/board.h index 14893168c99..8662da107e3 100644 --- a/boards/arm/stm32/olimex-stm32-p407/include/board.h +++ b/boards/arm/stm32/olimex-stm32-p407/include/board.h @@ -74,7 +74,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/olimexino-stm32/include/board.h b/boards/arm/stm32/olimexino-stm32/include/board.h index 95df7d6f0a6..aca461ebf0a 100644 --- a/boards/arm/stm32/olimexino-stm32/include/board.h +++ b/boards/arm/stm32/olimexino-stm32/include/board.h @@ -73,7 +73,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/omnibusf4/include/board.h b/boards/arm/stm32/omnibusf4/include/board.h index 0ccaec9c300..fcbf53c8f80 100644 --- a/boards/arm/stm32/omnibusf4/include/board.h +++ b/boards/arm/stm32/omnibusf4/include/board.h @@ -117,7 +117,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/photon/include/board.h b/boards/arm/stm32/photon/include/board.h index 4d2920a0e36..6219989f367 100644 --- a/boards/arm/stm32/photon/include/board.h +++ b/boards/arm/stm32/photon/include/board.h @@ -117,7 +117,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ diff --git a/boards/arm/stm32/shenzhou/include/board.h b/boards/arm/stm32/shenzhou/include/board.h index dce12c0aeac..1bb317b2c92 100644 --- a/boards/arm/stm32/shenzhou/include/board.h +++ b/boards/arm/stm32/shenzhou/include/board.h @@ -67,7 +67,6 @@ #define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/stm3210e-eval/include/board.h b/boards/arm/stm32/stm3210e-eval/include/board.h index f1220d60e83..713c39d1c2e 100644 --- a/boards/arm/stm32/stm3210e-eval/include/board.h +++ b/boards/arm/stm32/stm3210e-eval/include/board.h @@ -65,7 +65,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/stm3220g-eval/include/board.h b/boards/arm/stm32/stm3220g-eval/include/board.h index 0e1422a4042..a500e0f319a 100644 --- a/boards/arm/stm32/stm3220g-eval/include/board.h +++ b/boards/arm/stm32/stm3220g-eval/include/board.h @@ -113,7 +113,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (30MHz) */ diff --git a/boards/arm/stm32/stm3240g-eval/include/board.h b/boards/arm/stm32/stm3240g-eval/include/board.h index 68d48a898c6..9a9b69cd6ea 100644 --- a/boards/arm/stm32/stm3240g-eval/include/board.h +++ b/boards/arm/stm32/stm3240g-eval/include/board.h @@ -114,7 +114,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/stm32_tiny/include/board.h b/boards/arm/stm32/stm32_tiny/include/board.h index f53b5d6cbd3..f76b96fd774 100644 --- a/boards/arm/stm32/stm32_tiny/include/board.h +++ b/boards/arm/stm32/stm32_tiny/include/board.h @@ -62,7 +62,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/stm32butterfly2/include/board.h b/boards/arm/stm32/stm32butterfly2/include/board.h index 9dd0d633d91..00759016a47 100644 --- a/boards/arm/stm32/stm32butterfly2/include/board.h +++ b/boards/arm/stm32/stm32butterfly2/include/board.h @@ -79,7 +79,6 @@ #define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* USB clock output is 47.9232MHz */ diff --git a/boards/arm/stm32/stm32f103-minimum/include/board.h b/boards/arm/stm32/stm32f103-minimum/include/board.h index 3e22d8fe1ff..1e02e7f6227 100644 --- a/boards/arm/stm32/stm32f103-minimum/include/board.h +++ b/boards/arm/stm32/stm32f103-minimum/include/board.h @@ -59,7 +59,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/stm32f334-disco/include/board.h b/boards/arm/stm32/stm32f334-disco/include/board.h index 92437a552ef..f2fc0209546 100644 --- a/boards/arm/stm32/stm32f334-disco/include/board.h +++ b/boards/arm/stm32/stm32f334-disco/include/board.h @@ -74,7 +74,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/stm32f3discovery/include/board.h b/boards/arm/stm32/stm32f3discovery/include/board.h index f41b4b70ce2..39ced07e589 100644 --- a/boards/arm/stm32/stm32f3discovery/include/board.h +++ b/boards/arm/stm32/stm32f3discovery/include/board.h @@ -73,7 +73,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/stm32f411-minimum/include/board.h b/boards/arm/stm32/stm32f411-minimum/include/board.h index 2cf29b7d924..cdb7be09eff 100644 --- a/boards/arm/stm32/stm32f411-minimum/include/board.h +++ b/boards/arm/stm32/stm32f411-minimum/include/board.h @@ -109,7 +109,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (24MHz) */ diff --git a/boards/arm/stm32/stm32f411e-disco/include/board.h b/boards/arm/stm32/stm32f411e-disco/include/board.h index 3cf9ab8e7a3..7405e06e1d5 100644 --- a/boards/arm/stm32/stm32f411e-disco/include/board.h +++ b/boards/arm/stm32/stm32f411e-disco/include/board.h @@ -130,7 +130,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (24MHz) */ diff --git a/boards/arm/stm32/stm32f429i-disco/include/board.h b/boards/arm/stm32/stm32f429i-disco/include/board.h index 8851932d0a9..2eebe37ca73 100644 --- a/boards/arm/stm32/stm32f429i-disco/include/board.h +++ b/boards/arm/stm32/stm32f429i-disco/include/board.h @@ -102,7 +102,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/stm32f4discovery/include/board.h b/boards/arm/stm32/stm32f4discovery/include/board.h index 63177e58150..67321084158 100644 --- a/boards/arm/stm32/stm32f4discovery/include/board.h +++ b/boards/arm/stm32/stm32f4discovery/include/board.h @@ -103,7 +103,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ diff --git a/boards/arm/stm32/stm32ldiscovery/include/board.h b/boards/arm/stm32/stm32ldiscovery/include/board.h index bcb854ed2b0..7693a4091b1 100644 --- a/boards/arm/stm32/stm32ldiscovery/include/board.h +++ b/boards/arm/stm32/stm32ldiscovery/include/board.h @@ -121,7 +121,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (32MHz) */ diff --git a/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f103vct6.h b/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f103vct6.h index 03264859e54..7ddbf73be0d 100644 --- a/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f103vct6.h +++ b/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f103vct6.h @@ -63,7 +63,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f107vct6.h b/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f107vct6.h index a3fee35407d..663fc0589fe 100644 --- a/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f107vct6.h +++ b/boards/arm/stm32/viewtool-stm32f107/include/board-stm32f107vct6.h @@ -64,7 +64,6 @@ #define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB2 clock (PCLK2) is HCLK (72MHz) */ diff --git a/boards/arm/stm32f0l0g0/b-l072z-lrwan1/include/board.h b/boards/arm/stm32f0l0g0/b-l072z-lrwan1/include/board.h index 59279db8f3f..2540d660511 100644 --- a/boards/arm/stm32f0l0g0/b-l072z-lrwan1/include/board.h +++ b/boards/arm/stm32f0l0g0/b-l072z-lrwan1/include/board.h @@ -71,7 +71,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB2 clock (PCLK2) is HCLK (32MHz) */ diff --git a/boards/arm/stm32f0l0g0/nucleo-f072rb/include/board.h b/boards/arm/stm32f0l0g0/nucleo-f072rb/include/board.h index 8119a800843..f42c986e0fa 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f072rb/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-f072rb/include/board.h @@ -123,7 +123,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK (48MHz) */ diff --git a/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h b/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h index ed300bb1a4f..506088716ba 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-f091rc/include/board.h @@ -123,7 +123,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK (48MHz) */ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h b/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h index 9b4d2a57c19..aa6a3b4654f 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h @@ -122,7 +122,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB1 clock (PCLK1) is HCLK (64 MHz) */ diff --git a/boards/arm/stm32f0l0g0/nucleo-g071rb/include/board.h b/boards/arm/stm32f0l0g0/nucleo-g071rb/include/board.h index af3087c7b1f..67bbbbf95b4 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g071rb/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-g071rb/include/board.h @@ -110,7 +110,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB1 clock (PCLK1) is HCLK/2 (20MHz) */ diff --git a/boards/arm/stm32f0l0g0/nucleo-l073rz/include/board.h b/boards/arm/stm32f0l0g0/nucleo-l073rz/include/board.h index 41980d0f7df..2a7629db65a 100644 --- a/boards/arm/stm32f0l0g0/nucleo-l073rz/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-l073rz/include/board.h @@ -72,7 +72,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* APB2 clock (PCLK2) is HCLK (32MHz) */ diff --git a/boards/arm/stm32f0l0g0/stm32f051-discovery/include/board.h b/boards/arm/stm32f0l0g0/stm32f051-discovery/include/board.h index be77183d9ef..4c2413c1570 100644 --- a/boards/arm/stm32f0l0g0/stm32f051-discovery/include/board.h +++ b/boards/arm/stm32f0l0g0/stm32f051-discovery/include/board.h @@ -123,7 +123,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK (48MHz) */ diff --git a/boards/arm/stm32f0l0g0/stm32f072-discovery/include/board.h b/boards/arm/stm32f0l0g0/stm32f072-discovery/include/board.h index a8f2d988c84..ba8f2134782 100644 --- a/boards/arm/stm32f0l0g0/stm32f072-discovery/include/board.h +++ b/boards/arm/stm32f0l0g0/stm32f072-discovery/include/board.h @@ -123,7 +123,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK (48MHz) */ diff --git a/boards/arm/stm32f7/nucleo-144/include/board.h b/boards/arm/stm32f7/nucleo-144/include/board.h index 4959ccf4b1a..e7c15d7ae09 100644 --- a/boards/arm/stm32f7/nucleo-144/include/board.h +++ b/boards/arm/stm32f7/nucleo-144/include/board.h @@ -160,7 +160,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ diff --git a/boards/arm/stm32f7/stm32f746-ws/include/board.h b/boards/arm/stm32f7/stm32f746-ws/include/board.h index 1257a06ea4f..5f552060efe 100644 --- a/boards/arm/stm32f7/stm32f746-ws/include/board.h +++ b/boards/arm/stm32f7/stm32f746-ws/include/board.h @@ -177,7 +177,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ diff --git a/boards/arm/stm32f7/stm32f746g-disco/include/board.h b/boards/arm/stm32f7/stm32f746g-disco/include/board.h index e4a19f0bd31..44de107483b 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/include/board.h +++ b/boards/arm/stm32f7/stm32f746g-disco/include/board.h @@ -202,7 +202,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ diff --git a/boards/arm/stm32f7/stm32f769i-disco/include/board.h b/boards/arm/stm32f7/stm32f769i-disco/include/board.h index 8bbffedb6af..c9d96c95999 100644 --- a/boards/arm/stm32f7/stm32f769i-disco/include/board.h +++ b/boards/arm/stm32f7/stm32f769i-disco/include/board.h @@ -200,7 +200,6 @@ #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ diff --git a/boards/arm/stm32h7/nucleo-h743zi/include/board.h b/boards/arm/stm32h7/nucleo-h743zi/include/board.h index 02b57e6f804..9d81594d7e4 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/include/board.h +++ b/boards/arm/stm32h7/nucleo-h743zi/include/board.h @@ -183,7 +183,6 @@ #define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */ #define STM32_ACLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */ #define STM32_HCLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */ -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ diff --git a/boards/arm/stm32h7/nucleo-h743zi2/include/board.h b/boards/arm/stm32h7/nucleo-h743zi2/include/board.h index c97f27363c5..2046c389be2 100644 --- a/boards/arm/stm32h7/nucleo-h743zi2/include/board.h +++ b/boards/arm/stm32h7/nucleo-h743zi2/include/board.h @@ -165,7 +165,6 @@ #define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */ #define STM32_ACLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */ #define STM32_HCLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */ -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ diff --git a/boards/arm/stm32h7/stm32h747i-disco/include/board.h b/boards/arm/stm32h7/stm32h747i-disco/include/board.h index ac378b79d4e..7a42cc9c3bc 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/include/board.h +++ b/boards/arm/stm32h7/stm32h747i-disco/include/board.h @@ -175,7 +175,6 @@ #define STM32_RCC_D1CFGR_HPRE RCC_D1CFGR_HPRE_SYSCLKd2 /* HCLK = SYSCLK / 2 */ #define STM32_ACLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* ACLK in D1, HCLK3 in D1 */ #define STM32_HCLK_FREQUENCY (STM32_CPUCLK_FREQUENCY / 2) /* HCLK in D2, HCLK4 in D3 */ -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ /* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */