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driver/mmcsd: add option to limit block count in multiple-block transfer mode.

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Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
This commit is contained in:
Xu Xingliang
2021-12-21 19:55:38 +08:00
committed by Xiang Xiao
parent d611e2d99b
commit 021363f1db
66 changed files with 160 additions and 147 deletions
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boards/arm/stm32/olimex-stm32-p407/README.txt
+1 -1
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@@ -103,7 +103,7 @@ microSD Card Interface
# CONFIG_MMCSD_MMCSUPPORT is not set : Interferes with some SD cards
# CONFIG_MMCSD_SPI is not set : No SPI-based MMC/SD support
CONFIG_MMCSD_SDIO=y : SDIO-based MMC/SD support
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y : Disable to keep things simple
CONFIG_MMCSD_MULTIBLOCK_LIMIT=1 : Disable to keep things simple
CONFIG_SDIO_DMA=y : Use SDIO DMA
# CONFIG_SDIO_BLOCKSETUP is not set : (not implemented)
boards/arm/stm32/stm3220g-eval/README.txt
+2 -2
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@@ -777,9 +777,9 @@ Where <subdir> is one of the following:
"If you use a large I/O buffer to access the file system, then the
MMCSD driver will perform multiple block SD transfers. With DMA
ON, this seems to result in CRC errors detected by the hardware
during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_DISABLE=y"
during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_LIMIT=1"
For this reason, CONFIG_MMCSD_MULTIBLOCK_DISABLE=y appears in the defconfig
For this reason, CONFIG_MMCSD_MULTIBLOCK_LIMIT=1 appears in the defconfig
file.
7. Another DMA-related concern. I see this statement in the reference
boards/arm/stm32/stm3220g-eval/configs/nsh/defconfig
+1 -1
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@@ -29,7 +29,7 @@ CONFIG_I2C_POLLED=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_MULTIBLOCK_LIMIT=1
CONFIG_MTD=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
boards/arm/stm32/stm3220g-eval/configs/nsh2/defconfig
+1 -1
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@@ -34,7 +34,7 @@ CONFIG_I2C_POLLED=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_MULTIBLOCK_LIMIT=1
CONFIG_MMCSD_SDIO=y
CONFIG_MTD=y
CONFIG_NET=y
boards/arm/stm32/stm3220g-eval/configs/nxwm/defconfig
+1 -1
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@@ -38,7 +38,7 @@ CONFIG_LCD=y
CONFIG_LCD_MAXCONTRAST=1
CONFIG_LCD_NOGETRUN=y
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_MULTIBLOCK_LIMIT=1
CONFIG_MQ_MAXMSGSIZE=64
CONFIG_NET=y
CONFIG_NETINIT_NOMAC=y
boards/arm/stm32/stm3240g-eval/README.txt
+2 -2
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@@ -1124,9 +1124,9 @@ Where <subdir> is one of the following:
"If you use a large I/O buffer to access the file system, then the
MMCSD driver will perform multiple block SD transfers. With DMA
ON, this seems to result in CRC errors detected by the hardware
during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_DISABLE=y"
during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_LIMIT=1"
For this reason, CONFIG_MMCSD_MULTIBLOCK_DISABLE=y appears in the defconfig
For this reason, CONFIG_MMCSD_MULTIBLOCK_LIMIT=1 appears in the defconfig
file.
7. Another DMA-related concern. I see this statement in the reference
boards/arm/stm32/stm3240g-eval/configs/nsh2/defconfig
+1 -1
View File
@@ -35,7 +35,7 @@ CONFIG_I2C_POLLED=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_MULTIBLOCK_LIMIT=1
CONFIG_MMCSD_SDIO=y
CONFIG_MTD=y
CONFIG_NET=y
boards/arm/stm32/stm32f4discovery/configs/ipv6/defconfig
+1 -1
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@@ -34,7 +34,7 @@ CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_HOSTNAME="STM32F4-Discovery"
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_MULTIBLOCK_LIMIT=1
CONFIG_MMCSD_SDIO=y
CONFIG_NET=y
CONFIG_NETINIT_IPv6NETMASK_8=0xff80
boards/arm/stm32/stm32f4discovery/configs/netnsh/defconfig
+1 -1
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@@ -34,7 +34,7 @@ CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_HOSTNAME="STM32F4-Discovery"
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_MULTIBLOCK_LIMIT=1
CONFIG_MMCSD_SDIO=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y