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arch/arm/src/efm32: Support for common vector handling is forced for all EFM32 chips. Yes the architecture provides support for the old-style dedicated vector handling which can never be compiled. Furthermore, the old-style dedicated vector handling is deprecated in favor of common vector handling. The commit resolves this inconsistency be removing support for the dedicated vector handling from the EFM32 architecture support.

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This commit is contained in:
Gregory Nutt
2018-06-19 13:37:00 -06:00
parent e4e530e1bf
commit 01b740c66b
17 changed files with 185 additions and 548 deletions
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arch/arm/include/efm32/efm32g_irq.h
+33 -32
View File
@@ -57,39 +57,40 @@
*
* External interrupts (vectors >= 16)
*/
/* IRQ# Source */
#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS+ 0) /* 0 DMA */
#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS+ 1) /* 1 GPIO_EVEN */
#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS+ 2) /* 2 TIMER0 */
#define EFM32_IRQ_USART0_RX (EFM32_IRQ_INTERRUPTS+ 3) /* 3 USART0_RX */
#define EFM32_IRQ_USART0_TX (EFM32_IRQ_INTERRUPTS+ 4) /* 4 USART0_TX */
#define EFM32_IRQ_ACMP (EFM32_IRQ_INTERRUPTS+ 5) /* 5 ACMP0/ACMP1 */
#define EFM32_IRQ_ADC0 (EFM32_IRQ_INTERRUPTS+ 6) /* 6 ADC0 */
#define EFM32_IRQ_DAC0 (EFM32_IRQ_INTERRUPTS+ 7) /* 7 DAC0 */
#define EFM32_IRQ_I2C0 (EFM32_IRQ_INTERRUPTS+ 8) /* 8 I2C0 */
#define EFM32_IRQ_GPIO_ODD (EFM32_IRQ_INTERRUPTS+ 9) /* 9 GPIO_ODD */
#define EFM32_IRQ_TIMER1 (EFM32_IRQ_INTERRUPTS+10) /* 10 TIMER1 */
#define EFM32_IRQ_TIMER2 (EFM32_IRQ_INTERRUPTS+11) /* 11 TIMER2 */
#define EFM32_IRQ_USART1_RX (EFM32_IRQ_INTERRUPTS+12) /* 12 USART1_RX */
#define EFM32_IRQ_USART1_TX (EFM32_IRQ_INTERRUPTS+13) /* 13 USART1_TX */
#define EFM32_IRQ_USART2_RX (EFM32_IRQ_INTERRUPTS+14) /* 14 USART2_RX */
#define EFM32_IRQ_USART2_TX (EFM32_IRQ_INTERRUPTS+15) /* 15 USART2_TX */
#define EFM32_IRQ_UART0_RX (EFM32_IRQ_INTERRUPTS+16) /* 16 UART0_RX */
#define EFM32_IRQ_UART0_TX (EFM32_IRQ_INTERRUPTS+17) /* 17 UART0_TX */
#define EFM32_IRQ_LEUART0 (EFM32_IRQ_INTERRUPTS+18) /* 18 LEUART0 */
#define EFM32_IRQ_LEUART1 (EFM32_IRQ_INTERRUPTS+19) /* 19 LEUART1 */
#define EFM32_IRQ_LETIMER0 (EFM32_IRQ_INTERRUPTS+20) /* 20 LETIMER0 */
#define EFM32_IRQ_PCNT0 (EFM32_IRQ_INTERRUPTS+21) /* 21 PCNT0 */
#define EFM32_IRQ_PCNT1 (EFM32_IRQ_INTERRUPTS+22) /* 22 PCNT1 */
#define EFM32_IRQ_PCNT2 (EFM32_IRQ_INTERRUPTS+23) /* 23 PCNT2 */
#define EFM32_IRQ_RTC (EFM32_IRQ_INTERRUPTS+24) /* 24 RTC */
#define EFM32_IRQ_CMU (EFM32_IRQ_INTERRUPTS+25) /* 25 CMU */
#define EFM32_IRQ_VCMP (EFM32_IRQ_INTERRUPTS+26) /* 26 VCMP */
#define EFM32_IRQ_LCD (EFM32_IRQ_INTERRUPTS+27) /* 27 LCD */
#define EFM32_IRQ_MSC (EFM32_IRQ_INTERRUPTS+28) /* 28 MSC */
#define EFM32_IRQ_AES (EFM32_IRQ_INTERRUPTS+29) /* 29 AES */
/* IRQ# Source */
#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS + 0) /* 0 DMA */
#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS + 1) /* 1 GPIO_EVEN */
#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS + 2) /* 2 TIMER0 */
#define EFM32_IRQ_USART0_RX (EFM32_IRQ_INTERRUPTS + 3) /* 3 USART0_RX */
#define EFM32_IRQ_USART0_TX (EFM32_IRQ_INTERRUPTS + 4) /* 4 USART0_TX */
#define EFM32_IRQ_ACMP (EFM32_IRQ_INTERRUPTS + 5) /* 5 ACMP0/ACMP1 */
#define EFM32_IRQ_ADC0 (EFM32_IRQ_INTERRUPTS + 6) /* 6 ADC0 */
#define EFM32_IRQ_DAC0 (EFM32_IRQ_INTERRUPTS + 7) /* 7 DAC0 */
#define EFM32_IRQ_I2C0 (EFM32_IRQ_INTERRUPTS + 8) /* 8 I2C0 */
#define EFM32_IRQ_GPIO_ODD (EFM32_IRQ_INTERRUPTS + 9) /* 9 GPIO_ODD */
#define EFM32_IRQ_TIMER1 (EFM32_IRQ_INTERRUPTS + 10) /* 10 TIMER1 */
#define EFM32_IRQ_TIMER2 (EFM32_IRQ_INTERRUPTS + 11) /* 11 TIMER2 */
#define EFM32_IRQ_USART1_RX (EFM32_IRQ_INTERRUPTS + 12) /* 12 USART1_RX */
#define EFM32_IRQ_USART1_TX (EFM32_IRQ_INTERRUPTS + 13) /* 13 USART1_TX */
#define EFM32_IRQ_USART2_RX (EFM32_IRQ_INTERRUPTS + 14) /* 14 USART2_RX */
#define EFM32_IRQ_USART2_TX (EFM32_IRQ_INTERRUPTS + 15) /* 15 USART2_TX */
#define EFM32_IRQ_UART0_RX (EFM32_IRQ_INTERRUPTS + 16) /* 16 UART0_RX */
#define EFM32_IRQ_UART0_TX (EFM32_IRQ_INTERRUPTS + 17) /* 17 UART0_TX */
#define EFM32_IRQ_LEUART0 (EFM32_IRQ_INTERRUPTS + 18) /* 18 LEUART0 */
#define EFM32_IRQ_LEUART1 (EFM32_IRQ_INTERRUPTS + 19) /* 19 LEUART1 */
#define EFM32_IRQ_LETIMER0 (EFM32_IRQ_INTERRUPTS + 20) /* 20 LETIMER0 */
#define EFM32_IRQ_PCNT0 (EFM32_IRQ_INTERRUPTS + 21) /* 21 PCNT0 */
#define EFM32_IRQ_PCNT1 (EFM32_IRQ_INTERRUPTS + 22) /* 22 PCNT1 */
#define EFM32_IRQ_PCNT2 (EFM32_IRQ_INTERRUPTS + 23) /* 23 PCNT2 */
#define EFM32_IRQ_RTC (EFM32_IRQ_INTERRUPTS + 24) /* 24 RTC */
#define EFM32_IRQ_CMU (EFM32_IRQ_INTERRUPTS + 25) /* 25 CMU */
#define EFM32_IRQ_VCMP (EFM32_IRQ_INTERRUPTS + 26) /* 26 VCMP */
#define EFM32_IRQ_LCD (EFM32_IRQ_INTERRUPTS + 27) /* 27 LCD */
#define EFM32_IRQ_MSC (EFM32_IRQ_INTERRUPTS + 28) /* 28 MSC */
#define EFM32_IRQ_AES (EFM32_IRQ_INTERRUPTS + 29) /* 29 AES */
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS+30)
#define EFM32_PERIPH_INTS (30)
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS + EFM32_PERIPH_INTS)
/****************************************************************************
* Public Types
arch/arm/include/efm32/efm32gg_irq.h
+41 -40
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@@ -58,47 +58,48 @@
* External interrupts (vectors >= 16)
*/
#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS+ 0)
#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS+ 1)
#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS+ 2)
#define EFM32_IRQ_USART0_RX (EFM32_IRQ_INTERRUPTS+ 3)
#define EFM32_IRQ_USART0_TX (EFM32_IRQ_INTERRUPTS+ 4)
#define EFM32_IRQ_USB (EFM32_IRQ_INTERRUPTS+ 5)
#define EFM32_IRQ_ACMP (EFM32_IRQ_INTERRUPTS+ 6)
#define EFM32_IRQ_ADC0 (EFM32_IRQ_INTERRUPTS+ 7)
#define EFM32_IRQ_DAC0 (EFM32_IRQ_INTERRUPTS+ 8)
#define EFM32_IRQ_I2C0 (EFM32_IRQ_INTERRUPTS+ 9)
#define EFM32_IRQ_I2C1 (EFM32_IRQ_INTERRUPTS+10)
#define EFM32_IRQ_GPIO_ODD (EFM32_IRQ_INTERRUPTS+11)
#define EFM32_IRQ_TIMER1 (EFM32_IRQ_INTERRUPTS+12)
#define EFM32_IRQ_TIMER2 (EFM32_IRQ_INTERRUPTS+13)
#define EFM32_IRQ_TIMER3 (EFM32_IRQ_INTERRUPTS+14)
#define EFM32_IRQ_USART1_RX (EFM32_IRQ_INTERRUPTS+15)
#define EFM32_IRQ_USART1_TX (EFM32_IRQ_INTERRUPTS+16)
#define EFM32_IRQ_LESENSE (EFM32_IRQ_INTERRUPTS+17)
#define EFM32_IRQ_USART2_RX (EFM32_IRQ_INTERRUPTS+18)
#define EFM32_IRQ_USART2_TX (EFM32_IRQ_INTERRUPTS+19)
#define EFM32_IRQ_UART0_RX (EFM32_IRQ_INTERRUPTS+20)
#define EFM32_IRQ_UART0_TX (EFM32_IRQ_INTERRUPTS+21)
#define EFM32_IRQ_UART1_RX (EFM32_IRQ_INTERRUPTS+22)
#define EFM32_IRQ_UART1_TX (EFM32_IRQ_INTERRUPTS+23)
#define EFM32_IRQ_LEUART0 (EFM32_IRQ_INTERRUPTS+24)
#define EFM32_IRQ_LEUART1 (EFM32_IRQ_INTERRUPTS+25)
#define EFM32_IRQ_LETIMER0 (EFM32_IRQ_INTERRUPTS+26)
#define EFM32_IRQ_PCNT0 (EFM32_IRQ_INTERRUPTS+27)
#define EFM32_IRQ_PCNT1 (EFM32_IRQ_INTERRUPTS+28)
#define EFM32_IRQ_PCNT2 (EFM32_IRQ_INTERRUPTS+29)
#define EFM32_IRQ_RTC (EFM32_IRQ_INTERRUPTS+30)
#define EFM32_IRQ_BURTC (EFM32_IRQ_INTERRUPTS+31)
#define EFM32_IRQ_CMU (EFM32_IRQ_INTERRUPTS+32)
#define EFM32_IRQ_VCMP (EFM32_IRQ_INTERRUPTS+33)
#define EFM32_IRQ_LCD (EFM32_IRQ_INTERRUPTS+34)
#define EFM32_IRQ_MSC (EFM32_IRQ_INTERRUPTS+35)
#define EFM32_IRQ_AES (EFM32_IRQ_INTERRUPTS+36)
#define EFM32_IRQ_EBI (EFM32_IRQ_INTERRUPTS+37)
#define EFM32_IRQ_EMI (EFM32_IRQ_INTERRUPTS+38)
#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS + 0)
#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS + 1)
#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS + 2)
#define EFM32_IRQ_USART0_RX (EFM32_IRQ_INTERRUPTS + 3)
#define EFM32_IRQ_USART0_TX (EFM32_IRQ_INTERRUPTS + 4)
#define EFM32_IRQ_USB (EFM32_IRQ_INTERRUPTS + 5)
#define EFM32_IRQ_ACMP (EFM32_IRQ_INTERRUPTS + 6)
#define EFM32_IRQ_ADC0 (EFM32_IRQ_INTERRUPTS + 7)
#define EFM32_IRQ_DAC0 (EFM32_IRQ_INTERRUPTS + 8)
#define EFM32_IRQ_I2C0 (EFM32_IRQ_INTERRUPTS + 9)
#define EFM32_IRQ_I2C1 (EFM32_IRQ_INTERRUPTS + 10)
#define EFM32_IRQ_GPIO_ODD (EFM32_IRQ_INTERRUPTS + 11)
#define EFM32_IRQ_TIMER1 (EFM32_IRQ_INTERRUPTS + 12)
#define EFM32_IRQ_TIMER2 (EFM32_IRQ_INTERRUPTS + 13)
#define EFM32_IRQ_TIMER3 (EFM32_IRQ_INTERRUPTS + 14)
#define EFM32_IRQ_USART1_RX (EFM32_IRQ_INTERRUPTS + 15)
#define EFM32_IRQ_USART1_TX (EFM32_IRQ_INTERRUPTS + 16)
#define EFM32_IRQ_LESENSE (EFM32_IRQ_INTERRUPTS + 17)
#define EFM32_IRQ_USART2_RX (EFM32_IRQ_INTERRUPTS + 18)
#define EFM32_IRQ_USART2_TX (EFM32_IRQ_INTERRUPTS + 19)
#define EFM32_IRQ_UART0_RX (EFM32_IRQ_INTERRUPTS + 20)
#define EFM32_IRQ_UART0_TX (EFM32_IRQ_INTERRUPTS + 21)
#define EFM32_IRQ_UART1_RX (EFM32_IRQ_INTERRUPTS + 22)
#define EFM32_IRQ_UART1_TX (EFM32_IRQ_INTERRUPTS + 23)
#define EFM32_IRQ_LEUART0 (EFM32_IRQ_INTERRUPTS + 24)
#define EFM32_IRQ_LEUART1 (EFM32_IRQ_INTERRUPTS + 25)
#define EFM32_IRQ_LETIMER0 (EFM32_IRQ_INTERRUPTS + 26)
#define EFM32_IRQ_PCNT0 (EFM32_IRQ_INTERRUPTS + 27)
#define EFM32_IRQ_PCNT1 (EFM32_IRQ_INTERRUPTS + 28)
#define EFM32_IRQ_PCNT2 (EFM32_IRQ_INTERRUPTS + 29)
#define EFM32_IRQ_RTC (EFM32_IRQ_INTERRUPTS + 30)
#define EFM32_IRQ_BURTC (EFM32_IRQ_INTERRUPTS + 31)
#define EFM32_IRQ_CMU (EFM32_IRQ_INTERRUPTS + 32)
#define EFM32_IRQ_VCMP (EFM32_IRQ_INTERRUPTS + 33)
#define EFM32_IRQ_LCD (EFM32_IRQ_INTERRUPTS + 34)
#define EFM32_IRQ_MSC (EFM32_IRQ_INTERRUPTS + 35)
#define EFM32_IRQ_AES (EFM32_IRQ_INTERRUPTS + 36)
#define EFM32_IRQ_EBI (EFM32_IRQ_INTERRUPTS + 37)
#define EFM32_IRQ_EMI (EFM32_IRQ_INTERRUPTS + 38)
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS+39)
#define EFM32_PERIPH_INTS (39)
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS + EFM32_PERIPH_INTS)
/****************************************************************************
* Public Types
arch/arm/include/efm32/efm32tg_irq.h
+25 -24
View File
@@ -58,31 +58,32 @@
* External interrupts (vectors >= 16)
*/
#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS+ 0)
#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS+ 1)
#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS+ 2)
#define EFM32_IRQ_USART0_RX (EFM32_IRQ_INTERRUPTS+ 3)
#define EFM32_IRQ_USART0_TX (EFM32_IRQ_INTERRUPTS+ 4)
#define EFM32_IRQ_ACMP (EFM32_IRQ_INTERRUPTS+ 5)
#define EFM32_IRQ_ADC0 (EFM32_IRQ_INTERRUPTS+ 6)
#define EFM32_IRQ_DAC0 (EFM32_IRQ_INTERRUPTS+ 7)
#define EFM32_IRQ_I2C0 (EFM32_IRQ_INTERRUPTS+ 8)
#define EFM32_IRQ_GPIO_ODD (EFM32_IRQ_INTERRUPTS+ 9)
#define EFM32_IRQ_TIMER1 (EFM32_IRQ_INTERRUPTS+10)
#define EFM32_IRQ_USART1_RX (EFM32_IRQ_INTERRUPTS+11)
#define EFM32_IRQ_USART1_TX (EFM32_IRQ_INTERRUPTS+12)
#define EFM32_IRQ_LESENSE (EFM32_IRQ_INTERRUPTS+13)
#define EFM32_IRQ_LEUART0 (EFM32_IRQ_INTERRUPTS+14)
#define EFM32_IRQ_LETIMER0 (EFM32_IRQ_INTERRUPTS+15)
#define EFM32_IRQ_PCNT0 (EFM32_IRQ_INTERRUPTS+16)
#define EFM32_IRQ_RTC (EFM32_IRQ_INTERRUPTS+17)
#define EFM32_IRQ_CMU (EFM32_IRQ_INTERRUPTS+18)
#define EFM32_IRQ_VCMP (EFM32_IRQ_INTERRUPTS+19)
#define EFM32_IRQ_LCD (EFM32_IRQ_INTERRUPTS+20)
#define EFM32_IRQ_MSC (EFM32_IRQ_INTERRUPTS+21)
#define EFM32_IRQ_AES (EFM32_IRQ_INTERRUPTS+22)
#define EFM32_IRQ_DMA (EFM32_IRQ_INTERRUPTS + 0)
#define EFM32_IRQ_GPIO_EVEN (EFM32_IRQ_INTERRUPTS + 1)
#define EFM32_IRQ_TIMER0 (EFM32_IRQ_INTERRUPTS + 2)
#define EFM32_IRQ_USART0_RX (EFM32_IRQ_INTERRUPTS + 3)
#define EFM32_IRQ_USART0_TX (EFM32_IRQ_INTERRUPTS + 4)
#define EFM32_IRQ_ACMP (EFM32_IRQ_INTERRUPTS + 5)
#define EFM32_IRQ_ADC0 (EFM32_IRQ_INTERRUPTS + 6)
#define EFM32_IRQ_DAC0 (EFM32_IRQ_INTERRUPTS + 7)
#define EFM32_IRQ_I2C0 (EFM32_IRQ_INTERRUPTS + 8)
#define EFM32_IRQ_GPIO_ODD (EFM32_IRQ_INTERRUPTS + 9)
#define EFM32_IRQ_TIMER1 (EFM32_IRQ_INTERRUPTS + 10)
#define EFM32_IRQ_USART1_RX (EFM32_IRQ_INTERRUPTS + 11)
#define EFM32_IRQ_USART1_TX (EFM32_IRQ_INTERRUPTS + 12)
#define EFM32_IRQ_LESENSE (EFM32_IRQ_INTERRUPTS + 13)
#define EFM32_IRQ_LEUART0 (EFM32_IRQ_INTERRUPTS + 14)
#define EFM32_IRQ_LETIMER0 (EFM32_IRQ_INTERRUPTS + 15)
#define EFM32_IRQ_PCNT0 (EFM32_IRQ_INTERRUPTS + 16)
#define EFM32_IRQ_RTC (EFM32_IRQ_INTERRUPTS + 17)
#define EFM32_IRQ_CMU (EFM32_IRQ_INTERRUPTS + 18)
#define EFM32_IRQ_VCMP (EFM32_IRQ_INTERRUPTS + 19)
#define EFM32_IRQ_LCD (EFM32_IRQ_INTERRUPTS + 20)
#define EFM32_IRQ_MSC (EFM32_IRQ_INTERRUPTS + 21)
#define EFM32_IRQ_AES (EFM32_IRQ_INTERRUPTS + 22)
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS+23)
#define EFM32_PERIPH_INTS (23)
#define NR_VECTORS (EFM32_IRQ_INTERRUPTS + EFM32_PERIPH_INTS)
/****************************************************************************
* Public Types
arch/arm/include/efm32/irq.h
+18 -18
View File
@@ -95,26 +95,26 @@
* 16-additional interrupts generated from a second level of decoding.
*/
# define EFM32_IRQ_EXTI0 (NR_VECTORS+0) /* Port[n], pin0 external interrupt */
# define EFM32_IRQ_EXTI1 (NR_VECTORS+1) /* Port[n], pin1 external interrupt */
# define EFM32_IRQ_EXTI2 (NR_VECTORS+2) /* Port[n], pin2 external interrupt */
# define EFM32_IRQ_EXTI3 (NR_VECTORS+3) /* Port[n], pin3 external interrupt */
# define EFM32_IRQ_EXTI4 (NR_VECTORS+4) /* Port[n], pin4 external interrupt */
# define EFM32_IRQ_EXTI5 (NR_VECTORS+5) /* Port[n], pin5 external interrupt */
# define EFM32_IRQ_EXTI6 (NR_VECTORS+6) /* Port[n], pin6 external interrupt */
# define EFM32_IRQ_EXTI7 (NR_VECTORS+7) /* Port[n], pin7 external interrupt */
# define EFM32_IRQ_EXTI8 (NR_VECTORS+8) /* Port[n], pin8 external interrupt */
# define EFM32_IRQ_EXTI9 (NR_VECTORS+9) /* Port[n], pin9 external interrupt */
# define EFM32_IRQ_EXTI10 (NR_VECTORS+10) /* Port[n], pin10 external interrupt */
# define EFM32_IRQ_EXTI11 (NR_VECTORS+11) /* Port[n], pin11 external interrupt */
# define EFM32_IRQ_EXTI12 (NR_VECTORS+12) /* Port[n], pin12 external interrupt */
# define EFM32_IRQ_EXTI13 (NR_VECTORS+13) /* Port[n], pin13 external interrupt */
# define EFM32_IRQ_EXTI14 (NR_VECTORS+14) /* Port[n], pin14 external interrupt */
# define EFM32_IRQ_EXTI15 (NR_VECTORS+15) /* Port[n], pin15 external interrupt */
# define EFM32_IRQ_EXTI0 (NR_VECTORS + 0) /* Port[n], pin0 external interrupt */
# define EFM32_IRQ_EXTI1 (NR_VECTORS + 1) /* Port[n], pin1 external interrupt */
# define EFM32_IRQ_EXTI2 (NR_VECTORS + 2) /* Port[n], pin2 external interrupt */
# define EFM32_IRQ_EXTI3 (NR_VECTORS + 3) /* Port[n], pin3 external interrupt */
# define EFM32_IRQ_EXTI4 (NR_VECTORS + 4) /* Port[n], pin4 external interrupt */
# define EFM32_IRQ_EXTI5 (NR_VECTORS + 5) /* Port[n], pin5 external interrupt */
# define EFM32_IRQ_EXTI6 (NR_VECTORS + 6) /* Port[n], pin6 external interrupt */
# define EFM32_IRQ_EXTI7 (NR_VECTORS + 7) /* Port[n], pin7 external interrupt */
# define EFM32_IRQ_EXTI8 (NR_VECTORS + 8) /* Port[n], pin8 external interrupt */
# define EFM32_IRQ_EXTI9 (NR_VECTORS + 9) /* Port[n], pin9 external interrupt */
# define EFM32_IRQ_EXTI10 (NR_VECTORS + 10) /* Port[n], pin10 external interrupt */
# define EFM32_IRQ_EXTI11 (NR_VECTORS + 11) /* Port[n], pin11 external interrupt */
# define EFM32_IRQ_EXTI12 (NR_VECTORS + 12) /* Port[n], pin12 external interrupt */
# define EFM32_IRQ_EXTI13 (NR_VECTORS + 13) /* Port[n], pin13 external interrupt */
# define EFM32_IRQ_EXTI14 (NR_VECTORS + 14) /* Port[n], pin14 external interrupt */
# define EFM32_IRQ_EXTI15 (NR_VECTORS + 15) /* Port[n], pin15 external interrupt */
# define NR_IRQS (NR_VECTORS+16) /* Total number of interrupts */
# define NR_IRQS (NR_VECTORS + 16) /* Total number of interrupts */
#else
# define NR_IRQS NR_VECTORS /* Total number of interrupts */
# define NR_IRQS NR_VECTORS /* Total number of interrupts */
#endif
/************************************************************************************