mirror of
https://github.com/apache/nuttx.git
synced 2026-06-05 15:58:59 +08:00
Rename all lpc313x to lpc31xx
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3644 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
+20
-20
@@ -43,12 +43,12 @@ GNU Toolchain Options
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add one of the following configuration options to your .config (or defconfig)
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file:
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CONFIG_LPC313X_CODESOURCERYW=y : CodeSourcery under Windows
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CONFIG_LPC313X_CODESOURCERYL=y : CodeSourcery under Linux
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CONFIG_LPC313X_DEVKITARM=y : devkitARM under Windows
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CONFIG_LPC313X_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
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CONFIG_LPC31XX_CODESOURCERYW=y : CodeSourcery under Windows
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CONFIG_LPC31XX_CODESOURCERYL=y : CodeSourcery under Linux
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CONFIG_LPC31XX_DEVKITARM=y : devkitARM under Windows
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CONFIG_LPC31XX_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
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If you are not using CONFIG_LPC313X_BUILDROOT, then you may also have to modify
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If you are not using CONFIG_LPC31XX_BUILDROOT, then you may also have to modify
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the PATH in the setenv.h file if your make cannot find the tools.
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NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are
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@@ -117,13 +117,13 @@ IDEs
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2) Start the NuttX build at least one time from the Cygwin command line
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before trying to create your project. This is necessary to create
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certain auto-generated files and directories that will be needed.
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3) Set up include pathes: You will need include/, arch/arm/src/lpc313x,
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3) Set up include pathes: You will need include/, arch/arm/src/lpc31xx,
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arch/arm/src/common, arch/arm/src/cortexm3, and sched/.
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4) All assembly files need to have the definition option -D __ASSEMBLY__
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on the command line.
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Startup files will probably cause you some headaches. The NuttX startup file
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is arch/arm/src/lpc313x/lpc313x_vectors.S. With RIDE, I have to build NuttX
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is arch/arm/src/lpc31xx/lpc31_vectors.S. With RIDE, I have to build NuttX
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one time from the Cygwin command line in order to obtain the pre-built
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startup object needed by RIDE.
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@@ -426,7 +426,7 @@ On-Demand Paging
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NOTE: See the TODO list in the top-level directory:
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"arch/arm/src/lpc313x/lpc313x_spi.c may or may not be functional. It was
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"arch/arm/src/lpc31xx/lpc31_spi.c may or may not be functional. It was
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reported to be working, but I was unable to get it working with the
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Atmel at45dbxx serial FLASH driver."
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@@ -549,27 +549,27 @@ ARM/EA3131-specific Configuration Options
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Individual subsystems can be enabled:
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CONFIG_LPC313X_MCI, CONFIG_LPC313X_SPI, CONFIG_LPC313X_UART
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CONFIG_LPC31XX_MCI, CONFIG_LPC31XX_SPI, CONFIG_LPC31XX_UART
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External memory available on the board (see also CONFIG_MM_REGIONS)
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CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
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CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
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CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
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CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
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configured as part of the NuttX heap.
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CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
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CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
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external SRAM0 memory
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CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
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CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
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CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
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CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
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configured as part of the NuttX heap.
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CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
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CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
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external SRAM1 memory
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CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
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CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
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CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
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CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
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configured as part of the NuttX heap.
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CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
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CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
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external SDRAM memory
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CONFIG_LPC313X_EXTNAND - Select if external NAND is present
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CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
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CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
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CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
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external NAND memory
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LPC313X specific device driver settings
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@@ -44,7 +44,7 @@
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include "lpc313x_cgudrvr.h"
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# include "lpc31_cgudrvr.h"
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#endif
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/************************************************************************************
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@@ -131,16 +131,16 @@ extern "C" {
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* Public Function Prototypes
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************************************************************************************/
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/************************************************************************************
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* Name: lpc313x_boardinitialize
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* Name: lpc31_boardinitialize
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*
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* Description:
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* All LPC313X architectures must provide the following entry point. This entry
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* All LPC31XX architectures must provide the following entry point. This entry
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* point is called early in the intitialization -- after all memory has been
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* configured and mapped but before any devices have been initialized.
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*
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************************************************************************************/
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EXTERN void lpc313x_boardinitialize(void);
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EXTERN void lpc31_boardinitialize(void);
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/************************************************************************************
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* Button support.
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@@ -2,7 +2,7 @@
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* configs/ea3131/include/board_memorymap.h
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* include/arch/board/board_memorymap.h
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*
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* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -38,7 +38,7 @@
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#define __ARCH_BOARD_BOARD_MEMORYMAP_H
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/* This file should never be included directly, but only indirectly via
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* lpc313x_memorymap.h.
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* lpc31_memorymap.h.
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*/
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/************************************************************************************
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@@ -51,44 +51,44 @@
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* Definitions
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************************************************************************************/
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/* If the LPC313x ROM page table is selected, then the board-logic is required
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/* If the LPC31xx ROM page table is selected, then the board-logic is required
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* to provide:
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*
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* PGTABLE_BASE_PADDR - The physical address of the page table in ROM,
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* PGTABLE_BASE_VADDR - The mapped address of the page table in ROM, and
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* Mappings for each of the PSECTIONS in lpc313x_memorymap.h
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* Mappings for each of the PSECTIONS in lpc31_memorymap.h
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*/
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#ifdef CONFIG_ARCH_ROMPGTABLE
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/* The LPC313x ROM page table uses a 1-1 physical to virtual memory mapping */
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/* The LPC31xx ROM page table uses a 1-1 physical to virtual memory mapping */
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# define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
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# define LPC313X_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */
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# define LPC313X_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
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# define LPC313X_INTSRAM1_VADDR 0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */
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# define LPC313X_INTSROM0_VSECTION 0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */
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# define LPC313X_APB01_VSECTION 0x13000000 /* 0x13000000-0x1300bfff: APB0 32Kb APB1 16Kb*/
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# define LPC313X_APB0_VADDR 0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */
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# define LPC313X_APB1_VADDR 0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */
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# define LPC313X_APB2_VSECTION 0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */
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# define LPC313X_APB3_VSECTION 0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */
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# define LPC313X_APB4MPMC_VSECTION 0x17000000 /* 8Kb */
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# define LPC313X_APB4_VADDR 0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */
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# define LPC313X_MPMC_VADDR 0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */
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# define LPC313X_MCI_VSECTION 0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */
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# define LPC313X_USBOTG_VSECTION 0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */
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# define LPC313X_EXTSRAM_VSECTION 0x20020000 /* 64-128Kb */
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# define LPC313X_EXTSRAM0_VADDR 0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */
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# define LPC313X_EXTSRAM1_VADDR 0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */
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# define LPC313X_EXTSDRAM0_VSECTION 0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */
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# define LPC313X_INTC_VSECTION 0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */
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# define LPC313X_NAND_VSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */
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# define LPC31_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
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# define LPC31_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */
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# define LPC31_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
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# define LPC31_INTSRAM1_VADDR 0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */
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# define LPC31_INTSROM0_VSECTION 0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */
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# define LPC31_APB01_VSECTION 0x13000000 /* 0x13000000-0x1300bfff: APB0 32Kb APB1 16Kb*/
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# define LPC31_APB0_VADDR 0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */
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# define LPC31_APB1_VADDR 0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */
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# define LPC31_APB2_VSECTION 0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */
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# define LPC31_APB3_VSECTION 0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */
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# define LPC31_APB4MPMC_VSECTION 0x17000000 /* 8Kb */
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# define LPC31_APB4_VADDR 0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */
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# define LPC31_MPMC_VADDR 0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */
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# define LPC31_MCI_VSECTION 0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */
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# define LPC31_USBOTG_VSECTION 0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */
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# define LPC31_EXTSRAM_VSECTION 0x20020000 /* 64-128Kb */
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# define LPC31_EXTSRAM0_VADDR 0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */
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# define LPC31_EXTSRAM1_VADDR 0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */
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# define LPC31_EXTSDRAM0_VSECTION 0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */
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# define LPC31_INTC_VSECTION 0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */
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# define LPC31_NAND_VSECTION 0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */
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/* Define the address of the page table within the ROM */
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# define ROMPGTABLE_OFFSET 0x0001c000 /* Offset of the ROM page table in ROM */
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# define PGTABLE_BASE_PADDR (LPC313X_INTSROM0_PSECTION+ROMPGTABLE_OFFSET)
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# define PGTABLE_BASE_VADDR (LPC313X_INTSROM0_VSECTION+ROMPGTABLE_OFFSET)
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# define PGTABLE_BASE_PADDR (LPC31_INTSROM0_PSECTION+ROMPGTABLE_OFFSET)
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# define PGTABLE_BASE_VADDR (LPC31_INTSROM0_VSECTION+ROMPGTABLE_OFFSET)
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#endif
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/************************************************************************************
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@@ -117,7 +117,7 @@ echo "EXTERN(up_vectoraddrexcptn)" >>ld-locked.inc
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echo "EXTERN(up_timerinit)" >>ld-locked.inc
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answer=$(checkconfig CONFIG_LPC313X_UART)
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answer=$(checkconfig CONFIG_LPC31XX_UART)
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if [ $answer = y ]; then
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echo "EXTERN(up_earlyserialinit)" >>ld-locked.inc
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fi
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@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
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# Setup for the selected toolchain
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ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
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ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
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# CodeSourcery under Windows
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CROSSDEV = arm-none-eabi-
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WINTOOL = y
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MAXOPTIMIZATION = -O2
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endif
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ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
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ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
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# CodeSourcery under Linux
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CROSSDEV = arm-none-eabi-
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MAXOPTIMIZATION = -O2
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endif
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ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
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ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
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# devkitARM under Windows
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CROSSDEV = arm-eabi-
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WINTOOL = y
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endif
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ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
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ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
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# NuttX buildroot under Linux or Cygwin
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CROSSDEV = arm-elf-
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MAXOPTIMIZATION = -Os
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@@ -121,7 +121,7 @@ OBJEXT = .o
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LIBEXT = .a
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EXEEXT =
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ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
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ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
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LDFLAGS += -nostartfiles -nodefaultlibs
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endif
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ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
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@@ -50,13 +50,13 @@
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# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
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# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
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# CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
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# size of installed DRAM. For the LPC313X, it is used only to
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# size of installed DRAM. For the LPC31XX, it is used only to
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# deterimine how to map the executable regions. It is SDRAM size
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# only if you are executing out of the external SDRAM; or it could
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# be NOR FLASH size, external SRAM size, or internal SRAM size.
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# CONFIG_DRAM_START - The start address of DRAM (physical)
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# CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
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# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
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# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
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# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
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# stack. If defined, this symbol is the size of the interrupt
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# stack in bytes. If not defined, the user task stacks will be
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@@ -76,7 +76,7 @@
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CONFIG_ARCH=arm
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CONFIG_ARCH_ARM=y
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CONFIG_ARCH_ARM926EJS=y
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CONFIG_ARCH_CHIP=lpc313x
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CONFIG_ARCH_CHIP=lpc31xx
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CONFIG_ARCH_CHIP_LPC3131=y
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CONFIG_ARCH_BOARD=ea3131
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CONFIG_ARCH_BOARD_EA3131=y
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@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
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# Identify toolchain and linker options
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#
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CONFIG_LPC313X_CODESOURCERYW=n
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CONFIG_LPC313X_CODESOURCERYL=n
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CONFIG_LPC313X_DEVKITARM=n
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CONFIG_LPC313X_BUILDROOT=y
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CONFIG_LPC31XX_CODESOURCERYW=n
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CONFIG_LPC31XX_CODESOURCERYL=n
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CONFIG_LPC31XX_DEVKITARM=n
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CONFIG_LPC31XX_BUILDROOT=y
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#
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# Individual subsystems can be enabled:
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#
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CONFIG_LPC313X_MCI=n
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CONFIG_LPC313X_SPI=n
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CONFIG_LPC313X_UART=y
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CONFIG_LPC31XX_MCI=n
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CONFIG_LPC31XX_SPI=n
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CONFIG_LPC31XX_UART=y
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#
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# Exernal memory available on the board (see also CONFIG_MM_REGIONS)
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#
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# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# external SRAM0 memory
|
||||
# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# external SRAM1 memory
|
||||
# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external SDRAM memory
|
||||
# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external NAND memory
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||||
#
|
||||
CONFIG_LPC313X_EXTSRAM0=n
|
||||
CONFIG_LPC313X_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSRAM1=n
|
||||
CONFIG_LPC313X_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSDRAM=n
|
||||
CONFIG_LPC313X_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC313X_EXTNAND=n
|
||||
CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM0=n
|
||||
CONFIG_LPC31XX_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM1=n
|
||||
CONFIG_LPC31XX_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSDRAM=n
|
||||
CONFIG_LPC31XX_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTNAND=n
|
||||
CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
|
||||
|
||||
#
|
||||
# LPC313X specific device driver settings
|
||||
# LPC31XX specific device driver settings
|
||||
#
|
||||
# CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
|
||||
# console and ttys0
|
||||
@@ -535,20 +535,20 @@ CONFIG_USBDEV_TRACE=n
|
||||
CONFIG_USBDEV_TRACE_NRECORDS=128
|
||||
|
||||
#
|
||||
# LPC313X USB Configuration
|
||||
# LPC31XX USB Configuration
|
||||
#
|
||||
# CONFIG_LPC313X_GIO_USBATTACH
|
||||
# CONFIG_LPC31XX_GIO_USBATTACH
|
||||
# GIO that detects USB attach/detach events
|
||||
# CONFIG_LPC313X_GIO_USBDPPULLUP
|
||||
# CONFIG_LPC31XX_GIO_USBDPPULLUP
|
||||
# GIO
|
||||
# CONFIG_DMA320_USBDEV_DMA
|
||||
# Enable LPC313X-specific DMA support
|
||||
# Enable LPC31XX-specific DMA support
|
||||
#
|
||||
CONFIG_LPC313X_GIO_USBATTACH=6
|
||||
CONFIG_LPC313X_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC313X_VENDORID=0xd320
|
||||
CONFIG_LPC313X_PRODUCTID=0x3211
|
||||
CONFIG_LPC313X_USBDEV_DMA=n
|
||||
CONFIG_LPC31XX_GIO_USBATTACH=6
|
||||
CONFIG_LPC31XX_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC31XX_VENDORID=0xd320
|
||||
CONFIG_LPC31XX_PRODUCTID=0x3211
|
||||
CONFIG_LPC31XX_USBDEV_DMA=n
|
||||
|
||||
#
|
||||
# USB Serial Device Configuration
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
|
||||
* LPC313x boot ROM expects the boot image be compiled with entry point at
|
||||
* LPC31xx boot ROM expects the boot image be compiled with entry point at
|
||||
* 0x1102:9000. A 128b header will appear at this address (applied by
|
||||
* lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
|
||||
*/
|
||||
|
||||
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
|
||||
|
||||
# Setup for the selected toolchain
|
||||
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
|
||||
# CodeSourcery under Windows
|
||||
CROSSDEV = arm-none-eabi-
|
||||
WINTOOL = y
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
|
||||
# CodeSourcery under Linux
|
||||
CROSSDEV = arm-none-eabi-
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
|
||||
ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
|
||||
# devkitARM under Windows
|
||||
CROSSDEV = arm-eabi-
|
||||
WINTOOL = y
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
# NuttX buildroot under Linux or Cygwin
|
||||
CROSSDEV = arm-elf-
|
||||
MAXOPTIMIZATION = -Os
|
||||
@@ -121,7 +121,7 @@ OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
|
||||
@@ -50,13 +50,13 @@
|
||||
# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
|
||||
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
|
||||
# CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
|
||||
# size of installed DRAM. For the LPC313X, it is used only to
|
||||
# size of installed DRAM. For the LPC31XX, it is used only to
|
||||
# deterimine how to map the executable regions. It is SDRAM size
|
||||
# only if you are executing out of the external SDRAM; or it could
|
||||
# be NOR FLASH size, external SRAM size, or internal SRAM size.
|
||||
# CONFIG_DRAM_START - The start address of DRAM (physical)
|
||||
# CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
|
||||
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
# stack. If defined, this symbol is the size of the interrupt
|
||||
# stack in bytes. If not defined, the user task stacks will be
|
||||
@@ -76,7 +76,7 @@
|
||||
CONFIG_ARCH=arm
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_ARCH_ARM926EJS=y
|
||||
CONFIG_ARCH_CHIP=lpc313x
|
||||
CONFIG_ARCH_CHIP=lpc31xx
|
||||
CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD=ea3131
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
|
||||
|
||||
# Identify toolchain and linker options
|
||||
#
|
||||
CONFIG_LPC313X_CODESOURCERYW=n
|
||||
CONFIG_LPC313X_CODESOURCERYL=n
|
||||
CONFIG_LPC313X_DEVKITARM=n
|
||||
CONFIG_LPC313X_BUILDROOT=y
|
||||
CONFIG_LPC31XX_CODESOURCERYW=n
|
||||
CONFIG_LPC31XX_CODESOURCERYL=n
|
||||
CONFIG_LPC31XX_DEVKITARM=n
|
||||
CONFIG_LPC31XX_BUILDROOT=y
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
CONFIG_LPC313X_MCI=n
|
||||
CONFIG_LPC313X_SPI=n
|
||||
CONFIG_LPC313X_UART=y
|
||||
CONFIG_LPC31XX_MCI=n
|
||||
CONFIG_LPC31XX_SPI=n
|
||||
CONFIG_LPC31XX_UART=y
|
||||
|
||||
#
|
||||
# Exernal memory available on the board (see also CONFIG_MM_REGIONS)
|
||||
#
|
||||
# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# external SRAM0 memory
|
||||
# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# external SRAM1 memory
|
||||
# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external SDRAM memory
|
||||
# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external NAND memory
|
||||
#
|
||||
CONFIG_LPC313X_EXTSRAM0=n
|
||||
CONFIG_LPC313X_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSRAM1=n
|
||||
CONFIG_LPC313X_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSDRAM=n
|
||||
CONFIG_LPC313X_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC313X_EXTNAND=n
|
||||
CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM0=n
|
||||
CONFIG_LPC31XX_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM1=n
|
||||
CONFIG_LPC31XX_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSDRAM=n
|
||||
CONFIG_LPC31XX_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTNAND=n
|
||||
CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
|
||||
|
||||
#
|
||||
# LPC313X specific device driver settings
|
||||
# LPC31XX specific device driver settings
|
||||
#
|
||||
# CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
|
||||
# console and ttys0
|
||||
@@ -535,20 +535,20 @@ CONFIG_USBDEV_TRACE=n
|
||||
CONFIG_USBDEV_TRACE_NRECORDS=128
|
||||
|
||||
#
|
||||
# LPC313X USB Configuration
|
||||
# LPC31XX USB Configuration
|
||||
#
|
||||
# CONFIG_LPC313X_GIO_USBATTACH
|
||||
# CONFIG_LPC31XX_GIO_USBATTACH
|
||||
# GIO that detects USB attach/detach events
|
||||
# CONFIG_LPC313X_GIO_USBDPPULLUP
|
||||
# CONFIG_LPC31XX_GIO_USBDPPULLUP
|
||||
# GIO
|
||||
# CONFIG_DMA320_USBDEV_DMA
|
||||
# Enable LPC313X-specific DMA support
|
||||
# Enable LPC31XX-specific DMA support
|
||||
#
|
||||
CONFIG_LPC313X_GIO_USBATTACH=6
|
||||
CONFIG_LPC313X_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC313X_VENDORID=0xd320
|
||||
CONFIG_LPC313X_PRODUCTID=0x3211
|
||||
CONFIG_LPC313X_USBDEV_DMA=n
|
||||
CONFIG_LPC31XX_GIO_USBATTACH=6
|
||||
CONFIG_LPC31XX_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC31XX_VENDORID=0xd320
|
||||
CONFIG_LPC31XX_PRODUCTID=0x3211
|
||||
CONFIG_LPC31XX_USBDEV_DMA=n
|
||||
|
||||
#
|
||||
# USB Serial Device Configuration
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
|
||||
* LPC313x boot ROM expects the boot image be compiled with entry point at
|
||||
* LPC31xx boot ROM expects the boot image be compiled with entry point at
|
||||
* 0x1102:9000. A 128b header will appear at this address (applied by
|
||||
* lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
|
||||
*/
|
||||
|
||||
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
|
||||
|
||||
# Setup for the selected toolchain
|
||||
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
|
||||
# CodeSourcery under Windows
|
||||
CROSSDEV = arm-none-eabi-
|
||||
WINTOOL = y
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
|
||||
# CodeSourcery under Linux
|
||||
CROSSDEV = arm-none-eabi-
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
|
||||
ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
|
||||
# devkitARM under Windows
|
||||
CROSSDEV = arm-eabi-
|
||||
WINTOOL = y
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
# NuttX buildroot under Linux or Cygwin
|
||||
CROSSDEV = arm-elf-
|
||||
MAXOPTIMIZATION = -Os
|
||||
@@ -121,7 +121,7 @@ OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
|
||||
@@ -50,13 +50,13 @@
|
||||
# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
|
||||
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
|
||||
# CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
|
||||
# size of installed DRAM. For the LPC313X, it is used only to
|
||||
# size of installed DRAM. For the LPC31XX, it is used only to
|
||||
# deterimine how to map the executable regions. It is SDRAM size
|
||||
# only if you are executing out of the external SDRAM; or it could
|
||||
# be NOR FLASH size, external SRAM size, or internal SRAM size.
|
||||
# CONFIG_DRAM_START - The start address of DRAM (physical)
|
||||
# CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
|
||||
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
# stack. If defined, this symbol is the size of the interrupt
|
||||
# stack in bytes. If not defined, the user task stacks will be
|
||||
@@ -76,7 +76,7 @@
|
||||
CONFIG_ARCH=arm
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_ARCH_ARM926EJS=y
|
||||
CONFIG_ARCH_CHIP=lpc313x
|
||||
CONFIG_ARCH_CHIP=lpc31xx
|
||||
CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD=ea3131
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=n
|
||||
|
||||
# Identify toolchain and linker options
|
||||
#
|
||||
CONFIG_LPC313X_CODESOURCERYW=n
|
||||
CONFIG_LPC313X_CODESOURCERYL=n
|
||||
CONFIG_LPC313X_DEVKITARM=n
|
||||
CONFIG_LPC313X_BUILDROOT=y
|
||||
CONFIG_LPC31XX_CODESOURCERYW=n
|
||||
CONFIG_LPC31XX_CODESOURCERYL=n
|
||||
CONFIG_LPC31XX_DEVKITARM=n
|
||||
CONFIG_LPC31XX_BUILDROOT=y
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
CONFIG_LPC313X_MCI=n
|
||||
CONFIG_LPC313X_SPI=y
|
||||
CONFIG_LPC313X_UART=y
|
||||
CONFIG_LPC31XX_MCI=n
|
||||
CONFIG_LPC31XX_SPI=y
|
||||
CONFIG_LPC31XX_UART=y
|
||||
|
||||
#
|
||||
# Exernal memory available on the board (see also CONFIG_MM_REGIONS)
|
||||
#
|
||||
# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# external SRAM0 memory
|
||||
# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# external SRAM1 memory
|
||||
# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external SDRAM memory
|
||||
# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external NAND memory
|
||||
#
|
||||
CONFIG_LPC313X_EXTSRAM0=n
|
||||
CONFIG_LPC313X_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSRAM1=n
|
||||
CONFIG_LPC313X_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSDRAM=n
|
||||
CONFIG_LPC313X_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC313X_EXTNAND=n
|
||||
CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM0=n
|
||||
CONFIG_LPC31XX_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM1=n
|
||||
CONFIG_LPC31XX_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSDRAM=n
|
||||
CONFIG_LPC31XX_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTNAND=n
|
||||
CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
|
||||
|
||||
#
|
||||
# LPC313X specific device driver settings
|
||||
# LPC31XX specific device driver settings
|
||||
#
|
||||
# CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
|
||||
# console and ttys0
|
||||
@@ -681,20 +681,20 @@ CONFIG_USBDEV_TRACE=n
|
||||
CONFIG_USBDEV_TRACE_NRECORDS=128
|
||||
|
||||
#
|
||||
# LPC313X USB Configuration
|
||||
# LPC31XX USB Configuration
|
||||
#
|
||||
# CONFIG_LPC313X_GIO_USBATTACH
|
||||
# CONFIG_LPC31XX_GIO_USBATTACH
|
||||
# GIO that detects USB attach/detach events
|
||||
# CONFIG_LPC313X_GIO_USBDPPULLUP
|
||||
# CONFIG_LPC31XX_GIO_USBDPPULLUP
|
||||
# GIO
|
||||
# CONFIG_DMA320_USBDEV_DMA
|
||||
# Enable LPC313X-specific DMA support
|
||||
# Enable LPC31XX-specific DMA support
|
||||
#
|
||||
CONFIG_LPC313X_GIO_USBATTACH=6
|
||||
CONFIG_LPC313X_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC313X_VENDORID=0xd320
|
||||
CONFIG_LPC313X_PRODUCTID=0x3211
|
||||
CONFIG_LPC313X_USBDEV_DMA=n
|
||||
CONFIG_LPC31XX_GIO_USBATTACH=6
|
||||
CONFIG_LPC31XX_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC31XX_VENDORID=0xd320
|
||||
CONFIG_LPC31XX_PRODUCTID=0x3211
|
||||
CONFIG_LPC31XX_USBDEV_DMA=n
|
||||
|
||||
#
|
||||
# USB Serial Device Configuration
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
|
||||
* LPC313x boot ROM expects the boot image be compiled with entry point at
|
||||
* LPC31xx boot ROM expects the boot image be compiled with entry point at
|
||||
* 0x1102:9000. A 128b header will appear at this address (applied by
|
||||
* lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
|
||||
*
|
||||
|
||||
@@ -44,13 +44,13 @@ CSRCS = up_boot.c up_clkinit.c
|
||||
ifeq ($(CONFIG_ARCH_BUTTONS),y)
|
||||
CSRCS += up_buttons.c
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_EXTSDRAM),y)
|
||||
ifeq ($(CONFIG_LPC31XX_EXTSDRAM),y)
|
||||
CSRCS += up_mem.c
|
||||
endif
|
||||
ifeq ($(CONFIG_ARCH_LEDS),y)
|
||||
CSRCS += up_leds.c
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_SPI),y)
|
||||
ifeq ($(CONFIG_LPC31XX_SPI),y)
|
||||
CSRCS += up_spi.c
|
||||
endif
|
||||
ifeq ($(CONFIG_NSH_ARCHINIT),y)
|
||||
|
||||
@@ -45,7 +45,7 @@
|
||||
#include <nuttx/compiler.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include "lpc313x_ioconfig.h"
|
||||
#include "lpc31_ioconfig.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Definitions
|
||||
@@ -79,39 +79,39 @@
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_meminitialize
|
||||
* Name: lpc31_meminitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize external memory resources (sram, sdram, nand, nor, etc.)
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_LPC313X_EXTSDRAM
|
||||
extern void lpc313x_meminitialize(void);
|
||||
#ifdef CONFIG_LPC31XX_EXTSDRAM
|
||||
extern void lpc31_meminitialize(void);
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_spiinitialize
|
||||
* Name: lpc31_spiinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI chip select GPIO pins for the EA3131 board.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
extern void weak_function lpc313x_spiinitialize(void);
|
||||
extern void weak_function lpc31_spiinitialize(void);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_usbinitialize
|
||||
* Name: lpc31_usbinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called to setup USB-related GPIO pins for the EA3131 board.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
extern void weak_function lpc313x_usbinitialize(void);
|
||||
extern void weak_function lpc31_usbinitialize(void);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_pginitialize
|
||||
* Name: lpc31_pginitialize
|
||||
*
|
||||
* Description:
|
||||
* Set up mass storage device to support on demand paging.
|
||||
@@ -119,7 +119,7 @@ extern void weak_function lpc313x_usbinitialize(void);
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PAGING
|
||||
extern void weak_function lpc313x_pginitialize(void);
|
||||
extern void weak_function lpc31_pginitialize(void);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
@@ -46,7 +46,7 @@
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "up_internal.h"
|
||||
#include "lpc313x_internal.h"
|
||||
#include "lpc31_internal.h"
|
||||
#include "ea3131_internal.h"
|
||||
|
||||
/************************************************************************************
|
||||
@@ -62,43 +62,43 @@
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_boardinitialize
|
||||
* Name: lpc31_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* All LPC313X architectures must provide the following entry point. This entry
|
||||
* All LPC31XX architectures must provide the following entry point. This entry
|
||||
* point is called early in the intitialization -- after all memory has been
|
||||
* configured and mapped but before any devices have been initialized.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void lpc313x_boardinitialize(void)
|
||||
void lpc31_boardinitialize(void)
|
||||
{
|
||||
/* Initialize configured, external memory resources */
|
||||
|
||||
#ifdef CONFIG_LPC313X_EXTSDRAM
|
||||
lpc313x_meminitialize();
|
||||
#ifdef CONFIG_LPC31XX_EXTSDRAM
|
||||
lpc31_meminitialize();
|
||||
#endif
|
||||
|
||||
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
|
||||
* lpc313x_spiinitialize() has been brought into the link.
|
||||
* lpc31_spiinitialize() has been brought into the link.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_LPC313X_SPI)
|
||||
if (lpc313x_spiinitialize)
|
||||
#if defined(CONFIG_LPC31XX_SPI)
|
||||
if (lpc31_spiinitialize)
|
||||
{
|
||||
lpc313x_spiinitialize();
|
||||
lpc31_spiinitialize();
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
|
||||
* disabled, and 3) the weak function lpc313x_usbinitialize() has been brought
|
||||
* disabled, and 3) the weak function lpc31_usbinitialize() has been brought
|
||||
* into the build.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC313X_USB)
|
||||
if (lpc313x_usbinitialize)
|
||||
#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC31XX_USB)
|
||||
if (lpc31_usbinitialize)
|
||||
{
|
||||
lpc313x_usbinitialize();
|
||||
lpc31_usbinitialize();
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -111,9 +111,9 @@ void lpc313x_boardinitialize(void)
|
||||
/* Set up mass storage device to support on demand paging */
|
||||
|
||||
#if defined(CONFIG_PAGING)
|
||||
if (lpc313x_pginitialize)
|
||||
if (lpc31_pginitialize)
|
||||
{
|
||||
lpc313x_pginitialize();
|
||||
lpc31_pginitialize();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -44,8 +44,8 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "lpc313x_cgu.h"
|
||||
#include "lpc313x_cgudrvr.h"
|
||||
#include "lpc31_cgu.h"
|
||||
#include "lpc31_cgudrvr.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
@@ -284,7 +284,7 @@
|
||||
* 11 - DOMAIN_SYSCLKO FFAST - -
|
||||
*/
|
||||
|
||||
const struct lpc313x_clkinit_s g_boardclks =
|
||||
const struct lpc31_clkinit_s g_boardclks =
|
||||
{
|
||||
/* Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6 */
|
||||
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
# include <sys/mount.h>
|
||||
# include <nuttx/sdio.h>
|
||||
# include <nuttx/mmcsd.h>
|
||||
# include "lpc313x_internal.h"
|
||||
# include "lpc31_internal.h"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
@@ -85,8 +85,8 @@
|
||||
# undef CONFIG_PAGING_SDSLOT
|
||||
# endif
|
||||
#else
|
||||
/* Add configuration for new LPC313X boards here */
|
||||
# error "Unrecognized LPC313X board"
|
||||
/* Add configuration for new LPC31XX boards here */
|
||||
# error "Unrecognized LPC31XX board"
|
||||
# undef CONFIG_PAGING_SDSLOT
|
||||
# undef HAVE_SD
|
||||
# undef HAVE_SPINOR
|
||||
@@ -122,7 +122,7 @@
|
||||
* is not enabled.
|
||||
*/
|
||||
|
||||
# if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC313X_MCI)
|
||||
# if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31XX_MCI)
|
||||
# ifdef CONFIG_PAGING_SDSLOT
|
||||
# error "Mountpoints and/or MCI disabled"
|
||||
# endif
|
||||
@@ -152,7 +152,7 @@
|
||||
|
||||
/* Verify that SPI support is enabld */
|
||||
|
||||
#ifndef CONFIG_LPC313X_SPI
|
||||
#ifndef CONFIG_LPC31XX_SPI
|
||||
# error "SPI support is not enabled"
|
||||
#endif
|
||||
|
||||
@@ -219,7 +219,7 @@ static struct pg_source_s g_pgsrc;
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lpc313x_initsrc()
|
||||
* Name: lpc31_initsrc()
|
||||
*
|
||||
* Description:
|
||||
* Initialize the source device that will support paging.
|
||||
@@ -230,7 +230,7 @@ static struct pg_source_s g_pgsrc;
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_PAGING_BINPATH)
|
||||
static inline void lpc313x_initsrc(void)
|
||||
static inline void lpc31_initsrc(void)
|
||||
{
|
||||
#ifdef CONFIG_PAGING_SDSLOT
|
||||
FAR struct sdio_dev_s *sdio;
|
||||
@@ -287,7 +287,7 @@ static inline void lpc313x_initsrc(void)
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
|
||||
static inline void lpc313x_initsrc(void)
|
||||
static inline void lpc31_initsrc(void)
|
||||
{
|
||||
FAR struct spi_dev_s *spi;
|
||||
#ifdef CONFIG_DEBUG
|
||||
@@ -339,7 +339,7 @@ static inline void lpc313x_initsrc(void)
|
||||
}
|
||||
|
||||
#else
|
||||
# define lpc313x_initsrc()
|
||||
# define lpc31_initsrc()
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
@@ -425,7 +425,7 @@ int up_fillpage(FAR _TCB *tcb, FAR void *vpage)
|
||||
|
||||
/* Perform initialization of the paging source device (if necessary) */
|
||||
|
||||
lpc313x_initsrc();
|
||||
lpc31_initsrc();
|
||||
|
||||
/* Create an offset into the binary image that corresponds to the
|
||||
* virtual address. File offset 0 corresponds to PG_LOCKED_VBASE.
|
||||
@@ -448,7 +448,7 @@ int up_fillpage(FAR _TCB *tcb, FAR void *vpage)
|
||||
|
||||
/* Perform initialization of the paging source device (if necessary) */
|
||||
|
||||
lpc313x_initsrc();
|
||||
lpc31_initsrc();
|
||||
|
||||
/* Create an offset into the binary image that corresponds to the
|
||||
* virtual address. File offset 0 corresponds to PG_LOCKED_VBASE.
|
||||
@@ -493,21 +493,21 @@ int up_fillpage(FAR _TCB *tcb, FAR void *vpage, up_pgcallback_t pg_callback)
|
||||
#endif /* CONFIG_PAGING_BLOCKINGFILL */
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_pginitialize
|
||||
* Name: lpc31_pginitialize
|
||||
*
|
||||
* Description:
|
||||
* Set up mass storage device to support on demand paging.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void weak_function lpc313x_pginitialize(void)
|
||||
void weak_function lpc31_pginitialize(void)
|
||||
{
|
||||
/* This initialization does nothing in this example setup. But this function is
|
||||
* where you might, for example:
|
||||
*
|
||||
* - Initialize and configure a mass storage device to support on-demand paging.
|
||||
* This might be, perhaps an SD card or NAND memory. An SPI FLASH would probably
|
||||
* already have been configured by lpc313x_spiinitialize(void);
|
||||
* already have been configured by lpc31_spiinitialize(void);
|
||||
* - Set up resources to support up_fillpage() operation. For example, perhaps the
|
||||
* the text image is stored in a named binary file. In this case, the virtual
|
||||
* text addresses might map to offsets into that file.
|
||||
|
||||
@@ -49,7 +49,7 @@
|
||||
#include "chip.h"
|
||||
#include "up_arch.h"
|
||||
#include "up_internal.h"
|
||||
#include "lpc313x_internal.h"
|
||||
#include "lpc31_internal.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
|
||||
+48
-48
@@ -54,12 +54,12 @@
|
||||
#include "chip.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "lpc313x_syscreg.h"
|
||||
#include "lpc313x_cgudrvr.h"
|
||||
#include "lpc313x_mpmc.h"
|
||||
#include "lpc31_syscreg.h"
|
||||
#include "lpc31_cgudrvr.h"
|
||||
#include "lpc31_mpmc.h"
|
||||
#include "ea3131_internal.h"
|
||||
|
||||
#ifdef CONFIG_LPC313X_EXTSDRAM
|
||||
#ifdef CONFIG_LPC31XX_EXTSDRAM
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
@@ -103,7 +103,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lpc313x_sdraminitialize
|
||||
* Name: lpc31_sdraminitialize
|
||||
*
|
||||
* Description:
|
||||
* Configure SDRAM on the EA3131 board
|
||||
@@ -155,7 +155,7 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void lpc313x_sdraminitialize(void)
|
||||
static void lpc31_sdraminitialize(void)
|
||||
{
|
||||
uint32_t tmp;
|
||||
uint32_t regval;
|
||||
@@ -164,10 +164,10 @@ static void lpc313x_sdraminitialize(void)
|
||||
* replaced with an apriori value.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_LPC313X_SDRAMHCLK
|
||||
# define HCLK CONFIG_LPC313X_SDRAMHCLK
|
||||
#ifdef CONFIG_LPC31XX_SDRAMHCLK
|
||||
# define HCLK CONFIG_LPC31XX_SDRAMHCLK
|
||||
#else
|
||||
uint32_t hclk = lpc313x_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS);
|
||||
uint32_t hclk = lpc31_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS);
|
||||
# define HCLK hclk
|
||||
#endif
|
||||
|
||||
@@ -175,7 +175,7 @@ static void lpc313x_sdraminitialize(void)
|
||||
#if 0
|
||||
uint32_t hclk2 = hclk;
|
||||
|
||||
if (((getreg32(LPC313X_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0)
|
||||
if (((getreg32(LPC31_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0)
|
||||
{
|
||||
hclk2 >>= 1;
|
||||
}
|
||||
@@ -187,45 +187,45 @@ static void lpc313x_sdraminitialize(void)
|
||||
|
||||
/* Set command delay startergy */
|
||||
|
||||
putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC313X_MPMC_DYNREADCONFIG);
|
||||
putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC31_MPMC_DYNREADCONFIG);
|
||||
|
||||
/* Configure device config register nSDCE0 for proper width SDRAM */
|
||||
|
||||
putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
|
||||
LPC313X_MPMC_DYNCONFIG0);
|
||||
LPC31_MPMC_DYNCONFIG0);
|
||||
putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK),
|
||||
LPC313X_MPMC_DYNRASCAS0);
|
||||
LPC31_MPMC_DYNRASCAS0);
|
||||
|
||||
/* Min 20ns program 1 so that at least 2 HCLKs are used */
|
||||
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TRP, HCLK2, MPMC_DYNTRP_MASK),
|
||||
LPC313X_MPMC_DYNTRP);
|
||||
LPC31_MPMC_DYNTRP);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TRAS, HCLK2, MPMC_DYNTRAS_MASK),
|
||||
LPC313X_MPMC_DYNTRAS);
|
||||
LPC31_MPMC_DYNTRAS);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TREX, HCLK2, MPMC_DYNTSREX_MASK),
|
||||
LPC313X_MPMC_DYNTSREX);
|
||||
LPC31_MPMC_DYNTSREX);
|
||||
putreg32(EA3131_SDRAM_TARP,
|
||||
LPC313X_MPMC_DYNTAPR);
|
||||
LPC31_MPMC_DYNTAPR);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TDAL, HCLK2, MPMC_DYNTDAL_MASK),
|
||||
LPC313X_MPMC_DYNTDAL);
|
||||
LPC31_MPMC_DYNTDAL);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TWR, HCLK2, MPMC_DYNTWR_MASK),
|
||||
LPC313X_MPMC_DYNTWR);
|
||||
LPC31_MPMC_DYNTWR);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TRC, HCLK2, MPMC_DYNTRC_MASK),
|
||||
LPC313X_MPMC_DYNTRC);
|
||||
LPC31_MPMC_DYNTRC);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TRFC, HCLK2, MPMC_DYNTRFC_MASK),
|
||||
LPC313X_MPMC_DYNTRFC);
|
||||
LPC31_MPMC_DYNTRFC);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TXSR, HCLK2, MPMC_DYNTXSR_MASK),
|
||||
LPC313X_MPMC_DYNTXSR);
|
||||
LPC31_MPMC_DYNTXSR);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TRRD, HCLK2, MPMC_DYNTRRD_MASK),
|
||||
LPC313X_MPMC_DYNTRRD);
|
||||
LPC31_MPMC_DYNTRRD);
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_TMRD, HCLK2, MPMC_DYNTMRD_MASK),
|
||||
LPC313X_MPMC_DYNTMRD);
|
||||
LPC31_MPMC_DYNTMRD);
|
||||
up_udelay(100);
|
||||
|
||||
/* Issue continuous NOP commands */
|
||||
|
||||
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INOP),
|
||||
LPC313X_MPMC_DYNCONTROL);
|
||||
LPC31_MPMC_DYNCONTROL);
|
||||
|
||||
/* Load ~200us delay value to timer1 */
|
||||
|
||||
@@ -234,14 +234,14 @@ static void lpc313x_sdraminitialize(void)
|
||||
/* Issue a "pre-charge all" command */
|
||||
|
||||
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IPALL),
|
||||
LPC313X_MPMC_DYNCONTROL);
|
||||
LPC31_MPMC_DYNCONTROL);
|
||||
|
||||
/* Minimum refresh pulse interval (tRFC) for MT48LC32M16A2=80nsec,
|
||||
* 100nsec provides more than adequate interval.
|
||||
*/
|
||||
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_REFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK),
|
||||
LPC313X_MPMC_DYNREFRESH);
|
||||
LPC31_MPMC_DYNREFRESH);
|
||||
|
||||
/* Load ~250us delay value to timer1 */
|
||||
|
||||
@@ -253,12 +253,12 @@ static void lpc313x_sdraminitialize(void)
|
||||
*/
|
||||
|
||||
putreg32(NS2HCLKS(EA3131_SDRAM_OPERREFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK),
|
||||
LPC313X_MPMC_DYNREFRESH);
|
||||
LPC31_MPMC_DYNREFRESH);
|
||||
|
||||
/* Select mode register update mode */
|
||||
|
||||
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IMODE),
|
||||
LPC313X_MPMC_DYNCONTROL);
|
||||
LPC31_MPMC_DYNCONTROL);
|
||||
|
||||
/* Program the SDRAM internal mode registers on bank nSDCE0 and reconfigure
|
||||
* the SDRAM chips. Bus speeds up to 90MHz requires use of a CAS latency = 2.
|
||||
@@ -266,26 +266,26 @@ static void lpc313x_sdraminitialize(void)
|
||||
* 16bit mode
|
||||
*/
|
||||
|
||||
tmp = getreg32(LPC313X_EXTSDRAM0_VSECTION | (0x23 << 13));
|
||||
tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
|
||||
|
||||
putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
|
||||
LPC313X_MPMC_DYNCONFIG0);
|
||||
LPC31_MPMC_DYNCONFIG0);
|
||||
putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK),
|
||||
LPC313X_MPMC_DYNRASCAS0);
|
||||
LPC31_MPMC_DYNRASCAS0);
|
||||
|
||||
/* Select normal operating mode */
|
||||
|
||||
putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INORMAL),
|
||||
LPC313X_MPMC_DYNCONTROL);
|
||||
LPC31_MPMC_DYNCONTROL);
|
||||
|
||||
/* Enable buffers */
|
||||
|
||||
regval = getreg32(LPC313X_MPMC_DYNCONFIG0);
|
||||
regval = getreg32(LPC31_MPMC_DYNCONFIG0);
|
||||
regval |= MPMC_DYNCONFIG0_B;
|
||||
putreg32(regval, LPC313X_MPMC_DYNCONFIG0);
|
||||
putreg32(regval, LPC31_MPMC_DYNCONFIG0);
|
||||
|
||||
putreg32((MPMC_DYNCONTROL_INORMAL|MPMC_DYNCONTROL_CS),
|
||||
LPC313X_MPMC_DYNCONTROL);
|
||||
LPC31_MPMC_DYNCONTROL);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -293,14 +293,14 @@ static void lpc313x_sdraminitialize(void)
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: lpc313x_meminitialize
|
||||
* Name: lpc31_meminitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize external memory resources (sram, sdram, nand, nor, etc.)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void lpc313x_meminitialize(void)
|
||||
void lpc31_meminitialize(void)
|
||||
{
|
||||
/* Configure the LCD pins in external bus interface (EBI/MPMC) memory mode.
|
||||
*
|
||||
@@ -326,34 +326,34 @@ void lpc313x_meminitialize(void)
|
||||
* LCD_DB_15 -> EBI_A_15
|
||||
*/
|
||||
|
||||
putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC313X_SYSCREG_MUX_LCDEBISEL);
|
||||
putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC31_SYSCREG_MUX_LCDEBISEL);
|
||||
|
||||
/* Enable EBI clock */
|
||||
|
||||
lpc313x_enableclock(CLKID_EBICLK);
|
||||
lpc31_enableclock(CLKID_EBICLK);
|
||||
|
||||
/* Enable MPMC controller clocks */
|
||||
|
||||
lpc313x_enableclock(CLKID_MPMCCFGCLK);
|
||||
lpc313x_enableclock(CLKID_MPMCCFGCLK2);
|
||||
lpc313x_enableclock(CLKID_MPMCCFGCLK3);
|
||||
lpc31_enableclock(CLKID_MPMCCFGCLK);
|
||||
lpc31_enableclock(CLKID_MPMCCFGCLK2);
|
||||
lpc31_enableclock(CLKID_MPMCCFGCLK3);
|
||||
|
||||
/* Enable the external memory controller */
|
||||
|
||||
putreg32(MPMC_CONTROL_E, LPC313X_MPMC_CONTROL);
|
||||
putreg32(MPMC_CONTROL_E, LPC31_MPMC_CONTROL);
|
||||
|
||||
/* Force HCLK to MPMC_CLK to 1:1 ratio, little-endian mode */
|
||||
|
||||
putreg32(0, LPC313X_MPMC_CONFIG);
|
||||
putreg32(0, LPC31_MPMC_CONFIG);
|
||||
|
||||
/* Set MPMC delay based on trace lengths between SDRAM and the chip
|
||||
* and on the delay strategy used for SDRAM.
|
||||
*/
|
||||
|
||||
putreg32(EA3131_MPMC_DELAY, LPC313X_SYSCREG_MPMC_DELAYMODES);
|
||||
putreg32(EA3131_MPMC_DELAY, LPC31_SYSCREG_MPMC_DELAYMODES);
|
||||
|
||||
/* Configure Micron MT48LC32M16A2 SDRAM on the EA3131 board */
|
||||
|
||||
lpc313x_sdraminitialize();
|
||||
lpc31_sdraminitialize();
|
||||
}
|
||||
#endif /* CONFIG_LPC313X_EXTSDRAM */
|
||||
#endif /* CONFIG_LPC31XX_EXTSDRAM */
|
||||
|
||||
@@ -45,12 +45,12 @@
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#ifdef CONFIG_LPC313X_MCI
|
||||
#ifdef CONFIG_LPC31XX_MCI
|
||||
# include <nuttx/sdio.h>
|
||||
# include <nuttx/mmcsd.h>
|
||||
#endif
|
||||
|
||||
#include "lpc313x_internal.h"
|
||||
#include "lpc31_internal.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-Processor Definitions
|
||||
@@ -71,8 +71,9 @@
|
||||
# define CONFIG_NSH_MMCSDSLOTNO 0
|
||||
# endif
|
||||
#else
|
||||
/* Add configuration for new LPC313X boards here */
|
||||
# error "Unrecognized LPC313X board"
|
||||
/* Add configuration for new LPC31XX boards here */
|
||||
|
||||
# error "Unrecognized LPC31XX board"
|
||||
# undef CONFIG_NSH_HAVEUSBDEV
|
||||
# undef CONFIG_NSH_HAVEMMCSD
|
||||
#endif
|
||||
@@ -87,7 +88,7 @@
|
||||
* is not enabled.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC313X_MCI)
|
||||
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31XX_MCI)
|
||||
# undef CONFIG_NSH_HAVEMMCSD
|
||||
#endif
|
||||
|
||||
|
||||
+15
-15
@@ -2,7 +2,7 @@
|
||||
* configs/ea3131/src/up_spi.c
|
||||
* arch/arm/src/board/up_spi.c
|
||||
*
|
||||
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -49,12 +49,12 @@
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "chip.h"
|
||||
#include "lpc313x_internal.h"
|
||||
#include "lpc31_internal.h"
|
||||
#include "ea3131_internal.h"
|
||||
|
||||
#ifdef CONFIG_LPC313X_SPI
|
||||
#if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc313x_spi.c
|
||||
* in arch/arm/src/lpc313x */
|
||||
#ifdef CONFIG_LPC31XX_SPI
|
||||
#if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc31_spi.c
|
||||
* in arch/arm/src/lpc31xx */
|
||||
|
||||
/************************************************************************************
|
||||
* Definitions
|
||||
@@ -87,14 +87,14 @@
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_spiinitialize
|
||||
* Name: lpc31_spiinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI chip select GPIO pins for the EA3131 board.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void weak_function lpc313x_spiinitialize(void)
|
||||
void weak_function lpc31_spiinitialize(void)
|
||||
{
|
||||
/* NOTE: Clocking for SPI has already been provided. Pin configuration is performed
|
||||
* on-the-fly, so no additional setup is required.
|
||||
@@ -102,19 +102,19 @@ void weak_function lpc313x_spiinitialize(void)
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: lpc313x_spiselect and lpc313x_spistatus
|
||||
* Name: lpc31_spiselect and lpc31_spistatus
|
||||
*
|
||||
* Description:
|
||||
* The external functions, lpc313x_spiselect and lpc313x_spistatus must be
|
||||
* The external functions, lpc31_spiselect and lpc31_spistatus must be
|
||||
* provided by board-specific logic. They are implementations of the select
|
||||
* and status methods of the SPI interface defined by struct spi_ops_s (see
|
||||
* include/nuttx/spi.h). All other methods (including up_spiinitialize())
|
||||
* are provided by common LPC313X logic. To use this common SPI logic on your
|
||||
* are provided by common LPC31XX logic. To use this common SPI logic on your
|
||||
* board:
|
||||
*
|
||||
* 1. Provide logic in lpc313x_boardinitialize() to configure SPI chip select
|
||||
* 1. Provide logic in lpc31_boardinitialize() to configure SPI chip select
|
||||
* pins.
|
||||
* 2. Provide lpc313x_spiselect() and lpc313x_spistatus() functions in your
|
||||
* 2. Provide lpc31_spiselect() and lpc31_spistatus() functions in your
|
||||
* board-specific logic. These functions will perform chip selection and
|
||||
* status operations using GPIOs in the way your board is configured.
|
||||
* 3. Add a calls to up_spiinitialize() in your low level application
|
||||
@@ -126,17 +126,17 @@ void weak_function lpc313x_spiinitialize(void)
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void lpc313x_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
{
|
||||
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||
#warning "Missing logic"
|
||||
}
|
||||
|
||||
uint8_t lpc313x_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
{
|
||||
return SPI_STATUS_PRESENT;
|
||||
}
|
||||
|
||||
#endif /* 0 */
|
||||
#endif /* CONFIG_LPC313X_SPI */
|
||||
#endif /* CONFIG_LPC31XX_SPI */
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* configs/ea3131/tools/lpchdr.c
|
||||
*
|
||||
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2010-2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -219,7 +219,7 @@ static inline void writefile(int infd, int outfd, size_t len, size_t padlen)
|
||||
|
||||
int main(int argc, char **argv, char **envp)
|
||||
{
|
||||
struct lpc313x_header_s g_hdr;
|
||||
struct lpc31_header_s g_hdr;
|
||||
struct stat buf;
|
||||
ssize_t nbytes;
|
||||
size_t padlen;
|
||||
@@ -258,7 +258,7 @@ int main(int argc, char **argv, char **envp)
|
||||
|
||||
/* Initialize the header */
|
||||
|
||||
memset(&g_hdr, 0, sizeof(struct lpc313x_header_s));
|
||||
memset(&g_hdr, 0, sizeof(struct lpc31_header_s));
|
||||
g_hdr.vector = 0xea00001e; /* b 0x11029080 */
|
||||
g_hdr.magic = 0x41676d69;
|
||||
#if 1 /* CRC doesn't seem to be functional */
|
||||
@@ -266,7 +266,7 @@ int main(int argc, char **argv, char **envp)
|
||||
#else
|
||||
g_hdr.imageType = 0x0000000b;
|
||||
#endif
|
||||
g_hdr.imageLength = (buf.st_size + sizeof(struct lpc313x_header_s) + 511) & ~0x1ff;
|
||||
g_hdr.imageLength = (buf.st_size + sizeof(struct lpc31_header_s) + 511) & ~0x1ff;
|
||||
|
||||
/* This is how much we must pad at the end of the binary image. */
|
||||
|
||||
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __CONFIGS_EA3131_TOOLS_BINFMT_H
|
||||
#define __CONFIGS_EA3131_TOOLS_BINFMT_H
|
||||
#ifndef __CONFIGS_EA3131_TOOLS_LPCHDR_H
|
||||
#define __CONFIGS_EA3131_TOOLS_LPCHDR_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -50,7 +50,7 @@
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
struct lpc313x_header_s
|
||||
struct lpc31_header_s
|
||||
{
|
||||
/* OFFS DESCRIPTION */
|
||||
uint32_t vector; /* 0x00 Valid ARM instruction. Usually this will be
|
||||
@@ -101,5 +101,5 @@ struct lpc313x_header_s
|
||||
extern uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val);
|
||||
extern uint32_t crc32(const uint8_t *src, size_t len);
|
||||
|
||||
#endif /* __CONFIGS_EA3131_TOOLS_BINFMT_H */
|
||||
#endif /* __CONFIGS_EA3131_TOOLS_LPCHDR_H */
|
||||
|
||||
|
||||
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
|
||||
|
||||
# Setup for the selected toolchain
|
||||
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
|
||||
# CodeSourcery under Windows
|
||||
CROSSDEV = arm-none-eabi-
|
||||
WINTOOL = y
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
|
||||
# CodeSourcery under Linux
|
||||
CROSSDEV = arm-none-eabi-
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
|
||||
ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
|
||||
# devkitARM under Windows
|
||||
CROSSDEV = arm-eabi-
|
||||
WINTOOL = y
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
# NuttX buildroot under Linux or Cygwin
|
||||
CROSSDEV = arm-elf-
|
||||
MAXOPTIMIZATION = -Os
|
||||
@@ -121,7 +121,7 @@ OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
|
||||
@@ -50,13 +50,13 @@
|
||||
# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
|
||||
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
|
||||
# CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
|
||||
# size of installed DRAM. For the LPC313X, it is used only to
|
||||
# size of installed DRAM. For the LPC31XX, it is used only to
|
||||
# deterimine how to map the executable regions. It is SDRAM size
|
||||
# only if you are executing out of the external SDRAM; or it could
|
||||
# be NOR FLASH size, external SRAM size, or internal SRAM size.
|
||||
# CONFIG_DRAM_START - The start address of DRAM (physical)
|
||||
# CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
|
||||
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
# stack. If defined, this symbol is the size of the interrupt
|
||||
# stack in bytes. If not defined, the user task stacks will be
|
||||
@@ -76,7 +76,7 @@
|
||||
CONFIG_ARCH=arm
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_ARCH_ARM926EJS=y
|
||||
CONFIG_ARCH_CHIP=lpc313x
|
||||
CONFIG_ARCH_CHIP=lpc31xx
|
||||
CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD=ea3131
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
|
||||
|
||||
# Identify toolchain and linker options
|
||||
#
|
||||
CONFIG_LPC313X_CODESOURCERYW=n
|
||||
CONFIG_LPC313X_CODESOURCERYL=y
|
||||
CONFIG_LPC313X_DEVKITARM=n
|
||||
CONFIG_LPC313X_BUILDROOT=n
|
||||
CONFIG_LPC31XX_CODESOURCERYW=n
|
||||
CONFIG_LPC31XX_CODESOURCERYL=y
|
||||
CONFIG_LPC31XX_DEVKITARM=n
|
||||
CONFIG_LPC31XX_BUILDROOT=n
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
CONFIG_LPC313X_MCI=n
|
||||
CONFIG_LPC313X_SPI=n
|
||||
CONFIG_LPC313X_UART=y
|
||||
CONFIG_LPC31XX_MCI=n
|
||||
CONFIG_LPC31XX_SPI=n
|
||||
CONFIG_LPC31XX_UART=y
|
||||
|
||||
#
|
||||
# Exernal memory available on the board (see also CONFIG_MM_REGIONS)
|
||||
#
|
||||
# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# external SRAM0 memory
|
||||
# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# external SRAM1 memory
|
||||
# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external SDRAM memory
|
||||
# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external NAND memory
|
||||
#
|
||||
CONFIG_LPC313X_EXTSRAM0=n
|
||||
CONFIG_LPC313X_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSRAM1=n
|
||||
CONFIG_LPC313X_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSDRAM=n
|
||||
CONFIG_LPC313X_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC313X_EXTNAND=n
|
||||
CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM0=n
|
||||
CONFIG_LPC31XX_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM1=n
|
||||
CONFIG_LPC31XX_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSDRAM=n
|
||||
CONFIG_LPC31XX_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTNAND=n
|
||||
CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
|
||||
|
||||
#
|
||||
# LPC313X specific device driver settings
|
||||
# LPC31XX specific device driver settings
|
||||
#
|
||||
# CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
|
||||
# console and ttys0
|
||||
@@ -538,20 +538,20 @@ CONFIG_USBDEV_TRACE=y
|
||||
CONFIG_USBDEV_TRACE_NRECORDS=128
|
||||
|
||||
#
|
||||
# LPC313X USB Configuration
|
||||
# LPC31XX USB Configuration
|
||||
#
|
||||
# CONFIG_LPC313X_GIO_USBATTACH
|
||||
# CONFIG_LPC31XX_GIO_USBATTACH
|
||||
# GIO that detects USB attach/detach events
|
||||
# CONFIG_LPC313X_GIO_USBDPPULLUP
|
||||
# CONFIG_LPC31XX_GIO_USBDPPULLUP
|
||||
# GIO
|
||||
# CONFIG_DMA320_USBDEV_DMA
|
||||
# Enable LPC313X-specific DMA support
|
||||
# Enable LPC31XX-specific DMA support
|
||||
#
|
||||
CONFIG_LPC313X_GIO_USBATTACH=6
|
||||
CONFIG_LPC313X_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC313X_VENDORID=0xd320
|
||||
CONFIG_LPC313X_PRODUCTID=0x3211
|
||||
CONFIG_LPC313X_USBDEV_DMA=n
|
||||
CONFIG_LPC31XX_GIO_USBATTACH=6
|
||||
CONFIG_LPC31XX_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC31XX_VENDORID=0xd320
|
||||
CONFIG_LPC31XX_PRODUCTID=0x3211
|
||||
CONFIG_LPC31XX_USBDEV_DMA=n
|
||||
|
||||
#
|
||||
# USB Serial Device Configuration
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
|
||||
* LPC313x boot ROM expects the boot image be compiled with entry point at
|
||||
* LPC31xx boot ROM expects the boot image be compiled with entry point at
|
||||
* 0x1102:9000. A 128b header will appear at this address (applied by
|
||||
* lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
|
||||
*/
|
||||
|
||||
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
|
||||
|
||||
# Setup for the selected toolchain
|
||||
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
|
||||
# CodeSourcery under Windows
|
||||
CROSSDEV = arm-none-eabi-
|
||||
WINTOOL = y
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
|
||||
ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
|
||||
# CodeSourcery under Linux
|
||||
CROSSDEV = arm-none-eabi-
|
||||
MAXOPTIMIZATION = -O2
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
|
||||
ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
|
||||
# devkitARM under Windows
|
||||
CROSSDEV = arm-eabi-
|
||||
WINTOOL = y
|
||||
endif
|
||||
ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
# NuttX buildroot under Linux or Cygwin
|
||||
CROSSDEV = arm-elf-
|
||||
MAXOPTIMIZATION = -Os
|
||||
@@ -121,7 +121,7 @@ OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
|
||||
ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
|
||||
LDFLAGS += -nostartfiles -nodefaultlibs
|
||||
endif
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
|
||||
@@ -50,13 +50,13 @@
|
||||
# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
|
||||
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
|
||||
# CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
|
||||
# size of installed DRAM. For the LPC313X, it is used only to
|
||||
# size of installed DRAM. For the LPC31XX, it is used only to
|
||||
# deterimine how to map the executable regions. It is SDRAM size
|
||||
# only if you are executing out of the external SDRAM; or it could
|
||||
# be NOR FLASH size, external SRAM size, or internal SRAM size.
|
||||
# CONFIG_DRAM_START - The start address of DRAM (physical)
|
||||
# CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
|
||||
# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
|
||||
# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
|
||||
# stack. If defined, this symbol is the size of the interrupt
|
||||
# stack in bytes. If not defined, the user task stacks will be
|
||||
@@ -76,7 +76,7 @@
|
||||
CONFIG_ARCH=arm
|
||||
CONFIG_ARCH_ARM=y
|
||||
CONFIG_ARCH_ARM926EJS=y
|
||||
CONFIG_ARCH_CHIP=lpc313x
|
||||
CONFIG_ARCH_CHIP=lpc31xx
|
||||
CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD=ea3131
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
|
||||
|
||||
# Identify toolchain and linker options
|
||||
#
|
||||
CONFIG_LPC313X_CODESOURCERYW=n
|
||||
CONFIG_LPC313X_CODESOURCERYL=y
|
||||
CONFIG_LPC313X_DEVKITARM=n
|
||||
CONFIG_LPC313X_BUILDROOT=n
|
||||
CONFIG_LPC31XX_CODESOURCERYW=n
|
||||
CONFIG_LPC31XX_CODESOURCERYL=y
|
||||
CONFIG_LPC31XX_DEVKITARM=n
|
||||
CONFIG_LPC31XX_BUILDROOT=n
|
||||
|
||||
#
|
||||
# Individual subsystems can be enabled:
|
||||
#
|
||||
CONFIG_LPC313X_MCI=n
|
||||
CONFIG_LPC313X_SPI=n
|
||||
CONFIG_LPC313X_UART=y
|
||||
CONFIG_LPC31XX_MCI=n
|
||||
CONFIG_LPC31XX_SPI=n
|
||||
CONFIG_LPC31XX_UART=y
|
||||
|
||||
#
|
||||
# Exernal memory available on the board (see also CONFIG_MM_REGIONS)
|
||||
#
|
||||
# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
|
||||
# external SRAM0 memory
|
||||
# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
|
||||
# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
|
||||
# external SRAM1 memory
|
||||
# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
|
||||
# configured as part of the NuttX heap.
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external SDRAM memory
|
||||
# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
|
||||
# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
|
||||
# external NAND memory
|
||||
#
|
||||
CONFIG_LPC313X_EXTSRAM0=n
|
||||
CONFIG_LPC313X_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSRAM1=n
|
||||
CONFIG_LPC313X_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC313X_EXTSDRAM=n
|
||||
CONFIG_LPC313X_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC313X_EXTNAND=n
|
||||
CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM0=n
|
||||
CONFIG_LPC31XX_EXTSRAM0HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSRAM1=n
|
||||
CONFIG_LPC31XX_EXTSRAM1HEAP=n
|
||||
CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
|
||||
CONFIG_LPC31XX_EXTSDRAM=n
|
||||
CONFIG_LPC31XX_EXTSDRAMHEAP=n
|
||||
CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
|
||||
CONFIG_LPC31XX_EXTNAND=n
|
||||
CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
|
||||
|
||||
#
|
||||
# LPC313X specific device driver settings
|
||||
# LPC31XX specific device driver settings
|
||||
#
|
||||
# CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
|
||||
# console and ttys0
|
||||
@@ -538,20 +538,20 @@ CONFIG_USBDEV_TRACE=n
|
||||
CONFIG_USBDEV_TRACE_NRECORDS=128
|
||||
|
||||
#
|
||||
# LPC313X USB Configuration
|
||||
# LPC31XX USB Configuration
|
||||
#
|
||||
# CONFIG_LPC313X_GIO_USBATTACH
|
||||
# CONFIG_LPC31XX_GIO_USBATTACH
|
||||
# GIO that detects USB attach/detach events
|
||||
# CONFIG_LPC313X_GIO_USBDPPULLUP
|
||||
# CONFIG_LPC31XX_GIO_USBDPPULLUP
|
||||
# GIO
|
||||
# CONFIG_DMA320_USBDEV_DMA
|
||||
# Enable LPC313X-specific DMA support
|
||||
# Enable LPC31XX-specific DMA support
|
||||
#
|
||||
CONFIG_LPC313X_GIO_USBATTACH=6
|
||||
CONFIG_LPC313X_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC313X_VENDORID=0xd320
|
||||
CONFIG_LPC313X_PRODUCTID=0x3211
|
||||
CONFIG_LPC313X_USBDEV_DMA=n
|
||||
CONFIG_LPC31XX_GIO_USBATTACH=6
|
||||
CONFIG_LPC31XX_GIO_USBDPPULLUP=17
|
||||
CONFIG_LPC31XX_VENDORID=0xd320
|
||||
CONFIG_LPC31XX_PRODUCTID=0x3211
|
||||
CONFIG_LPC31XX_USBDEV_DMA=n
|
||||
|
||||
#
|
||||
# USB Serial Device Configuration
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
|
||||
* LPC313x boot ROM expects the boot image be compiled with entry point at
|
||||
* LPC31xx boot ROM expects the boot image be compiled with entry point at
|
||||
* 0x1102:9000. A 128b header will appear at this address (applied by
|
||||
* lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
|
||||
*/
|
||||
|
||||
Reference in New Issue
Block a user