Rename all lpc313x to lpc31xx

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3644 42af7a65-404d-4744-a932-0658087f49c3
2026-06-05 15:58:59 +08:00 · 2011-05-27 15:26:52 +00:00
parent 18fc1a389a
commit 012368c484
31 changed files with 1065 additions and 1064 deletions
@@ -43,12 +43,12 @@ GNU Toolchain Options
  add one of the following configuration options to your .config (or defconfig)
  file:
-    CONFIG_LPC313X_CODESOURCERYW=y  : CodeSourcery under Windows
+    CONFIG_LPC31XX_CODESOURCERYW=y  : CodeSourcery under Windows
-    CONFIG_LPC313X_CODESOURCERYL=y  : CodeSourcery under Linux
+    CONFIG_LPC31XX_CODESOURCERYL=y  : CodeSourcery under Linux
-    CONFIG_LPC313X_DEVKITARM=y      : devkitARM under Windows
+    CONFIG_LPC31XX_DEVKITARM=y      : devkitARM under Windows
-    CONFIG_LPC313X_BUILDROOT=y	    : NuttX buildroot under Linux or Cygwin (default)
+    CONFIG_LPC31XX_BUILDROOT=y	    : NuttX buildroot under Linux or Cygwin (default)
-  If you are not using CONFIG_LPC313X_BUILDROOT, then you may also have to modify
+  If you are not using CONFIG_LPC31XX_BUILDROOT, then you may also have to modify
  the PATH in the setenv.h file if your make cannot find the tools.
  NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are
@@ -117,13 +117,13 @@ IDEs
  2) Start the NuttX build at least one time from the Cygwin command line
     before trying to create your project.  This is necessary to create
     certain auto-generated files and directories that will be needed.
-  3) Set up include pathes:  You will need include/, arch/arm/src/lpc313x,
+  3) Set up include pathes:  You will need include/, arch/arm/src/lpc31xx,
     arch/arm/src/common, arch/arm/src/cortexm3, and sched/.
  4) All assembly files need to have the definition option -D __ASSEMBLY__
     on the command line.
  Startup files will probably cause you some headaches.  The NuttX startup file
-  is arch/arm/src/lpc313x/lpc313x_vectors.S.  With RIDE, I have to build NuttX
+  is arch/arm/src/lpc31xx/lpc31_vectors.S.  With RIDE, I have to build NuttX
  one time from the Cygwin command line in order to obtain the pre-built
  startup object needed by RIDE.
@@ -426,7 +426,7 @@ On-Demand Paging
  NOTE:  See the TODO list in the top-level directory:
-    "arch/arm/src/lpc313x/lpc313x_spi.c may or may not be functional.  It was
+    "arch/arm/src/lpc31xx/lpc31_spi.c may or may not be functional.  It was
     reported to be working, but I was unable to get it working with the
     Atmel at45dbxx serial FLASH driver."
@@ -549,27 +549,27 @@ ARM/EA3131-specific Configuration Options
  Individual subsystems can be enabled:
-	CONFIG_LPC313X_MCI, CONFIG_LPC313X_SPI, CONFIG_LPC313X_UART
+	CONFIG_LPC31XX_MCI, CONFIG_LPC31XX_SPI, CONFIG_LPC31XX_UART
  External memory available on the board (see also CONFIG_MM_REGIONS)
-	CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
+	CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
-	CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
+	CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
 	  configured as part of the NuttX heap.
-	CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
+	CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
 	  external SRAM0 memory
-	CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
+	CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
-	CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
+	CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
 	  configured as part of the NuttX heap.
-	CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
+	CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
 	  external SRAM1 memory
-	CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
+	CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
-	CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
+	CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
 	  configured as part of the NuttX heap.
-	CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+	CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 	  external SDRAM memory
-	CONFIG_LPC313X_EXTNAND - Select if external NAND is present
+	CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
-	CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+	CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 	  external NAND memory
  LPC313X specific device driver settings
@@ -44,7 +44,7 @@
 #include <nuttx/config.h>
 #ifndef __ASSEMBLY__
 # include <stdint.h>
-# include "lpc313x_cgudrvr.h"
+# include "lpc31_cgudrvr.h"
 #endif
 /************************************************************************************
@@ -131,16 +131,16 @@ extern "C" {
 * Public Function Prototypes
 ************************************************************************************/
 /************************************************************************************
- * Name: lpc313x_boardinitialize
+ * Name: lpc31_boardinitialize
 *
 * Description:
- *   All LPC313X architectures must provide the following entry point.  This entry
+ *   All LPC31XX architectures must provide the following entry point.  This entry
 *   point is called early in the intitialization -- after all memory has been
 *   configured and mapped but before any devices have been initialized.
 *
 ************************************************************************************/
-EXTERN void lpc313x_boardinitialize(void);
+EXTERN void lpc31_boardinitialize(void);
 /************************************************************************************
 * Button support.
@@ -2,7 +2,7 @@
 * configs/ea3131/include/board_memorymap.h
 * include/arch/board/board_memorymap.h
 *
- *   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -38,7 +38,7 @@
 #define __ARCH_BOARD_BOARD_MEMORYMAP_H
 /* This file should never be included directly, but only indirectly via
- * lpc313x_memorymap.h.
+ * lpc31_memorymap.h.
 */
 /************************************************************************************
@@ -51,44 +51,44 @@
 * Definitions
 ************************************************************************************/
-/* If the LPC313x ROM page table is selected, then the board-logic is required
+/* If the LPC31xx ROM page table is selected, then the board-logic is required
 * to provide:
 *
 *   PGTABLE_BASE_PADDR - The physical address of the page table in ROM,
 *   PGTABLE_BASE_VADDR - The mapped address of the page table in ROM, and
- *   Mappings for each of the PSECTIONS in lpc313x_memorymap.h
+ *   Mappings for each of the PSECTIONS in lpc31_memorymap.h
 */
 #ifdef CONFIG_ARCH_ROMPGTABLE
-   /* The LPC313x ROM page table uses a 1-1 physical to virtual memory mapping */
+   /* The LPC31xx ROM page table uses a 1-1 physical to virtual memory mapping */
-#  define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
+#  define LPC31_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
-#  define LPC313X_INTSRAM_VSECTION     0x11028000 /*                        Internal SRAM 96Kb-192Kb */
+#  define LPC31_INTSRAM_VSECTION     0x11028000 /*                        Internal SRAM 96Kb-192Kb */
-#    define LPC313X_INTSRAM0_VADDR     0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
+#    define LPC31_INTSRAM0_VADDR     0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
-#    define LPC313X_INTSRAM1_VADDR     0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */
+#    define LPC31_INTSRAM1_VADDR     0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */
-#  define LPC313X_INTSROM0_VSECTION    0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */
+#  define LPC31_INTSROM0_VSECTION    0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */
-#  define LPC313X_APB01_VSECTION       0x13000000 /* 0x13000000-0x1300bfff: APB0 32Kb  APB1 16Kb*/
+#  define LPC31_APB01_VSECTION       0x13000000 /* 0x13000000-0x1300bfff: APB0 32Kb  APB1 16Kb*/
-#    define LPC313X_APB0_VADDR         0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */
+#    define LPC31_APB0_VADDR         0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */
-#    define LPC313X_APB1_VADDR         0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */
+#    define LPC31_APB1_VADDR         0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */
-#  define LPC313X_APB2_VSECTION        0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */
+#  define LPC31_APB2_VSECTION        0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */
-#  define LPC313X_APB3_VSECTION        0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */
+#  define LPC31_APB3_VSECTION        0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */
-#  define LPC313X_APB4MPMC_VSECTION    0x17000000 /*                        8Kb */
+#  define LPC31_APB4MPMC_VSECTION    0x17000000 /*                        8Kb */
-#    define LPC313X_APB4_VADDR         0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */
+#    define LPC31_APB4_VADDR         0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */
-#    define LPC313X_MPMC_VADDR         0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */
+#    define LPC31_MPMC_VADDR         0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */
-#  define LPC313X_MCI_VSECTION         0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */
+#  define LPC31_MCI_VSECTION         0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */
-#  define LPC313X_USBOTG_VSECTION      0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */
+#  define LPC31_USBOTG_VSECTION      0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */
-#  define LPC313X_EXTSRAM_VSECTION     0x20020000 /*                        64-128Kb */
+#  define LPC31_EXTSRAM_VSECTION     0x20020000 /*                        64-128Kb */
-#    define LPC313X_EXTSRAM0_VADDR     0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */
+#    define LPC31_EXTSRAM0_VADDR     0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */
-#    define LPC313X_EXTSRAM1_VADDR     0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */
+#    define LPC31_EXTSRAM1_VADDR     0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */
-#  define LPC313X_EXTSDRAM0_VSECTION   0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */
+#  define LPC31_EXTSDRAM0_VSECTION   0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */
-#  define LPC313X_INTC_VSECTION        0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */
+#  define LPC31_INTC_VSECTION        0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */
-#  define LPC313X_NAND_VSECTION        0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */
+#  define LPC31_NAND_VSECTION        0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */
   /* Define the address of the page table within the ROM */
-#  define ROMPGTABLE_OFFSET            0x0001c000  /* Offset of the ROM page table in ROM */
+#  define ROMPGTABLE_OFFSET          0x0001c000  /* Offset of the ROM page table in ROM */
-#  define PGTABLE_BASE_PADDR           (LPC313X_INTSROM0_PSECTION+ROMPGTABLE_OFFSET)
+#  define PGTABLE_BASE_PADDR         (LPC31_INTSROM0_PSECTION+ROMPGTABLE_OFFSET)
-#  define PGTABLE_BASE_VADDR           (LPC313X_INTSROM0_VSECTION+ROMPGTABLE_OFFSET)
+#  define PGTABLE_BASE_VADDR         (LPC31_INTSROM0_VSECTION+ROMPGTABLE_OFFSET)
 #endif
 /************************************************************************************
@@ -117,7 +117,7 @@ echo "EXTERN(up_vectoraddrexcptn)" >>ld-locked.inc
 echo "EXTERN(up_timerinit)" >>ld-locked.inc
-answer=$(checkconfig CONFIG_LPC313X_UART)
+answer=$(checkconfig CONFIG_LPC31XX_UART)
 if [ $answer = y ]; then
 	echo "EXTERN(up_earlyserialinit)" >>ld-locked.inc
 fi
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
 # Setup for the selected toolchain
-ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
  # CodeSourcery under Windows
  CROSSDEV = arm-none-eabi-
  WINTOOL = y
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
  # CodeSourcery under Linux
  CROSSDEV = arm-none-eabi-
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
+ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
  # devkitARM under Windows
  CROSSDEV = arm-eabi-
  WINTOOL = y
 endif
-ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
  # NuttX buildroot under Linux or Cygwin
  CROSSDEV = arm-elf-
  MAXOPTIMIZATION = -Os
@@ -121,7 +121,7 @@ OBJEXT = .o
 LIBEXT = .a
 EXEEXT =
-ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
  LDFLAGS += -nostartfiles -nodefaultlibs
 endif
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
@@ -50,13 +50,13 @@
 # CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
 # CONFIG_BOARD_LOOPSPERMSEC - for delay loops
 # CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
-#   size of installed DRAM.  For the LPC313X, it is used only to
+#   size of installed DRAM.  For the LPC31XX, it is used only to
 #   deterimine how to map the executable regions.  It is SDRAM size
 #   only if you are executing out of the external SDRAM; or it could
 #   be NOR FLASH size, external SRAM size, or internal SRAM size.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
-# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
+# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
 #   stack in bytes.  If not defined, the user task stacks will be
@@ -76,7 +76,7 @@
 CONFIG_ARCH=arm
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM926EJS=y
-CONFIG_ARCH_CHIP=lpc313x
+CONFIG_ARCH_CHIP=lpc31xx
 CONFIG_ARCH_CHIP_LPC3131=y
 CONFIG_ARCH_BOARD=ea3131
 CONFIG_ARCH_BOARD_EA3131=y
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
 # Identify toolchain and linker options
 #
-CONFIG_LPC313X_CODESOURCERYW=n
+CONFIG_LPC31XX_CODESOURCERYW=n
-CONFIG_LPC313X_CODESOURCERYL=n
+CONFIG_LPC31XX_CODESOURCERYL=n
-CONFIG_LPC313X_DEVKITARM=n
+CONFIG_LPC31XX_DEVKITARM=n
-CONFIG_LPC313X_BUILDROOT=y
+CONFIG_LPC31XX_BUILDROOT=y
 #
 #  Individual subsystems can be enabled:
 #
-CONFIG_LPC313X_MCI=n
+CONFIG_LPC31XX_MCI=n
-CONFIG_LPC313X_SPI=n
+CONFIG_LPC31XX_SPI=n
-CONFIG_LPC313X_UART=y
+CONFIG_LPC31XX_UART=y
 #
 # Exernal memory available on the board (see also CONFIG_MM_REGIONS)
 #
-# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
+# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
-# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
+# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
 #   external SRAM0 memory
-# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
+# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
-# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
+# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
 #   external SRAM1 memory
-# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
+# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
-# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
+# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external SDRAM memory
-# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
+# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external NAND memory
 #
-CONFIG_LPC313X_EXTSRAM0=n
+CONFIG_LPC31XX_EXTSRAM0=n
-CONFIG_LPC313X_EXTSRAM0HEAP=n
+CONFIG_LPC31XX_EXTSRAM0HEAP=n
-CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
-CONFIG_LPC313X_EXTSRAM1=n
+CONFIG_LPC31XX_EXTSRAM1=n
-CONFIG_LPC313X_EXTSRAM1HEAP=n
+CONFIG_LPC31XX_EXTSRAM1HEAP=n
-CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
-CONFIG_LPC313X_EXTSDRAM=n
+CONFIG_LPC31XX_EXTSDRAM=n
-CONFIG_LPC313X_EXTSDRAMHEAP=n
+CONFIG_LPC31XX_EXTSDRAMHEAP=n
-CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
-CONFIG_LPC313X_EXTNAND=n
+CONFIG_LPC31XX_EXTNAND=n
-CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
 #
-# LPC313X specific device driver settings
+# LPC31XX specific device driver settings
 #
 # CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
 #   console and ttys0
@@ -535,20 +535,20 @@ CONFIG_USBDEV_TRACE=n
 CONFIG_USBDEV_TRACE_NRECORDS=128
 #
-# LPC313X USB Configuration
+# LPC31XX USB Configuration
 #
-# CONFIG_LPC313X_GIO_USBATTACH
+# CONFIG_LPC31XX_GIO_USBATTACH
 #   GIO that detects USB attach/detach events
-# CONFIG_LPC313X_GIO_USBDPPULLUP
+# CONFIG_LPC31XX_GIO_USBDPPULLUP
 #   GIO 
 # CONFIG_DMA320_USBDEV_DMA
-#   Enable LPC313X-specific DMA support
+#   Enable LPC31XX-specific DMA support
 #
-CONFIG_LPC313X_GIO_USBATTACH=6
+CONFIG_LPC31XX_GIO_USBATTACH=6
-CONFIG_LPC313X_GIO_USBDPPULLUP=17
+CONFIG_LPC31XX_GIO_USBDPPULLUP=17
-CONFIG_LPC313X_VENDORID=0xd320
+CONFIG_LPC31XX_VENDORID=0xd320
-CONFIG_LPC313X_PRODUCTID=0x3211
+CONFIG_LPC31XX_PRODUCTID=0x3211
-CONFIG_LPC313X_USBDEV_DMA=n
+CONFIG_LPC31XX_USBDEV_DMA=n
 #
 # USB Serial Device Configuration
@@ -34,7 +34,7 @@
 ****************************************************************************/
 /* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
- * LPC313x boot ROM expects the boot image be compiled with entry point at
+ * LPC31xx boot ROM expects the boot image be compiled with entry point at
 * 0x1102:9000.  A 128b header will appear at this address (applied by
 * lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
 */
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
 # Setup for the selected toolchain
-ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
  # CodeSourcery under Windows
  CROSSDEV = arm-none-eabi-
  WINTOOL = y
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
  # CodeSourcery under Linux
  CROSSDEV = arm-none-eabi-
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
+ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
  # devkitARM under Windows
  CROSSDEV = arm-eabi-
  WINTOOL = y
 endif
-ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
  # NuttX buildroot under Linux or Cygwin
  CROSSDEV = arm-elf-
  MAXOPTIMIZATION = -Os
@@ -121,7 +121,7 @@ OBJEXT = .o
 LIBEXT = .a
 EXEEXT =
-ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
  LDFLAGS += -nostartfiles -nodefaultlibs
 endif
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
@@ -50,13 +50,13 @@
 # CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
 # CONFIG_BOARD_LOOPSPERMSEC - for delay loops
 # CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
-#   size of installed DRAM.  For the LPC313X, it is used only to
+#   size of installed DRAM.  For the LPC31XX, it is used only to
 #   deterimine how to map the executable regions.  It is SDRAM size
 #   only if you are executing out of the external SDRAM; or it could
 #   be NOR FLASH size, external SRAM size, or internal SRAM size.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
-# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
+# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
 #   stack in bytes.  If not defined, the user task stacks will be
@@ -76,7 +76,7 @@
 CONFIG_ARCH=arm
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM926EJS=y
-CONFIG_ARCH_CHIP=lpc313x
+CONFIG_ARCH_CHIP=lpc31xx
 CONFIG_ARCH_CHIP_LPC3131=y
 CONFIG_ARCH_BOARD=ea3131
 CONFIG_ARCH_BOARD_EA3131=y
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
 # Identify toolchain and linker options
 #
-CONFIG_LPC313X_CODESOURCERYW=n
+CONFIG_LPC31XX_CODESOURCERYW=n
-CONFIG_LPC313X_CODESOURCERYL=n
+CONFIG_LPC31XX_CODESOURCERYL=n
-CONFIG_LPC313X_DEVKITARM=n
+CONFIG_LPC31XX_DEVKITARM=n
-CONFIG_LPC313X_BUILDROOT=y
+CONFIG_LPC31XX_BUILDROOT=y
 #
 #  Individual subsystems can be enabled:
 #
-CONFIG_LPC313X_MCI=n
+CONFIG_LPC31XX_MCI=n
-CONFIG_LPC313X_SPI=n
+CONFIG_LPC31XX_SPI=n
-CONFIG_LPC313X_UART=y
+CONFIG_LPC31XX_UART=y
 #
 # Exernal memory available on the board (see also CONFIG_MM_REGIONS)
 #
-# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
+# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
-# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
+# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
 #   external SRAM0 memory
-# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
+# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
-# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
+# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
 #   external SRAM1 memory
-# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
+# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
-# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
+# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external SDRAM memory
-# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
+# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external NAND memory
 #
-CONFIG_LPC313X_EXTSRAM0=n
+CONFIG_LPC31XX_EXTSRAM0=n
-CONFIG_LPC313X_EXTSRAM0HEAP=n
+CONFIG_LPC31XX_EXTSRAM0HEAP=n
-CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
-CONFIG_LPC313X_EXTSRAM1=n
+CONFIG_LPC31XX_EXTSRAM1=n
-CONFIG_LPC313X_EXTSRAM1HEAP=n
+CONFIG_LPC31XX_EXTSRAM1HEAP=n
-CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
-CONFIG_LPC313X_EXTSDRAM=n
+CONFIG_LPC31XX_EXTSDRAM=n
-CONFIG_LPC313X_EXTSDRAMHEAP=n
+CONFIG_LPC31XX_EXTSDRAMHEAP=n
-CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
-CONFIG_LPC313X_EXTNAND=n
+CONFIG_LPC31XX_EXTNAND=n
-CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
 #
-# LPC313X specific device driver settings
+# LPC31XX specific device driver settings
 #
 # CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
 #   console and ttys0
@@ -535,20 +535,20 @@ CONFIG_USBDEV_TRACE=n
 CONFIG_USBDEV_TRACE_NRECORDS=128
 #
-# LPC313X USB Configuration
+# LPC31XX USB Configuration
 #
-# CONFIG_LPC313X_GIO_USBATTACH
+# CONFIG_LPC31XX_GIO_USBATTACH
 #   GIO that detects USB attach/detach events
-# CONFIG_LPC313X_GIO_USBDPPULLUP
+# CONFIG_LPC31XX_GIO_USBDPPULLUP
 #   GIO 
 # CONFIG_DMA320_USBDEV_DMA
-#   Enable LPC313X-specific DMA support
+#   Enable LPC31XX-specific DMA support
 #
-CONFIG_LPC313X_GIO_USBATTACH=6
+CONFIG_LPC31XX_GIO_USBATTACH=6
-CONFIG_LPC313X_GIO_USBDPPULLUP=17
+CONFIG_LPC31XX_GIO_USBDPPULLUP=17
-CONFIG_LPC313X_VENDORID=0xd320
+CONFIG_LPC31XX_VENDORID=0xd320
-CONFIG_LPC313X_PRODUCTID=0x3211
+CONFIG_LPC31XX_PRODUCTID=0x3211
-CONFIG_LPC313X_USBDEV_DMA=n
+CONFIG_LPC31XX_USBDEV_DMA=n
 #
 # USB Serial Device Configuration
@@ -34,7 +34,7 @@
 ****************************************************************************/
 /* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
- * LPC313x boot ROM expects the boot image be compiled with entry point at
+ * LPC31xx boot ROM expects the boot image be compiled with entry point at
 * 0x1102:9000.  A 128b header will appear at this address (applied by
 * lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
 */
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
 # Setup for the selected toolchain
-ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
  # CodeSourcery under Windows
  CROSSDEV = arm-none-eabi-
  WINTOOL = y
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
  # CodeSourcery under Linux
  CROSSDEV = arm-none-eabi-
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
+ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
  # devkitARM under Windows
  CROSSDEV = arm-eabi-
  WINTOOL = y
 endif
-ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
  # NuttX buildroot under Linux or Cygwin
  CROSSDEV = arm-elf-
  MAXOPTIMIZATION = -Os
@@ -121,7 +121,7 @@ OBJEXT = .o
 LIBEXT = .a
 EXEEXT =
-ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
  LDFLAGS += -nostartfiles -nodefaultlibs
 endif
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
@@ -50,13 +50,13 @@
 # CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
 # CONFIG_BOARD_LOOPSPERMSEC - for delay loops
 # CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
-#   size of installed DRAM.  For the LPC313X, it is used only to
+#   size of installed DRAM.  For the LPC31XX, it is used only to
 #   deterimine how to map the executable regions.  It is SDRAM size
 #   only if you are executing out of the external SDRAM; or it could
 #   be NOR FLASH size, external SRAM size, or internal SRAM size.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
-# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
+# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
 #   stack in bytes.  If not defined, the user task stacks will be
@@ -76,7 +76,7 @@
 CONFIG_ARCH=arm
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM926EJS=y
-CONFIG_ARCH_CHIP=lpc313x
+CONFIG_ARCH_CHIP=lpc31xx
 CONFIG_ARCH_CHIP_LPC3131=y
 CONFIG_ARCH_BOARD=ea3131
 CONFIG_ARCH_BOARD_EA3131=y
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=n
 # Identify toolchain and linker options
 #
-CONFIG_LPC313X_CODESOURCERYW=n
+CONFIG_LPC31XX_CODESOURCERYW=n
-CONFIG_LPC313X_CODESOURCERYL=n
+CONFIG_LPC31XX_CODESOURCERYL=n
-CONFIG_LPC313X_DEVKITARM=n
+CONFIG_LPC31XX_DEVKITARM=n
-CONFIG_LPC313X_BUILDROOT=y
+CONFIG_LPC31XX_BUILDROOT=y
 #
 #  Individual subsystems can be enabled:
 #
-CONFIG_LPC313X_MCI=n
+CONFIG_LPC31XX_MCI=n
-CONFIG_LPC313X_SPI=y
+CONFIG_LPC31XX_SPI=y
-CONFIG_LPC313X_UART=y
+CONFIG_LPC31XX_UART=y
 #
 # Exernal memory available on the board (see also CONFIG_MM_REGIONS)
 #
-# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
+# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
-# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
+# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
 #   external SRAM0 memory
-# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
+# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
-# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
+# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
 #   external SRAM1 memory
-# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
+# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
-# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
+# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external SDRAM memory
-# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
+# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external NAND memory
 #
-CONFIG_LPC313X_EXTSRAM0=n
+CONFIG_LPC31XX_EXTSRAM0=n
-CONFIG_LPC313X_EXTSRAM0HEAP=n
+CONFIG_LPC31XX_EXTSRAM0HEAP=n
-CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
-CONFIG_LPC313X_EXTSRAM1=n
+CONFIG_LPC31XX_EXTSRAM1=n
-CONFIG_LPC313X_EXTSRAM1HEAP=n
+CONFIG_LPC31XX_EXTSRAM1HEAP=n
-CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
-CONFIG_LPC313X_EXTSDRAM=n
+CONFIG_LPC31XX_EXTSDRAM=n
-CONFIG_LPC313X_EXTSDRAMHEAP=n
+CONFIG_LPC31XX_EXTSDRAMHEAP=n
-CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
-CONFIG_LPC313X_EXTNAND=n
+CONFIG_LPC31XX_EXTNAND=n
-CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
 #
-# LPC313X specific device driver settings
+# LPC31XX specific device driver settings
 #
 # CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
 #   console and ttys0
@@ -681,20 +681,20 @@ CONFIG_USBDEV_TRACE=n
 CONFIG_USBDEV_TRACE_NRECORDS=128
 #
-# LPC313X USB Configuration
+# LPC31XX USB Configuration
 #
-# CONFIG_LPC313X_GIO_USBATTACH
+# CONFIG_LPC31XX_GIO_USBATTACH
 #   GIO that detects USB attach/detach events
-# CONFIG_LPC313X_GIO_USBDPPULLUP
+# CONFIG_LPC31XX_GIO_USBDPPULLUP
 #   GIO 
 # CONFIG_DMA320_USBDEV_DMA
-#   Enable LPC313X-specific DMA support
+#   Enable LPC31XX-specific DMA support
 #
-CONFIG_LPC313X_GIO_USBATTACH=6
+CONFIG_LPC31XX_GIO_USBATTACH=6
-CONFIG_LPC313X_GIO_USBDPPULLUP=17
+CONFIG_LPC31XX_GIO_USBDPPULLUP=17
-CONFIG_LPC313X_VENDORID=0xd320
+CONFIG_LPC31XX_VENDORID=0xd320
-CONFIG_LPC313X_PRODUCTID=0x3211
+CONFIG_LPC31XX_PRODUCTID=0x3211
-CONFIG_LPC313X_USBDEV_DMA=n
+CONFIG_LPC31XX_USBDEV_DMA=n
 #
 # USB Serial Device Configuration
@@ -34,7 +34,7 @@
 ****************************************************************************/
 /* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
- * LPC313x boot ROM expects the boot image be compiled with entry point at
+ * LPC31xx boot ROM expects the boot image be compiled with entry point at
 * 0x1102:9000.  A 128b header will appear at this address (applied by
 * lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
 *
@@ -44,13 +44,13 @@ CSRCS		= up_boot.c up_clkinit.c
 ifeq ($(CONFIG_ARCH_BUTTONS),y)
 CSRCS		+= up_buttons.c
 endif
-ifeq ($(CONFIG_LPC313X_EXTSDRAM),y)
+ifeq ($(CONFIG_LPC31XX_EXTSDRAM),y)
 CSRCS		+= up_mem.c
 endif
 ifeq ($(CONFIG_ARCH_LEDS),y)
 CSRCS		+= up_leds.c
 endif
-ifeq ($(CONFIG_LPC313X_SPI),y)
+ifeq ($(CONFIG_LPC31XX_SPI),y)
 CSRCS		+= up_spi.c
 endif
 ifeq ($(CONFIG_NSH_ARCHINIT),y)
@@ -1,127 +1,127 @@
-/************************************************************************************
+/************************************************************************************
- * configs/ea3131/src/ea3131_internal.h
+ * configs/ea3131/src/ea3131_internal.h
- * arch/arm/src/board/ea3131_internal.n
+ * arch/arm/src/board/ea3131_internal.n
- *
+ *
- *   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
+ *
- * Redistribution and use in source and binary forms, with or without
+ * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
+ * modification, are permitted provided that the following conditions
- * are met:
+ * are met:
- *
+ *
- * 1. Redistributions of source code must retain the above copyright
+ * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
+ *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
+ * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
+ *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
+ *    the documentation and/or other materials provided with the
- *    distribution.
+ *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
+ *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
+ *    without specific prior written permission.
- *
+ *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * POSSIBILITY OF SUCH DAMAGE.
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#ifndef __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H
+#ifndef __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H
-#define __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H
+#define __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H
-
+
-/************************************************************************************
+/************************************************************************************
- * Included Files
+ * Included Files
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#include <nuttx/config.h>
+#include <nuttx/config.h>
-#include <nuttx/compiler.h>
+#include <nuttx/compiler.h>
-#include <stdint.h>
+#include <stdint.h>
-
+
-#include "lpc313x_ioconfig.h"
+#include "lpc31_ioconfig.h"
-
+
-/************************************************************************************
+/************************************************************************************
- * Definitions
+ * Definitions
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/* EA3131L GPIOs ********************************************************************/
+/* EA3131L GPIOs ********************************************************************/
-
+
-/* LEDs -- interface through an I2C GPIO expander */
+/* LEDs -- interface through an I2C GPIO expander */
-
+
-/* BUTTONS -- NOTE that some have EXTI interrupts configured */
+/* BUTTONS -- NOTE that some have EXTI interrupts configured */
-
+
-/* SPI Chip Selects */
+/* SPI Chip Selects */
-/* SPI NOR flash is the only device on SPI. SPI_CS_OUT0 is its chip select */
+/* SPI NOR flash is the only device on SPI. SPI_CS_OUT0 is its chip select */
-
+
-#define SPINOR_CS IOCONFIG_SPI_CSOUT0
+#define SPINOR_CS IOCONFIG_SPI_CSOUT0
-
+
-/* USB Soft Connect Pullup -- NONE */
+/* USB Soft Connect Pullup -- NONE */
-
+
-/************************************************************************************
+/************************************************************************************
- * Public Types
+ * Public Types
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Public data
+ * Public data
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLY__
-
+
-/************************************************************************************
+/************************************************************************************
- * Public Functions
+ * Public Functions
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Name: lpc313x_meminitialize
+ * Name: lpc31_meminitialize
- *
+ *
- * Description:
+ * Description:
- *   Initialize external memory resources (sram, sdram, nand, nor, etc.)
+ *   Initialize external memory resources (sram, sdram, nand, nor, etc.)
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#ifdef CONFIG_LPC313X_EXTSDRAM
+#ifdef CONFIG_LPC31XX_EXTSDRAM
-extern void lpc313x_meminitialize(void);
+extern void lpc31_meminitialize(void);
-#endif
+#endif
-
+
-/************************************************************************************
+/************************************************************************************
- * Name: lpc313x_spiinitialize
+ * Name: lpc31_spiinitialize
- *
+ *
- * Description:
+ * Description:
- *   Called to configure SPI chip select GPIO pins for the EA3131 board.
+ *   Called to configure SPI chip select GPIO pins for the EA3131 board.
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-extern void weak_function lpc313x_spiinitialize(void);
+extern void weak_function lpc31_spiinitialize(void);
-
+
-/************************************************************************************
+/************************************************************************************
- * Name: lpc313x_usbinitialize
+ * Name: lpc31_usbinitialize
- *
+ *
- * Description:
+ * Description:
- *   Called to setup USB-related GPIO pins for the EA3131 board.
+ *   Called to setup USB-related GPIO pins for the EA3131 board.
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-extern void weak_function lpc313x_usbinitialize(void);
+extern void weak_function lpc31_usbinitialize(void);
-
+
-/************************************************************************************
+/************************************************************************************
- * Name: lpc313x_pginitialize
+ * Name: lpc31_pginitialize
- *
+ *
- * Description:
+ * Description:
- *   Set up mass storage device to support on demand paging.
+ *   Set up mass storage device to support on demand paging.
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#ifdef CONFIG_PAGING
+#ifdef CONFIG_PAGING
-extern void weak_function lpc313x_pginitialize(void);
+extern void weak_function lpc31_pginitialize(void);
-#endif
+#endif
-
+
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLY__ */
-#endif /* __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H */
+#endif /* __CONFIGS_EA3131_SRC_EA3131_INTERNAL_H */
-
+
@@ -1,119 +1,119 @@
-/************************************************************************************
+/************************************************************************************
- * configs/ea3131/src/up_boot.c
+ * configs/ea3131/src/up_boot.c
- * arch/arm/src/board/up_boot.c
+ * arch/arm/src/board/up_boot.c
- *
+ *
- *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
+ *
- * Redistribution and use in source and binary forms, with or without
+ * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
+ * modification, are permitted provided that the following conditions
- * are met:
+ * are met:
- *
+ *
- * 1. Redistributions of source code must retain the above copyright
+ * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
+ *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
+ * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
+ *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
+ *    the documentation and/or other materials provided with the
- *    distribution.
+ *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
+ *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
+ *    without specific prior written permission.
- *
+ *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * POSSIBILITY OF SUCH DAMAGE.
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Included Files
+ * Included Files
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#include <nuttx/config.h>
+#include <nuttx/config.h>
-
+
-#include <debug.h>
+#include <debug.h>
-
+
-#include <arch/board/board.h>
+#include <arch/board/board.h>
-
+
-#include "up_arch.h"
+#include "up_arch.h"
-#include "up_internal.h"
+#include "up_internal.h"
-#include "lpc313x_internal.h"
+#include "lpc31_internal.h"
-#include "ea3131_internal.h"
+#include "ea3131_internal.h"
-
+
-/************************************************************************************
+/************************************************************************************
- * Definitions
+ * Definitions
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Private Functions
+ * Private Functions
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Public Functions
+ * Public Functions
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Name: lpc313x_boardinitialize
+ * Name: lpc31_boardinitialize
- *
+ *
- * Description:
+ * Description:
- *   All LPC313X architectures must provide the following entry point.  This entry
+ *   All LPC31XX architectures must provide the following entry point.  This entry
- *   point is called early in the intitialization -- after all memory has been
+ *   point is called early in the intitialization -- after all memory has been
- *   configured and mapped but before any devices have been initialized.
+ *   configured and mapped but before any devices have been initialized.
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-void lpc313x_boardinitialize(void)
+void lpc31_boardinitialize(void)
-{
+{
-  /* Initialize configured, external memory resources */
+  /* Initialize configured, external memory resources */
-
+
-#ifdef CONFIG_LPC313X_EXTSDRAM
+#ifdef CONFIG_LPC31XX_EXTSDRAM
-  lpc313x_meminitialize();
+  lpc31_meminitialize();
-#endif
+#endif
-
+
-  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
-   * lpc313x_spiinitialize() has been brought into the link.
+   * lpc31_spiinitialize() has been brought into the link.
-   */
+   */
-
+
-#if defined(CONFIG_LPC313X_SPI)
+#if defined(CONFIG_LPC31XX_SPI)
-  if (lpc313x_spiinitialize)
+  if (lpc31_spiinitialize)
-    {
+    {
-      lpc313x_spiinitialize();
+      lpc31_spiinitialize();
-    }
+    }
-#endif
+#endif
-
+
-   /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+   /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
-    * disabled, and 3) the weak function lpc313x_usbinitialize() has been brought
+    * disabled, and 3) the weak function lpc31_usbinitialize() has been brought
-    * into the build.
+    * into the build.
-    */
+    */
-
+
-#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC313X_USB)
+#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC31XX_USB)
-  if (lpc313x_usbinitialize)
+  if (lpc31_usbinitialize)
-    {
+    {
-      lpc313x_usbinitialize();
+      lpc31_usbinitialize();
-    }
+    }
-#endif
+#endif
-
+
-  /* Configure on-board LEDs if LED support has been selected. */
+  /* Configure on-board LEDs if LED support has been selected. */
-
+
-#ifdef CONFIG_ARCH_LEDS
+#ifdef CONFIG_ARCH_LEDS
-  up_ledinit();
+  up_ledinit();
-#endif
+#endif
-
+
-  /* Set up mass storage device to support on demand paging */
+  /* Set up mass storage device to support on demand paging */
-
+
-#if defined(CONFIG_PAGING)
+#if defined(CONFIG_PAGING)
-  if (lpc313x_pginitialize)
+  if (lpc31_pginitialize)
-    {
+    {
-      lpc313x_pginitialize();
+      lpc31_pginitialize();
-    }
+    }
-#endif
+#endif
-}
+}
@@ -44,8 +44,8 @@
 #include <nuttx/config.h>
-#include "lpc313x_cgu.h"
+#include "lpc31_cgu.h"
-#include "lpc313x_cgudrvr.h"
+#include "lpc31_cgudrvr.h"
 /****************************************************************************
 * Definitions
@@ -284,7 +284,7 @@
 * 11 - DOMAIN_SYSCLKO      FFAST             -                 -
 */
-const struct lpc313x_clkinit_s g_boardclks =
+const struct lpc31_clkinit_s g_boardclks =
 {
  /* Domain 0 (DOMAINID_SYS), Clocks 0 - 29, Fraction dividers 0-6 */
@@ -58,7 +58,7 @@
 #    include <sys/mount.h>
 #    include <nuttx/sdio.h>
 #    include <nuttx/mmcsd.h>
-#    include "lpc313x_internal.h"
+#    include "lpc31_internal.h"
 #  endif
 #endif
@@ -85,8 +85,8 @@
 #    undef CONFIG_PAGING_SDSLOT
 #  endif
 #else
-   /* Add configuration for new LPC313X boards here */
+   /* Add configuration for new LPC31XX boards here */
-#  error "Unrecognized LPC313X board"
+#  error "Unrecognized LPC31XX board"
 #  undef CONFIG_PAGING_SDSLOT
 #  undef HAVE_SD
 #  undef HAVE_SPINOR
@@ -122,7 +122,7 @@
    * is not enabled.
    */
-#  if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC313X_MCI)
+#  if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31XX_MCI)
 #    ifdef CONFIG_PAGING_SDSLOT
 #      error "Mountpoints and/or MCI disabled"
 #    endif
@@ -152,7 +152,7 @@
   /* Verify that SPI support is enabld */
-#ifndef CONFIG_LPC313X_SPI
+#ifndef CONFIG_LPC31XX_SPI
 #  error "SPI support is not enabled"
 #endif
@@ -219,7 +219,7 @@ static struct pg_source_s g_pgsrc;
 ****************************************************************************/
 /****************************************************************************
- * Name: lpc313x_initsrc()
+ * Name: lpc31_initsrc()
 *
 * Description:
 *  Initialize the source device that will support paging.
@@ -230,7 +230,7 @@ static struct pg_source_s g_pgsrc;
 ****************************************************************************/
 #if defined(CONFIG_PAGING_BINPATH)
-static inline void lpc313x_initsrc(void)
+static inline void lpc31_initsrc(void)
 {
 #ifdef CONFIG_PAGING_SDSLOT
  FAR struct sdio_dev_s *sdio;
@@ -287,7 +287,7 @@ static inline void lpc313x_initsrc(void)
 }
 #elif defined(CONFIG_PAGING_M25PX) || defined(CONFIG_PAGING_AT45DB)
-static inline void lpc313x_initsrc(void)
+static inline void lpc31_initsrc(void)
 {
  FAR struct spi_dev_s *spi;
 #ifdef CONFIG_DEBUG
@@ -339,7 +339,7 @@ static inline void lpc313x_initsrc(void)
 }
 #else
-#  define lpc313x_initsrc()
+#  define lpc31_initsrc()
 #endif
 /****************************************************************************
@@ -425,7 +425,7 @@ int up_fillpage(FAR _TCB *tcb, FAR void *vpage)
  /* Perform initialization of the paging source device (if necessary) */
-  lpc313x_initsrc();
+  lpc31_initsrc();
  /* Create an offset into the binary image that corresponds to the 
   * virtual address.   File offset 0 corresponds to PG_LOCKED_VBASE.
@@ -448,7 +448,7 @@ int up_fillpage(FAR _TCB *tcb, FAR void *vpage)
  /* Perform initialization of the paging source device (if necessary) */
-  lpc313x_initsrc();
+  lpc31_initsrc();
  /* Create an offset into the binary image that corresponds to the 
   * virtual address.   File offset 0 corresponds to PG_LOCKED_VBASE.
@@ -493,21 +493,21 @@ int up_fillpage(FAR _TCB *tcb, FAR void *vpage, up_pgcallback_t pg_callback)
 #endif /* CONFIG_PAGING_BLOCKINGFILL */
 /************************************************************************************
- * Name: lpc313x_pginitialize
+ * Name: lpc31_pginitialize
 *
 * Description:
 *   Set up mass storage device to support on demand paging.
 *
 ************************************************************************************/
-void weak_function lpc313x_pginitialize(void)
+void weak_function lpc31_pginitialize(void)
 {
  /* This initialization does nothing in this example setup.  But this function is
   * where you might, for example:
   *
   * - Initialize and configure a mass storage device to support on-demand paging.
   *   This might be, perhaps an SD card or NAND memory.  An SPI FLASH would probably
-   *   already have been configured by lpc313x_spiinitialize(void);
+   *   already have been configured by lpc31_spiinitialize(void);
   * - Set up resources to support up_fillpage() operation.  For example, perhaps the
   *   the text image is stored in a named binary file.  In this case, the virtual
   *   text addresses might map to offsets into that file.
@@ -49,7 +49,7 @@
 #include "chip.h"
 #include "up_arch.h"
 #include "up_internal.h"
-#include "lpc313x_internal.h"
+#include "lpc31_internal.h"
 /****************************************************************************
 * Definitions
@@ -54,12 +54,12 @@
 #include "chip.h"
 #include "up_arch.h"
-#include "lpc313x_syscreg.h"
+#include "lpc31_syscreg.h"
-#include "lpc313x_cgudrvr.h"
+#include "lpc31_cgudrvr.h"
-#include "lpc313x_mpmc.h"
+#include "lpc31_mpmc.h"
 #include "ea3131_internal.h"
-#ifdef CONFIG_LPC313X_EXTSDRAM
+#ifdef CONFIG_LPC31XX_EXTSDRAM
 /****************************************************************************
 * Pre-processor Definitions
@@ -103,7 +103,7 @@
 ****************************************************************************/
 /****************************************************************************
- * Name: lpc313x_sdraminitialize
+ * Name: lpc31_sdraminitialize
 *
 * Description:
 *   Configure SDRAM on the EA3131 board
@@ -155,7 +155,7 @@
 *
 ****************************************************************************/
-static void lpc313x_sdraminitialize(void)
+static void lpc31_sdraminitialize(void)
 {
  uint32_t tmp;
  uint32_t regval;
@@ -164,10 +164,10 @@ static void lpc313x_sdraminitialize(void)
   * replaced with an apriori value.
   */
-#ifdef CONFIG_LPC313X_SDRAMHCLK
+#ifdef CONFIG_LPC31XX_SDRAMHCLK
-# define HCLK CONFIG_LPC313X_SDRAMHCLK
+# define HCLK CONFIG_LPC31XX_SDRAMHCLK
 #else
-  uint32_t hclk = lpc313x_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS);
+  uint32_t hclk = lpc31_clkfreq(CLKID_MPMCCFGCLK2, DOMAINID_SYS);
 # define HCLK hclk
 #endif
@@ -175,7 +175,7 @@ static void lpc313x_sdraminitialize(void)
 #if 0
  uint32_t hclk2 = hclk;
-  if (((getreg32(LPC313X_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0)
+  if (((getreg32(LPC31_MPMC_CONFIG) & MPMC_CONFIG_CLK)) != 0)
    {
      hclk2 >>= 1;
    }
@@ -187,45 +187,45 @@ static void lpc313x_sdraminitialize(void)
  /* Set command delay startergy */
-  putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC313X_MPMC_DYNREADCONFIG);
+  putreg32(MPMC_DYNREADCONFIG_CMDDEL, LPC31_MPMC_DYNREADCONFIG);
  /* Configure device config register nSDCE0 for proper width SDRAM */
  putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
-           LPC313X_MPMC_DYNCONFIG0);
+           LPC31_MPMC_DYNCONFIG0);
  putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK),
-           LPC313X_MPMC_DYNRASCAS0);
+           LPC31_MPMC_DYNRASCAS0);
  /* Min 20ns program 1 so that at least 2 HCLKs are used */
  putreg32(NS2HCLKS(EA3131_SDRAM_TRP,  HCLK2, MPMC_DYNTRP_MASK),
-           LPC313X_MPMC_DYNTRP);
+           LPC31_MPMC_DYNTRP);
  putreg32(NS2HCLKS(EA3131_SDRAM_TRAS, HCLK2, MPMC_DYNTRAS_MASK),
-           LPC313X_MPMC_DYNTRAS);
+           LPC31_MPMC_DYNTRAS);
  putreg32(NS2HCLKS(EA3131_SDRAM_TREX, HCLK2, MPMC_DYNTSREX_MASK),
-           LPC313X_MPMC_DYNTSREX);
+           LPC31_MPMC_DYNTSREX);
  putreg32(EA3131_SDRAM_TARP,
-           LPC313X_MPMC_DYNTAPR);
+           LPC31_MPMC_DYNTAPR);
  putreg32(NS2HCLKS(EA3131_SDRAM_TDAL, HCLK2, MPMC_DYNTDAL_MASK),
-           LPC313X_MPMC_DYNTDAL);
+           LPC31_MPMC_DYNTDAL);
  putreg32(NS2HCLKS(EA3131_SDRAM_TWR,  HCLK2, MPMC_DYNTWR_MASK),
-           LPC313X_MPMC_DYNTWR);
+           LPC31_MPMC_DYNTWR);
  putreg32(NS2HCLKS(EA3131_SDRAM_TRC,  HCLK2, MPMC_DYNTRC_MASK),
-           LPC313X_MPMC_DYNTRC);
+           LPC31_MPMC_DYNTRC);
  putreg32(NS2HCLKS(EA3131_SDRAM_TRFC, HCLK2, MPMC_DYNTRFC_MASK),
-           LPC313X_MPMC_DYNTRFC);
+           LPC31_MPMC_DYNTRFC);
  putreg32(NS2HCLKS(EA3131_SDRAM_TXSR, HCLK2, MPMC_DYNTXSR_MASK),
-           LPC313X_MPMC_DYNTXSR);
+           LPC31_MPMC_DYNTXSR);
  putreg32(NS2HCLKS(EA3131_SDRAM_TRRD, HCLK2, MPMC_DYNTRRD_MASK),
-           LPC313X_MPMC_DYNTRRD);
+           LPC31_MPMC_DYNTRRD);
  putreg32(NS2HCLKS(EA3131_SDRAM_TMRD, HCLK2, MPMC_DYNTMRD_MASK),
-           LPC313X_MPMC_DYNTMRD);
+           LPC31_MPMC_DYNTMRD);
  up_udelay(100);
  /* Issue continuous NOP commands  */
  putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INOP),
-           LPC313X_MPMC_DYNCONTROL);
+           LPC31_MPMC_DYNCONTROL);
  /* Load ~200us delay value to timer1 */
@@ -234,14 +234,14 @@ static void lpc313x_sdraminitialize(void)
  /* Issue a "pre-charge all" command */
  putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IPALL),
-           LPC313X_MPMC_DYNCONTROL);
+           LPC31_MPMC_DYNCONTROL);
  /* Minimum refresh pulse interval (tRFC) for MT48LC32M16A2=80nsec,
   * 100nsec provides more than adequate interval.
   */
  putreg32(NS2HCLKS(EA3131_SDRAM_REFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK),
-           LPC313X_MPMC_DYNREFRESH);
+           LPC31_MPMC_DYNREFRESH);
  /* Load ~250us delay value to timer1 */
@@ -253,12 +253,12 @@ static void lpc313x_sdraminitialize(void)
   */
  putreg32(NS2HCLKS(EA3131_SDRAM_OPERREFRESH, HCLK, MPMC_DYNREFRESH_TIMER_MASK),
-           LPC313X_MPMC_DYNREFRESH);
+           LPC31_MPMC_DYNREFRESH);
  /* Select mode register update mode */
  putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_IMODE),
-           LPC313X_MPMC_DYNCONTROL);
+           LPC31_MPMC_DYNCONTROL);
  /* Program the SDRAM internal mode registers on bank nSDCE0 and reconfigure
   * the SDRAM chips.  Bus speeds up to 90MHz requires use of a CAS latency = 2.
@@ -266,26 +266,26 @@ static void lpc313x_sdraminitialize(void)
   * 16bit mode
   */
-  tmp = getreg32(LPC313X_EXTSDRAM0_VSECTION | (0x23 << 13));
+  tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
  putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
-           LPC313X_MPMC_DYNCONFIG0);
+           LPC31_MPMC_DYNCONFIG0);
  putreg32((MPMC_DYNRASCAS0_RAS2CLK|MPMC_DYNRASCAS0_CAS2CLK),
-           LPC313X_MPMC_DYNRASCAS0);
+           LPC31_MPMC_DYNRASCAS0);
  /* Select normal operating mode */
  putreg32((MPMC_DYNCONTROL_CE|MPMC_DYNCONTROL_CS|MPMC_DYNCONTROL_INORMAL),
-           LPC313X_MPMC_DYNCONTROL);
+           LPC31_MPMC_DYNCONTROL);
  /* Enable buffers */
-  regval  = getreg32(LPC313X_MPMC_DYNCONFIG0);
+  regval  = getreg32(LPC31_MPMC_DYNCONFIG0);
  regval |= MPMC_DYNCONFIG0_B;
-  putreg32(regval, LPC313X_MPMC_DYNCONFIG0);
+  putreg32(regval, LPC31_MPMC_DYNCONFIG0);
  putreg32((MPMC_DYNCONTROL_INORMAL|MPMC_DYNCONTROL_CS),
-           LPC313X_MPMC_DYNCONTROL);
+           LPC31_MPMC_DYNCONTROL);
 }
 /****************************************************************************
@@ -293,14 +293,14 @@ static void lpc313x_sdraminitialize(void)
 ****************************************************************************/
 /****************************************************************************
- * Name: lpc313x_meminitialize
+ * Name: lpc31_meminitialize
 *
 * Description:
 *   Initialize external memory resources (sram, sdram, nand, nor, etc.)
 *
 ****************************************************************************/
-void lpc313x_meminitialize(void)
+void lpc31_meminitialize(void)
 {
  /* Configure the LCD pins in external bus interface (EBI/MPMC) memory mode.
   * 
@@ -326,34 +326,34 @@ void lpc313x_meminitialize(void)
   * LCD_DB_15 -> EBI_A_15
   */
-  putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC313X_SYSCREG_MUX_LCDEBISEL);
+  putreg32(SYSCREG_MUX_LCDEBISEL_EBIMPMC, LPC31_SYSCREG_MUX_LCDEBISEL);
  /* Enable EBI clock */
-  lpc313x_enableclock(CLKID_EBICLK);
+  lpc31_enableclock(CLKID_EBICLK);
  /* Enable MPMC controller clocks */
-  lpc313x_enableclock(CLKID_MPMCCFGCLK);
+  lpc31_enableclock(CLKID_MPMCCFGCLK);
-  lpc313x_enableclock(CLKID_MPMCCFGCLK2);
+  lpc31_enableclock(CLKID_MPMCCFGCLK2);
-  lpc313x_enableclock(CLKID_MPMCCFGCLK3);
+  lpc31_enableclock(CLKID_MPMCCFGCLK3);
  /* Enable the external memory controller */
-  putreg32(MPMC_CONTROL_E, LPC313X_MPMC_CONTROL);
+  putreg32(MPMC_CONTROL_E, LPC31_MPMC_CONTROL);
  /* Force HCLK to MPMC_CLK to 1:1 ratio, little-endian mode */
-  putreg32(0, LPC313X_MPMC_CONFIG);
+  putreg32(0, LPC31_MPMC_CONFIG);
  /* Set MPMC delay based on trace lengths between SDRAM and the chip
   * and on the delay strategy used for SDRAM.
   */
-  putreg32(EA3131_MPMC_DELAY, LPC313X_SYSCREG_MPMC_DELAYMODES);
+  putreg32(EA3131_MPMC_DELAY, LPC31_SYSCREG_MPMC_DELAYMODES);
  /* Configure Micron MT48LC32M16A2 SDRAM on the EA3131 board */
-  lpc313x_sdraminitialize();
+  lpc31_sdraminitialize();
 }
-#endif /* CONFIG_LPC313X_EXTSDRAM */
+#endif /* CONFIG_LPC31XX_EXTSDRAM */
@@ -45,12 +45,12 @@
 #include <debug.h>
 #include <errno.h>
-#ifdef CONFIG_LPC313X_MCI
+#ifdef CONFIG_LPC31XX_MCI
 #  include <nuttx/sdio.h>
 #  include <nuttx/mmcsd.h>
 #endif
-#include "lpc313x_internal.h"
+#include "lpc31_internal.h"
 /****************************************************************************
 * Pre-Processor Definitions
@@ -71,8 +71,9 @@
 #    define CONFIG_NSH_MMCSDSLOTNO 0
 #  endif
 #else
-   /* Add configuration for new LPC313X boards here */
+   /* Add configuration for new LPC31XX boards here */
-#  error "Unrecognized LPC313X board"
+
 #  error "Unrecognized LPC31XX board"
 #  undef CONFIG_NSH_HAVEUSBDEV
 #  undef CONFIG_NSH_HAVEMMCSD
 #endif
@@ -87,7 +88,7 @@
 * is not enabled.
 */
-#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC313X_MCI)
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_LPC31XX_MCI)
 #  undef CONFIG_NSH_HAVEMMCSD
 #endif
@@ -2,7 +2,7 @@
 * configs/ea3131/src/up_spi.c
 * arch/arm/src/board/up_spi.c
 *
- *   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 *
 * Redistribution and use in source and binary forms, with or without
@@ -49,12 +49,12 @@
 #include "up_arch.h"
 #include "chip.h"
-#include "lpc313x_internal.h"
+#include "lpc31_internal.h"
 #include "ea3131_internal.h"
-#ifdef CONFIG_LPC313X_SPI
+#ifdef CONFIG_LPC31XX_SPI
-#if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc313x_spi.c
+#if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc31_spi.c
-       * in arch/arm/src/lpc313x */
+       * in arch/arm/src/lpc31xx */
 /************************************************************************************
 * Definitions
@@ -87,14 +87,14 @@
 ************************************************************************************/
 /************************************************************************************
- * Name: lpc313x_spiinitialize
+ * Name: lpc31_spiinitialize
 *
 * Description:
 *   Called to configure SPI chip select GPIO pins for the EA3131 board.
 *
 ************************************************************************************/
-void weak_function lpc313x_spiinitialize(void)
+void weak_function lpc31_spiinitialize(void)
 {
  /* NOTE: Clocking for SPI has already been provided. Pin configuration is performed
   * on-the-fly, so no additional setup is required.
@@ -102,19 +102,19 @@ void weak_function lpc313x_spiinitialize(void)
 }
 /************************************************************************************
- * Name:  lpc313x_spiselect and lpc313x_spistatus
+ * Name:  lpc31_spiselect and lpc31_spistatus
 *
 * Description:
- *   The external functions, lpc313x_spiselect and lpc313x_spistatus must be
+ *   The external functions, lpc31_spiselect and lpc31_spistatus must be
 *   provided by board-specific logic.  They are implementations of the select
 *   and status methods of the SPI interface defined by struct spi_ops_s (see
 *   include/nuttx/spi.h). All other methods (including up_spiinitialize())
- *   are provided by common LPC313X logic.  To use this common SPI logic on your
+ *   are provided by common LPC31XX logic.  To use this common SPI logic on your
 *   board:
 *
- *   1. Provide logic in lpc313x_boardinitialize() to configure SPI chip select
+ *   1. Provide logic in lpc31_boardinitialize() to configure SPI chip select
 *      pins.
- *   2. Provide lpc313x_spiselect() and lpc313x_spistatus() functions in your
+ *   2. Provide lpc31_spiselect() and lpc31_spistatus() functions in your
 *      board-specific logic.  These functions will perform chip selection and
 *      status operations using GPIOs in the way your board is configured.
 *   3. Add a calls to up_spiinitialize() in your low level application
@@ -126,17 +126,17 @@ void weak_function lpc313x_spiinitialize(void)
 *
 ************************************************************************************/
-void lpc313x_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
 {
  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 #warning "Missing logic"
 }
-uint8_t lpc313x_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t lpc31_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
  return SPI_STATUS_PRESENT;
 }
 #endif /* 0 */
-#endif /* CONFIG_LPC313X_SPI  */
+#endif /* CONFIG_LPC31XX_SPI  */
@@ -1,34 +1,34 @@
-#daemon configuration
+#daemon configuration
-telnet_port 4444
+telnet_port 4444
-gdb_port 3333
+gdb_port 3333
-
+
-#interface
+#interface
-interface ft2232
+interface ft2232
-ft2232_device_desc "Olimex OpenOCD JTAG A"
+ft2232_device_desc "Olimex OpenOCD JTAG A"
-ft2232_layout "olimex-jtag"
+ft2232_layout "olimex-jtag"
-ft2232_vid_pid 0x15BA 0x0003
+ft2232_vid_pid 0x15BA 0x0003
-jtag_speed 2
+jtag_speed 2
-
+
-#use combined on interfaces or targets that can't set TRST/SRST separately
+#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config trst_and_srst separate
+reset_config trst_and_srst separate
-
+
-#jtag scan chain
+#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
+jtag_device 4 0x1 0xf 0xe
-
+
-#target configuration
+#target configuration
-daemon_startup reset
+daemon_startup reset
-
+
-#target <type> <startup mode>
+#target <type> <startup mode>
-#target arm9ejs <reset mode> <chainpos> <endianness> <variant>
+#target arm9ejs <reset mode> <chainpos> <endianness> <variant>
-target arm926ejs little run_and_halt 0 arm926ejs
+target arm926ejs little run_and_halt 0 arm926ejs
-run_and_halt_time 0 30
+run_and_halt_time 0 30
-
+
-#target_script 0 reset oocd_flash2138.script
+#target_script 0 reset oocd_flash2138.script
-working_area 0 0x1102800 0x60000 nobackup
+working_area 0 0x1102800 0x60000 nobackup
-
+
-#flash configuration
+#flash configuration
-#flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v2 12000 calc_checksum
+#flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v2 12000 calc_checksum
-
+
-# For more information about the configuration files, take a look at:
+# For more information about the configuration files, take a look at:
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
@@ -1,105 +1,105 @@
-/************************************************************************************
+/************************************************************************************
- * configs/ea3131/tools/lpchdr.h
+ * configs/ea3131/tools/lpchdr.h
- *
+ *
- *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
+ *
- * Redistribution and use in source and binary forms, with or without
+ * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
+ * modification, are permitted provided that the following conditions
- * are met:
+ * are met:
- *
+ *
- * 1. Redistributions of source code must retain the above copyright
+ * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
+ *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
+ * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
+ *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
+ *    the documentation and/or other materials provided with the
- *    distribution.
+ *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
+ * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
+ *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
+ *    without specific prior written permission.
- *
+ *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * POSSIBILITY OF SUCH DAMAGE.
- *
+ *
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#ifndef __CONFIGS_EA3131_TOOLS_BINFMT_H
+#ifndef __CONFIGS_EA3131_TOOLS_LPCHDR_H
-#define __CONFIGS_EA3131_TOOLS_BINFMT_H
+#define __CONFIGS_EA3131_TOOLS_LPCHDR_H
-
+
-/************************************************************************************
+/************************************************************************************
- * Included Files
+ * Included Files
- ************************************************************************************/
+ ************************************************************************************/
-
+
-#include <stdint.h>
+#include <stdint.h>
-
+
-/************************************************************************************
+/************************************************************************************
- * Definitions
+ * Definitions
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Public Types
+ * Public Types
- ************************************************************************************/
+ ************************************************************************************/
-
+
-struct lpc313x_header_s
+struct lpc31_header_s
-{
+{
-				/* OFFS DESCRIPTION */
+                              /* OFFS DESCRIPTION */
-  uint32_t vector;  		/* 0x00	Valid ARM instruction. Usually this will be
+  uint32_t vector;            /* 0x00    Valid ARM instruction. Usually this will be
-  				 *	a branch instruction to entry point of the
+                               *    a branch instruction to entry point of the
-  				 *	image. */
+                               *    image. */
-  uint32_t magic;		/* 0x04	This field is used by boot ROM to detect a
+  uint32_t magic;             /* 0x04    This field is used by boot ROM to detect a
-  				 *	valid image header. This field should always
+                               *    valid image header. This field should always
-  				 *	be set to 0x41676d69. */
+                               *    be set to 0x41676d69. */
-  uint32_t execution_crc32;	/* 0x08	CRC32 value of execution part of the image. If
+  uint32_t execution_crc32;   /* 0x08    CRC32 value of execution part of the image. If
-  				 *	the ‘image_type’ is set to ‘0xA’, this field
+                               *    the ‘image_type’ is set to ‘0xA’, this field
-  				 *	is ignored by boot ROM. */
+                               *    is ignored by boot ROM. */
-  uint32_t Reserved0[4];	/* 0x0c-0x18: Should be zero. */
+  uint32_t Reserved0[4];      /* 0x0c-0x18: Should be zero. */
-  uint32_t imageType;		/* 0x1c Specifies whether CRC check should be done
+  uint32_t imageType;         /* 0x1c Specifies whether CRC check should be done
-  				 *	on the image or not:
+                               *    on the image or not:
-				 *	  0xA – No CRC check required.
+                               *      0xA – No CRC check required.
-				 *	  0xB – Do CRC32 check on both header and
+                               *      0xB – Do CRC32 check on both header and
-				 *	        execution part of the image. */
+                               *            execution part of the image. */
-  uint32_t imageLength; 	/* 0x20	Total image length including header rounded
+  uint32_t imageLength;       /* 0x20    Total image length including header rounded
-				 *	up to the nearest 512 byte boundary. In C 
+                               *    up to the nearest 512 byte boundary. In C 
-				 *	language the field can be computed as:
+                               *    language the field can be computed as:
-				 *	imageLength = (Actual length + 511) & ~0x1FF; */
+                               *    imageLength = (Actual length + 511) & ~0x1FF; */
-  uint32_t releaseID;		/* 0x24	Release or version number of the image. Note,
+  uint32_t releaseID;         /* 0x24    Release or version number of the image. Note,
-				 *	this field is not used by boot ROM but is
+                               *    this field is not used by boot ROM but is
-				 *	provided to track the image versions. */
+                               *    provided to track the image versions. */
-  uint32_t buildTime;		/* 0x28 Time (expressed in EPOC time format) at which
+  uint32_t buildTime;         /* 0x28 Time (expressed in EPOC time format) at which
-				 *	image is built. Note, this field is not used
+                               *    image is built. Note, this field is not used
-				 *	by boot ROM but is provided to track the image
+                               *    by boot ROM but is provided to track the image
-				 *	versions. */
+                               *    versions. */
-  uint32_t sbzBootParameter;	/* 0x2c	hould be zero. */
+  uint32_t sbzBootParameter;  /* 0x2c    hould be zero. */
-  uint32_t cust_reserved[15];	/* 0x30-0x68: Reserved for customer use (60 bytes) */
+  uint32_t cust_reserved[15]; /* 0x30-0x68: Reserved for customer use (60 bytes) */
-  uint32_t header_crc32;	/* 0x6c CRC32 value of the header (bytes 0x00 to 0x6C
+  uint32_t header_crc32;      /* 0x6c CRC32 value of the header (bytes 0x00 to 0x6C
-				 *	of the image). If the ‘image_type’ is set
+                               *    of the image). If the ‘image_type’ is set
-				 *	to ‘0xA’, this field is ignored by boot ROM. */
+                               *    to ‘0xA’, this field is ignored by boot ROM. */
-  uint32_t Reserved1[4];	/* 0x70-0x7c: Should be zero. */
+  uint32_t Reserved1[4];      /* 0x70-0x7c: Should be zero. */
-                                /* 0x80	Start of program code (128Kb max).  The final
+                              /* 0x80    Start of program code (128Kb max).  The final
-                                 *	image has to be padded to the nearest 512
+                               *    image has to be padded to the nearest 512
-                                 *	byte boundary */
+                               *    byte boundary */
-};
+};
-
+
-/************************************************************************************
+/************************************************************************************
- * Public data
+ * Public data
- ************************************************************************************/
+ ************************************************************************************/
-
+
-/************************************************************************************
+/************************************************************************************
- * Public Functions
+ * Public Functions
- ************************************************************************************/
+ ************************************************************************************/
-
+
-extern uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val);
+extern uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val);
-extern uint32_t crc32(const uint8_t *src, size_t len);
+extern uint32_t crc32(const uint8_t *src, size_t len);
-
+
-#endif /* __CONFIGS_EA3131_TOOLS_BINFMT_H */
+#endif /* __CONFIGS_EA3131_TOOLS_LPCHDR_H */
-
+
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
 # Setup for the selected toolchain
-ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
  # CodeSourcery under Windows
  CROSSDEV = arm-none-eabi-
  WINTOOL = y
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
  # CodeSourcery under Linux
  CROSSDEV = arm-none-eabi-
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
+ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
  # devkitARM under Windows
  CROSSDEV = arm-eabi-
  WINTOOL = y
 endif
-ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
  # NuttX buildroot under Linux or Cygwin
  CROSSDEV = arm-elf-
  MAXOPTIMIZATION = -Os
@@ -121,7 +121,7 @@ OBJEXT = .o
 LIBEXT = .a
 EXEEXT =
-ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
  LDFLAGS += -nostartfiles -nodefaultlibs
 endif
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
@@ -50,13 +50,13 @@
 # CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
 # CONFIG_BOARD_LOOPSPERMSEC - for delay loops
 # CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
-#   size of installed DRAM.  For the LPC313X, it is used only to
+#   size of installed DRAM.  For the LPC31XX, it is used only to
 #   deterimine how to map the executable regions.  It is SDRAM size
 #   only if you are executing out of the external SDRAM; or it could
 #   be NOR FLASH size, external SRAM size, or internal SRAM size.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
-# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
+# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
 #   stack in bytes.  If not defined, the user task stacks will be
@@ -76,7 +76,7 @@
 CONFIG_ARCH=arm
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM926EJS=y
-CONFIG_ARCH_CHIP=lpc313x
+CONFIG_ARCH_CHIP=lpc31xx
 CONFIG_ARCH_CHIP_LPC3131=y
 CONFIG_ARCH_BOARD=ea3131
 CONFIG_ARCH_BOARD_EA3131=y
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
 # Identify toolchain and linker options
 #
-CONFIG_LPC313X_CODESOURCERYW=n
+CONFIG_LPC31XX_CODESOURCERYW=n
-CONFIG_LPC313X_CODESOURCERYL=y
+CONFIG_LPC31XX_CODESOURCERYL=y
-CONFIG_LPC313X_DEVKITARM=n
+CONFIG_LPC31XX_DEVKITARM=n
-CONFIG_LPC313X_BUILDROOT=n
+CONFIG_LPC31XX_BUILDROOT=n
 #
 #  Individual subsystems can be enabled:
 #
-CONFIG_LPC313X_MCI=n
+CONFIG_LPC31XX_MCI=n
-CONFIG_LPC313X_SPI=n
+CONFIG_LPC31XX_SPI=n
-CONFIG_LPC313X_UART=y
+CONFIG_LPC31XX_UART=y
 #
 # Exernal memory available on the board (see also CONFIG_MM_REGIONS)
 #
-# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
+# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
-# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
+# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
 #   external SRAM0 memory
-# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
+# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
-# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
+# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
 #   external SRAM1 memory
-# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
+# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
-# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
+# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external SDRAM memory
-# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
+# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external NAND memory
 #
-CONFIG_LPC313X_EXTSRAM0=n
+CONFIG_LPC31XX_EXTSRAM0=n
-CONFIG_LPC313X_EXTSRAM0HEAP=n
+CONFIG_LPC31XX_EXTSRAM0HEAP=n
-CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
-CONFIG_LPC313X_EXTSRAM1=n
+CONFIG_LPC31XX_EXTSRAM1=n
-CONFIG_LPC313X_EXTSRAM1HEAP=n
+CONFIG_LPC31XX_EXTSRAM1HEAP=n
-CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
-CONFIG_LPC313X_EXTSDRAM=n
+CONFIG_LPC31XX_EXTSDRAM=n
-CONFIG_LPC313X_EXTSDRAMHEAP=n
+CONFIG_LPC31XX_EXTSDRAMHEAP=n
-CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
-CONFIG_LPC313X_EXTNAND=n
+CONFIG_LPC31XX_EXTNAND=n
-CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
 #
-# LPC313X specific device driver settings
+# LPC31XX specific device driver settings
 #
 # CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
 #   console and ttys0
@@ -538,20 +538,20 @@ CONFIG_USBDEV_TRACE=y
 CONFIG_USBDEV_TRACE_NRECORDS=128
 #
-# LPC313X USB Configuration
+# LPC31XX USB Configuration
 #
-# CONFIG_LPC313X_GIO_USBATTACH
+# CONFIG_LPC31XX_GIO_USBATTACH
 #   GIO that detects USB attach/detach events
-# CONFIG_LPC313X_GIO_USBDPPULLUP
+# CONFIG_LPC31XX_GIO_USBDPPULLUP
 #   GIO 
 # CONFIG_DMA320_USBDEV_DMA
-#   Enable LPC313X-specific DMA support
+#   Enable LPC31XX-specific DMA support
 #
-CONFIG_LPC313X_GIO_USBATTACH=6
+CONFIG_LPC31XX_GIO_USBATTACH=6
-CONFIG_LPC313X_GIO_USBDPPULLUP=17
+CONFIG_LPC31XX_GIO_USBDPPULLUP=17
-CONFIG_LPC313X_VENDORID=0xd320
+CONFIG_LPC31XX_VENDORID=0xd320
-CONFIG_LPC313X_PRODUCTID=0x3211
+CONFIG_LPC31XX_PRODUCTID=0x3211
-CONFIG_LPC313X_USBDEV_DMA=n
+CONFIG_LPC31XX_USBDEV_DMA=n
 #
 # USB Serial Device Configuration
@@ -34,7 +34,7 @@
 ****************************************************************************/
 /* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
- * LPC313x boot ROM expects the boot image be compiled with entry point at
+ * LPC31xx boot ROM expects the boot image be compiled with entry point at
 * 0x1102:9000.  A 128b header will appear at this address (applied by
 * lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
 */
@@ -37,23 +37,23 @@ include ${TOPDIR}/.config
 # Setup for the selected toolchain
-ifeq ($(CONFIG_LPC313X_CODESOURCERYW),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYW),y)
  # CodeSourcery under Windows
  CROSSDEV = arm-none-eabi-
  WINTOOL = y
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_CODESOURCERYL),y)
+ifeq ($(CONFIG_LPC31XX_CODESOURCERYL),y)
  # CodeSourcery under Linux
  CROSSDEV = arm-none-eabi-
  MAXOPTIMIZATION = -O2
 endif
-ifeq ($(CONFIG_LPC313X_DEVKITARM),y)
+ifeq ($(CONFIG_LPC31XX_DEVKITARM),y)
  # devkitARM under Windows
  CROSSDEV = arm-eabi-
  WINTOOL = y
 endif
-ifeq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifeq ($(CONFIG_LPC31XX_BUILDROOT),y)
  # NuttX buildroot under Linux or Cygwin
  CROSSDEV = arm-elf-
  MAXOPTIMIZATION = -Os
@@ -121,7 +121,7 @@ OBJEXT = .o
 LIBEXT = .a
 EXEEXT =
-ifneq ($(CONFIG_LPC313X_BUILDROOT),y)
+ifneq ($(CONFIG_LPC31XX_BUILDROOT),y)
  LDFLAGS += -nostartfiles -nodefaultlibs
 endif
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
@@ -50,13 +50,13 @@
 # CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
 # CONFIG_BOARD_LOOPSPERMSEC - for delay loops
 # CONFIG_DRAM_SIZE - For most ARM9 architectures, this describes the
-#   size of installed DRAM.  For the LPC313X, it is used only to
+#   size of installed DRAM.  For the LPC31XX, it is used only to
 #   deterimine how to map the executable regions.  It is SDRAM size
 #   only if you are executing out of the external SDRAM; or it could
 #   be NOR FLASH size, external SRAM size, or internal SRAM size.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
-# CONFIG_ARCH_IRQPRIO - The LPC313x supports interrupt prioritization
+# CONFIG_ARCH_IRQPRIO - The LPC31xx supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
 #   stack in bytes.  If not defined, the user task stacks will be
@@ -76,7 +76,7 @@
 CONFIG_ARCH=arm
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM926EJS=y
-CONFIG_ARCH_CHIP=lpc313x
+CONFIG_ARCH_CHIP=lpc31xx
 CONFIG_ARCH_CHIP_LPC3131=y
 CONFIG_ARCH_BOARD=ea3131
 CONFIG_ARCH_BOARD_EA3131=y
@@ -108,54 +108,54 @@ CONFIG_ARCH_ROMPGTABLE=y
 # Identify toolchain and linker options
 #
-CONFIG_LPC313X_CODESOURCERYW=n
+CONFIG_LPC31XX_CODESOURCERYW=n
-CONFIG_LPC313X_CODESOURCERYL=y
+CONFIG_LPC31XX_CODESOURCERYL=y
-CONFIG_LPC313X_DEVKITARM=n
+CONFIG_LPC31XX_DEVKITARM=n
-CONFIG_LPC313X_BUILDROOT=n
+CONFIG_LPC31XX_BUILDROOT=n
 #
 #  Individual subsystems can be enabled:
 #
-CONFIG_LPC313X_MCI=n
+CONFIG_LPC31XX_MCI=n
-CONFIG_LPC313X_SPI=n
+CONFIG_LPC31XX_SPI=n
-CONFIG_LPC313X_UART=y
+CONFIG_LPC31XX_UART=y
 #
 # Exernal memory available on the board (see also CONFIG_MM_REGIONS)
 #
-# CONFIG_LPC313X_EXTSRAM0 - Select if external SRAM0 is present
+# CONFIG_LPC31XX_EXTSRAM0 - Select if external SRAM0 is present
-# CONFIG_LPC313X_EXTSRAM0HEAP - Select if external SRAM0 should be
+# CONFIG_LPC31XX_EXTSRAM0HEAP - Select if external SRAM0 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM0SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM0SIZE - Size (in bytes) of the installed
 #   external SRAM0 memory
-# CONFIG_LPC313X_EXTSRAM1 - Select if external SRAM1 is present
+# CONFIG_LPC31XX_EXTSRAM1 - Select if external SRAM1 is present
-# CONFIG_LPC313X_EXTSRAM1HEAP - Select if external SRAM1 should be
+# CONFIG_LPC31XX_EXTSRAM1HEAP - Select if external SRAM1 should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSRAM1SIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSRAM1SIZE - Size (in bytes) of the installed
 #   external SRAM1 memory
-# CONFIG_LPC313X_EXTSDRAM - Select if external SDRAM is present
+# CONFIG_LPC31XX_EXTSDRAM - Select if external SDRAM is present
-# CONFIG_LPC313X_EXTSDRAMHEAP - Select if external SDRAM should be
+# CONFIG_LPC31XX_EXTSDRAMHEAP - Select if external SDRAM should be
 #   configured as part of the NuttX heap.
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external SDRAM memory
-# CONFIG_LPC313X_EXTNAND - Select if external NAND is present
+# CONFIG_LPC31XX_EXTNAND - Select if external NAND is present
-# CONFIG_LPC313X_EXTSDRAMSIZE - Size (in bytes) of the installed
+# CONFIG_LPC31XX_EXTSDRAMSIZE - Size (in bytes) of the installed
 #   external NAND memory
 #
-CONFIG_LPC313X_EXTSRAM0=n
+CONFIG_LPC31XX_EXTSRAM0=n
-CONFIG_LPC313X_EXTSRAM0HEAP=n
+CONFIG_LPC31XX_EXTSRAM0HEAP=n
-CONFIG_LPC313X_EXTSRAM0SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM0SIZE=(128*1024)
-CONFIG_LPC313X_EXTSRAM1=n
+CONFIG_LPC31XX_EXTSRAM1=n
-CONFIG_LPC313X_EXTSRAM1HEAP=n
+CONFIG_LPC31XX_EXTSRAM1HEAP=n
-CONFIG_LPC313X_EXTSRAM1SIZE=(128*1024)
+CONFIG_LPC31XX_EXTSRAM1SIZE=(128*1024)
-CONFIG_LPC313X_EXTSDRAM=n
+CONFIG_LPC31XX_EXTSDRAM=n
-CONFIG_LPC313X_EXTSDRAMHEAP=n
+CONFIG_LPC31XX_EXTSDRAMHEAP=n
-CONFIG_LPC313X_EXTSDRAMSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTSDRAMSIZE=(64*1024*1024)
-CONFIG_LPC313X_EXTNAND=n
+CONFIG_LPC31XX_EXTNAND=n
-CONFIG_LPC313X_EXTNANDSIZE=(64*1024*1024)
+CONFIG_LPC31XX_EXTNANDSIZE=(64*1024*1024)
 #
-# LPC313X specific device driver settings
+# LPC31XX specific device driver settings
 #
 # CONFIG_UART_SERIAL_CONSOLE - selects the UART for the
 #   console and ttys0
@@ -538,20 +538,20 @@ CONFIG_USBDEV_TRACE=n
 CONFIG_USBDEV_TRACE_NRECORDS=128
 #
-# LPC313X USB Configuration
+# LPC31XX USB Configuration
 #
-# CONFIG_LPC313X_GIO_USBATTACH
+# CONFIG_LPC31XX_GIO_USBATTACH
 #   GIO that detects USB attach/detach events
-# CONFIG_LPC313X_GIO_USBDPPULLUP
+# CONFIG_LPC31XX_GIO_USBDPPULLUP
 #   GIO 
 # CONFIG_DMA320_USBDEV_DMA
-#   Enable LPC313X-specific DMA support
+#   Enable LPC31XX-specific DMA support
 #
-CONFIG_LPC313X_GIO_USBATTACH=6
+CONFIG_LPC31XX_GIO_USBATTACH=6
-CONFIG_LPC313X_GIO_USBDPPULLUP=17
+CONFIG_LPC31XX_GIO_USBDPPULLUP=17
-CONFIG_LPC313X_VENDORID=0xd320
+CONFIG_LPC31XX_VENDORID=0xd320
-CONFIG_LPC313X_PRODUCTID=0x3211
+CONFIG_LPC31XX_PRODUCTID=0x3211
-CONFIG_LPC313X_USBDEV_DMA=n
+CONFIG_LPC31XX_USBDEV_DMA=n
 #
 # USB Serial Device Configuration
@@ -34,7 +34,7 @@
 ****************************************************************************/
 /* The LPC3131 has 192Kb of ISRAM beginning at virtual address 0x1102:8000.
- * LPC313x boot ROM expects the boot image be compiled with entry point at
+ * LPC31xx boot ROM expects the boot image be compiled with entry point at
 * 0x1102:9000.  A 128b header will appear at this address (applied by
 * lpc313xImgCreator) and the executable code must begin at 0x1102:9080.
 */