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Update On-demand paging documentation

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2877 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
2010-08-22 00:48:43 +00:00
parent 75b0f9d1ba
commit 0068ca76f4
6 changed files with 239 additions and 108 deletions
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Documentation/NuttxPortingGuide.html
+70 -16
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@@ -12,7 +12,7 @@
<h1><big><font color="#3c34ec"> <h1><big><font color="#3c34ec">
<i>NuttX RTOS Porting Guide</i> <i>NuttX RTOS Porting Guide</i>
</font></big></h1> </font></big></h1>
<p>Last Updated: August 16, 2010</p> <p>Last Updated: August 21, 2010</p>
</td> </td>
</tr> </tr>
</table> </table>
@@ -2390,7 +2390,6 @@ extern void up_ledoff(int led);
If CONFIG_PAGING is selected, then the following also apply: If CONFIG_PAGING is selected, then the following also apply:
</p> </p>
<ul> <ul>
</li>
<li> <li>
<code>CONFIG_PAGING_PAGESIZE</code>: <code>CONFIG_PAGING_PAGESIZE</code>:
The size of one managed page. The size of one managed page.
@@ -2403,30 +2402,68 @@ extern void up_ledoff(int led);
(<code>CONFIG_DRAM_VSTART</code> + <code>CONFIG_PAGING_PAGESIZE</code>*<code>CONFIG_PAGING_NLOCKED</code>) (<code>CONFIG_DRAM_VSTART</code> + <code>CONFIG_PAGING_PAGESIZE</code>*<code>CONFIG_PAGING_NLOCKED</code>)
</li> </li>
<li> <li>
<code>CONFIG_PAGING_NPAGES</code>: <code>CONFIG_PAGING_LOCKED_PBASE</code> and <code>CONFIG_PAGING_LOCKED_VBASE</code>:
The number of pages in the paged region of the memory map. These may be defined to determine the base address of the locked page regions.
This paged region then begins at If neither are defined, the logic will be set the bases to <code>CONFIG_DRAM_START</code>
(<code>CONFIG_DRAM_VSTART</code> + <code>CONFIG_PAGING_PAGESIZE</code>*<code>CONFIG_PAGING_NLOCKED</code>) and <code>CONFIG_DRAM_VSTART</code> (i.e., it assumes that the base address of the locked
and continues until (<code>CONFIG_DRAM_VSTART</code> + region is at the beginning of RAM).
<code>CONFIG_PAGING_PAGESIZE</code>*(<code>CONFIG_PAGING_NLOCKED</code> + <code>CONFIG_PAGING_NPAGES</code>) <b>NOTE</b>:
In some architectures, it may be necessary to take some memory from the beginning
of this region for vectors or for a page table.
In such cases, <code>CONFIG_PAGING_LOCKED_P/VBASE</code> should take that into consideration
to prevent overlapping the locked memory region and the system data at the beginning of SRAM.
</li>
<li>
<code>CONFIG_PAGING_NPPAGED</code>:
This is the number of physical pages available to support the paged text region.
This paged region begins at
(<code>CONFIG_PAGING_LOCKED_PBASE</code> + <code>CONFIG_PAGING_PAGESIZE</code>*<code>CONFIG_PAGING_NPPAGED</code>)
and continues until
(<code>CONFIG_PAGING_LOCKED_PBASE</code> + <code>CONFIG_PAGING_PAGESIZE</code>*(<code>CONFIG_PAGING_NLOCKED</code> +
<code>CONFIG_PAGING_NPPAGED</code>)
</li>
<li>
<code>CONFIG_PAGING_NVPAGED</code>:
This actual size of the paged text region (in pages).
This is also the number of virtual pages required to support the entire paged region.
The on-demand paging feature is intended to support only the case where the virtual paged text
area is much larger the available physical pages.
Otherwise, why would you enable on-demand paging?
</li>
<li>
<code>CONFIG_PAGING_NDATA</code>:
This is the number of data pages in the memory map.
The data region will extend to the end of RAM unless overridden by a setting in the configuration file.
<b>NOTE</b>:
In some architectures, it may be necessary to take some memory from the end of RAM for page tables
or other system usage.
The configuration settings and linker directives must be cognizant of that:
<code>CONFIG_PAGING_NDATA</code> should be defined to prevent the data region from extending all the way to the end of memory.
</li> </li>
<li> <li>
<code>CONFIG_PAGING_DEFPRIO</code>: <code>CONFIG_PAGING_DEFPRIO</code>:
The default, minimum priority of the page fill worker thread. The default, minimum priority of the page fill worker thread.
The priority of the page fill work thread will be boosted boosted dynmically so that it matches the priority of the task on behalf of which it peforms the fill. The priority of the page fill work thread will be boosted boosted dynmically so that it matches the
This defines the minimum priority that will be used. priority of the task on behalf of which it peforms the fill.
Default: 50. This defines the minimum priority that will be used. Default: 50.
</li> </li>
<li> <li>
<code>CONFIG_PAGING_STACKSIZE </code>: <code>CONFIG_PAGING_STACKSIZE</code>:
Defines the size of the allocated stack for the page fill worker thread. Defines the size of the allocated stack for the page fill worker thread. Default: 1024.
Default: 1024.
</li> </li>
<li> <li>
<code>CONFIG_PAGING_BLOCKINGFILL</code>: <code>CONFIG_PAGING_BLOCKINGFILL</code>:
The architecture specific <code>up_fillpage()</code> function may be blocking or non-blocking. The architecture specific <code>up_fillpage()</code> function may be blocking or non-blocking.
If defined, this setting indicates that the <code>up_fillpage()</code> implementation will block until the transfer is completed. If defined, this setting indicates that the <code>up_fillpage()</code> implementation will block until the
Default: Undefined (non-blocking). transfer is completed. Default: Undefined (non-blocking).
</li>
<li>
<code>CONFIG_PAGING_WORKPERIOD</code>:
The page fill worker thread will wake periodically even if there is no mapping to do.
This selection controls that wake-up period (in microseconds).
This wake-up a failsafe that will handle any cases where a single is lost (that would
really be a bug and shouldn't happen!)
and also supports timeouts for case of non-blocking, asynchronous fills (see <code>CONFIG_PAGING_TIMEOUT_TICKS</code>).
</li> </li>
<li> <li>
<code>CONFIG_PAGING_TIMEOUT_TICKS</code>: <code>CONFIG_PAGING_TIMEOUT_TICKS</code>:
@@ -2434,6 +2471,23 @@ extern void up_ledoff(int led);
If the fill takes longer than this number if microseconds, then a fatal error will be declared. If the fill takes longer than this number if microseconds, then a fatal error will be declared.
Default: No timeouts monitored. Default: No timeouts monitored.
</li> </li>
<p>
Some architecture-specific settings.
Defaults are architecture specific.
If you don't know what you are doing, it is best to leave these undefined and try the system defaults:
</p>
<li>
<code>CONFIG_PAGING_VECPPAGE</code>:
This the physical address of the page in memory to be mapped to the vector address.
</li>
<li>
<code>CONFIG_PAGING_VECL2PADDR</code>:
This is the physical address of the L2 page table entry to use for the vector mapping.
</li>
<li>
<code>CONFIG_PAGING_VECL2VADDR</code>:
This is the virtual address of the L2 page table entry to use for the vector mapping.
</li>
</ul> </ul>
<p> <p>
The following can be used to disable categories of APIs supported The following can be used to disable categories of APIs supported
arch/arm/src/arm/pg_macros.h
+74 -40
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@@ -292,46 +292,49 @@
#ifdef __ASSEMBLY__ #ifdef __ASSEMBLY__
/**************************************************************************** /****************************************************************************
* Name: pg_map * Name: pg_l2map
* *
* Description: * Description:
* Write several, contiguous L2 page table entries. npages entries will be * Write several, contiguous L2 page table entries. npages entries will be
* written. This macro is used when CONFIG_PAGING is enable. This case, * written. This macro is used when CONFIG_PAGING is enable. This case,
* it is used asfollows: * it is used asfollows:
* *
* ldr r0, =PG_L2_BASE_PADDR * ldr r0, =PG_L2_BASE_PADDR <-- Address in L2 table
* ldr r1, =PG_LOCKED_PBASE * ldr r1, =PG_LOCKED_PBASE <-- Physical page memory address
* ldr r2, =CONFIG_PAGING_NLOCKED * ldr r2, =CONFIG_PAGING_NLOCKED <-- number of pages
* ldr r3, =MMUFLAGS * ldr r3, =MMUFLAGS <-- L2 MMU flags
* pg_map r0, r1, r2, r3, r4 * pg_l2map r0, r1, r2, r3, r4
* *
* Inputs: * Inputs:
* l2 - Physical start address in the L2 page table (modified) * l2 - Physical or virtual start address in the L2 page table, depending
* paddr - The physical address of the start of the region to span. Must * upon the context. (modified)
* be aligned to 1Mb section boundaries (modified) * ppage - The physical address of the start of the region to span. Must
* be aligned to 1Mb section boundaries (modified)
* npages - Number of pages to write in the section (modified) * npages - Number of pages to write in the section (modified)
* mmuflags - L2 MMU FLAGS * mmuflags - L2 MMU FLAGS
* *
* Scratch registers (modified): tmp * Scratch registers (modified): tmp
* l2 - Physical address in the L2 page table. * l2 - Next address in the L2 page table.
* ppage - Start of next physical page
* npages - Loop counter
* tmp - scratch * tmp - scratch
* *
* Assumptions: * Assumptions:
* - The MMU is not yet enabled * - The MMU is not yet enabled
* - The L2 page tables have been zeroed prior to calling this function * - The L2 page tables have been zeroed prior to calling this function
* - pg_span has been called to initialize the L1 table. * - pg_l1span has been called to initialize the L1 table.
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_PAGING #ifdef CONFIG_PAGING
.macro pg_map, paddr, npages, mmuflags, l2, tmp .macro pg_l2map, l2, ppage, npages, mmuflags, tmp
b 2f b 2f
1: 1:
/* Write the one L2 entries. First, get tmp = (paddr | mmuflags), /* Write the one L2 entries. First, get tmp = (ppage | mmuflags),
* the value to write into the L2 PTE * the value to write into the L2 PTE
*/ */
orr \tmp, \paddr, \mmuflags orr \tmp, \ppage, \mmuflags
/* Write value into table at the current table address */ /* Write value into table at the current table address */
@@ -341,7 +344,7 @@
* table entry. * table entry.
*/ */
add \paddr, \paddr, #CONFIG_PAGING_PAGESIZE add \ppage, \ppage, #CONFIG_PAGING_PAGESIZE
add \l2, \l2, #4 add \l2, \l2, #4
/* Decrement the number of pages written */ /* Decrement the number of pages written */
@@ -357,7 +360,7 @@
#endif /* CONFIG_PAGING */ #endif /* CONFIG_PAGING */
/**************************************************************************** /****************************************************************************
* Name: pg_span * Name: pg_l1span
* *
* Description: * Description:
* Write several, contiguous unmapped coarse L1 page table entries. As * Write several, contiguous unmapped coarse L1 page table entries. As
@@ -365,24 +368,24 @@
* macro is used when CONFIG_PAGING is enable. This case, it is used as * macro is used when CONFIG_PAGING is enable. This case, it is used as
* follows: * follows:
* *
* ldr r0, =PG_L2_BASE_PADDR * ldr r0, =PGTABLE_BASE_PADDR <-- Address in L1 table
* ldr r1, =PG_LOCKED_PBASE * ldr r1, =PG_LOCKED_VBASE <-- Virtual address of region
* ldr r2, =(CONFIG_PAGING_NLOCKED+CONFIG_PAGING_NPAGES) * pg_l1addr r0, r1, r0
* ldr r3, =MMU_FLAGS * ldr r1, =PG_LOCKED_PBASE <-- Physical address of region
* pg_span r0, r1, r2, r3, r4 * ldr r1, =(CONFIG_PAGING_NLOCKED+CONFIG_PAGING_NVPAGED) <-- number of pages
* ldr r3, =MMU_FLAGS <-- L1 MMU flags
* pg_l1span r0, r1, r2, r3, r4
* *
* Inputs (unmodified unless noted): * Inputs (unmodified unless noted):
* l1 - Physical or virtual address in the L1 table to begin writing (modified)
* l2 - Physical start address in the L2 page table (modified) * l2 - Physical start address in the L2 page table (modified)
* addr - The virtual address of the start of the region to span. Must
* be aligned to 1Mb section boundaries (modified)
* npages - Number of pages to required to span that memory region (modified) * npages - Number of pages to required to span that memory region (modified)
* mmuflags - L1 MMU flags to use * mmuflags - L1 MMU flags to use
* *
* Scratch registers (modified): * Scratch registers (modified): l1, l2, npages, tmp
* addr, npages, tmp * l1 - Next L1 table address
* l2 - L2 page table physical address * l2 - Physical start address of the next L2 page table
* addr - Physical address in the L1 page table. * npages - Loop counter
* npages - The number of pages remaining to be accounted for
* tmp - scratch * tmp - scratch
* *
* Return: * Return:
@@ -395,32 +398,24 @@
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_PAGING #ifdef CONFIG_PAGING
.macro pg_span, l2, addr, npages, mmuflags, tmp .macro pg_l1span, l1, l2, npages, mmuflags, tmp
/* Get addr = the L1 page table address coresponding to the virtual
* address of the start of memory region to be mapped.
*/
ldr \tmp, =PGTABLE_BASE_PADDR
lsr \addr, \addr, #20
add \addr, \tmp, \addr, lsl #2
b 2f b 2f
1: 1:
/* Write the L1 table entry that refers to this (unmapped) coarse page /* Write the L1 table entry that refers to this (unmapped) coarse page
* table. * table.
* *
* tmp = (paddr | mmuflags), the value to write into the page table * tmp = (l2table | mmuflags), the value to write into the page table
*/ */
orr \tmp, \l2, \mmuflags orr \tmp, \l2, \mmuflags
/* Write the value into the L1 table at the correct offset. */ /* Write the value into the L1 table at the correct offset. */
str \tmp, [\addr], #4 str \tmp, [\l1], #4
/* Update the L2 page table address for the next L1 table entry. */ /* Update the L2 page table address for the next L1 table entry. */
add \l2, \l2, #PT_SIZE /* Next L2 page table start paddr */ add \l2, \l2, #PT_SIZE /* Next L2 page table start address */
/* Update the number of pages that we have account for (with /* Update the number of pages that we have account for (with
* non-mappings * non-mappings
@@ -436,6 +431,45 @@
bgt 1b bgt 1b
.endm .endm
/****************************************************************************
* Name: pg_l1addr
*
* Description:
* Given the start of an L1 table and a virtual address, return the offset
* address into the L1 table for that address.
*
* ldr r0, =PGTABLE_BASE_PADDR
* ldr r1, =PG_LOCKED_VBASE
* pg_l1addr r0, r1, r0
*
* Inputs (unmodified unless noted):
* l1 - The physical or virtual address of the start of the L1 table
* vaddr - The virtual address of the start of the region to span. Must
* be aligned to 1Mb section boundaries (modified)
* npages - Number of pages to required to span that memory region (modified)
* mmuflags - L1 MMU flags to use
*
* Scratch registers (modified): vaddr
*
* Return:
* The offset L1 table address is returned in result.
*
* Assumptions:
* None
*
****************************************************************************/
#ifdef CONFIG_PAGING
.macro pg_l1addr, l1, vaddr, result
/* Get result = the L1 table address coresponding to a virtual
* address.
*/
lsr \vaddr, \vaddr, #20
add \result, \l1, \vaddr, lsl #2
.endm
#endif /* CONFIG_PAGING */ #endif /* CONFIG_PAGING */
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
arch/arm/src/arm/up_head.S
+30 -24
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@@ -185,34 +185,36 @@ __start:
* effect. First populate the L1 table for the locked and paged * effect. First populate the L1 table for the locked and paged
* text regions. * text regions.
* *
* We could probably make the the pg_span and pg_map macros into * We could probably make the the pg_l1span and pg_l2map macros into
* call-able subroutines, but we would have to be carefully during * call-able subroutines, but we would have to be carefully during
* this phase while we are operating in a physical address space. * this phase while we are operating in a physical address space.
*/ */
adr r0, .Ltxtspan adr r0, .Ltxtspan
ldmia r0, {r0, r1, r2, r3} ldmia r0, {r0, r1, r2, r3, r4}
pg_span r0, r1, r2, r3, r4 pg_l1addr r0, r1, r0
pg_l1span r0, r2, r3, r4, r1
/* Then populate the L2 table for the locked text region only. */ /* Then populate the L2 table for the locked text region only. */
adr r0, .Ltxtmap adr r0, .Ltxtmap
ldmia r0, {r0, r1, r2, r3} ldmia r0, {r0, r1, r2, r3}
pg_map r0, r1, r2, r3, r4 pg_l2map r0, r1, r2, r3, r4
/* Make sure that the page table is itself mapped and and read/write-able. /* Make sure that the page table is itself mapped and and read/write-able.
* First, populate the L1 table: * First, populate the L1 table:
*/ */
adr r0, .Lptabspan adr r0, .Lptabspan
ldmia r0, {r0, r1, r2, r3} ldmia r0, {r0, r1, r2, r3, r4}
pg_span r0, r1, r2, r3, r4 pg_l1addr r0, r1, r0
pg_l1span r0, r2, r3, r4, r1
/* Then populate the L2 table. */ /* Then populate the L2 table. */
adr r0, .Lptabmap adr r0, .Lptabmap
ldmia r0, {r0, r1, r2, r3} ldmia r0, {r0, r1, r2, r3}
pg_map r0, r1, r2, r3, r4 pg_l2map r0, r1, r2, r3, r4
#else #else
/* Create a virtual single section mapping for the first MB of the .text /* Create a virtual single section mapping for the first MB of the .text
@@ -350,27 +352,29 @@ __start:
#ifdef CONFIG_PAGING #ifdef CONFIG_PAGING
.Ltxtspan: .Ltxtspan:
.long PG_L2_TEXT_PADDR /* Physical address of L2 table */ .long PGTABLE_BASE_PADDR /* Physical address of L1 table */
.long PG_TEXT_VBASE /* Virtual address of text base */ .long PG_L2_TEXT_VADDR /* Virtual address of the L2 page table */
.long PG_TEXT_NVPAGES /* Total virtual text pages to be mapped */ .long PG_L2_TEXT_PADDR /* Physical address of the L2 page table */
.long PG_TEXT_NVPAGES /* Total (virtual) text pages to be mapped */
.long MMU_L1_TEXTFLAGS /* L1 MMU flags to use */ .long MMU_L1_TEXTFLAGS /* L1 MMU flags to use */
.Ltxtmap: .Ltxtmap:
.long PG_L2_LOCKED_PADDR /* Physical address of L2 table */ .long PG_L2_LOCKED_PADDR /* Physical address of L2 table */
.long PG_LOCKED_PBASE /* Physical address of locked base */ .long PG_LOCKED_PBASE /* Physical address of locked base memory */
.long CONFIG_PAGING_NLOCKED /* Number of pages in the locked region */ .long CONFIG_PAGING_NLOCKED /* Number of pages in the locked region */
.long MMU_L2_TEXTFLAGS /* L2 MMU flags to use */ .long MMU_L2_TEXTFLAGS /* L2 MMU flags to use */
.Lptabspan: .Lptabspan:
.long PG_L2_PGTABLE_PADDR /* Physical address of L2 table */ .long PGTABLE_BASE_PADDR /* Physical address of L1 table */
.long PGTABLE_BASE_VADDR /* Virtual address of the page table */ .long PG_L2_PGTABLE_VADDR /* Virtual address of the L2 page table */
.long PG_TEXT_NPAGES /* Total mapped page table pages */ .long PG_L2_PGTABLE_PADDR /* Physical address of the L2 page table */
.long PG_PGTABLE_NPAGES /* Total mapped page table pages */
.long MMU_L1_PGTABFLAGS /* L1 MMU flags to use */ .long MMU_L1_PGTABFLAGS /* L1 MMU flags to use */
.Lptabmap: .Lptabmap:
.long PG_L2_PGTABLE_PADDR /* Physical address of L2 table */ .long PG_L2_PGTABLE_PADDR /* Physical address of L2 table */
.long PGTABLE_BASE_PADDR /* Physical address of the page table */ .long PGTABLE_BASE_PADDR /* Physical address of the page table memory */
.long CONFIG_PAGING_NLOCKED /* Total mapped page table pages */ .long PG_PGTABLE_NPAGES /* Total mapped page table pages */
.long MMU_L2_PGTABFLAGS /* L2 MMU flags to use */ .long MMU_L2_PGTABFLAGS /* L2 MMU flags to use */
#endif #endif
.size _start, .-_start .size _start, .-_start
@@ -403,14 +407,15 @@ __start:
/* Populate the L1 table for the data regions */ /* Populate the L1 table for the data regions */
adr r0, .Ldataspan adr r0, .Ldataspan
ldmia r0, {r0, r1, r2, r3} ldmia r0, {r0, r1, r2, r3, r4}
pg_span r0, r1, r2, r3, r4 pg_l1addr r0, r1, r0
pg_l1span r0, r2, r3, r4, r1
/* Populate the L2 table for the data region */ /* Populate the L2 table for the data region */
adr r0, .Ldatamap adr r0, .Ldatamap
ldmia r0, {r0, r1, r2, r3} ldmia r0, {r0, r1, r2, r3}
pg_map r0, r1, r2, r3, r4 pg_l2map r0, r1, r2, r3, r4
#elif defined(CONFIG_BOOT_RUNFROMFLASH) #elif defined(CONFIG_BOOT_RUNFROMFLASH)
# error "Logic not implemented" # error "Logic not implemented"
@@ -508,14 +513,15 @@ __start:
#ifdef CONFIG_PAGING #ifdef CONFIG_PAGING
.Ldataspan: .Ldataspan:
.long PG_L2_DATA_PADDR /* Physical address of L2 table */ .long PGTABLE_BASE_VADDR /* Virtual address of the L1 table */
.long PG_DATA_PBASE /* Physical address of data base */ .long PG_L2_DATA_VADDR /* Virtual address of the L2 page table */
.long PG_L2_DATA_PADDR /* Physical address of the L2 page table */
.long PG_DATA_NPAGED /* Number of pages in the data region */ .long PG_DATA_NPAGED /* Number of pages in the data region */
.long MMU_L1_DATAFLAGS /* L1 MMU flags to use */ .long MMU_L1_DATAFLAGS /* L1 MMU flags to use */
.Ldatamap: .Ldatamap:
.long PG_L2_DATA_PADDR /* Physical address of L2 table */ .long PG_L2_DATA_VADDR /* Virtual address of L2 table */
.long PG_DATA_VBASE /* Virtual address of data base */ .long PG_DATA_VBASE /* Virtual address of data memory */
.long PG_DATA_NPAGED /* Number of pages in the data region */ .long PG_DATA_NPAGED /* Number of pages in the data region */
.long MMU_L2_DATAFLAGS /* L2 MMU flags to use */ .long MMU_L2_DATAFLAGS /* L2 MMU flags to use */
#endif #endif
arch/arm/src/arm/up_prefetchabort.c
+1 -13
View File
@@ -54,19 +54,7 @@
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* Configuration ************************************************************/ /* Debug ********************************************************************/
#ifdef CONFIG_PAGING
# ifndef CONFIG_PAGING_PAGESIZE
# error "CONFIG_PAGING_PAGESIZE is not defined in your .config file"
# endif
# ifndef CONFIG_PAGING_NLOCKED
# error "CONFIG_PAGING_NLOCKED is not defined in your .config file"
# endif
# ifndef CONFIG_PAGING_NPAGES
# error "CONFIG_PAGING_NPAGES is not defined in your .config file"
# endif
#endif
/* Output debug info if stack dump is selected -- even if /* Output debug info if stack dump is selected -- even if
* debug is not selected. * debug is not selected.
configs/README.txt
+49 -7
View File
@@ -272,15 +272,40 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_PAGING_PAGESIZE - The size of one managed page. This must CONFIG_PAGING_PAGESIZE - The size of one managed page. This must
be a value supported by the processor's memory management unit. be a value supported by the processor's memory management unit.
CONFIG_PAGING_NLOCKED - This is the number of locked pages in the CONFIG_PAGING_NLOCKED - This is the number of locked pages in the
memory map. The locked address region will then be from memory map. The locked address region will then be from
CONFIG_DRAM_VSTART through (CONFIG_DRAM_VSTART + CONFIG_DRAM_VSTART through (CONFIG_DRAM_VSTART +
CONFIG_PAGING_PAGESIZE*CONFIG_PAGING_NLOCKED) CONFIG_PAGING_PAGESIZE*CONFIG_PAGING_NLOCKED)
CONFIG_PAGING_NPAGES - The number of pages in the paged region of CONFIG_PAGING_LOCKED_PBASE and CONFIG_PAGING_LOCKED_VBASE - These
the memory map. This paged region then begins at (CONFIG_DRAM_VSTART + may be defined to determine the base address of the locked page
CONFIG_PAGING_PAGESIZE*CONFIG_PAGING_NLOCKED) and continues until regions. If neither are defined, the logic will be set the bases
(CONFIG_DRAM_VSTART + CONFIG_PAGING_PAGESIZE*(CONFIG_PAGING_NLOCKED + to CONFIG_DRAM_START and CONFIG_DRAM_VSTART (i.e., it assumes
CONFIG_PAGING_NPAGES) that the base address of the locked region is at the beginning
of RAM).
NOTE: In some architectures, it may be necessary to take some
memory from the beginning of this region for vectors or for a
page table. In such cases, CONFIG_PAGING_LOCKED_P/VBASE should
take that into consideration to prevent overlapping the locked
memory region and the system data at the beginning of SRAM.
CONFIG_PAGING_NPPAGED - This is the number of physical pages
available to support the paged text region. This paged region
begins at (CONFIG_PAGING_LOCKED_PBASE + CONFIG_PAGING_PAGESIZE*CONFIG_PAGING_NPPAGED)
and continues until (CONFIG_PAGING_LOCKED_PBASE + CONFIG_PAGING_PAGESIZE*(CONFIG_PAGING_NLOCKED +
CONFIG_PAGING_NPPAGED)
CONFIG_PAGING_NVPAGED - This actual size of the paged text region
(in pages). This is also the number of virtual pages required to
support the entire paged region. The on-demand paging feature is
intended to support only the case where the virtual paged text
area is much larger the available physical pages. Otherwise, why
would you enable on-demand paging?
CONFIG_PAGING_NDATA - This is the number of data pages in the memory
map. The data region will extend to the end of RAM unless overridden
by a setting in the configuration file.
NOTE: In some architectures, it may be necessary to take some memory
from the end of RAM for page tables or other system usage. The
configuration settings and linker directives must be cognizant of that:
CONFIG_PAGING_NDATA should be defined to prevent the data region from
extending all the way to the end of memory.
CONFIG_PAGING_DEFPRIO - The default, minimum priority of the page fill CONFIG_PAGING_DEFPRIO - The default, minimum priority of the page fill
worker thread. The priority of the page fill work thread will be boosted worker thread. The priority of the page fill work thread will be boosted
boosted dynmically so that it matches the priority of the task on behalf boosted dynmically so that it matches the priority of the task on behalf
@@ -292,11 +317,28 @@ defconfig -- This is a configuration file similar to the Linux
function may be blocking or non-blocking. If defined, this setting function may be blocking or non-blocking. If defined, this setting
indicates that the up_fillpage() implementation will block until the indicates that the up_fillpage() implementation will block until the
transfer is completed. Default: Undefined (non-blocking). transfer is completed. Default: Undefined (non-blocking).
CONFIG_PAGING_WORKPERIOD - The page fill worker thread will wake periodically
even if there is no mapping to do. This selection controls that wake-up
period (in microseconds). This wake-up a failsafe that will handle any
cases where a single is lost (that would really be a bug and shouldn't
happen!) and also supports timeouts for case of non-blocking, asynchronous
fills (see CONFIG_PAGING_TIMEOUT_TICKS).
CONFIG_PAGING_TIMEOUT_TICKS - If defined, the implementation will monitor CONFIG_PAGING_TIMEOUT_TICKS - If defined, the implementation will monitor
the (asynchronous) page fill logic. If the fill takes longer than this the (asynchronous) page fill logic. If the fill takes longer than this
number if microseconds, then a fatal error will be declared. number if microseconds, then a fatal error will be declared.
Default: No timeouts monitored. Default: No timeouts monitored.
Some architecture-specific settings. Defaults are architecture specific.
If you don't know what you are doing, it is best to leave these undefined
and try the system defaults:
CONFIG_PAGING_VECPPAGE - This the physical address of the page in
memory to be mapped to the vector address.
CONFIG_PAGING_VECL2PADDR - This is the physical address of the L2
page table entry to use for the vector mapping.
CONFIG_PAGING_VECL2VADDR - This is the virtual address of the L2
page table entry to use for the vector mapping.
The following can be used to disable categories of APIs supported The following can be used to disable categories of APIs supported
by the OS. If the compiler supports weak functions, then it by the OS. If the compiler supports weak functions, then it
should not be necessary to disable functions unless you want to should not be necessary to disable functions unless you want to
@@ -416,7 +458,7 @@ defconfig -- This is a configuration file similar to the Linux
CONFIG_NET - Enable or disable all network features CONFIG_NET - Enable or disable all network features
CONFIG_NET_IPv6 - Build in support for IPv6 CONFIG_NET_IPv6 - Build in support for IPv6
CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors
per task/thread. per task/thread.
CONFIG_NET_NACTIVESOCKETS - Maximum number of concurrent socket CONFIG_NET_NACTIVESOCKETS - Maximum number of concurrent socket
operations (recv, send, etc.). Default: CONFIG_NET_TCP_CONNS+CONFIG_NET_UDP_CONNS operations (recv, send, etc.). Default: CONFIG_NET_TCP_CONNS+CONFIG_NET_UDP_CONNS
CONFIG_NET_SOCKOPTS - Enable or disable support for socket options CONFIG_NET_SOCKOPTS - Enable or disable support for socket options
include/nuttx/page.h
+15 -8
View File
@@ -85,10 +85,10 @@
#define PG_LOCKED_SIZE (CONFIG_PAGING_NLOCKED << PAGESHIFT) #define PG_LOCKED_SIZE (CONFIG_PAGING_NLOCKED << PAGESHIFT)
/* CONFIG_PAGING_LOCKED_P/VBASE - May be defined to determine the base /* CONFIG_PAGING_LOCKED_P/VBASE - May be defined to determine the base
* address of the locked page regions (lowest in memory). If both are not * address of the locked page regions (lowest in memory). If neither
* not defined, then this logic will be set to then to CONFIG_DRAM_START * are defined, then this logic will be set the bases to CONFIG_DRAM_START
* and CONFIG_DRAM_VSTART (i.e., assuming that the base address of the * and CONFIG_DRAM_VSTART (i.e., it assumes that the base address of the
* locked region is at the virtual address of the beginning of RAM). * locked region is at the beginning of RAM).
* *
* NOTE: In some architectures, it may be necessary to take some memory * NOTE: In some architectures, it may be necessary to take some memory
* from the beginning of this region for vectors or for a page table. * from the beginning of this region for vectors or for a page table.
@@ -116,9 +116,10 @@
* support the paged text region. * support the paged text region.
* CONFIG_PAGING_NVPAGED - This actual size of the paged text region (in * CONFIG_PAGING_NVPAGED - This actual size of the paged text region (in
* pages). This is also the number of virtual pages required to support * pages). This is also the number of virtual pages required to support
* the entire paged retion. This feature is intended to support only the * the entire paged region. The on-demand paging feature is intended to
* case where the virtual paged text area is much larger the available * support only the case where the virtual paged text area is much larger
* physical pages. Otherwise, why would you being on-demand paging? * the available physical pages. Otherwise, why would you enable on-demand
* paging?
*/ */
#if CONFIG_PAGING_NPPAGED >= CONFIG_PAGING_NVPAGED #if CONFIG_PAGING_NPPAGED >= CONFIG_PAGING_NVPAGED
@@ -165,7 +166,7 @@
* *
* NOTE: In some architectures, it may be necessary to take some memory * NOTE: In some architectures, it may be necessary to take some memory
* from the end of RAM for page tables or other system usage. The * from the end of RAM for page tables or other system usage. The
* configuration settings and linker directives must be cognizant of that. * configuration settings and linker directives must be cognizant of that:
* CONFIG_PAGING_NDATA should be defined to prevent the data region from * CONFIG_PAGING_NDATA should be defined to prevent the data region from
* extending all the way to the end of memory. * extending all the way to the end of memory.
*/ */
@@ -206,6 +207,12 @@
* function may be blocking or non-blocking. If defined, this setting * function may be blocking or non-blocking. If defined, this setting
* indicates that the up_fillpage() implementation will block until the * indicates that the up_fillpage() implementation will block until the
* transfer is completed. Default: Undefined (non-blocking). * transfer is completed. Default: Undefined (non-blocking).
* CONFIG_PAGING_WORKPERIOD - The page fill worker thread will wake periodically
* even if there is no mapping to do. This selection controls that wake-up
* period (in microseconds). This wake-up a failsafe that will handle any
* cases where a single is lost (that would really be a bug and shouldn't
* happen!) and also supports timeouts for case of non-blocking, asynchronous
* fills (see CONFIG_PAGING_TIMEOUT_TICKS).
* CONFIG_PAGING_TIMEOUT_TICKS - If defined, the implementation will monitor * CONFIG_PAGING_TIMEOUT_TICKS - If defined, the implementation will monitor
* the (asynchronous) page fill logic. If the fill takes longer than this * the (asynchronous) page fill logic. If the fill takes longer than this
* number if microseconds, then a fatal error will be declared. * number if microseconds, then a fatal error will be declared.