diff --git a/lib/system/generic/alloc.h b/lib/system/generic/alloc.h
index bcceba6..0729b4f 100644
--- a/lib/system/generic/alloc.h
+++ b/lib/system/generic/alloc.h
@@ -24,7 +24,7 @@ extern "C" {
 
 static inline void *metal_allocate_memory(unsigned int size)
 {
-	return (malloc(size));
+	return malloc(size);
 }
 
 static inline void metal_free_memory(void *ptr)
diff --git a/lib/system/generic/condition.c b/lib/system/generic/condition.c
index 9107569..a9560e8 100644
--- a/lib/system/generic/condition.c
+++ b/lib/system/generic/condition.c
@@ -42,7 +42,7 @@ int metal_condition_wait(struct metal_condition *cv,
 		}
 		metal_generic_default_poll();
 		metal_irq_restore_enable(flags);
-	} while(1);
+	} while (1);
 	/* Acquire the mutex again. */
 	metal_mutex_acquire(m);
 	return 0;
diff --git a/lib/system/generic/condition.h b/lib/system/generic/condition.h
index 285988c..70cc19f 100644
--- a/lib/system/generic/condition.h
+++ b/lib/system/generic/condition.h
@@ -28,10 +28,11 @@ extern "C" {
 
 struct metal_condition {
 	atomic_uintptr_t mptr; /**< mutex pointer.
-				    The condition variable is attached to
-				    this mutex when it is waiting.
-				    It is also used to check correctness
-				    in case there are multiple waiters. */
+				 * The condition variable is attached to
+				 * this mutex when it is waiting.
+				 * It is also used to check correctness
+				 * in case there are multiple waiters.
+				 */
 
 	atomic_int v; /**< condition variable value. */
 };
diff --git a/lib/system/generic/device.c b/lib/system/generic/device.c
index d01fd3c..ec6e538 100644
--- a/lib/system/generic/device.c
+++ b/lib/system/generic/device.c
@@ -17,7 +17,7 @@
 int metal_generic_dev_sys_open(struct metal_device *dev)
 {
 	struct metal_io_region *io;
-	unsigned i;
+	unsigned int i;
 
 	/* map I/O memory regions */
 	for (i = 0; i < dev->num_regions; i++) {
diff --git a/lib/system/generic/microblaze_generic/sys.c b/lib/system/generic/microblaze_generic/sys.c
index edd0ec1..c2145d1 100644
--- a/lib/system/generic/microblaze_generic/sys.c
+++ b/lib/system/generic/microblaze_generic/sys.c
@@ -39,6 +39,7 @@ unsigned int sys_irq_save_disable(void)
 void sys_irq_restore_enable(unsigned int flags)
 {
 	unsigned int tmp;
+
 	if (flags)
 		asm volatile("  msrset %0, %1	\n"
 			 :  "=r"(tmp)
@@ -113,20 +114,18 @@ void metal_weak sys_irq_disable(unsigned int vector)
 
 void metal_machine_cache_flush(void *addr, unsigned int len)
 {
-	if (!addr && !len){
+	if (!addr && !len) {
 		Xil_DCacheFlush();
-	}
-	else{
+	} else{
 		Xil_DCacheFlushRange((intptr_t)addr, len);
 	}
 }
 
 void metal_machine_cache_invalidate(void *addr, unsigned int len)
 {
-	if (!addr && !len){
+	if (!addr && !len) {
 		Xil_DCacheInvalidate();
-	}
-	else {
+	} else {
 		Xil_DCacheInvalidateRange((intptr_t)addr, len);
 	}
 }
diff --git a/lib/system/generic/xlnx_common/irq.c b/lib/system/generic/xlnx_common/irq.c
index 5cbce32..717078b 100644
--- a/lib/system/generic/xlnx_common/irq.c
+++ b/lib/system/generic/xlnx_common/irq.c
@@ -42,7 +42,7 @@ static METAL_IRQ_CONTROLLER_DECLARE(xlnx_irq_cntr,
 				    0, MAX_IRQS,
 				    NULL,
 				    metal_xlnx_irq_set_enable, NULL,
-				    irqs)
+				    irqs);
 
 /**
  * @brief default handler
diff --git a/lib/system/generic/zynq7/sys.c b/lib/system/generic/zynq7/sys.c
index 037832e..db5fc50 100644
--- a/lib/system/generic/zynq7/sys.c
+++ b/lib/system/generic/zynq7/sys.c
@@ -20,10 +20,10 @@
 #include "xscugic.h"
 
 /* Each TTB descriptor covers a 1MB region */
-#define     ARM_AR_MEM_TTB_SECT_SIZE               1024*1024
+#define     ARM_AR_MEM_TTB_SECT_SIZE      (1024*1024)
 
 /* Mask off lower bits of addr */
-#define     ARM_AR_MEM_TTB_SECT_SIZE_MASK          (~(ARM_AR_MEM_TTB_SECT_SIZE-1UL))
+#define     ARM_AR_MEM_TTB_SECT_SIZE_MASK (~(ARM_AR_MEM_TTB_SECT_SIZE-1UL))
 
 void sys_irq_restore_enable(unsigned int flags)
 {
@@ -34,7 +34,7 @@ unsigned int sys_irq_save_disable(void)
 {
 	unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
 
-	if (XIL_EXCEPTION_ALL != state) {
+	if (state != XIL_EXCEPTION_ALL) {
 		Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
 	}
 	return state;
@@ -72,12 +72,16 @@ void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
 
 	if (!flags)
 		return va;
-	/* Ensure the virtual and physical addresses are aligned on a
-	   section boundary */
+	/*
+	 * Ensure the virtual and physical addresses are aligned on a
+	 * section boundary
+	 */
 	pa &= ARM_AR_MEM_TTB_SECT_SIZE_MASK;
 
-	/* Loop through entire region of memory (one MMU section at a time).
-	   Each section requires a TTB entry. */
+	/*
+	 * Loop through entire region of memory (one MMU section at a time).
+	 * Each section requires a TTB entry.
+	 */
 	for (section_offset = 0; section_offset < size;
 	     section_offset += ARM_AR_MEM_TTB_SECT_SIZE) {
 
diff --git a/lib/system/generic/zynq7/sys.h b/lib/system/generic/zynq7/sys.h
index 5dd830e..481a05c 100644
--- a/lib/system/generic/zynq7/sys.h
+++ b/lib/system/generic/zynq7/sys.h
@@ -29,12 +29,12 @@ extern "C" {
 
 static inline void sys_irq_enable(unsigned int vector)
 {
-        XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+	XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
 }
 
 static inline void sys_irq_disable(unsigned int vector)
 {
-        XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+	XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
 }
 
 #endif /* METAL_INTERNAL */
diff --git a/lib/system/generic/zynqmp_a53/sys.c b/lib/system/generic/zynqmp_a53/sys.c
index a636284..a3c3fd8 100644
--- a/lib/system/generic/zynqmp_a53/sys.c
+++ b/lib/system/generic/zynqmp_a53/sys.c
@@ -31,7 +31,7 @@ unsigned int sys_irq_save_disable(void)
 {
 	unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
 
-	if (XIL_EXCEPTION_ALL != state) {
+	if (state != XIL_EXCEPTION_ALL) {
 		Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
 	}
 	return state;
@@ -66,7 +66,7 @@ void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
 {
 	unsigned long section_offset;
 	unsigned long ttb_addr;
-#if defined (__aarch64__)
+#if defined(__aarch64__)
 	unsigned long ttb_size = (pa < 4*GB) ? 2*MB : 1*GB;
 #else
 	unsigned long ttb_size = 1*MB;
@@ -78,8 +78,10 @@ void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
 	/* Ensure alignement on a section boundary */
 	pa &= ~(ttb_size-1UL);
 
-	/* Loop through entire region of memory (one MMU section at a time).
-	   Each section requires a TTB entry. */
+	/*
+	 * Loop through entire region of memory (one MMU section at a time).
+	 * Each section requires a TTB entry.
+	 */
 	for (section_offset = 0; section_offset < size; ) {
 		/* Calculate translation table entry for this memory section */
 		ttb_addr = (pa + section_offset);
@@ -87,9 +89,12 @@ void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
 		/* Write translation table entry value to entry address */
 		Xil_SetTlbAttributes(ttb_addr, flags);
 
-#if defined (__aarch64__)
-		/* recalculate if we started below 4GB and going above in 64bit mode */ 
-		if ( ttb_addr >= 4*GB ) {
+#if defined(__aarch64__)
+		/*
+		 * recalculate if we started below 4GB and going above in
+		 * 64bit mode
+		 */
+		if (ttb_addr >= 4*GB) {
 			ttb_size = 1*GB;
 		}
 #endif
diff --git a/lib/system/generic/zynqmp_a53/sys.h b/lib/system/generic/zynqmp_a53/sys.h
index bc2858b..6cfaaf3 100644
--- a/lib/system/generic/zynqmp_a53/sys.h
+++ b/lib/system/generic/zynqmp_a53/sys.h
@@ -29,12 +29,12 @@ extern "C" {
 
 static inline void sys_irq_enable(unsigned int vector)
 {
-        XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+	XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
 }
 
 static inline void sys_irq_disable(unsigned int vector)
 {
-        XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+	XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
 }
 
 #endif /* METAL_INTERNAL */
diff --git a/lib/system/generic/zynqmp_r5/sys.c b/lib/system/generic/zynqmp_r5/sys.c
index 0d5498d..d6c2622 100644
--- a/lib/system/generic/zynqmp_r5/sys.c
+++ b/lib/system/generic/zynqmp_r5/sys.c
@@ -31,7 +31,7 @@ unsigned int sys_irq_save_disable(void)
 {
 	unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL;
 
-	if (XIL_EXCEPTION_ALL != state) {
+	if (state != XIL_EXCEPTION_ALL) {
 		Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL);
 	}
 	return state;
@@ -69,7 +69,7 @@ void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa,
 
 	if (!flags)
 		return va;
-	while(1) {
+	while (1) {
 		if (rsize < size) {
 			rsize <<= 1;
 			continue;
diff --git a/lib/system/generic/zynqmp_r5/sys.h b/lib/system/generic/zynqmp_r5/sys.h
index 62586dd..ad37485 100644
--- a/lib/system/generic/zynqmp_r5/sys.h
+++ b/lib/system/generic/zynqmp_r5/sys.h
@@ -29,12 +29,12 @@ extern "C" {
 
 static inline void sys_irq_enable(unsigned int vector)
 {
-        XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+	XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
 }
 
 static inline void sys_irq_disable(unsigned int vector)
 {
-        XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
+	XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector);
 }
 
 #endif /* METAL_INTERNAL */