diff --git a/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc b/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
index 79be5184a6..4eba7c1b6b 100644
--- a/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
+++ b/Ghidra/Processors/ARM/data/languages/ARMinstructions.sinc
@@ -2573,6 +2573,14 @@ ArmPCRelImmed12: reloff		is U23=0 & immed & rotate
   goto [pc];
 }
 
+:cpy^COND pc,lr 		is $(AMODE) & ARMcond=1 & LRset=0 & COND & pc & c2527=0 & S20=0 & c2124=13 & c1619=0 & Rd=15 & sftimm=0 & c0406=0 & Rm=14 & lr
+{
+  build COND;
+  dest:4 = lr;
+  ALUWritePC(dest);
+  return [pc];
+}
+
 :cpy^COND pc,rm 	is $(AMODE) & ARMcond=1 & LRset=1 & COND & pc & c2027=0x1a & c1619=0 & c0411=0 & Rd=15 & rm
 {
   build COND;
@@ -3581,14 +3589,6 @@ ArmPCRelImmed12: reloff		is U23=0 & immed & rotate
   lr = rm;
 }
 
-:mov^COND pc,lr 		is $(AMODE) & pc & ARMcond=1 & COND & c2527=0 & S20=0 & c2124=13 & c1619=0 & Rd=15 & sftimm=0 & c0406=0 & Rm=14 & lr
-{
-  build COND;
-  dest:4 = lr;
-  ALUWritePC(dest);
-  return [pc];
-}
-
 @if defined(VERSION_6T2)
 
 :movw^COND Rd,"#"^val		is $(AMODE) & ARMcond=1 & COND & c2027=0x30 & c1619 & Rd & c0011 [ val = (c1619 << 12) | c0011; ]		{