From d0650fa0ef4a1a3fd5a02385f06be2b385c1e4de Mon Sep 17 00:00:00 2001 From: Sleigh-InSPECtor Date: Tue, 30 Apr 2024 15:05:50 +0930 Subject: [PATCH] AA64: fix stlrb and stlrh store sizes --- Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc b/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc index 2811de5d48..a3d57128ed 100644 --- a/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc +++ b/Ghidra/Processors/AARCH64/data/languages/AARCH64base.sinc @@ -5659,7 +5659,7 @@ is size.ldstr=2 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR :stlrb Rt_GPR32, addrReg is size.ldstr=0 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR32 { - *addrReg = Rt_GPR32; + *:1 addrReg = Rt_GPR32:1; } # C6.2.312 STLRH page C6-1849 line 108967 MATCH x48808000/mask=xffe08000 @@ -5670,7 +5670,7 @@ is size.ldstr=0 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR :stlrh Rt_GPR32, addrReg is size.ldstr=1 & b_2429=0x8 & b_23=1 & L=0 & b_21=0 & b_15=1 & addrReg & Rt_GPR32 { - *addrReg = Rt_GPR32; + *:2 addrReg = Rt_GPR32:2; } # C6.2.313 STLUR page C6-1850 line 109030 MATCH x99000000/mask=xbfe00c00