diff --git a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
index e839c4f829..fad56769f5 100644
--- a/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
+++ b/Ghidra/Processors/ARM/data/languages/ARMTHUMBinstructions.sinc
@@ -1443,22 +1443,31 @@ macro th_set_carry_for_asr(op1,shift_count) {
 
 @ifndef VERSION_6T2
 
-:bl^ItCond 	"#"^off 			is TMode=1 & ItCond & op11=0x1e & soffset11 [ off = inst_start + 4 + (soffset11 << 12); ]
+:bl^ItCond "#"^off		is TMode=1 & ItCond & op11=0x1e & soffset11 [ off = inst_start + 4 + (soffset11 << 12); ]
 {
   build ItCond;
   lr = off:4;
 }
 
-:bl^ItCond 	"#"^off 			is TMode=1 & ItCond & op11=0x1f & offset11 [ off = offset11 << 1; ]
+:bl^ItCond "#"^off		is TMode=1 & ItCond & op11=0x1f & offset11 [ off = offset11 << 1; ]
 {
   build ItCond;
   local dest = lr + off:4;
   lr = inst_next|1;
   SetThumbMode(1);
-  goto [dest];
+  call [dest];
 }
 
-:blx^ItCond 	"#"^off 			is TMode=1 & ItCond & op11=0x1d & offset11 & thc0000=0 [ off = offset11 << 1; ]
+:bl^ItCond lr			is TMode=1 & ItCond & op11=0x1f & offset11=0 & lr
+{
+  build ItCond;
+  local dest = lr;
+  lr = inst_next|1;
+  SetThumbMode(1);
+  call [dest];
+}
+
+:blx^ItCond "#"^off 	is TMode=1 & ItCond & op11=0x1d & offset11 & thc0000=0 [ off = offset11 << 1; ]
 {
   build ItCond;
   local dest = (lr & (~0x3)) + off:4;
@@ -1466,6 +1475,16 @@ macro th_set_carry_for_asr(op1,shift_count) {
   SetThumbMode(0);
   call [dest];
 }
+
+:blx^ItCond lr			is TMode=1 & ItCond & op11=0x1d & offset11=0 & thc0000=0 & lr
+{
+  build ItCond;
+  local dest = (lr & (~0x3));
+  lr = inst_next|1;
+  SetThumbMode(0);
+  call [dest];
+}
+
 @endif
 
 :bl^ItCond 	ThAddr24 			is TMode=1 & CALLoverride=1 & ItCond & (op11=0x1e; part2c1415=3 & part2c1212=1) & ThAddr24