diff --git a/Ghidra/Processors/MIPS/data/languages/mips32Instructions.sinc b/Ghidra/Processors/MIPS/data/languages/mips32Instructions.sinc
index e3b7acc0d2..4b32189316 100644
--- a/Ghidra/Processors/MIPS/data/languages/mips32Instructions.sinc
+++ b/Ghidra/Processors/MIPS/data/languages/mips32Instructions.sinc
@@ -1644,7 +1644,13 @@ define pcodeop SYNC;
 	build RTsrc;
 	tmp:$(REGSIZE) = sext(simmed:2) + RTsrc;	
 	JXWritePC(tmp); 
-    call [pc];
+    goto [pc];
+}
+
+:jic RTsrc, simmed                                      is $(AMODE) & REL6=1 & prime=0x36 & jsub=0x00 & RTsrc & simmed & immed=0x00 & rt=0x1f {
+        build RTsrc;
+        JXWritePC(ra);
+	return [pc];
 }
 
 @ifndef COPR_C